[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / ata.h


/*
 *  Copyright 2003-2004 Red Hat, Inc.  All rights reserved.
 *  Copyright 2003-2004 Jeff Garzik
 *
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; see the file COPYING.  If not, write to
 *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *
 *  libata documentation is available via 'make {ps|pdf}docs',
 *  as Documentation/DocBook/libata.*
 *
 *  Hardware documentation available from http://www.t13.org/
 *
 */

#ifndef __LINUX_ATA_H__
#define __LINUX_ATA_H__

#include <linux/types.h>

/* defines only for the constants which don't work well as enums */
#define ATA_DMA_BOUNDARY	0xffffUL
#define ATA_DMA_MASK		0xffffffffULL

enum {
	/* various global constants */
	ATA_MAX_DEVICES		= 2,	/* per bus/port */
	ATA_MAX_PRD		= 256,	/* we could make these 256/256 */
	ATA_SECT_SIZE		= 512,
	ATA_MAX_SECTORS_128	= 128,
	ATA_MAX_SECTORS		= 256,
	ATA_MAX_SECTORS_LBA48	= 65535,/* TODO: 65536? */
	ATA_MAX_SECTORS_TAPE	= 65535,

	ATA_ID_WORDS		= 256,
	ATA_ID_SERNO		= 10,
	ATA_ID_FW_REV		= 23,
	ATA_ID_PROD		= 27,
	ATA_ID_OLD_PIO_MODES	= 51,
	ATA_ID_FIELD_VALID	= 53,
	ATA_ID_MWDMA_MODES	= 63,
	ATA_ID_PIO_MODES	= 64,
	ATA_ID_EIDE_DMA_MIN	= 65,
	ATA_ID_EIDE_PIO		= 67,
	ATA_ID_EIDE_PIO_IORDY	= 68,
	ATA_ID_UDMA_MODES	= 88,
	ATA_ID_MAJOR_VER	= 80,
	ATA_ID_PIO4		= (1 << 1),

	ATA_ID_SERNO_LEN	= 20,
	ATA_ID_FW_REV_LEN	= 8,
	ATA_ID_PROD_LEN		= 40,

	ATA_PCI_CTL_OFS		= 2,

	ATA_PIO0		= (1 << 0),
	ATA_PIO1		= ATA_PIO0 | (1 << 1),
	ATA_PIO2		= ATA_PIO1 | (1 << 2),
	ATA_PIO3		= ATA_PIO2 | (1 << 3),
	ATA_PIO4		= ATA_PIO3 | (1 << 4),
	ATA_PIO5		= ATA_PIO4 | (1 << 5),
	ATA_PIO6		= ATA_PIO5 | (1 << 6),

	ATA_SWDMA0		= (1 << 0),
	ATA_SWDMA1		= ATA_SWDMA0 | (1 << 1),
	ATA_SWDMA2		= ATA_SWDMA1 | (1 << 2),

	ATA_SWDMA2_ONLY		= (1 << 2),

	ATA_MWDMA0		= (1 << 0),
	ATA_MWDMA1		= ATA_MWDMA0 | (1 << 1),
	ATA_MWDMA2		= ATA_MWDMA1 | (1 << 2),

	ATA_MWDMA12_ONLY	= (1 << 1) | (1 << 2),
	ATA_MWDMA2_ONLY		= (1 << 2),

	ATA_UDMA0		= (1 << 0),
	ATA_UDMA1		= ATA_UDMA0 | (1 << 1),
	ATA_UDMA2		= ATA_UDMA1 | (1 << 2),
	ATA_UDMA3		= ATA_UDMA2 | (1 << 3),
	ATA_UDMA4		= ATA_UDMA3 | (1 << 4),
	ATA_UDMA5		= ATA_UDMA4 | (1 << 5),
	ATA_UDMA6		= ATA_UDMA5 | (1 << 6),
	ATA_UDMA7		= ATA_UDMA6 | (1 << 7),
	/* ATA_UDMA7 is just for completeness... doesn't exist (yet?).  */

	ATA_UDMA_MASK_40C	= ATA_UDMA2,	/* udma0-2 */

	/* DMA-related */
	ATA_PRD_SZ		= 8,
	ATA_PRD_TBL_SZ		= (ATA_MAX_PRD * ATA_PRD_SZ),
	ATA_PRD_EOT		= (1 << 31),	/* end-of-table flag */

	ATA_DMA_TABLE_OFS	= 4,
	ATA_DMA_STATUS		= 2,
	ATA_DMA_CMD		= 0,
	ATA_DMA_WR		= (1 << 3),
	ATA_DMA_START		= (1 << 0),
	ATA_DMA_INTR		= (1 << 2),
	ATA_DMA_ERR		= (1 << 1),
	ATA_DMA_ACTIVE		= (1 << 0),

	/* bits in ATA command block registers */
	ATA_HOB			= (1 << 7),	/* LBA48 selector */
	ATA_NIEN		= (1 << 1),	/* disable-irq flag */
	ATA_LBA			= (1 << 6),	/* LBA28 selector */
	ATA_DEV1		= (1 << 4),	/* Select Device 1 (slave) */
	ATA_DEVICE_OBS		= (1 << 7) | (1 << 5), /* obs bits in dev reg */
	ATA_DEVCTL_OBS		= (1 << 3),	/* obsolete bit in devctl reg */
	ATA_BUSY		= (1 << 7),	/* BSY status bit */
	ATA_DRDY		= (1 << 6),	/* device ready */
	ATA_DF			= (1 << 5),	/* device fault */
	ATA_DRQ			= (1 << 3),	/* data request i/o */
	ATA_ERR			= (1 << 0),	/* have an error */
	ATA_SRST		= (1 << 2),	/* software reset */
	ATA_ICRC		= (1 << 7),	/* interface CRC error */
	ATA_UNC			= (1 << 6),	/* uncorrectable media error */
	ATA_IDNF		= (1 << 4),	/* ID not found */
	ATA_ABORTED		= (1 << 2),	/* command aborted */

	/* ATA command block registers */
	ATA_REG_DATA		= 0x00,
	ATA_REG_ERR		= 0x01,
	ATA_REG_NSECT		= 0x02,
	ATA_REG_LBAL		= 0x03,
	ATA_REG_LBAM		= 0x04,
	ATA_REG_LBAH		= 0x05,
	ATA_REG_DEVICE		= 0x06,
	ATA_REG_STATUS		= 0x07,

	ATA_REG_FEATURE		= ATA_REG_ERR, /* and their aliases */
	ATA_REG_CMD		= ATA_REG_STATUS,
	ATA_REG_BYTEL		= ATA_REG_LBAM,
	ATA_REG_BYTEH		= ATA_REG_LBAH,
	ATA_REG_DEVSEL		= ATA_REG_DEVICE,
	ATA_REG_IRQ		= ATA_REG_NSECT,

	/* ATA device commands */
	ATA_CMD_DEV_RESET	= 0x08, /* ATAPI device reset */
	ATA_CMD_CHK_POWER	= 0xE5, /* check power mode */
	ATA_CMD_STANDBY		= 0xE2, /* place in standby power mode */
	ATA_CMD_IDLE		= 0xE3, /* place in idle power mode */
	ATA_CMD_EDD		= 0x90,	/* execute device diagnostic */
	ATA_CMD_FLUSH		= 0xE7,
	ATA_CMD_FLUSH_EXT	= 0xEA,
	ATA_CMD_ID_ATA		= 0xEC,
	ATA_CMD_ID_ATAPI	= 0xA1,
	ATA_CMD_READ		= 0xC8,
	ATA_CMD_READ_EXT	= 0x25,
	ATA_CMD_WRITE		= 0xCA,
	ATA_CMD_WRITE_EXT	= 0x35,
	ATA_CMD_WRITE_FUA_EXT	= 0x3D,
	ATA_CMD_FPDMA_READ	= 0x60,
	ATA_CMD_FPDMA_WRITE	= 0x61,
	ATA_CMD_PIO_READ	= 0x20,
	ATA_CMD_PIO_READ_EXT	= 0x24,
	ATA_CMD_PIO_WRITE	= 0x30,
	ATA_CMD_PIO_WRITE_EXT	= 0x34,
	ATA_CMD_READ_MULTI	= 0xC4,
	ATA_CMD_READ_MULTI_EXT	= 0x29,
	ATA_CMD_WRITE_MULTI	= 0xC5,
	ATA_CMD_WRITE_MULTI_EXT	= 0x39,
	ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
	ATA_CMD_SET_FEATURES	= 0xEF,
	ATA_CMD_SET_MULTI	= 0xC6,
	ATA_CMD_PACKET		= 0xA0,
	ATA_CMD_VERIFY		= 0x40,
	ATA_CMD_VERIFY_EXT	= 0x42,
	ATA_CMD_STANDBYNOW1	= 0xE0,
	ATA_CMD_IDLEIMMEDIATE	= 0xE1,
	ATA_CMD_SLEEP		= 0xE6,
	ATA_CMD_INIT_DEV_PARAMS	= 0x91,
	ATA_CMD_READ_NATIVE_MAX	= 0xF8,
	ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
	ATA_CMD_SET_MAX		= 0xF9,
	ATA_CMD_SET_MAX_EXT	= 0x37,
	ATA_CMD_READ_LOG_EXT	= 0x2f,
	ATA_CMD_PMP_READ	= 0xE4,
	ATA_CMD_PMP_WRITE	= 0xE8,

	/* READ_LOG_EXT pages */
	ATA_LOG_SATA_NCQ	= 0x10,

	/* READ/WRITE LONG (obsolete) */
	ATA_CMD_READ_LONG	= 0x22,
	ATA_CMD_READ_LONG_ONCE	= 0x23,
	ATA_CMD_WRITE_LONG	= 0x32,
	ATA_CMD_WRITE_LONG_ONCE	= 0x33,

	/* SETFEATURES stuff */
	SETFEATURES_XFER	= 0x03,
	XFER_UDMA_7		= 0x47,
	XFER_UDMA_6		= 0x46,
	XFER_UDMA_5		= 0x45,
	XFER_UDMA_4		= 0x44,
	XFER_UDMA_3		= 0x43,
	XFER_UDMA_2		= 0x42,
	XFER_UDMA_1		= 0x41,
	XFER_UDMA_0		= 0x40,
	XFER_MW_DMA_4		= 0x24,	/* CFA only */
	XFER_MW_DMA_3		= 0x23,	/* CFA only */
	XFER_MW_DMA_2		= 0x22,
	XFER_MW_DMA_1		= 0x21,
	XFER_MW_DMA_0		= 0x20,
	XFER_SW_DMA_2		= 0x12,
	XFER_SW_DMA_1		= 0x11,
	XFER_SW_DMA_0		= 0x10,
	XFER_PIO_6		= 0x0E,	/* CFA only */
	XFER_PIO_5		= 0x0D,	/* CFA only */
	XFER_PIO_4		= 0x0C,
	XFER_PIO_3		= 0x0B,
	XFER_PIO_2		= 0x0A,
	XFER_PIO_1		= 0x09,
	XFER_PIO_0		= 0x08,
	XFER_PIO_SLOW		= 0x00,

	SETFEATURES_WC_ON	= 0x02, /* Enable write cache */
	SETFEATURES_WC_OFF	= 0x82, /* Disable write cache */

	SETFEATURES_SPINUP	= 0x07, /* Spin-up drive */

	SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
	SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */

	/* SETFEATURE Sector counts for SATA features */
	SATA_AN			= 0x05,  /* Asynchronous Notification */
	SATA_DIPM		= 0x03,  /* Device Initiated Power Management */

	/* ATAPI stuff */
	ATAPI_PKT_DMA		= (1 << 0),
	ATAPI_DMADIR		= (1 << 2),	/* ATAPI data dir:
						   0=to device, 1=to host */
	ATAPI_CDB_LEN		= 16,

	/* PMP stuff */
	SATA_PMP_MAX_PORTS	= 15,
	SATA_PMP_CTRL_PORT	= 15,

	SATA_PMP_GSCR_DWORDS	= 128,
	SATA_PMP_GSCR_PROD_ID	= 0,
	SATA_PMP_GSCR_REV	= 1,
	SATA_PMP_GSCR_PORT_INFO	= 2,
	SATA_PMP_GSCR_ERROR	= 32,
	SATA_PMP_GSCR_ERROR_EN	= 33,
	SATA_PMP_GSCR_FEAT	= 64,
	SATA_PMP_GSCR_FEAT_EN	= 96,

	SATA_PMP_PSCR_STATUS	= 0,
	SATA_PMP_PSCR_ERROR	= 1,
	SATA_PMP_PSCR_CONTROL	= 2,

	SATA_PMP_FEAT_BIST	= (1 << 0),
	SATA_PMP_FEAT_PMREQ	= (1 << 1),
	SATA_PMP_FEAT_DYNSSC	= (1 << 2),
	SATA_PMP_FEAT_NOTIFY	= (1 << 3),

	/* cable types */
	ATA_CBL_NONE		= 0,
	ATA_CBL_PATA40		= 1,
	ATA_CBL_PATA80		= 2,
	ATA_CBL_PATA40_SHORT	= 3,		/* 40 wire cable to high UDMA spec */
	ATA_CBL_PATA_UNK	= 4,
	ATA_CBL_SATA		= 5,

	/* SATA Status and Control Registers */
	SCR_STATUS		= 0,
	SCR_ERROR		= 1,
	SCR_CONTROL		= 2,
	SCR_ACTIVE		= 3,
	SCR_NOTIFICATION	= 4,

	/* SError bits */
	SERR_DATA_RECOVERED	= (1 << 0), /* recovered data error */
	SERR_COMM_RECOVERED	= (1 << 1), /* recovered comm failure */
	SERR_DATA		= (1 << 8), /* unrecovered data error */
	SERR_PERSISTENT		= (1 << 9), /* persistent data/comm error */
	SERR_PROTOCOL		= (1 << 10), /* protocol violation */
	SERR_INTERNAL		= (1 << 11), /* host internal error */
	SERR_PHYRDY_CHG		= (1 << 16), /* PHY RDY changed */
	SERR_PHY_INT_ERR	= (1 << 17), /* PHY internal error */
	SERR_COMM_WAKE		= (1 << 18), /* Comm wake */
	SERR_10B_8B_ERR		= (1 << 19), /* 10b to 8b decode error */
	SERR_DISPARITY		= (1 << 20), /* Disparity */
	SERR_CRC		= (1 << 21), /* CRC error */
	SERR_HANDSHAKE		= (1 << 22), /* Handshake error */
	SERR_LINK_SEQ_ERR	= (1 << 23), /* Link sequence error */
	SERR_TRANS_ST_ERROR	= (1 << 24), /* Transport state trans. error */
	SERR_UNRECOG_FIS	= (1 << 25), /* Unrecognized FIS */
	SERR_DEV_XCHG		= (1 << 26), /* device exchanged */

	/* struct ata_taskfile flags */
	ATA_TFLAG_LBA48		= (1 << 0), /* enable 48-bit LBA and "HOB" */
	ATA_TFLAG_ISADDR	= (1 << 1), /* enable r/w to nsect/lba regs */
	ATA_TFLAG_DEVICE	= (1 << 2), /* enable r/w to device reg */
	ATA_TFLAG_WRITE		= (1 << 3), /* data dir: host->dev==1 (write) */
	ATA_TFLAG_LBA		= (1 << 4), /* enable LBA */
	ATA_TFLAG_FUA		= (1 << 5), /* enable FUA */
	ATA_TFLAG_POLLING	= (1 << 6), /* set nIEN to 1 and use polling */
};

enum ata_tf_protocols {
	/* ATA taskfile protocols */
	ATA_PROT_UNKNOWN,	/* unknown/invalid */
	ATA_PROT_NODATA,	/* no data */
	ATA_PROT_PIO,		/* PIO data xfer */
	ATA_PROT_DMA,		/* DMA */
	ATA_PROT_NCQ,		/* NCQ */
	ATA_PROT_ATAPI,		/* packet command, PIO data xfer*/
	ATA_PROT_ATAPI_NODATA,	/* packet command, no data */
	ATA_PROT_ATAPI_DMA,	/* packet command with special DMA sauce */
};

enum ata_ioctls {
	ATA_IOC_GET_IO32	= 0x309,
	ATA_IOC_SET_IO32	= 0x324,
};

/* core structures */

struct ata_prd {
	u32			addr;
	u32			flags_len;
};

struct ata_taskfile {
	unsigned long		flags;		/* ATA_TFLAG_xxx */
	u8			protocol;	/* ATA_PROT_xxx */

	u8			ctl;		/* control reg */

	u8			hob_feature;	/* additional data */
	u8			hob_nsect;	/* to support LBA48 */
	u8			hob_lbal;
	u8			hob_lbam;
	u8			hob_lbah;

	u8			feature;
	u8			nsect;
	u8			lbal;
	u8			lbam;
	u8			lbah;

	u8			device;

	u8			command;	/* IO operation */
};

#define ata_id_is_ata(id)	(((id)[0] & (1 << 15)) == 0)
#define ata_id_has_lba(id)	((id)[49] & (1 << 9))
#define ata_id_has_dma(id)	((id)[49] & (1 << 8))
#define ata_id_has_ncq(id)	((id)[76] & (1 << 8))
#define ata_id_queue_depth(id)	(((id)[75] & 0x1f) + 1)
#define ata_id_removeable(id)	((id)[0] & (1 << 7))
#define ata_id_has_dword_io(id)	((id)[48] & (1 << 0))
#define ata_id_has_atapi_AN(id)	\
	( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
	  ((id)[78] & (1 << 5)) )
#define ata_id_iordy_disable(id) ((id)[49] & (1 << 10))
#define ata_id_has_iordy(id) ((id)[49] & (1 << 11))
#define ata_id_u32(id,n)	\
	(((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
#define ata_id_u64(id,n)	\
	( ((u64) (id)[(n) + 3] << 48) |	\
	  ((u64) (id)[(n) + 2] << 32) |	\
	  ((u64) (id)[(n) + 1] << 16) |	\
	  ((u64) (id)[(n) + 0]) )

#define ata_id_cdb_intr(id)	(((id)[0] & 0x60) == 0x20)

static inline bool ata_id_has_hipm(const u16 *id)
{
	u16 val = id[76];

	if (val == 0 || val == 0xffff)
		return false;

	return val & (1 << 9);
}

static inline bool ata_id_has_dipm(const u16 *id)
{
	u16 val = id[78];

	if (val == 0 || val == 0xffff)
		return false;

	return val & (1 << 3);
}

static inline int ata_id_has_fua(const u16 *id)
{
	if ((id[84] & 0xC000) != 0x4000)
		return 0;
	return id[84] & (1 << 6);
}

static inline int ata_id_has_flush(const u16 *id)
{
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	return id[83] & (1 << 12);
}

static inline int ata_id_has_flush_ext(const u16 *id)
{
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	return id[83] & (1 << 13);
}

static inline int ata_id_has_lba48(const u16 *id)
{
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	if (!ata_id_u64(id, 100))
		return 0;
	return id[83] & (1 << 10);
}

static inline int ata_id_hpa_enabled(const u16 *id)
{
	/* Yes children, word 83 valid bits cover word 82 data */
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	/* And 87 covers 85-87 */
	if ((id[87] & 0xC000) != 0x4000)
		return 0;
	/* Check command sets enabled as well as supported */
	if ((id[85] & ( 1 << 10)) == 0)
		return 0;
	return id[82] & (1 << 10);
}

static inline int ata_id_has_wcache(const u16 *id)
{
	/* Yes children, word 83 valid bits cover word 82 data */
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	return id[82] & (1 << 5);
}

static inline int ata_id_has_pm(const u16 *id)
{
	if ((id[83] & 0xC000) != 0x4000)
		return 0;
	return id[82] & (1 << 3);
}

static inline int ata_id_rahead_enabled(const u16 *id)
{
	if ((id[87] & 0xC000) != 0x4000)
		return 0;
	return id[85] & (1 << 6);
}

static inline int ata_id_wcache_enabled(const u16 *id)
{
	if ((id[87] & 0xC000) != 0x4000)
		return 0;
	return id[85] & (1 << 5);
}

/**
 *	ata_id_major_version	-	get ATA level of drive
 *	@id: Identify data
 *
 *	Caveats:
 *		ATA-1 considers identify optional
 *		ATA-2 introduces mandatory identify
 *		ATA-3 introduces word 80 and accurate reporting
 *
 *	The practical impact of this is that ata_id_major_version cannot
 *	reliably report on drives below ATA3.
 */

static inline unsigned int ata_id_major_version(const u16 *id)
{
	unsigned int mver;

	if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
		return 0;

	for (mver = 14; mver >= 1; mver--)
		if (id[ATA_ID_MAJOR_VER] & (1 << mver))
			break;
	return mver;
}

static inline int ata_id_is_sata(const u16 *id)
{
	return ata_id_major_version(id) >= 5 && id[93] == 0;
}

static inline int ata_id_current_chs_valid(const u16 *id)
{
	/* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
	   has not been issued to the device then the values of
	   id[54] to id[56] are vendor specific. */
	return (id[53] & 0x01) && /* Current translation valid */
		id[54] &&  /* cylinders in current translation */
		id[55] &&  /* heads in current translation */
		id[55] <= 16 &&
		id[56];    /* sectors in current translation */
}

static inline int ata_id_is_cfa(const u16 *id)
{
	u16 v = id[0];
	if (v == 0x848A)	/* Standard CF */
		return 1;
	/* Could be CF hiding as standard ATA */
	if (ata_id_major_version(id) >= 3 &&  id[82] != 0xFFFF &&
			(id[82] & ( 1 << 2)))
		return 1;
	return 0;
}

static inline int ata_drive_40wire(const u16 *dev_id)
{
	if (ata_id_is_sata(dev_id))
		return 0;	/* SATA */
	if ((dev_id[93] & 0xE000) == 0x6000)
		return 0;	/* 80 wire */
	return 1;
}

static inline int ata_drive_40wire_relaxed(const u16 *dev_id)
{
	if (ata_id_is_sata(dev_id))
		return 0;	/* SATA */
	if ((dev_id[93] & 0x2000) == 0x2000)
		return 0;	/* 80 wire */
	return 1;
}

static inline int atapi_cdb_len(const u16 *dev_id)
{
	u16 tmp = dev_id[0] & 0x3;
	switch (tmp) {
	case 0:		return 12;
	case 1:		return 16;
	default:	return -1;
	}
}

static inline int atapi_command_packet_set(const u16 *dev_id)
{
	return (dev_id[0] >> 8) & 0x1f;
}

static inline int is_atapi_taskfile(const struct ata_taskfile *tf)
{
	return (tf->protocol == ATA_PROT_ATAPI) ||
	       (tf->protocol == ATA_PROT_ATAPI_NODATA) ||
	       (tf->protocol == ATA_PROT_ATAPI_DMA);
}

static inline int is_multi_taskfile(struct ata_taskfile *tf)
{
	return (tf->command == ATA_CMD_READ_MULTI) ||
	       (tf->command == ATA_CMD_WRITE_MULTI) ||
	       (tf->command == ATA_CMD_READ_MULTI_EXT) ||
	       (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
	       (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
}

static inline int ata_ok(u8 status)
{
	return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
			== ATA_DRDY);
}

static inline int lba_28_ok(u64 block, u32 n_block)
{
	/* check the ending block number */
	return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
}

static inline int lba_48_ok(u64 block, u32 n_block)
{
	/* check the ending block number */
	return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
}

#define sata_pmp_gscr_vendor(gscr)	((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
#define sata_pmp_gscr_devid(gscr)	((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
#define sata_pmp_gscr_rev(gscr)		(((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
#define sata_pmp_gscr_ports(gscr)	((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)

#endif /* __LINUX_ATA_H__ */
Commit	Line	Data
1da177e4 LT	1
1da177e4 LT	2	/*
af36d7f0 JG	3	* Copyright 2003-2004 Red Hat, Inc. All rights reserved.
	4	* Copyright 2003-2004 Jeff Garzik
	5	*
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2, or (at your option)
	10	* any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; see the file COPYING. If not, write to
	19	* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
	20	*
	21	*
	22	* libata documentation is available via 'make {ps\|pdf}docs',
	23	* as Documentation/DocBook/libata.*
	24	*
	25	* Hardware documentation available from http://www.t13.org/
	26	*
1da177e4 LT	27	*/
	28
	29	#ifndef __LINUX_ATA_H__
	30	#define __LINUX_ATA_H__
	31
	32	#include <linux/types.h>
	33
	34	/* defines only for the constants which don't work well as enums */
	35	#define ATA_DMA_BOUNDARY 0xffffUL
	36	#define ATA_DMA_MASK 0xffffffffULL
	37
	38	enum {
	39	/* various global constants */
	40	ATA_MAX_DEVICES = 2, /* per bus/port */
	41	ATA_MAX_PRD = 256, /* we could make these 256/256 */
	42	ATA_SECT_SIZE = 512,
18d6e9d5	43	ATA_MAX_SECTORS_128 = 128,
8b881b04 JG	44	ATA_MAX_SECTORS = 256,
8b881b04 JG	45	ATA_MAX_SECTORS_LBA48 = 65535,/* TODO: 65536? */
f8d8e579	46	ATA_MAX_SECTORS_TAPE = 65535,
1da177e4 LT	47
1da177e4 LT	48	ATA_ID_WORDS = 256,
a0cf733b TH	49	ATA_ID_SERNO = 10,
	50	ATA_ID_FW_REV = 23,
	51	ATA_ID_PROD = 27,
11e29e21 AC	52	ATA_ID_OLD_PIO_MODES = 51,
11e29e21 AC	53	ATA_ID_FIELD_VALID = 53,
1da177e4	54	ATA_ID_MWDMA_MODES = 63,
11e29e21 AC	55	ATA_ID_PIO_MODES = 64,
	56	ATA_ID_EIDE_DMA_MIN = 65,
	57	ATA_ID_EIDE_PIO = 67,
	58	ATA_ID_EIDE_PIO_IORDY = 68,
1da177e4	59	ATA_ID_UDMA_MODES = 88,
11e29e21	60	ATA_ID_MAJOR_VER = 80,
1da177e4 LT	61	ATA_ID_PIO4 = (1 << 1),
1da177e4 LT	62
a0cf733b TH	63	ATA_ID_SERNO_LEN = 20,
	64	ATA_ID_FW_REV_LEN = 8,
	65	ATA_ID_PROD_LEN = 40,
	66
1da177e4	67	ATA_PCI_CTL_OFS = 2,
4099d143 BZ	68
	69	ATA_PIO0 = (1 << 0),
	70	ATA_PIO1 = ATA_PIO0 \| (1 << 1),
	71	ATA_PIO2 = ATA_PIO1 \| (1 << 2),
	72	ATA_PIO3 = ATA_PIO2 \| (1 << 3),
	73	ATA_PIO4 = ATA_PIO3 \| (1 << 4),
	74	ATA_PIO5 = ATA_PIO4 \| (1 << 5),
	75	ATA_PIO6 = ATA_PIO5 \| (1 << 6),
	76
91a6d4ed BZ	77	ATA_SWDMA0 = (1 << 0),
	78	ATA_SWDMA1 = ATA_SWDMA0 \| (1 << 1),
	79	ATA_SWDMA2 = ATA_SWDMA1 \| (1 << 2),
	80
	81	ATA_SWDMA2_ONLY = (1 << 2),
	82
	83	ATA_MWDMA0 = (1 << 0),
	84	ATA_MWDMA1 = ATA_MWDMA0 \| (1 << 1),
	85	ATA_MWDMA2 = ATA_MWDMA1 \| (1 << 2),
	86
	87	ATA_MWDMA12_ONLY = (1 << 1) \| (1 << 2),
	88	ATA_MWDMA2_ONLY = (1 << 2),
	89
1da177e4 LT	90	ATA_UDMA0 = (1 << 0),
	91	ATA_UDMA1 = ATA_UDMA0 \| (1 << 1),
	92	ATA_UDMA2 = ATA_UDMA1 \| (1 << 2),
	93	ATA_UDMA3 = ATA_UDMA2 \| (1 << 3),
	94	ATA_UDMA4 = ATA_UDMA3 \| (1 << 4),
	95	ATA_UDMA5 = ATA_UDMA4 \| (1 << 5),
	96	ATA_UDMA6 = ATA_UDMA5 \| (1 << 6),
	97	ATA_UDMA7 = ATA_UDMA6 \| (1 << 7),
	98	/* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
	99
	100	ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
	101
	102	/* DMA-related */
	103	ATA_PRD_SZ = 8,
	104	ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
	105	ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
	106
	107	ATA_DMA_TABLE_OFS = 4,
	108	ATA_DMA_STATUS = 2,
	109	ATA_DMA_CMD = 0,
	110	ATA_DMA_WR = (1 << 3),
	111	ATA_DMA_START = (1 << 0),
	112	ATA_DMA_INTR = (1 << 2),
	113	ATA_DMA_ERR = (1 << 1),
	114	ATA_DMA_ACTIVE = (1 << 0),
	115
	116	/* bits in ATA command block registers */
	117	ATA_HOB = (1 << 7), /* LBA48 selector */
	118	ATA_NIEN = (1 << 1), /* disable-irq flag */
	119	ATA_LBA = (1 << 6), /* LBA28 selector */
	120	ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
	121	ATA_DEVICE_OBS = (1 << 7) \| (1 << 5), /* obs bits in dev reg */
	122	ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
	123	ATA_BUSY = (1 << 7), /* BSY status bit */
	124	ATA_DRDY = (1 << 6), /* device ready */
	125	ATA_DF = (1 << 5), /* device fault */
	126	ATA_DRQ = (1 << 3), /* data request i/o */
	127	ATA_ERR = (1 << 0), /* have an error */
	128	ATA_SRST = (1 << 2), /* software reset */
9be1e979 TH	129	ATA_ICRC = (1 << 7), /* interface CRC error */
	130	ATA_UNC = (1 << 6), /* uncorrectable media error */
	131	ATA_IDNF = (1 << 4), /* ID not found */
1da177e4 LT	132	ATA_ABORTED = (1 << 2), /* command aborted */
	133
	134	/* ATA command block registers */
	135	ATA_REG_DATA = 0x00,
	136	ATA_REG_ERR = 0x01,
	137	ATA_REG_NSECT = 0x02,
	138	ATA_REG_LBAL = 0x03,
	139	ATA_REG_LBAM = 0x04,
	140	ATA_REG_LBAH = 0x05,
	141	ATA_REG_DEVICE = 0x06,
	142	ATA_REG_STATUS = 0x07,
	143
	144	ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
	145	ATA_REG_CMD = ATA_REG_STATUS,
	146	ATA_REG_BYTEL = ATA_REG_LBAM,
	147	ATA_REG_BYTEH = ATA_REG_LBAH,
	148	ATA_REG_DEVSEL = ATA_REG_DEVICE,
	149	ATA_REG_IRQ = ATA_REG_NSECT,
	150
	151	/* ATA device commands */
ab2181cf	152	ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
1da177e4	153	ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
972dcafb DG	154	ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
972dcafb DG	155	ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
1da177e4 LT	156	ATA_CMD_EDD = 0x90, /* execute device diagnostic */
	157	ATA_CMD_FLUSH = 0xE7,
	158	ATA_CMD_FLUSH_EXT = 0xEA,
	159	ATA_CMD_ID_ATA = 0xEC,
	160	ATA_CMD_ID_ATAPI = 0xA1,
	161	ATA_CMD_READ = 0xC8,
	162	ATA_CMD_READ_EXT = 0x25,
	163	ATA_CMD_WRITE = 0xCA,
	164	ATA_CMD_WRITE_EXT = 0x35,
9a3dccc4	165	ATA_CMD_WRITE_FUA_EXT = 0x3D,
88e49034 TH	166	ATA_CMD_FPDMA_READ = 0x60,
88e49034 TH	167	ATA_CMD_FPDMA_WRITE = 0x61,
1da177e4 LT	168	ATA_CMD_PIO_READ = 0x20,
	169	ATA_CMD_PIO_READ_EXT = 0x24,
	170	ATA_CMD_PIO_WRITE = 0x30,
	171	ATA_CMD_PIO_WRITE_EXT = 0x34,
8cbd6df1 AL	172	ATA_CMD_READ_MULTI = 0xC4,
	173	ATA_CMD_READ_MULTI_EXT = 0x29,
	174	ATA_CMD_WRITE_MULTI = 0xC5,
	175	ATA_CMD_WRITE_MULTI_EXT = 0x39,
9a3dccc4	176	ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
1da177e4	177	ATA_CMD_SET_FEATURES = 0xEF,
2c3d2a46	178	ATA_CMD_SET_MULTI = 0xC6,
1da177e4 LT	179	ATA_CMD_PACKET = 0xA0,
	180	ATA_CMD_VERIFY = 0x40,
	181	ATA_CMD_VERIFY_EXT = 0x42,
2dcb407e JG	182	ATA_CMD_STANDBYNOW1 = 0xE0,
2dcb407e JG	183	ATA_CMD_IDLEIMMEDIATE = 0xE1,
054a5fba	184	ATA_CMD_SLEEP = 0xE6,
8bf62ece	185	ATA_CMD_INIT_DEV_PARAMS = 0x91,
b6782728 AC	186	ATA_CMD_READ_NATIVE_MAX = 0xF8,
b6782728 AC	187	ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
1e999736 AC	188	ATA_CMD_SET_MAX = 0xF9,
1e999736 AC	189	ATA_CMD_SET_MAX_EXT = 0x37,
88e49034	190	ATA_CMD_READ_LOG_EXT = 0x2f,
814600ee TH	191	ATA_CMD_PMP_READ = 0xE4,
814600ee TH	192	ATA_CMD_PMP_WRITE = 0xE8,
88e49034 TH	193
	194	/* READ_LOG_EXT pages */
	195	ATA_LOG_SATA_NCQ = 0x10,
1da177e4	196
5a5dbd18 ML	197	/* READ/WRITE LONG (obsolete) */
	198	ATA_CMD_READ_LONG = 0x22,
	199	ATA_CMD_READ_LONG_ONCE = 0x23,
	200	ATA_CMD_WRITE_LONG = 0x32,
	201	ATA_CMD_WRITE_LONG_ONCE = 0x33,
	202
1da177e4 LT	203	/* SETFEATURES stuff */
	204	SETFEATURES_XFER = 0x03,
	205	XFER_UDMA_7 = 0x47,
	206	XFER_UDMA_6 = 0x46,
	207	XFER_UDMA_5 = 0x45,
	208	XFER_UDMA_4 = 0x44,
	209	XFER_UDMA_3 = 0x43,
	210	XFER_UDMA_2 = 0x42,
	211	XFER_UDMA_1 = 0x41,
	212	XFER_UDMA_0 = 0x40,
b352e57d AC	213	XFER_MW_DMA_4 = 0x24, /* CFA only */
b352e57d AC	214	XFER_MW_DMA_3 = 0x23, /* CFA only */
1da177e4 LT	215	XFER_MW_DMA_2 = 0x22,
	216	XFER_MW_DMA_1 = 0x21,
	217	XFER_MW_DMA_0 = 0x20,
b4b52db7 AC	218	XFER_SW_DMA_2 = 0x12,
	219	XFER_SW_DMA_1 = 0x11,
	220	XFER_SW_DMA_0 = 0x10,
b352e57d AC	221	XFER_PIO_6 = 0x0E, /* CFA only */
b352e57d AC	222	XFER_PIO_5 = 0x0D, /* CFA only */
1da177e4 LT	223	XFER_PIO_4 = 0x0C,
	224	XFER_PIO_3 = 0x0B,
	225	XFER_PIO_2 = 0x0A,
	226	XFER_PIO_1 = 0x09,
	227	XFER_PIO_0 = 0x08,
1da177e4 LT	228	XFER_PIO_SLOW = 0x00,
1da177e4 LT	229
3057ac3c	230	SETFEATURES_WC_ON = 0x02, /* Enable write cache */
	231	SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
	232
169439c2 ML	233	SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
169439c2 ML	234
9f45cbd3 KCA	235	SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
	236	SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
	237
	238	/* SETFEATURE Sector counts for SATA features */
	239	SATA_AN = 0x05, /* Asynchronous Notification */
ca77329f	240	SATA_DIPM = 0x03, /* Device Initiated Power Management */
9f45cbd3	241
1da177e4 LT	242	/* ATAPI stuff */
	243	ATAPI_PKT_DMA = (1 << 0),
	244	ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
	245	0=to device, 1=to host */
	246	ATAPI_CDB_LEN = 16,
	247
814600ee TH	248	/* PMP stuff */
	249	SATA_PMP_MAX_PORTS = 15,
	250	SATA_PMP_CTRL_PORT = 15,
	251
	252	SATA_PMP_GSCR_DWORDS = 128,
	253	SATA_PMP_GSCR_PROD_ID = 0,
	254	SATA_PMP_GSCR_REV = 1,
	255	SATA_PMP_GSCR_PORT_INFO = 2,
	256	SATA_PMP_GSCR_ERROR = 32,
	257	SATA_PMP_GSCR_ERROR_EN = 33,
	258	SATA_PMP_GSCR_FEAT = 64,
	259	SATA_PMP_GSCR_FEAT_EN = 96,
	260
	261	SATA_PMP_PSCR_STATUS = 0,
	262	SATA_PMP_PSCR_ERROR = 1,
	263	SATA_PMP_PSCR_CONTROL = 2,
	264
	265	SATA_PMP_FEAT_BIST = (1 << 0),
	266	SATA_PMP_FEAT_PMREQ = (1 << 1),
	267	SATA_PMP_FEAT_DYNSSC = (1 << 2),
	268	SATA_PMP_FEAT_NOTIFY = (1 << 3),
	269
1da177e4 LT	270	/* cable types */
	271	ATA_CBL_NONE = 0,
	272	ATA_CBL_PATA40 = 1,
	273	ATA_CBL_PATA80 = 2,
fc085150 AC	274	ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
	275	ATA_CBL_PATA_UNK = 4,
	276	ATA_CBL_SATA = 5,
1da177e4 LT	277
	278	/* SATA Status and Control Registers */
	279	SCR_STATUS = 0,
	280	SCR_ERROR = 1,
	281	SCR_CONTROL = 2,
	282	SCR_ACTIVE = 3,
	283	SCR_NOTIFICATION = 4,
	284
9be1e979 TH	285	/* SError bits */
	286	SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
	287	SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
	288	SERR_DATA = (1 << 8), /* unrecovered data error */
	289	SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
	290	SERR_PROTOCOL = (1 << 10), /* protocol violation */
	291	SERR_INTERNAL = (1 << 11), /* host internal error */
	292	SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
1333e194 RH	293	SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
	294	SERR_COMM_WAKE = (1 << 18), /* Comm wake */
	295	SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
	296	SERR_DISPARITY = (1 << 20), /* Disparity */
	297	SERR_CRC = (1 << 21), /* CRC error */
	298	SERR_HANDSHAKE = (1 << 22), /* Handshake error */
	299	SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
	300	SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
	301	SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
9be1e979 TH	302	SERR_DEV_XCHG = (1 << 26), /* device exchanged */
9be1e979 TH	303
1da177e4 LT	304	/* struct ata_taskfile flags */
	305	ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */
	306	ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
	307	ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
	308	ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */
8bf62ece	309	ATA_TFLAG_LBA = (1 << 4), /* enable LBA */
9a3dccc4	310	ATA_TFLAG_FUA = (1 << 5), /* enable FUA */
ea9b395f	311	ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */
1da177e4 LT	312	};
	313
	314	enum ata_tf_protocols {
	315	/* ATA taskfile protocols */
	316	ATA_PROT_UNKNOWN, /* unknown/invalid */
	317	ATA_PROT_NODATA, /* no data */
1dce589c	318	ATA_PROT_PIO, /* PIO data xfer */
1da177e4	319	ATA_PROT_DMA, /* DMA */
88e49034	320	ATA_PROT_NCQ, /* NCQ */
1da177e4 LT	321	ATA_PROT_ATAPI, /* packet command, PIO data xfer*/
	322	ATA_PROT_ATAPI_NODATA, /* packet command, no data */
	323	ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */
	324	};
	325
	326	enum ata_ioctls {
	327	ATA_IOC_GET_IO32 = 0x309,
	328	ATA_IOC_SET_IO32 = 0x324,
	329	};
	330
	331	/* core structures */
	332
	333	struct ata_prd {
	334	u32 addr;
	335	u32 flags_len;
	336	};
	337
	338	struct ata_taskfile {
	339	unsigned long flags; /* ATA_TFLAG_xxx */
	340	u8 protocol; /* ATA_PROT_xxx */
	341
	342	u8 ctl; /* control reg */
	343
	344	u8 hob_feature; /* additional data */
	345	u8 hob_nsect; /* to support LBA48 */
	346	u8 hob_lbal;
	347	u8 hob_lbam;
	348	u8 hob_lbah;
	349
	350	u8 feature;
	351	u8 nsect;
	352	u8 lbal;
	353	u8 lbam;
	354	u8 lbah;
	355
	356	u8 device;
	357
	358	u8 command; /* IO operation */
	359	};
	360
	361	#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
1da177e4 LT	362	#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
1da177e4 LT	363	#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
88e49034 TH	364	#define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
88e49034 TH	365	#define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
1da177e4	366	#define ata_id_removeable(id) ((id)[0] & (1 << 7))
c7293870	367	#define ata_id_has_dword_io(id) ((id)[48] & (1 << 0))
854c73a2	368	#define ata_id_has_atapi_AN(id) \
9f45cbd3 KCA	369	( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
9f45cbd3 KCA	370	((id)[78] & (1 << 5)) )
49554c19	371	#define ata_id_iordy_disable(id) ((id)[49] & (1 << 10))
0bc2a79a	372	#define ata_id_has_iordy(id) ((id)[49] & (1 << 11))
1da177e4 LT	373	#define ata_id_u32(id,n) \
	374	(((u32) (id)[(n) + 1] << 16) \| ((u32) (id)[(n)]))
	375	#define ata_id_u64(id,n) \
	376	( ((u64) (id)[(n) + 3] << 48) \| \
	377	((u64) (id)[(n) + 2] << 32) \| \
	378	((u64) (id)[(n) + 1] << 16) \| \
	379	((u64) (id)[(n) + 0]) )
	380
312f7da2 AL	381	#define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20)
312f7da2 AL	382
ca77329f KCA	383	static inline bool ata_id_has_hipm(const u16 *id)
	384	{
	385	u16 val = id[76];
	386
	387	if (val == 0 \|\| val == 0xffff)
	388	return false;
	389
	390	return val & (1 << 9);
	391	}
	392
	393	static inline bool ata_id_has_dipm(const u16 *id)
	394	{
	395	u16 val = id[78];
	396
	397	if (val == 0 \|\| val == 0xffff)
	398	return false;
	399
	400	return val & (1 << 3);
	401	}
	402
c7293870 AC	403	static inline int ata_id_has_fua(const u16 *id)
	404	{
	405	if ((id[84] & 0xC000) != 0x4000)
	406	return 0;
	407	return id[84] & (1 << 6);
	408	}
	409
	410	static inline int ata_id_has_flush(const u16 *id)
	411	{
	412	if ((id[83] & 0xC000) != 0x4000)
	413	return 0;
	414	return id[83] & (1 << 12);
	415	}
	416
	417	static inline int ata_id_has_flush_ext(const u16 *id)
	418	{
	419	if ((id[83] & 0xC000) != 0x4000)
	420	return 0;
	421	return id[83] & (1 << 13);
	422	}
	423
	424	static inline int ata_id_has_lba48(const u16 *id)
	425	{
	426	if ((id[83] & 0xC000) != 0x4000)
	427	return 0;
17bd9a2f GU	428	if (!ata_id_u64(id, 100))
17bd9a2f GU	429	return 0;
c7293870 AC	430	return id[83] & (1 << 10);
	431	}
	432
	433	static inline int ata_id_hpa_enabled(const u16 *id)
	434	{
	435	/* Yes children, word 83 valid bits cover word 82 data */
	436	if ((id[83] & 0xC000) != 0x4000)
	437	return 0;
	438	/* And 87 covers 85-87 */
	439	if ((id[87] & 0xC000) != 0x4000)
	440	return 0;
	441	/* Check command sets enabled as well as supported */
	442	if ((id[85] & ( 1 << 10)) == 0)
	443	return 0;
	444	return id[82] & (1 << 10);
	445	}
	446
	447	static inline int ata_id_has_wcache(const u16 *id)
	448	{
	449	/* Yes children, word 83 valid bits cover word 82 data */
	450	if ((id[83] & 0xC000) != 0x4000)
	451	return 0;
	452	return id[82] & (1 << 5);
	453	}
	454
	455	static inline int ata_id_has_pm(const u16 *id)
	456	{
	457	if ((id[83] & 0xC000) != 0x4000)
	458	return 0;
	459	return id[82] & (1 << 3);
	460	}
	461
	462	static inline int ata_id_rahead_enabled(const u16 *id)
	463	{
	464	if ((id[87] & 0xC000) != 0x4000)
	465	return 0;
	466	return id[85] & (1 << 6);
	467	}
	468
	469	static inline int ata_id_wcache_enabled(const u16 *id)
	470	{
	471	if ((id[87] & 0xC000) != 0x4000)
	472	return 0;
	473	return id[85] & (1 << 5);
	474	}
	475
	476	/**
	477	* ata_id_major_version - get ATA level of drive
	478	* @id: Identify data
	479	*
	480	* Caveats:
	481	* ATA-1 considers identify optional
	482	* ATA-2 introduces mandatory identify
	483	* ATA-3 introduces word 80 and accurate reporting
	484	*
	485	* The practical impact of this is that ata_id_major_version cannot
2dcb407e	486	* reliably report on drives below ATA3.
c7293870 AC	487	*/
c7293870 AC	488
3d2ca910 TH	489	static inline unsigned int ata_id_major_version(const u16 *id)
	490	{
	491	unsigned int mver;
	492
b352e57d AC	493	if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
	494	return 0;
	495
3d2ca910 TH	496	for (mver = 14; mver >= 1; mver--)
	497	if (id[ATA_ID_MAJOR_VER] & (1 << mver))
	498	break;
	499	return mver;
	500	}
	501
32d90911 TH	502	static inline int ata_id_is_sata(const u16 *id)
	503	{
	504	return ata_id_major_version(id) >= 5 && id[93] == 0;
	505	}
	506
057ace5e	507	static inline int ata_id_current_chs_valid(const u16 *id)
8bf62ece	508	{
9bec2e38 JG	509	/* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
9bec2e38 JG	510	has not been issued to the device then the values of
8bf62ece AL	511	id[54] to id[56] are vendor specific. */
	512	return (id[53] & 0x01) && /* Current translation valid */
	513	id[54] && /* cylinders in current translation */
	514	id[55] && /* heads in current translation */
	515	id[55] <= 16 &&
	516	id[56]; /* sectors in current translation */
	517	}
	518
b352e57d AC	519	static inline int ata_id_is_cfa(const u16 *id)
	520	{
	521	u16 v = id[0];
	522	if (v == 0x848A) /* Standard CF */
	523	return 1;
	524	/* Could be CF hiding as standard ATA */
	525	if (ata_id_major_version(id) >= 3 && id[82] != 0xFFFF &&
	526	(id[82] & ( 1 << 2)))
	527	return 1;
	528	return 0;
	529	}
	530
fc085150 AC	531	static inline int ata_drive_40wire(const u16 *dev_id)
fc085150 AC	532	{
32d90911	533	if (ata_id_is_sata(dev_id))
fc085150	534	return 0; /* SATA */
61f216c7	535	if ((dev_id[93] & 0xE000) == 0x6000)
fc085150 AC	536	return 0; /* 80 wire */
	537	return 1;
	538	}
	539
6bbfd53d AC	540	static inline int ata_drive_40wire_relaxed(const u16 *dev_id)
	541	{
	542	if (ata_id_is_sata(dev_id))
	543	return 0; /* SATA */
	544	if ((dev_id[93] & 0x2000) == 0x2000)
	545	return 0; /* 80 wire */
	546	return 1;
	547	}
	548
057ace5e	549	static inline int atapi_cdb_len(const u16 *dev_id)
1da177e4 LT	550	{
	551	u16 tmp = dev_id[0] & 0x3;
	552	switch (tmp) {
	553	case 0: return 12;
	554	case 1: return 16;
	555	default: return -1;
	556	}
	557	}
	558
f8d8e579 TB	559	static inline int atapi_command_packet_set(const u16 *dev_id)
	560	{
	561	return (dev_id[0] >> 8) & 0x1f;
	562	}
	563
057ace5e	564	static inline int is_atapi_taskfile(const struct ata_taskfile *tf)
1da177e4 LT	565	{
	566	return (tf->protocol == ATA_PROT_ATAPI) \|\|
	567	(tf->protocol == ATA_PROT_ATAPI_NODATA) \|\|
	568	(tf->protocol == ATA_PROT_ATAPI_DMA);
	569	}
	570
07f6f7d0 AL	571	static inline int is_multi_taskfile(struct ata_taskfile *tf)
	572	{
	573	return (tf->command == ATA_CMD_READ_MULTI) \|\|
	574	(tf->command == ATA_CMD_WRITE_MULTI) \|\|
	575	(tf->command == ATA_CMD_READ_MULTI_EXT) \|\|
c2956a3b AL	576	(tf->command == ATA_CMD_WRITE_MULTI_EXT) \|\|
c2956a3b AL	577	(tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
07f6f7d0 AL	578	}
07f6f7d0 AL	579
1da177e4 LT	580	static inline int ata_ok(u8 status)
	581	{
	582	return ((status & (ATA_BUSY \| ATA_DRDY \| ATA_DF \| ATA_DRQ \| ATA_ERR))
	583	== ATA_DRDY);
	584	}
	585
c6a33e24 AL	586	static inline int lba_28_ok(u64 block, u32 n_block)
	587	{
	588	/* check the ending block number */
	589	return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
	590	}
	591
	592	static inline int lba_48_ok(u64 block, u32 n_block)
	593	{
	594	/* check the ending block number */
	595	return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
	596	}
	597
814600ee TH	598	#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
	599	#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
	600	#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
	601	#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
	602
1da177e4	603	#endif /* __LINUX_ATA_H__ */