[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / drm / exynos_drm.h

/* exynos_drm.h
 *
 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
 * Authors:
 *	Inki Dae <inki.dae@samsung.com>
 *	Joonyoung Shim <jy0922.shim@samsung.com>
 *	Seung-Woo Kim <sw0312.kim@samsung.com>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#ifndef _EXYNOS_DRM_H_
#define _EXYNOS_DRM_H_

#include "drm.h"

/**
 * User-desired buffer creation information structure.
 *
 * @size: user-desired memory allocation size.
 *	- this size value would be page-aligned internally.
 * @flags: user request for setting memory type or cache attributes.
 * @handle: returned a handle to created gem object.
 *	- this handle will be set by gem module of kernel side.
 */
struct drm_exynos_gem_create {
	uint64_t size;
	unsigned int flags;
	unsigned int handle;
};

/**
 * A structure for getting buffer offset.
 *
 * @handle: a pointer to gem object created.
 * @pad: just padding to be 64-bit aligned.
 * @offset: relatived offset value of the memory region allocated.
 *	- this value should be set by user.
 */
struct drm_exynos_gem_map_off {
	unsigned int handle;
	unsigned int pad;
	uint64_t offset;
};

/**
 * A structure for mapping buffer.
 *
 * @handle: a handle to gem object created.
 * @pad: just padding to be 64-bit aligned.
 * @size: memory size to be mapped.
 * @mapped: having user virtual address mmaped.
 *	- this variable would be filled by exynos gem module
 *	of kernel side with user virtual address which is allocated
 *	by do_mmap().
 */
struct drm_exynos_gem_mmap {
	unsigned int handle;
	unsigned int pad;
	uint64_t size;
	uint64_t mapped;
};

/**
 * A structure to gem information.
 *
 * @handle: a handle to gem object created.
 * @flags: flag value including memory type and cache attribute and
 *	this value would be set by driver.
 * @size: size to memory region allocated by gem and this size would
 *	be set by driver.
 */
struct drm_exynos_gem_info {
	unsigned int handle;
	unsigned int flags;
	uint64_t size;
};

/**
 * A structure for user connection request of virtual display.
 *
 * @connection: indicate whether doing connetion or not by user.
 * @extensions: if this value is 1 then the vidi driver would need additional
 *	128bytes edid data.
 * @edid: the edid data pointer from user side.
 */
struct drm_exynos_vidi_connection {
	unsigned int connection;
	unsigned int extensions;
	uint64_t edid;
};

/* memory type definitions. */
enum e_drm_exynos_gem_mem_type {
	/* Physically Continuous memory and used as default. */
	EXYNOS_BO_CONTIG	= 0 << 0,
	/* Physically Non-Continuous memory. */
	EXYNOS_BO_NONCONTIG	= 1 << 0,
	/* non-cachable mapping and used as default. */
	EXYNOS_BO_NONCACHABLE	= 0 << 1,
	/* cachable mapping. */
	EXYNOS_BO_CACHABLE	= 1 << 1,
	/* write-combine mapping. */
	EXYNOS_BO_WC		= 1 << 2,
	EXYNOS_BO_MASK		= EXYNOS_BO_NONCONTIG | EXYNOS_BO_CACHABLE |
					EXYNOS_BO_WC
};

struct drm_exynos_g2d_get_ver {
	__u32	major;
	__u32	minor;
};

struct drm_exynos_g2d_cmd {
	__u32	offset;
	__u32	data;
};

enum drm_exynos_g2d_event_type {
	G2D_EVENT_NOT,
	G2D_EVENT_NONSTOP,
	G2D_EVENT_STOP,		/* not yet */
};

struct drm_exynos_g2d_set_cmdlist {
	__u64					cmd;
	__u64					cmd_gem;
	__u32					cmd_nr;
	__u32					cmd_gem_nr;

	/* for g2d event */
	__u64					event_type;
	__u64					user_data;
};

struct drm_exynos_g2d_exec {
	__u64					async;
};

#define DRM_EXYNOS_GEM_CREATE		0x00
#define DRM_EXYNOS_GEM_MAP_OFFSET	0x01
#define DRM_EXYNOS_GEM_MMAP		0x02
/* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */
#define DRM_EXYNOS_GEM_GET		0x04
#define DRM_EXYNOS_VIDI_CONNECTION	0x07

/* G2D */
#define DRM_EXYNOS_G2D_GET_VER		0x20
#define DRM_EXYNOS_G2D_SET_CMDLIST	0x21
#define DRM_EXYNOS_G2D_EXEC		0x22

#define DRM_IOCTL_EXYNOS_GEM_CREATE		DRM_IOWR(DRM_COMMAND_BASE + \
		DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)

#define DRM_IOCTL_EXYNOS_GEM_MAP_OFFSET	DRM_IOWR(DRM_COMMAND_BASE + \
		DRM_EXYNOS_GEM_MAP_OFFSET, struct drm_exynos_gem_map_off)

#define DRM_IOCTL_EXYNOS_GEM_MMAP	DRM_IOWR(DRM_COMMAND_BASE + \
		DRM_EXYNOS_GEM_MMAP, struct drm_exynos_gem_mmap)

#define DRM_IOCTL_EXYNOS_GEM_GET	DRM_IOWR(DRM_COMMAND_BASE + \
		DRM_EXYNOS_GEM_GET,	struct drm_exynos_gem_info)

#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION	DRM_IOWR(DRM_COMMAND_BASE + \
		DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection)

#define DRM_IOCTL_EXYNOS_G2D_GET_VER		DRM_IOWR(DRM_COMMAND_BASE + \
		DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver)
#define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST	DRM_IOWR(DRM_COMMAND_BASE + \
		DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist)
#define DRM_IOCTL_EXYNOS_G2D_EXEC		DRM_IOWR(DRM_COMMAND_BASE + \
		DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)

/* EXYNOS specific events */
#define DRM_EXYNOS_G2D_EVENT		0x80000000

struct drm_exynos_g2d_event {
	struct drm_event	base;
	__u64			user_data;
	__u32			tv_sec;
	__u32			tv_usec;
	__u32			cmdlist_no;
	__u32			reserved;
};

#ifdef __KERNEL__

/**
 * A structure for lcd panel information.
 *
 * @timing: default video mode for initializing
 * @width_mm: physical size of lcd width.
 * @height_mm: physical size of lcd height.
 */
struct exynos_drm_panel_info {
	struct fb_videomode timing;
	u32 width_mm;
	u32 height_mm;
};

/**
 * Platform Specific Structure for DRM based FIMD.
 *
 * @panel: default panel info for initializing
 * @default_win: default window layer number to be used for UI.
 * @bpp: default bit per pixel.
 */
struct exynos_drm_fimd_pdata {
	struct exynos_drm_panel_info panel;
	u32				vidcon0;
	u32				vidcon1;
	unsigned int			default_win;
	unsigned int			bpp;
};

/**
 * Platform Specific Structure for DRM based HDMI.
 *
 * @hdmi_dev: device point to specific hdmi driver.
 * @mixer_dev: device point to specific mixer driver.
 *
 * this structure is used for common hdmi driver and each device object
 * would be used to access specific device driver(hdmi or mixer driver)
 */
struct exynos_drm_common_hdmi_pd {
	struct device *hdmi_dev;
	struct device *mixer_dev;
};

/**
 * Platform Specific Structure for DRM based HDMI core.
 *
 * @is_v13: set if hdmi version 13 is.
 * @cfg_hpd: function pointer to configure hdmi hotplug detection pin
 * @get_hpd: function pointer to get value of hdmi hotplug detection pin
 */
struct exynos_drm_hdmi_pdata {
	bool is_v13;
	void (*cfg_hpd)(bool external);
	int (*get_hpd)(void);
};

#endif	/* __KERNEL__ */
#endif	/* _EXYNOS_DRM_H_ */
Commit	Line	Data
1c248b7d ID	1	/* exynos_drm.h
	2	*
	3	* Copyright (c) 2011 Samsung Electronics Co., Ltd.
	4	* Authors:
	5	* Inki Dae <inki.dae@samsung.com>
	6	* Joonyoung Shim <jy0922.shim@samsung.com>
	7	* Seung-Woo Kim <sw0312.kim@samsung.com>
	8	*
	9	* Permission is hereby granted, free of charge, to any person obtaining a
	10	* copy of this software and associated documentation files (the "Software"),
	11	* to deal in the Software without restriction, including without limitation
	12	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	13	* and/or sell copies of the Software, and to permit persons to whom the
	14	* Software is furnished to do so, subject to the following conditions:
	15	*
	16	* The above copyright notice and this permission notice (including the next
	17	* paragraph) shall be included in all copies or substantial portions of the
	18	* Software.
	19	*
	20	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	21	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	22	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	23	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	24	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	25	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	26	* OTHER DEALINGS IN THE SOFTWARE.
	27	*/
	28
	29	#ifndef _EXYNOS_DRM_H_
	30	#define _EXYNOS_DRM_H_
	31
d7f1642c JS	32	#include "drm.h"
d7f1642c JS	33
1c248b7d ID	34	/**
	35	* User-desired buffer creation information structure.
	36	*
f088d5a9	37	* @size: user-desired memory allocation size.
1c248b7d ID	38	* - this size value would be page-aligned internally.
1c248b7d ID	39	* @flags: user request for setting memory type or cache attributes.
f088d5a9 ID	40	* @handle: returned a handle to created gem object.
f088d5a9 ID	41	* - this handle will be set by gem module of kernel side.
1c248b7d ID	42	*/
1c248b7d ID	43	struct drm_exynos_gem_create {
f088d5a9	44	uint64_t size;
1c248b7d ID	45	unsigned int flags;
	46	unsigned int handle;
	47	};
	48
	49	/**
	50	* A structure for getting buffer offset.
	51	*
	52	* @handle: a pointer to gem object created.
	53	* @pad: just padding to be 64-bit aligned.
	54	* @offset: relatived offset value of the memory region allocated.
	55	* - this value should be set by user.
	56	*/
	57	struct drm_exynos_gem_map_off {
	58	unsigned int handle;
	59	unsigned int pad;
	60	uint64_t offset;
	61	};
	62
	63	/**
	64	* A structure for mapping buffer.
	65	*
	66	* @handle: a handle to gem object created.
13b87b27	67	* @pad: just padding to be 64-bit aligned.
1c248b7d ID	68	* @size: memory size to be mapped.
	69	* @mapped: having user virtual address mmaped.
	70	* - this variable would be filled by exynos gem module
	71	* of kernel side with user virtual address which is allocated
	72	* by do_mmap().
	73	*/
	74	struct drm_exynos_gem_mmap {
	75	unsigned int handle;
13b87b27 ID	76	unsigned int pad;
13b87b27 ID	77	uint64_t size;
1c248b7d ID	78	uint64_t mapped;
	79	};
	80
40cd7e0c ID	81	/**
	82	* A structure to gem information.
	83	*
	84	* @handle: a handle to gem object created.
	85	* @flags: flag value including memory type and cache attribute and
	86	* this value would be set by driver.
	87	* @size: size to memory region allocated by gem and this size would
	88	* be set by driver.
	89	*/
	90	struct drm_exynos_gem_info {
	91	unsigned int handle;
	92	unsigned int flags;
	93	uint64_t size;
	94	};
	95
b73d1230 ID	96	/**
	97	* A structure for user connection request of virtual display.
	98	*
	99	* @connection: indicate whether doing connetion or not by user.
	100	* @extensions: if this value is 1 then the vidi driver would need additional
	101	* 128bytes edid data.
	102	* @edid: the edid data pointer from user side.
	103	*/
	104	struct drm_exynos_vidi_connection {
	105	unsigned int connection;
	106	unsigned int extensions;
490aa60e	107	uint64_t edid;
b73d1230 ID	108	};
b73d1230 ID	109
2b35892e ID	110	/* memory type definitions. */
2b35892e ID	111	enum e_drm_exynos_gem_mem_type {
c01d73fa ID	112	/* Physically Continuous memory and used as default. */
c01d73fa ID	113	EXYNOS_BO_CONTIG = 0 << 0,
2b35892e	114	/* Physically Non-Continuous memory. */
dcf9af82	115	EXYNOS_BO_NONCONTIG = 1 << 0,
c01d73fa ID	116	/* non-cachable mapping and used as default. */
	117	EXYNOS_BO_NONCACHABLE = 0 << 1,
	118	/* cachable mapping. */
	119	EXYNOS_BO_CACHABLE = 1 << 1,
	120	/* write-combine mapping. */
	121	EXYNOS_BO_WC = 1 << 2,
	122	EXYNOS_BO_MASK = EXYNOS_BO_NONCONTIG \| EXYNOS_BO_CACHABLE \|
	123	EXYNOS_BO_WC
2b35892e ID	124	};
2b35892e ID	125
d7f1642c JS	126	struct drm_exynos_g2d_get_ver {
	127	__u32 major;
	128	__u32 minor;
	129	};
	130
	131	struct drm_exynos_g2d_cmd {
	132	__u32 offset;
	133	__u32 data;
	134	};
	135
	136	enum drm_exynos_g2d_event_type {
	137	G2D_EVENT_NOT,
	138	G2D_EVENT_NONSTOP,
	139	G2D_EVENT_STOP, /* not yet */
	140	};
	141
	142	struct drm_exynos_g2d_set_cmdlist {
	143	__u64 cmd;
	144	__u64 cmd_gem;
	145	__u32 cmd_nr;
	146	__u32 cmd_gem_nr;
	147
	148	/* for g2d event */
	149	__u64 event_type;
	150	__u64 user_data;
	151	};
	152
	153	struct drm_exynos_g2d_exec {
	154	__u64 async;
	155	};
	156
1c248b7d ID	157	#define DRM_EXYNOS_GEM_CREATE 0x00
	158	#define DRM_EXYNOS_GEM_MAP_OFFSET 0x01
	159	#define DRM_EXYNOS_GEM_MMAP 0x02
864ee9e6	160	/* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */
40cd7e0c	161	#define DRM_EXYNOS_GEM_GET 0x04
b73d1230	162	#define DRM_EXYNOS_VIDI_CONNECTION 0x07
1c248b7d	163
d7f1642c JS	164	/* G2D */
	165	#define DRM_EXYNOS_G2D_GET_VER 0x20
	166	#define DRM_EXYNOS_G2D_SET_CMDLIST 0x21
	167	#define DRM_EXYNOS_G2D_EXEC 0x22
	168
1c248b7d ID	169	#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \
	170	DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
	171
	172	#define DRM_IOCTL_EXYNOS_GEM_MAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + \
	173	DRM_EXYNOS_GEM_MAP_OFFSET, struct drm_exynos_gem_map_off)
	174
	175	#define DRM_IOCTL_EXYNOS_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + \
	176	DRM_EXYNOS_GEM_MMAP, struct drm_exynos_gem_mmap)
	177
40cd7e0c ID	178	#define DRM_IOCTL_EXYNOS_GEM_GET DRM_IOWR(DRM_COMMAND_BASE + \
	179	DRM_EXYNOS_GEM_GET, struct drm_exynos_gem_info)
	180
b73d1230 ID	181	#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \
	182	DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection)
	183
d7f1642c JS	184	#define DRM_IOCTL_EXYNOS_G2D_GET_VER DRM_IOWR(DRM_COMMAND_BASE + \
	185	DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver)
	186	#define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + \
	187	DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist)
	188	#define DRM_IOCTL_EXYNOS_G2D_EXEC DRM_IOWR(DRM_COMMAND_BASE + \
	189	DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
	190
	191	/* EXYNOS specific events */
	192	#define DRM_EXYNOS_G2D_EVENT 0x80000000
	193
	194	struct drm_exynos_g2d_event {
	195	struct drm_event base;
	196	__u64 user_data;
	197	__u32 tv_sec;
	198	__u32 tv_usec;
	199	__u32 cmdlist_no;
	200	__u32 reserved;
	201	};
	202
265da78a KD	203	#ifdef __KERNEL__
265da78a KD	204
1c248b7d	205	/**
607c50d4	206	* A structure for lcd panel information.
1c248b7d ID	207	*
1c248b7d ID	208	* @timing: default video mode for initializing
607c50d4 ECK	209	* @width_mm: physical size of lcd width.
	210	* @height_mm: physical size of lcd height.
	211	*/
	212	struct exynos_drm_panel_info {
	213	struct fb_videomode timing;
	214	u32 width_mm;
	215	u32 height_mm;
	216	};
	217
	218	/**
	219	* Platform Specific Structure for DRM based FIMD.
	220	*
	221	* @panel: default panel info for initializing
1c248b7d ID	222	* @default_win: default window layer number to be used for UI.
	223	* @bpp: default bit per pixel.
	224	*/
	225	struct exynos_drm_fimd_pdata {
607c50d4	226	struct exynos_drm_panel_info panel;
1c248b7d ID	227	u32 vidcon0;
	228	u32 vidcon1;
	229	unsigned int default_win;
	230	unsigned int bpp;
	231	};
	232
d8408326 SWK	233	/**
	234	* Platform Specific Structure for DRM based HDMI.
	235	*
	236	* @hdmi_dev: device point to specific hdmi driver.
	237	* @mixer_dev: device point to specific mixer driver.
	238	*
	239	* this structure is used for common hdmi driver and each device object
	240	* would be used to access specific device driver(hdmi or mixer driver)
	241	*/
	242	struct exynos_drm_common_hdmi_pd {
	243	struct device *hdmi_dev;
	244	struct device *mixer_dev;
	245	};
	246
	247	/**
	248	* Platform Specific Structure for DRM based HDMI core.
	249	*
3ecd70b1	250	* @is_v13: set if hdmi version 13 is.
7ecd34e8 JS	251	* @cfg_hpd: function pointer to configure hdmi hotplug detection pin
7ecd34e8 JS	252	* @get_hpd: function pointer to get value of hdmi hotplug detection pin
d8408326 SWK	253	*/
d8408326 SWK	254	struct exynos_drm_hdmi_pdata {
7ecd34e8 JS	255	bool is_v13;
	256	void (*cfg_hpd)(bool external);
	257	int (*get_hpd)(void);
d8408326 SWK	258	};
d8408326 SWK	259
265da78a KD	260	#endif /* __KERNEL__ */
265da78a KD	261	#endif /* _EXYNOS_DRM_H_ */