[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / drm / drm_mode.h

/*
 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
 * Copyright (c) 2008 Red Hat Inc.
 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
 * Copyright (c) 2007-2008 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 */

#ifndef _DRM_MODE_H
#define _DRM_MODE_H

#if !defined(__KERNEL__) && !defined(_KERNEL)
#include <stdint.h>
#else
#include <linux/kernel.h>
#endif

#define DRM_DISPLAY_INFO_LEN	32
#define DRM_CONNECTOR_NAME_LEN	32
#define DRM_DISPLAY_MODE_LEN	32
#define DRM_PROP_NAME_LEN	32

#define DRM_MODE_TYPE_BUILTIN	(1<<0)
#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
#define DRM_MODE_TYPE_PREFERRED	(1<<3)
#define DRM_MODE_TYPE_DEFAULT	(1<<4)
#define DRM_MODE_TYPE_USERDEF	(1<<5)
#define DRM_MODE_TYPE_DRIVER	(1<<6)

/* Video mode flags */
/* bit compatible with the xorg definitions. */
#define DRM_MODE_FLAG_PHSYNC	(1<<0)
#define DRM_MODE_FLAG_NHSYNC	(1<<1)
#define DRM_MODE_FLAG_PVSYNC	(1<<2)
#define DRM_MODE_FLAG_NVSYNC	(1<<3)
#define DRM_MODE_FLAG_INTERLACE	(1<<4)
#define DRM_MODE_FLAG_DBLSCAN	(1<<5)
#define DRM_MODE_FLAG_CSYNC	(1<<6)
#define DRM_MODE_FLAG_PCSYNC	(1<<7)
#define DRM_MODE_FLAG_NCSYNC	(1<<8)
#define DRM_MODE_FLAG_HSKEW	(1<<9) /* hskew provided */
#define DRM_MODE_FLAG_BCAST	(1<<10)
#define DRM_MODE_FLAG_PIXMUX	(1<<11)
#define DRM_MODE_FLAG_DBLCLK	(1<<12)
#define DRM_MODE_FLAG_CLKDIV2	(1<<13)

/* DPMS flags */
/* bit compatible with the xorg definitions. */
#define DRM_MODE_DPMS_ON	0
#define DRM_MODE_DPMS_STANDBY	1
#define DRM_MODE_DPMS_SUSPEND	2
#define DRM_MODE_DPMS_OFF	3

/* Scaling mode options */
#define DRM_MODE_SCALE_NON_GPU		0
#define DRM_MODE_SCALE_FULLSCREEN	1
#define DRM_MODE_SCALE_NO_SCALE		2
#define DRM_MODE_SCALE_ASPECT		3

/* Dithering mode options */
#define DRM_MODE_DITHERING_OFF	0
#define DRM_MODE_DITHERING_ON	1

struct drm_mode_modeinfo {
	uint32_t clock;
	uint16_t hdisplay, hsync_start, hsync_end, htotal, hskew;
	uint16_t vdisplay, vsync_start, vsync_end, vtotal, vscan;

	uint32_t vrefresh; /* vertical refresh * 1000 */

	uint32_t flags;
	uint32_t type;
	char name[DRM_DISPLAY_MODE_LEN];
};

struct drm_mode_card_res {
	uint64_t fb_id_ptr;
	uint64_t crtc_id_ptr;
	uint64_t connector_id_ptr;
	uint64_t encoder_id_ptr;
	uint32_t count_fbs;
	uint32_t count_crtcs;
	uint32_t count_connectors;
	uint32_t count_encoders;
	uint32_t min_width, max_width;
	uint32_t min_height, max_height;
};

struct drm_mode_crtc {
	uint64_t set_connectors_ptr;
	uint32_t count_connectors;

	uint32_t crtc_id; /**< Id */
	uint32_t fb_id; /**< Id of framebuffer */

	uint32_t x, y; /**< Position on the frameuffer */

	uint32_t gamma_size;
	uint32_t mode_valid;
	struct drm_mode_modeinfo mode;
};

#define DRM_MODE_ENCODER_NONE	0
#define DRM_MODE_ENCODER_DAC	1
#define DRM_MODE_ENCODER_TMDS	2
#define DRM_MODE_ENCODER_LVDS	3
#define DRM_MODE_ENCODER_TVDAC	4

struct drm_mode_get_encoder {
	uint32_t encoder_id;
	uint32_t encoder_type;

	uint32_t crtc_id; /**< Id of crtc */

	uint32_t possible_crtcs;
	uint32_t possible_clones;
};

/* This is for connectors with multiple signal types. */
/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
#define DRM_MODE_SUBCONNECTOR_Automatic	0
#define DRM_MODE_SUBCONNECTOR_Unknown	0
#define DRM_MODE_SUBCONNECTOR_DVID	3
#define DRM_MODE_SUBCONNECTOR_DVIA	4
#define DRM_MODE_SUBCONNECTOR_Composite	5
#define DRM_MODE_SUBCONNECTOR_SVIDEO	6
#define DRM_MODE_SUBCONNECTOR_Component	8

#define DRM_MODE_CONNECTOR_Unknown	0
#define DRM_MODE_CONNECTOR_VGA		1
#define DRM_MODE_CONNECTOR_DVII		2
#define DRM_MODE_CONNECTOR_DVID		3
#define DRM_MODE_CONNECTOR_DVIA		4
#define DRM_MODE_CONNECTOR_Composite	5
#define DRM_MODE_CONNECTOR_SVIDEO	6
#define DRM_MODE_CONNECTOR_LVDS		7
#define DRM_MODE_CONNECTOR_Component	8
#define DRM_MODE_CONNECTOR_9PinDIN	9
#define DRM_MODE_CONNECTOR_DisplayPort	10
#define DRM_MODE_CONNECTOR_HDMIA	11
#define DRM_MODE_CONNECTOR_HDMIB	12

struct drm_mode_get_connector {

	uint64_t encoders_ptr;
	uint64_t modes_ptr;
	uint64_t props_ptr;
	uint64_t prop_values_ptr;

	uint32_t count_modes;
	uint32_t count_props;
	uint32_t count_encoders;

	uint32_t encoder_id; /**< Current Encoder */
	uint32_t connector_id; /**< Id */
	uint32_t connector_type;
	uint32_t connector_type_id;

	uint32_t connection;
	uint32_t mm_width, mm_height; /**< HxW in millimeters */
	uint32_t subpixel;
};

#define DRM_MODE_PROP_PENDING	(1<<0)
#define DRM_MODE_PROP_RANGE	(1<<1)
#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
#define DRM_MODE_PROP_BLOB	(1<<4)

struct drm_mode_property_enum {
	uint64_t value;
	char name[DRM_PROP_NAME_LEN];
};

struct drm_mode_get_property {
	uint64_t values_ptr; /* values and blob lengths */
	uint64_t enum_blob_ptr; /* enum and blob id ptrs */

	uint32_t prop_id;
	uint32_t flags;
	char name[DRM_PROP_NAME_LEN];

	uint32_t count_values;
	uint32_t count_enum_blobs;
};

struct drm_mode_connector_set_property {
	uint64_t value;
	uint32_t prop_id;
	uint32_t connector_id;
};

struct drm_mode_get_blob {
	uint32_t blob_id;
	uint32_t length;
	uint64_t data;
};

struct drm_mode_fb_cmd {
	uint32_t fb_id;
	uint32_t width, height;
	uint32_t pitch;
	uint32_t bpp;
	uint32_t depth;
	/* driver specific handle */
	uint32_t handle;
};

struct drm_mode_mode_cmd {
	uint32_t connector_id;
	struct drm_mode_modeinfo mode;
};

#define DRM_MODE_CURSOR_BO	(1<<0)
#define DRM_MODE_CURSOR_MOVE	(1<<1)

/*
 * depending on the value in flags diffrent members are used.
 *
 * CURSOR_BO uses
 *    crtc
 *    width
 *    height
 *    handle - if 0 turns the cursor of
 *
 * CURSOR_MOVE uses
 *    crtc
 *    x
 *    y
 */
struct drm_mode_cursor {
	uint32_t flags;
	uint32_t crtc_id;
	int32_t x;
	int32_t y;
	uint32_t width;
	uint32_t height;
	/* driver specific handle */
	uint32_t handle;
};

struct drm_mode_crtc_lut {
	uint32_t crtc_id;
	uint32_t gamma_size;

	/* pointers to arrays */
	uint64_t red;
	uint64_t green;
	uint64_t blue;
};

#endif
Commit	Line	Data
f453ba04 DA	1	/*
	2	* Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
	3	* Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
	4	* Copyright (c) 2008 Red Hat Inc.
	5	* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
	6	* Copyright (c) 2007-2008 Intel Corporation
	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a
	9	* copy of this software and associated documentation files (the "Software"),
	10	* to deal in the Software without restriction, including without limitation
	11	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	12	* and/or sell copies of the Software, and to permit persons to whom the
	13	* Software is furnished to do so, subject to the following conditions:
	14	*
	15	* The above copyright notice and this permission notice shall be included in
	16	* all copies or substantial portions of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
	21	* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	23	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
	24	* IN THE SOFTWARE.
	25	*/
	26
	27	#ifndef _DRM_MODE_H
	28	#define _DRM_MODE_H
	29
	30	#if !defined(__KERNEL__) && !defined(_KERNEL)
	31	#include <stdint.h>
	32	#else
	33	#include <linux/kernel.h>
	34	#endif
	35
e0c8463a JB	36	#define DRM_DISPLAY_INFO_LEN 32
	37	#define DRM_CONNECTOR_NAME_LEN 32
	38	#define DRM_DISPLAY_MODE_LEN 32
	39	#define DRM_PROP_NAME_LEN 32
f453ba04 DA	40
	41	#define DRM_MODE_TYPE_BUILTIN (1<<0)
	42	#define DRM_MODE_TYPE_CLOCK_C ((1<<1) \| DRM_MODE_TYPE_BUILTIN)
	43	#define DRM_MODE_TYPE_CRTC_C ((1<<2) \| DRM_MODE_TYPE_BUILTIN)
	44	#define DRM_MODE_TYPE_PREFERRED (1<<3)
	45	#define DRM_MODE_TYPE_DEFAULT (1<<4)
	46	#define DRM_MODE_TYPE_USERDEF (1<<5)
	47	#define DRM_MODE_TYPE_DRIVER (1<<6)
	48
	49	/* Video mode flags */
	50	/* bit compatible with the xorg definitions. */
	51	#define DRM_MODE_FLAG_PHSYNC (1<<0)
	52	#define DRM_MODE_FLAG_NHSYNC (1<<1)
	53	#define DRM_MODE_FLAG_PVSYNC (1<<2)
	54	#define DRM_MODE_FLAG_NVSYNC (1<<3)
	55	#define DRM_MODE_FLAG_INTERLACE (1<<4)
	56	#define DRM_MODE_FLAG_DBLSCAN (1<<5)
	57	#define DRM_MODE_FLAG_CSYNC (1<<6)
	58	#define DRM_MODE_FLAG_PCSYNC (1<<7)
	59	#define DRM_MODE_FLAG_NCSYNC (1<<8)
	60	#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
	61	#define DRM_MODE_FLAG_BCAST (1<<10)
	62	#define DRM_MODE_FLAG_PIXMUX (1<<11)
	63	#define DRM_MODE_FLAG_DBLCLK (1<<12)
	64	#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
	65
	66	/* DPMS flags */
	67	/* bit compatible with the xorg definitions. */
e0c8463a JB	68	#define DRM_MODE_DPMS_ON 0
	69	#define DRM_MODE_DPMS_STANDBY 1
	70	#define DRM_MODE_DPMS_SUSPEND 2
	71	#define DRM_MODE_DPMS_OFF 3
f453ba04 DA	72
f453ba04 DA	73	/* Scaling mode options */
e0c8463a JB	74	#define DRM_MODE_SCALE_NON_GPU 0
	75	#define DRM_MODE_SCALE_FULLSCREEN 1
	76	#define DRM_MODE_SCALE_NO_SCALE 2
	77	#define DRM_MODE_SCALE_ASPECT 3
f453ba04 DA	78
f453ba04 DA	79	/* Dithering mode options */
e0c8463a JB	80	#define DRM_MODE_DITHERING_OFF 0
e0c8463a JB	81	#define DRM_MODE_DITHERING_ON 1
f453ba04 DA	82
f453ba04 DA	83	struct drm_mode_modeinfo {
e0c8463a JB	84	uint32_t clock;
	85	uint16_t hdisplay, hsync_start, hsync_end, htotal, hskew;
	86	uint16_t vdisplay, vsync_start, vsync_end, vtotal, vscan;
f453ba04	87
e0c8463a	88	uint32_t vrefresh; /* vertical refresh * 1000 */
f453ba04	89
e0c8463a JB	90	uint32_t flags;
e0c8463a JB	91	uint32_t type;
f453ba04 DA	92	char name[DRM_DISPLAY_MODE_LEN];
	93	};
	94
	95	struct drm_mode_card_res {
	96	uint64_t fb_id_ptr;
	97	uint64_t crtc_id_ptr;
	98	uint64_t connector_id_ptr;
	99	uint64_t encoder_id_ptr;
e0c8463a JB	100	uint32_t count_fbs;
	101	uint32_t count_crtcs;
	102	uint32_t count_connectors;
	103	uint32_t count_encoders;
	104	uint32_t min_width, max_width;
	105	uint32_t min_height, max_height;
f453ba04 DA	106	};
	107
	108	struct drm_mode_crtc {
	109	uint64_t set_connectors_ptr;
e0c8463a	110	uint32_t count_connectors;
f453ba04	111
e0c8463a JB	112	uint32_t crtc_id; /*< Id /
e0c8463a JB	113	uint32_t fb_id; /*< Id of framebuffer /
f453ba04	114
e0c8463a	115	uint32_t x, y; /*< Position on the frameuffer /
f453ba04 DA	116
f453ba04 DA	117	uint32_t gamma_size;
e0c8463a	118	uint32_t mode_valid;
f453ba04 DA	119	struct drm_mode_modeinfo mode;
	120	};
	121
e0c8463a JB	122	#define DRM_MODE_ENCODER_NONE 0
	123	#define DRM_MODE_ENCODER_DAC 1
	124	#define DRM_MODE_ENCODER_TMDS 2
	125	#define DRM_MODE_ENCODER_LVDS 3
	126	#define DRM_MODE_ENCODER_TVDAC 4
f453ba04 DA	127
f453ba04 DA	128	struct drm_mode_get_encoder {
e0c8463a JB	129	uint32_t encoder_id;
e0c8463a JB	130	uint32_t encoder_type;
f453ba04	131
e0c8463a	132	uint32_t crtc_id; /*< Id of crtc /
f453ba04 DA	133
	134	uint32_t possible_crtcs;
	135	uint32_t possible_clones;
	136	};
	137
	138	/* This is for connectors with multiple signal types. */
	139	/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
e0c8463a JB	140	#define DRM_MODE_SUBCONNECTOR_Automatic 0
	141	#define DRM_MODE_SUBCONNECTOR_Unknown 0
	142	#define DRM_MODE_SUBCONNECTOR_DVID 3
	143	#define DRM_MODE_SUBCONNECTOR_DVIA 4
	144	#define DRM_MODE_SUBCONNECTOR_Composite 5
	145	#define DRM_MODE_SUBCONNECTOR_SVIDEO 6
	146	#define DRM_MODE_SUBCONNECTOR_Component 8
	147
	148	#define DRM_MODE_CONNECTOR_Unknown 0
	149	#define DRM_MODE_CONNECTOR_VGA 1
	150	#define DRM_MODE_CONNECTOR_DVII 2
	151	#define DRM_MODE_CONNECTOR_DVID 3
	152	#define DRM_MODE_CONNECTOR_DVIA 4
	153	#define DRM_MODE_CONNECTOR_Composite 5
	154	#define DRM_MODE_CONNECTOR_SVIDEO 6
	155	#define DRM_MODE_CONNECTOR_LVDS 7
	156	#define DRM_MODE_CONNECTOR_Component 8
	157	#define DRM_MODE_CONNECTOR_9PinDIN 9
	158	#define DRM_MODE_CONNECTOR_DisplayPort 10
	159	#define DRM_MODE_CONNECTOR_HDMIA 11
	160	#define DRM_MODE_CONNECTOR_HDMIB 12
f453ba04 DA	161
	162	struct drm_mode_get_connector {
	163
	164	uint64_t encoders_ptr;
	165	uint64_t modes_ptr;
	166	uint64_t props_ptr;
	167	uint64_t prop_values_ptr;
	168
e0c8463a JB	169	uint32_t count_modes;
	170	uint32_t count_props;
	171	uint32_t count_encoders;
f453ba04	172
e0c8463a JB	173	uint32_t encoder_id; /*< Current Encoder /
	174	uint32_t connector_id; /*< Id /
	175	uint32_t connector_type;
	176	uint32_t connector_type_id;
f453ba04	177
e0c8463a JB	178	uint32_t connection;
	179	uint32_t mm_width, mm_height; /*< HxW in millimeters /
	180	uint32_t subpixel;
f453ba04 DA	181	};
f453ba04 DA	182
e0c8463a JB	183	#define DRM_MODE_PROP_PENDING (1<<0)
	184	#define DRM_MODE_PROP_RANGE (1<<1)
	185	#define DRM_MODE_PROP_IMMUTABLE (1<<2)
	186	#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
	187	#define DRM_MODE_PROP_BLOB (1<<4)
f453ba04 DA	188
	189	struct drm_mode_property_enum {
	190	uint64_t value;
e0c8463a	191	char name[DRM_PROP_NAME_LEN];
f453ba04 DA	192	};
	193
	194	struct drm_mode_get_property {
	195	uint64_t values_ptr; /* values and blob lengths */
	196	uint64_t enum_blob_ptr; /* enum and blob id ptrs */
	197
e0c8463a JB	198	uint32_t prop_id;
	199	uint32_t flags;
	200	char name[DRM_PROP_NAME_LEN];
f453ba04	201
e0c8463a JB	202	uint32_t count_values;
e0c8463a JB	203	uint32_t count_enum_blobs;
f453ba04 DA	204	};
	205
	206	struct drm_mode_connector_set_property {
	207	uint64_t value;
e0c8463a JB	208	uint32_t prop_id;
e0c8463a JB	209	uint32_t connector_id;
f453ba04 DA	210	};
	211
	212	struct drm_mode_get_blob {
	213	uint32_t blob_id;
	214	uint32_t length;
	215	uint64_t data;
	216	};
	217
	218	struct drm_mode_fb_cmd {
e0c8463a JB	219	uint32_t fb_id;
	220	uint32_t width, height;
	221	uint32_t pitch;
	222	uint32_t bpp;
	223	uint32_t depth;
	224	/* driver specific handle */
	225	uint32_t handle;
f453ba04 DA	226	};
	227
	228	struct drm_mode_mode_cmd {
e0c8463a	229	uint32_t connector_id;
f453ba04 DA	230	struct drm_mode_modeinfo mode;
	231	};
	232
e0c8463a JB	233	#define DRM_MODE_CURSOR_BO (1<<0)
e0c8463a JB	234	#define DRM_MODE_CURSOR_MOVE (1<<1)
f453ba04 DA	235
	236	/*
	237	* depending on the value in flags diffrent members are used.
	238	*
	239	* CURSOR_BO uses
	240	* crtc
	241	* width
	242	* height
	243	* handle - if 0 turns the cursor of
	244	*
	245	* CURSOR_MOVE uses
	246	* crtc
	247	* x
	248	* y
	249	*/
	250	struct drm_mode_cursor {
e0c8463a JB	251	uint32_t flags;
	252	uint32_t crtc_id;
	253	int32_t x;
	254	int32_t y;
f453ba04 DA	255	uint32_t width;
f453ba04 DA	256	uint32_t height;
e0c8463a JB	257	/* driver specific handle */
e0c8463a JB	258	uint32_t handle;
f453ba04 DA	259	};
	260
	261	struct drm_mode_crtc_lut {
f453ba04 DA	262	uint32_t crtc_id;
	263	uint32_t gamma_size;
	264
	265	/* pointers to arrays */
	266	uint64_t red;
	267	uint64_t green;
	268	uint64_t blue;
	269	};
	270
	271	#endif