Merge branch 'master' of /pub/scm/linux/kernel/git/torvalds/linux-2.6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-s390 / lowcore.h
CommitLineData
1da177e4
LT
1/*
2 * include/asm-s390/lowcore.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
9 */
10
11#ifndef _ASM_S390_LOWCORE_H
12#define _ASM_S390_LOWCORE_H
13
14#ifndef __s390x__
15#define __LC_EXT_OLD_PSW 0x018
16#define __LC_SVC_OLD_PSW 0x020
17#define __LC_PGM_OLD_PSW 0x028
18#define __LC_MCK_OLD_PSW 0x030
19#define __LC_IO_OLD_PSW 0x038
20#define __LC_EXT_NEW_PSW 0x058
21#define __LC_SVC_NEW_PSW 0x060
22#define __LC_PGM_NEW_PSW 0x068
23#define __LC_MCK_NEW_PSW 0x070
24#define __LC_IO_NEW_PSW 0x078
25#else /* !__s390x__ */
26#define __LC_EXT_OLD_PSW 0x0130
27#define __LC_SVC_OLD_PSW 0x0140
28#define __LC_PGM_OLD_PSW 0x0150
29#define __LC_MCK_OLD_PSW 0x0160
30#define __LC_IO_OLD_PSW 0x0170
31#define __LC_EXT_NEW_PSW 0x01b0
32#define __LC_SVC_NEW_PSW 0x01c0
33#define __LC_PGM_NEW_PSW 0x01d0
34#define __LC_MCK_NEW_PSW 0x01e0
35#define __LC_IO_NEW_PSW 0x01f0
36#endif /* !__s390x__ */
37
e87bfe51 38#define __LC_IPL_PARMBLOCK_PTR 0x014
1da177e4
LT
39#define __LC_EXT_PARAMS 0x080
40#define __LC_CPU_ADDRESS 0x084
41#define __LC_EXT_INT_CODE 0x086
42
43#define __LC_SVC_ILC 0x088
44#define __LC_SVC_INT_CODE 0x08A
45#define __LC_PGM_ILC 0x08C
46#define __LC_PGM_INT_CODE 0x08E
47
48#define __LC_PER_ATMID 0x096
49#define __LC_PER_ADDRESS 0x098
50#define __LC_PER_ACCESS_ID 0x0A1
ff6b8ea6 51#define __LC_AR_MODE_ID 0x0A3
1da177e4
LT
52
53#define __LC_SUBCHANNEL_ID 0x0B8
54#define __LC_SUBCHANNEL_NR 0x0BA
55#define __LC_IO_INT_PARM 0x0BC
56#define __LC_IO_INT_WORD 0x0C0
57#define __LC_MCCK_CODE 0x0E8
58
59#define __LC_RETURN_PSW 0x200
60
61#define __LC_SAVE_AREA 0xC00
62
63#ifndef __s390x__
64#define __LC_IRB 0x208
65#define __LC_SYNC_ENTER_TIMER 0x248
66#define __LC_ASYNC_ENTER_TIMER 0x250
67#define __LC_EXIT_TIMER 0x258
68#define __LC_LAST_UPDATE_TIMER 0x260
69#define __LC_USER_TIMER 0x268
70#define __LC_SYSTEM_TIMER 0x270
71#define __LC_LAST_UPDATE_CLOCK 0x278
72#define __LC_STEAL_CLOCK 0x280
ae6aa2ea 73#define __LC_RETURN_MCCK_PSW 0x288
1da177e4
LT
74#define __LC_KERNEL_STACK 0xC40
75#define __LC_THREAD_INFO 0xC44
76#define __LC_ASYNC_STACK 0xC48
77#define __LC_KERNEL_ASCE 0xC4C
78#define __LC_USER_ASCE 0xC50
79#define __LC_PANIC_STACK 0xC54
80#define __LC_CPUID 0xC60
81#define __LC_CPUADDR 0xC68
82#define __LC_IPLDEV 0xC7C
83#define __LC_JIFFY_TIMER 0xC80
84#define __LC_CURRENT 0xC90
85#define __LC_INT_CLOCK 0xC98
86#else /* __s390x__ */
87#define __LC_IRB 0x210
88#define __LC_SYNC_ENTER_TIMER 0x250
89#define __LC_ASYNC_ENTER_TIMER 0x258
90#define __LC_EXIT_TIMER 0x260
91#define __LC_LAST_UPDATE_TIMER 0x268
92#define __LC_USER_TIMER 0x270
93#define __LC_SYSTEM_TIMER 0x278
94#define __LC_LAST_UPDATE_CLOCK 0x280
95#define __LC_STEAL_CLOCK 0x288
ae6aa2ea 96#define __LC_RETURN_MCCK_PSW 0x290
1da177e4
LT
97#define __LC_KERNEL_STACK 0xD40
98#define __LC_THREAD_INFO 0xD48
99#define __LC_ASYNC_STACK 0xD50
100#define __LC_KERNEL_ASCE 0xD58
101#define __LC_USER_ASCE 0xD60
102#define __LC_PANIC_STACK 0xD68
4ae9538d
PO
103#define __LC_CPUID 0xD80
104#define __LC_CPUADDR 0xD88
1da177e4
LT
105#define __LC_IPLDEV 0xDB8
106#define __LC_JIFFY_TIMER 0xDC0
107#define __LC_CURRENT 0xDD8
108#define __LC_INT_CLOCK 0xDE8
109#endif /* __s390x__ */
110
1da177e4 111
ff6b8ea6 112#define __LC_PANIC_MAGIC 0xE00
1da177e4
LT
113#ifndef __s390x__
114#define __LC_PFAULT_INTPARM 0x080
77fa2245 115#define __LC_CPU_TIMER_SAVE_AREA 0x0D8
ff6b8ea6
MH
116#define __LC_CLOCK_COMP_SAVE_AREA 0x0E0
117#define __LC_PSW_SAVE_AREA 0x100
118#define __LC_PREFIX_SAVE_AREA 0x108
1da177e4 119#define __LC_AREGS_SAVE_AREA 0x120
ff6b8ea6 120#define __LC_FPREGS_SAVE_AREA 0x160
77fa2245 121#define __LC_GPREGS_SAVE_AREA 0x180
1da177e4
LT
122#define __LC_CREGS_SAVE_AREA 0x1C0
123#else /* __s390x__ */
124#define __LC_PFAULT_INTPARM 0x11B8
ff6b8ea6 125#define __LC_FPREGS_SAVE_AREA 0x1200
77fa2245 126#define __LC_GPREGS_SAVE_AREA 0x1280
ff6b8ea6
MH
127#define __LC_PSW_SAVE_AREA 0x1300
128#define __LC_PREFIX_SAVE_AREA 0x1318
129#define __LC_FP_CREG_SAVE_AREA 0x131C
130#define __LC_TODREG_SAVE_AREA 0x1324
77fa2245 131#define __LC_CPU_TIMER_SAVE_AREA 0x1328
ff6b8ea6 132#define __LC_CLOCK_COMP_SAVE_AREA 0x1331
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LT
133#define __LC_AREGS_SAVE_AREA 0x1340
134#define __LC_CREGS_SAVE_AREA 0x1380
135#endif /* __s390x__ */
136
137#ifndef __ASSEMBLY__
138
1da177e4
LT
139#include <asm/processor.h>
140#include <linux/types.h>
141#include <asm/sigp.h>
142
143void restart_int_handler(void);
144void ext_int_handler(void);
145void system_call(void);
146void pgm_check_handler(void);
147void mcck_int_handler(void);
148void io_int_handler(void);
149
150struct _lowcore
151{
152#ifndef __s390x__
153 /* prefix area: defined by architecture */
154 psw_t restart_psw; /* 0x000 */
155 __u32 ccw2[4]; /* 0x008 */
156 psw_t external_old_psw; /* 0x018 */
157 psw_t svc_old_psw; /* 0x020 */
158 psw_t program_old_psw; /* 0x028 */
159 psw_t mcck_old_psw; /* 0x030 */
160 psw_t io_old_psw; /* 0x038 */
161 __u8 pad1[0x58-0x40]; /* 0x040 */
162 psw_t external_new_psw; /* 0x058 */
163 psw_t svc_new_psw; /* 0x060 */
164 psw_t program_new_psw; /* 0x068 */
165 psw_t mcck_new_psw; /* 0x070 */
166 psw_t io_new_psw; /* 0x078 */
167 __u32 ext_params; /* 0x080 */
168 __u16 cpu_addr; /* 0x084 */
169 __u16 ext_int_code; /* 0x086 */
170 __u16 svc_ilc; /* 0x088 */
171 __u16 svc_code; /* 0x08a */
172 __u16 pgm_ilc; /* 0x08c */
173 __u16 pgm_code; /* 0x08e */
174 __u32 trans_exc_code; /* 0x090 */
175 __u16 mon_class_num; /* 0x094 */
176 __u16 per_perc_atmid; /* 0x096 */
177 __u32 per_address; /* 0x098 */
178 __u32 monitor_code; /* 0x09c */
179 __u8 exc_access_id; /* 0x0a0 */
180 __u8 per_access_id; /* 0x0a1 */
181 __u8 pad2[0xB8-0xA2]; /* 0x0a2 */
182 __u16 subchannel_id; /* 0x0b8 */
183 __u16 subchannel_nr; /* 0x0ba */
184 __u32 io_int_parm; /* 0x0bc */
185 __u32 io_int_word; /* 0x0c0 */
77fa2245
HC
186 __u8 pad3[0xD4-0xC4]; /* 0x0c4 */
187 __u32 extended_save_area_addr; /* 0x0d4 */
1da177e4
LT
188 __u32 cpu_timer_save_area[2]; /* 0x0d8 */
189 __u32 clock_comp_save_area[2]; /* 0x0e0 */
190 __u32 mcck_interruption_code[2]; /* 0x0e8 */
191 __u8 pad4[0xf4-0xf0]; /* 0x0f0 */
192 __u32 external_damage_code; /* 0x0f4 */
193 __u32 failing_storage_address; /* 0x0f8 */
194 __u8 pad5[0x100-0xfc]; /* 0x0fc */
195 __u32 st_status_fixed_logout[4];/* 0x100 */
196 __u8 pad6[0x120-0x110]; /* 0x110 */
197 __u32 access_regs_save_area[16];/* 0x120 */
198 __u32 floating_pt_save_area[8]; /* 0x160 */
199 __u32 gpregs_save_area[16]; /* 0x180 */
200 __u32 cregs_save_area[16]; /* 0x1c0 */
201
202 psw_t return_psw; /* 0x200 */
203 __u8 irb[64]; /* 0x208 */
204 __u64 sync_enter_timer; /* 0x248 */
205 __u64 async_enter_timer; /* 0x250 */
206 __u64 exit_timer; /* 0x258 */
207 __u64 last_update_timer; /* 0x260 */
208 __u64 user_timer; /* 0x268 */
209 __u64 system_timer; /* 0x270 */
210 __u64 last_update_clock; /* 0x278 */
211 __u64 steal_clock; /* 0x280 */
ae6aa2ea
MS
212 psw_t return_mcck_psw; /* 0x288 */
213 __u8 pad8[0xc00-0x290]; /* 0x290 */
1da177e4
LT
214
215 /* System info area */
216 __u32 save_area[16]; /* 0xc00 */
217 __u32 kernel_stack; /* 0xc40 */
218 __u32 thread_info; /* 0xc44 */
219 __u32 async_stack; /* 0xc48 */
220 __u32 kernel_asce; /* 0xc4c */
221 __u32 user_asce; /* 0xc50 */
222 __u32 panic_stack; /* 0xc54 */
c1821c2e
GS
223 __u32 user_exec_asce; /* 0xc58 */
224 __u8 pad10[0xc60-0xc5c]; /* 0xc5c */
1da177e4
LT
225 /* entry.S sensitive area start */
226 struct cpuinfo_S390 cpu_data; /* 0xc60 */
227 __u32 ipl_device; /* 0xc7c */
228 /* entry.S sensitive area end */
229
230 /* SMP info area: defined by DJB */
231 __u64 jiffy_timer; /* 0xc80 */
232 __u32 ext_call_fast; /* 0xc88 */
233 __u32 percpu_offset; /* 0xc8c */
234 __u32 current_task; /* 0xc90 */
235 __u32 softirq_pending; /* 0xc94 */
236 __u64 int_clock; /* 0xc98 */
237 __u8 pad11[0xe00-0xca0]; /* 0xca0 */
238
239 /* 0xe00 is used as indicator for dump tools */
240 /* whether the kernel died with panic() or not */
241 __u32 panic_magic; /* 0xe00 */
242
243 /* Align to the top 1k of prefix area */
244 __u8 pad12[0x1000-0xe04]; /* 0xe04 */
245#else /* !__s390x__ */
246 /* prefix area: defined by architecture */
247 __u32 ccw1[2]; /* 0x000 */
248 __u32 ccw2[4]; /* 0x008 */
249 __u8 pad1[0x80-0x18]; /* 0x018 */
250 __u32 ext_params; /* 0x080 */
251 __u16 cpu_addr; /* 0x084 */
252 __u16 ext_int_code; /* 0x086 */
253 __u16 svc_ilc; /* 0x088 */
254 __u16 svc_code; /* 0x08a */
255 __u16 pgm_ilc; /* 0x08c */
256 __u16 pgm_code; /* 0x08e */
257 __u32 data_exc_code; /* 0x090 */
258 __u16 mon_class_num; /* 0x094 */
259 __u16 per_perc_atmid; /* 0x096 */
260 addr_t per_address; /* 0x098 */
261 __u8 exc_access_id; /* 0x0a0 */
262 __u8 per_access_id; /* 0x0a1 */
263 __u8 op_access_id; /* 0x0a2 */
264 __u8 ar_access_id; /* 0x0a3 */
265 __u8 pad2[0xA8-0xA4]; /* 0x0a4 */
266 addr_t trans_exc_code; /* 0x0A0 */
267 addr_t monitor_code; /* 0x09c */
268 __u16 subchannel_id; /* 0x0b8 */
269 __u16 subchannel_nr; /* 0x0ba */
270 __u32 io_int_parm; /* 0x0bc */
271 __u32 io_int_word; /* 0x0c0 */
272 __u8 pad3[0xc8-0xc4]; /* 0x0c4 */
273 __u32 stfl_fac_list; /* 0x0c8 */
274 __u8 pad4[0xe8-0xcc]; /* 0x0cc */
275 __u32 mcck_interruption_code[2]; /* 0x0e8 */
276 __u8 pad5[0xf4-0xf0]; /* 0x0f0 */
277 __u32 external_damage_code; /* 0x0f4 */
278 addr_t failing_storage_address; /* 0x0f8 */
279 __u8 pad6[0x120-0x100]; /* 0x100 */
280 psw_t restart_old_psw; /* 0x120 */
281 psw_t external_old_psw; /* 0x130 */
282 psw_t svc_old_psw; /* 0x140 */
283 psw_t program_old_psw; /* 0x150 */
284 psw_t mcck_old_psw; /* 0x160 */
285 psw_t io_old_psw; /* 0x170 */
286 __u8 pad7[0x1a0-0x180]; /* 0x180 */
287 psw_t restart_psw; /* 0x1a0 */
288 psw_t external_new_psw; /* 0x1b0 */
289 psw_t svc_new_psw; /* 0x1c0 */
290 psw_t program_new_psw; /* 0x1d0 */
291 psw_t mcck_new_psw; /* 0x1e0 */
292 psw_t io_new_psw; /* 0x1f0 */
293 psw_t return_psw; /* 0x200 */
294 __u8 irb[64]; /* 0x210 */
295 __u64 sync_enter_timer; /* 0x250 */
296 __u64 async_enter_timer; /* 0x258 */
297 __u64 exit_timer; /* 0x260 */
298 __u64 last_update_timer; /* 0x268 */
299 __u64 user_timer; /* 0x270 */
300 __u64 system_timer; /* 0x278 */
301 __u64 last_update_clock; /* 0x280 */
302 __u64 steal_clock; /* 0x288 */
ae6aa2ea
MS
303 psw_t return_mcck_psw; /* 0x290 */
304 __u8 pad8[0xc00-0x2a0]; /* 0x2a0 */
1da177e4
LT
305 /* System info area */
306 __u64 save_area[16]; /* 0xc00 */
307 __u8 pad9[0xd40-0xc80]; /* 0xc80 */
308 __u64 kernel_stack; /* 0xd40 */
309 __u64 thread_info; /* 0xd48 */
310 __u64 async_stack; /* 0xd50 */
311 __u64 kernel_asce; /* 0xd58 */
312 __u64 user_asce; /* 0xd60 */
313 __u64 panic_stack; /* 0xd68 */
c1821c2e
GS
314 __u64 user_exec_asce; /* 0xd70 */
315 __u8 pad10[0xd80-0xd78]; /* 0xd78 */
1da177e4
LT
316 /* entry.S sensitive area start */
317 struct cpuinfo_S390 cpu_data; /* 0xd80 */
318 __u32 ipl_device; /* 0xdb8 */
319 __u32 pad11; /* 0xdbc */
320 /* entry.S sensitive area end */
321
322 /* SMP info area: defined by DJB */
323 __u64 jiffy_timer; /* 0xdc0 */
324 __u64 ext_call_fast; /* 0xdc8 */
325 __u64 percpu_offset; /* 0xdd0 */
326 __u64 current_task; /* 0xdd8 */
327 __u64 softirq_pending; /* 0xde0 */
328 __u64 int_clock; /* 0xde8 */
329 __u8 pad12[0xe00-0xdf0]; /* 0xdf0 */
330
331 /* 0xe00 is used as indicator for dump tools */
332 /* whether the kernel died with panic() or not */
333 __u32 panic_magic; /* 0xe00 */
334
335 __u8 pad13[0x1200-0xe04]; /* 0xe04 */
336
337 /* System info area */
338
339 __u64 floating_pt_save_area[16]; /* 0x1200 */
340 __u64 gpregs_save_area[16]; /* 0x1280 */
341 __u32 st_status_fixed_logout[4]; /* 0x1300 */
342 __u8 pad14[0x1318-0x1310]; /* 0x1310 */
343 __u32 prefixreg_save_area; /* 0x1318 */
344 __u32 fpt_creg_save_area; /* 0x131c */
345 __u8 pad15[0x1324-0x1320]; /* 0x1320 */
346 __u32 tod_progreg_save_area; /* 0x1324 */
347 __u32 cpu_timer_save_area[2]; /* 0x1328 */
348 __u32 clock_comp_save_area[2]; /* 0x1330 */
349 __u8 pad16[0x1340-0x1338]; /* 0x1338 */
350 __u32 access_regs_save_area[16]; /* 0x1340 */
351 __u64 cregs_save_area[16]; /* 0x1380 */
352
353 /* align to the top of the prefix area */
354
355 __u8 pad17[0x2000-0x1400]; /* 0x1400 */
356#endif /* !__s390x__ */
357} __attribute__((packed)); /* End structure*/
358
359#define S390_lowcore (*((struct _lowcore *) 0))
360extern struct _lowcore *lowcore_ptr[];
361
4448aaf0 362static inline void set_prefix(__u32 address)
1da177e4 363{
94c12cc7 364 asm volatile("spx %0" : : "m" (address) : "memory");
1da177e4
LT
365}
366
15e9b586
HC
367static inline __u32 store_prefix(void)
368{
369 __u32 address;
370
371 asm volatile("stpx %0" : "=m" (address));
372 return address;
373}
374
1da177e4
LT
375#define __PANIC_MAGIC 0xDEADC0DE
376
377#endif
378
379#endif