powerpc: Merge time.c and asm/time.h.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-powerpc / time.h
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1/*
2 * Common time prototypes and such for all ppc machines.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge
5 * Paul Mackerras' version and mine for PReP and Pmac.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef __POWERPC_TIME_H
14#define __POWERPC_TIME_H
15
16#ifdef __KERNEL__
17#include <linux/config.h>
18#include <linux/types.h>
19#include <linux/percpu.h>
20
21#include <asm/processor.h>
22#ifdef CONFIG_PPC64
23#include <asm/paca.h>
24#include <asm/iSeries/HvCall.h>
25#endif
26
27/* time.c */
28extern unsigned long tb_ticks_per_jiffy;
29extern unsigned long tb_ticks_per_usec;
30extern unsigned long tb_ticks_per_sec;
31extern u64 tb_to_xs;
32extern unsigned tb_to_us;
33extern u64 tb_last_stamp;
34
35DECLARE_PER_CPU(unsigned long, last_jiffy);
36
37struct rtc_time;
38extern void to_tm(int tim, struct rtc_time * tm);
39extern time_t last_rtc_update;
40
41extern void generic_calibrate_decr(void);
42extern void wakeup_decrementer(void);
43
44/* Some sane defaults: 125 MHz timebase, 1GHz processor */
45extern unsigned long ppc_proc_freq;
46#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
47extern unsigned long ppc_tb_freq;
48#define DEFAULT_TB_FREQ 125000000UL
49
50/*
51 * By putting all of this stuff into a single struct we
52 * reduce the number of cache lines touched by do_gettimeofday.
53 * Both by collecting all of the data in one cache line and
54 * by touching only one TOC entry on ppc64.
55 */
56struct gettimeofday_vars {
57 u64 tb_to_xs;
58 u64 stamp_xsec;
59 u64 tb_orig_stamp;
60};
61
62struct gettimeofday_struct {
63 unsigned long tb_ticks_per_sec;
64 struct gettimeofday_vars vars[2];
65 struct gettimeofday_vars * volatile varp;
66 unsigned var_idx;
67 unsigned tb_to_us;
68};
69
70struct div_result {
71 u64 result_high;
72 u64 result_low;
73};
74
75/* Accessor functions for the timebase (RTC on 601) registers. */
76/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
77#ifdef CONFIG_6xx
78#define __USE_RTC() cpu_has_feature(CPU_FTR_USE_TB)
79#else
80#define __USE_RTC() 0
81#endif
82
83/* On ppc64 this gets us the whole timebase; on ppc32 just the lower half */
84static inline unsigned long get_tbl(void)
85{
86 unsigned long tbl;
87
88#if defined(CONFIG_403GCX)
89 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
90#else
91 asm volatile("mftb %0" : "=r" (tbl));
92#endif
93 return tbl;
94}
95
96static inline unsigned int get_tbu(void)
97{
98 unsigned int tbu;
99
100#if defined(CONFIG_403GCX)
101 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
102#else
103 asm volatile("mftbu %0" : "=r" (tbu));
104#endif
105 return tbu;
106}
107
108static inline unsigned int get_rtcl(void)
109{
110 unsigned int rtcl;
111
112 asm volatile("mfrtcl %0" : "=r" (rtcl));
113 return rtcl;
114}
115
116#ifdef CONFIG_PPC64
117static inline u64 get_tb(void)
118{
119 return mftb();
120}
121#else
122static inline u64 get_tb(void)
123{
124 unsigned int tbhi, tblo, tbhi2;
125
126 do {
127 tbhi = get_tbu();
128 tblo = get_tbl();
129 tbhi2 = get_tbu();
130 } while (tbhi != tbhi2);
131
132 return ((u64)tbhi << 32) | tblo;
133}
134#endif
135
136static inline void set_tb(unsigned int upper, unsigned int lower)
137{
138 mtspr(SPRN_TBWL, 0);
139 mtspr(SPRN_TBWU, upper);
140 mtspr(SPRN_TBWL, lower);
141}
142
143/* Accessor functions for the decrementer register.
144 * The 4xx doesn't even have a decrementer. I tried to use the
145 * generic timer interrupt code, which seems OK, with the 4xx PIT
146 * in auto-reload mode. The problem is PIT stops counting when it
147 * hits zero. If it would wrap, we could use it just like a decrementer.
148 */
149static inline unsigned int get_dec(void)
150{
151#if defined(CONFIG_40x)
152 return (mfspr(SPRN_PIT));
153#else
154 return (mfspr(SPRN_DEC));
155#endif
156}
157
158static inline void set_dec(int val)
159{
160#if defined(CONFIG_40x)
161 return; /* Have to let it auto-reload */
162#elif defined(CONFIG_8xx_CPU6)
163 set_dec_cpu6(val);
164#else
165#ifdef CONFIG_PPC_ISERIES
166 struct paca_struct *lpaca = get_paca();
167 int cur_dec;
168
169 if (lpaca->lppaca.shared_proc) {
170 lpaca->lppaca.virtual_decr = val;
171 cur_dec = get_dec();
172 if (cur_dec > val)
173 HvCall_setVirtualDecr();
174 } else
175#endif
176 mtspr(SPRN_DEC, val);
177#endif /* not 40x or 8xx_CPU6 */
178}
179
180static inline unsigned long tb_ticks_since(unsigned long tstamp)
181{
182 if (__USE_RTC()) {
183 int delta = get_rtcl() - (unsigned int) tstamp;
184 return delta < 0 ? delta + 1000000000 : delta;
185 }
186 return get_tbl() - tstamp;
187}
188
189#define mulhwu(x,y) \
190({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
191
192#ifdef CONFIG_PPC64
193#define mulhdu(x,y) \
194({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
195#else
196extern u64 mulhdu(u64, u64);
197#endif
198
199unsigned mulhwu_scale_factor(unsigned, unsigned);
200void div128_by_32(u64 dividend_high, u64 dividend_low,
201 unsigned divisor, struct div_result *dr);
202
203/* Used to store Processor Utilization register (purr) values */
204
205struct cpu_usage {
206 u64 current_tb; /* Holds the current purr register values */
207};
208
209DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
210
211#endif /* __KERNEL__ */
212#endif /* __PPC64_TIME_H */