[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-powerpc / rwsem.h

#ifndef _ASM_POWERPC_RWSEM_H
#define _ASM_POWERPC_RWSEM_H

#ifndef _LINUX_RWSEM_H
#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
#endif

#ifdef __KERNEL__

/*
 * include/asm-powerpc/rwsem.h: R/W semaphores for PPC using the stuff
 * in lib/rwsem.c.  Adapted largely from include/asm-i386/rwsem.h
 * by Paul Mackerras <paulus@samba.org>.
 */

#include <linux/list.h>
#include <linux/spinlock.h>
#include <asm/atomic.h>
#include <asm/system.h>

/*
 * the semaphore definition
 */
struct rw_semaphore {
	/* XXX this should be able to be an atomic_t  -- paulus */
	signed int		count;
#define RWSEM_UNLOCKED_VALUE		0x00000000
#define RWSEM_ACTIVE_BIAS		0x00000001
#define RWSEM_ACTIVE_MASK		0x0000ffff
#define RWSEM_WAITING_BIAS		(-0x00010000)
#define RWSEM_ACTIVE_READ_BIAS		RWSEM_ACTIVE_BIAS
#define RWSEM_ACTIVE_WRITE_BIAS		(RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
	spinlock_t		wait_lock;
	struct list_head	wait_list;
};

#define __RWSEM_INITIALIZER(name) \
	{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
	  LIST_HEAD_INIT((name).wait_list) }

#define DECLARE_RWSEM(name)		\
	struct rw_semaphore name = __RWSEM_INITIALIZER(name)

extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);

static inline void init_rwsem(struct rw_semaphore *sem)
{
	sem->count = RWSEM_UNLOCKED_VALUE;
	spin_lock_init(&sem->wait_lock);
	INIT_LIST_HEAD(&sem->wait_list);
}

/*
 * lock for reading
 */
static inline void __down_read(struct rw_semaphore *sem)
{
	if (unlikely(atomic_inc_return((atomic_t *)(&sem->count)) <= 0))
		rwsem_down_read_failed(sem);
}

static inline int __down_read_trylock(struct rw_semaphore *sem)
{
	int tmp;

	while ((tmp = sem->count) >= 0) {
		if (tmp == cmpxchg(&sem->count, tmp,
				   tmp + RWSEM_ACTIVE_READ_BIAS)) {
			return 1;
		}
	}
	return 0;
}

/*
 * lock for writing
 */
static inline void __down_write(struct rw_semaphore *sem)
{
	int tmp;

	tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS,
				(atomic_t *)(&sem->count));
	if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS))
		rwsem_down_write_failed(sem);
}

static inline int __down_write_trylock(struct rw_semaphore *sem)
{
	int tmp;

	tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
		      RWSEM_ACTIVE_WRITE_BIAS);
	return tmp == RWSEM_UNLOCKED_VALUE;
}

/*
 * unlock after reading
 */
static inline void __up_read(struct rw_semaphore *sem)
{
	int tmp;

	tmp = atomic_dec_return((atomic_t *)(&sem->count));
	if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0))
		rwsem_wake(sem);
}

/*
 * unlock after writing
 */
static inline void __up_write(struct rw_semaphore *sem)
{
	if (unlikely(atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
			      (atomic_t *)(&sem->count)) < 0))
		rwsem_wake(sem);
}

/*
 * implement atomic add functionality
 */
static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
{
	atomic_add(delta, (atomic_t *)(&sem->count));
}

/*
 * downgrade write lock to read lock
 */
static inline void __downgrade_write(struct rw_semaphore *sem)
{
	int tmp;

	tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count));
	if (tmp < 0)
		rwsem_downgrade_wake(sem);
}

/*
 * implement exchange and add functionality
 */
static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
{
	return atomic_add_return(delta, (atomic_t *)(&sem->count));
}

static inline int rwsem_is_locked(struct rw_semaphore *sem)
{
	return (sem->count != 0);
}

#endif	/* __KERNEL__ */
#endif	/* _ASM_POWERPC_RWSEM_H */
Commit	Line	Data
342e73b3 JL	1	#ifndef _ASM_POWERPC_RWSEM_H
	2	#define _ASM_POWERPC_RWSEM_H
	3
20b31b53 RD	4	#ifndef _LINUX_RWSEM_H
	5	#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
	6	#endif
	7
342e73b3 JL	8	#ifdef __KERNEL__
342e73b3 JL	9
1da177e4	10	/*
2ef9481e	11	* include/asm-powerpc/rwsem.h: R/W semaphores for PPC using the stuff
1da177e4 LT	12	* in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h
1da177e4 LT	13	* by Paul Mackerras <paulus@samba.org>.
1da177e4 LT	14	*/
1da177e4 LT	15
1da177e4 LT	16	#include <linux/list.h>
	17	#include <linux/spinlock.h>
	18	#include <asm/atomic.h>
	19	#include <asm/system.h>
	20
	21	/*
	22	* the semaphore definition
	23	*/
	24	struct rw_semaphore {
	25	/* XXX this should be able to be an atomic_t -- paulus */
	26	signed int count;
	27	#define RWSEM_UNLOCKED_VALUE 0x00000000
	28	#define RWSEM_ACTIVE_BIAS 0x00000001
	29	#define RWSEM_ACTIVE_MASK 0x0000ffff
	30	#define RWSEM_WAITING_BIAS (-0x00010000)
	31	#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
	32	#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
	33	spinlock_t wait_lock;
	34	struct list_head wait_list;
1da177e4 LT	35	};
1da177e4 LT	36
1da177e4 LT	37	#define __RWSEM_INITIALIZER(name) \
1da177e4 LT	38	{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
61f4c3d6	39	LIST_HEAD_INIT((name).wait_list) }
1da177e4 LT	40
	41	#define DECLARE_RWSEM(name) \
	42	struct rw_semaphore name = __RWSEM_INITIALIZER(name)
	43
	44	extern struct rw_semaphore rwsem_down_read_failed(struct rw_semaphore sem);
	45	extern struct rw_semaphore rwsem_down_write_failed(struct rw_semaphore sem);
	46	extern struct rw_semaphore rwsem_wake(struct rw_semaphore sem);
	47	extern struct rw_semaphore rwsem_downgrade_wake(struct rw_semaphore sem);
	48
	49	static inline void init_rwsem(struct rw_semaphore *sem)
	50	{
	51	sem->count = RWSEM_UNLOCKED_VALUE;
	52	spin_lock_init(&sem->wait_lock);
	53	INIT_LIST_HEAD(&sem->wait_list);
1da177e4 LT	54	}
	55
	56	/*
	57	* lock for reading
	58	*/
	59	static inline void __down_read(struct rw_semaphore *sem)
	60	{
	61	if (unlikely(atomic_inc_return((atomic_t *)(&sem->count)) <= 0))
	62	rwsem_down_read_failed(sem);
	63	}
	64
	65	static inline int __down_read_trylock(struct rw_semaphore *sem)
	66	{
	67	int tmp;
	68
	69	while ((tmp = sem->count) >= 0) {
	70	if (tmp == cmpxchg(&sem->count, tmp,
	71	tmp + RWSEM_ACTIVE_READ_BIAS)) {
	72	return 1;
	73	}
	74	}
	75	return 0;
	76	}
	77
	78	/*
	79	* lock for writing
	80	*/
	81	static inline void __down_write(struct rw_semaphore *sem)
	82	{
	83	int tmp;
	84
	85	tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS,
	86	(atomic_t *)(&sem->count));
	87	if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS))
	88	rwsem_down_write_failed(sem);
	89	}
	90
	91	static inline int __down_write_trylock(struct rw_semaphore *sem)
	92	{
	93	int tmp;
	94
	95	tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
	96	RWSEM_ACTIVE_WRITE_BIAS);
	97	return tmp == RWSEM_UNLOCKED_VALUE;
	98	}
	99
	100	/*
	101	* unlock after reading
	102	*/
	103	static inline void __up_read(struct rw_semaphore *sem)
	104	{
	105	int tmp;
	106
	107	tmp = atomic_dec_return((atomic_t *)(&sem->count));
	108	if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0))
	109	rwsem_wake(sem);
	110	}
	111
	112	/*
	113	* unlock after writing
	114	*/
	115	static inline void __up_write(struct rw_semaphore *sem)
	116	{
	117	if (unlikely(atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
118	(atomic_t *)(&sem->count)) < 0))
119	rwsem_wake(sem);
120	}
121
122	/*
123	* implement atomic add functionality
124	*/
125	static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
126	{
127	atomic_add(delta, (atomic_t *)(&sem->count));
128	}
129
130	/*
131	* downgrade write lock to read lock
132	*/
133	static inline void __downgrade_write(struct rw_semaphore *sem)
134	{
135	int tmp;
136
137	tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count));
138	if (tmp < 0)
139	rwsem_downgrade_wake(sem);
140	}
141
142	/*
143	* implement exchange and add functionality
144	*/
145	static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
146	{
147	return atomic_add_return(delta, (atomic_t *)(&sem->count));
148	}
149
eb92f4ef RVR	150	static inline int rwsem_is_locked(struct rw_semaphore *sem)
	151	{
	152	return (sem->count != 0);
	153	}
	154
342e73b3 JL	155	#endif /* __KERNEL__ */
342e73b3 JL	156	#endif /* _ASM_POWERPC_RWSEM_H */