[POWERPC] pasemi: Add flag management functions to dma_lib
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-powerpc / paca.h
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1da177e4 1/*
8882a4da 2 * include/asm-powerpc/paca.h
1da177e4 3 *
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4 * This control block defines the PACA which defines the processor
5 * specific data for each logical processor on the system.
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6 * There are some pointers defined that are utilized by PLIC.
7 *
8 * C 2001 PPC 64 Team, IBM Corp
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
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14 */
15#ifndef _ASM_POWERPC_PACA_H
16#define _ASM_POWERPC_PACA_H
88ced031 17#ifdef __KERNEL__
1da177e4 18
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19#include <asm/types.h>
20#include <asm/lppaca.h>
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21#include <asm/mmu.h>
22
23register struct paca_struct *local_paca asm("r13");
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24
25#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
26extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
27/*
28 * Add standard checks that preemption cannot occur when using get_paca():
29 * otherwise the paca_struct it points to may be the wrong one just after.
30 */
31#define get_paca() ((void) debug_smp_processor_id(), local_paca)
32#else
1da177e4 33#define get_paca() local_paca
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34#endif
35
3356bb9f 36#define get_lppaca() (get_paca()->lppaca_ptr)
2f6093c8 37#define get_slb_shadow() (get_paca()->slb_shadow_ptr)
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38
39struct task_struct;
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40
41/*
42 * Defines the layout of the paca.
43 *
44 * This structure is not directly accessed by firmware or the service
45 * processor except for the first two pointers that point to the
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46 * lppaca area and the ItLpRegSave area for this CPU. The lppaca
47 * object is currently contained within the PACA but it doesn't need
48 * to be.
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49 */
50struct paca_struct {
51 /*
52 * Because hw_cpu_id, unlike other paca fields, is accessed
53 * routinely from other CPUs (from the IRQ code), we stick to
54 * read-only (after boot) fields in the first cacheline to
55 * avoid cacheline bouncing.
56 */
57
58 /*
59 * MAGIC: These first two pointers can't be moved - they're
60 * accessed by the firmware
61 */
62 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
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63#ifdef CONFIG_PPC_ISERIES
64 void *reg_save_ptr; /* Pointer to LpRegSave for PLIC */
65#endif /* CONFIG_PPC_ISERIES */
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66
67 /*
2ef9481e 68 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
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69 * load lock_token and paca_index with a single lwz
70 * instruction. They must travel together and be properly
71 * aligned.
72 */
73 u16 lock_token; /* Constant 0x8000, used in locks */
74 u16 paca_index; /* Logical processor number */
75
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76 u64 kernel_toc; /* Kernel TOC address */
77 u64 stab_real; /* Absolute address of segment table */
78 u64 stab_addr; /* Virtual address of segment table */
79 void *emergency_sp; /* pointer to emergency stack */
7a0268fa 80 u64 data_offset; /* per cpu data offset */
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81 s16 hw_cpu_id; /* Physical processor number */
82 u8 cpu_start; /* At startup, processor spins until */
83 /* this becomes non-zero. */
e91948fd 84 struct slb_shadow *slb_shadow_ptr;
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85
86 /*
87 * Now, starting in cacheline 2, the exception save areas
88 */
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89 /* used for most interrupts/exceptions */
90 u64 exgen[10] __attribute__((aligned(0x80)));
91 u64 exmc[10]; /* used for machine checks */
92 u64 exslb[10]; /* used for SLB/segment table misses
93 * on the linear mapping */
3c726f8d 94
1da177e4 95 mm_context_t context;
bf72aeba 96 u16 vmalloc_sllp;
1da177e4 97 u16 slb_cache_ptr;
d0f13e3c 98 u16 slb_cache[SLB_CACHE_ENTRIES];
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99
100 /*
101 * then miscellaneous read-write fields
102 */
103 struct task_struct *__current; /* Pointer to current */
104 u64 kstack; /* Saved Kernel stack addr */
105 u64 stab_rr; /* stab/slb round-robin counter */
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106 u64 saved_r1; /* r1 save for RTAS calls */
107 u64 saved_msr; /* MSR saved here by enter_rtas */
68730401 108 u16 trap_save; /* Used when bad stack is encountered */
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109 u8 soft_enabled; /* irq soft-enable flag */
110 u8 hard_enabled; /* set if irqs are enabled in MSR */
f007cacf 111 u8 io_sync; /* writel() needs spin_unlock sync */
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112
113 /* Stuff for accurate time accounting */
114 u64 user_time; /* accumulated usermode TB ticks */
115 u64 system_time; /* accumulated system TB ticks */
116 u64 startpurr; /* PURR/TB value snapshot */
4603ac18 117 u64 startspurr; /* SPURR value snapshot */
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118};
119
120extern struct paca_struct paca[];
121
88ced031 122#endif /* __KERNEL__ */
8882a4da 123#endif /* _ASM_POWERPC_PACA_H */