[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-powerpc / oprofile_impl.h

/*
 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
 *
 * Based on alpha version.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
#define _ASM_POWERPC_OPROFILE_IMPL_H

#define OP_MAX_COUNTER 8

/* Per-counter configuration as set via oprofilefs.  */
struct op_counter_config {
#ifdef __powerpc64__
	unsigned long valid;
#endif
	unsigned long enabled;
	unsigned long event;
	unsigned long count;
	unsigned long kernel;
#ifdef __powerpc64__
	/* We dont support per counter user/kernel selection */
#endif
	unsigned long user;
	unsigned long unit_mask;
};

/* System-wide configuration as set via oprofilefs.  */
struct op_system_config {
#ifdef __powerpc64__
	unsigned long mmcr0;
	unsigned long mmcr1;
	unsigned long mmcra;
#endif
	unsigned long enable_kernel;
	unsigned long enable_user;
#ifdef __powerpc64__
	unsigned long backtrace_spinlocks;
#endif
};

/* Per-arch configuration */
struct op_powerpc_model {
	void (*reg_setup) (struct op_counter_config *,
			   struct op_system_config *,
			   int num_counters);
#ifdef __powerpc64__
	void (*cpu_setup) (void *);
#endif
	void (*start) (struct op_counter_config *);
	void (*stop) (void);
	void (*handle_interrupt) (struct pt_regs *,
				  struct op_counter_config *);
	int num_counters;
};

#ifdef __powerpc64__
extern struct op_powerpc_model op_model_rs64;
extern struct op_powerpc_model op_model_power4;

static inline unsigned int ctr_read(unsigned int i)
{
	switch(i) {
	case 0:
		return mfspr(SPRN_PMC1);
	case 1:
		return mfspr(SPRN_PMC2);
	case 2:
		return mfspr(SPRN_PMC3);
	case 3:
		return mfspr(SPRN_PMC4);
	case 4:
		return mfspr(SPRN_PMC5);
	case 5:
		return mfspr(SPRN_PMC6);
	case 6:
		return mfspr(SPRN_PMC7);
	case 7:
		return mfspr(SPRN_PMC8);
	default:
		return 0;
	}
}

static inline void ctr_write(unsigned int i, unsigned int val)
{
	switch(i) {
	case 0:
		mtspr(SPRN_PMC1, val);
		break;
	case 1:
		mtspr(SPRN_PMC2, val);
		break;
	case 2:
		mtspr(SPRN_PMC3, val);
		break;
	case 3:
		mtspr(SPRN_PMC4, val);
		break;
	case 4:
		mtspr(SPRN_PMC5, val);
		break;
	case 5:
		mtspr(SPRN_PMC6, val);
		break;
	case 6:
		mtspr(SPRN_PMC7, val);
		break;
	case 7:
		mtspr(SPRN_PMC8, val);
		break;
	default:
		break;
	}
}
#endif /* __powerpc64__ */

#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
	3	*
	4	* Based on alpha version.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
	11
654810ec SR	12	#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
654810ec SR	13	#define _ASM_POWERPC_OPROFILE_IMPL_H
1da177e4 LT	14
	15	#define OP_MAX_COUNTER 8
	16
	17	/* Per-counter configuration as set via oprofilefs. */
	18	struct op_counter_config {
654810ec	19	#ifdef __powerpc64__
1da177e4	20	unsigned long valid;
654810ec	21	#endif
1da177e4 LT	22	unsigned long enabled;
	23	unsigned long event;
	24	unsigned long count;
	25	unsigned long kernel;
654810ec	26	#ifdef __powerpc64__
1da177e4	27	/* We dont support per counter user/kernel selection */
654810ec	28	#endif
1da177e4 LT	29	unsigned long user;
	30	unsigned long unit_mask;
	31	};
	32
	33	/* System-wide configuration as set via oprofilefs. */
	34	struct op_system_config {
654810ec	35	#ifdef __powerpc64__
1da177e4 LT	36	unsigned long mmcr0;
	37	unsigned long mmcr1;
	38	unsigned long mmcra;
654810ec	39	#endif
1da177e4 LT	40	unsigned long enable_kernel;
1da177e4 LT	41	unsigned long enable_user;
654810ec	42	#ifdef __powerpc64__
1da177e4	43	unsigned long backtrace_spinlocks;
654810ec	44	#endif
1da177e4 LT	45	};
	46
	47	/* Per-arch configuration */
a3e48c10	48	struct op_powerpc_model {
1da177e4 LT	49	void (reg_setup) (struct op_counter_config ,
	50	struct op_system_config *,
	51	int num_counters);
654810ec	52	#ifdef __powerpc64__
1da177e4	53	void (cpu_setup) (void );
654810ec	54	#endif
1da177e4 LT	55	void (start) (struct op_counter_config );
	56	void (*stop) (void);
	57	void (handle_interrupt) (struct pt_regs ,
	58	struct op_counter_config *);
	59	int num_counters;
	60	};
	61
654810ec	62	#ifdef __powerpc64__
a3e48c10 SR	63	extern struct op_powerpc_model op_model_rs64;
a3e48c10 SR	64	extern struct op_powerpc_model op_model_power4;
dca85932	65
1da177e4 LT	66	static inline unsigned int ctr_read(unsigned int i)
	67	{
	68	switch(i) {
	69	case 0:
	70	return mfspr(SPRN_PMC1);
	71	case 1:
	72	return mfspr(SPRN_PMC2);
	73	case 2:
	74	return mfspr(SPRN_PMC3);
	75	case 3:
	76	return mfspr(SPRN_PMC4);
	77	case 4:
	78	return mfspr(SPRN_PMC5);
	79	case 5:
	80	return mfspr(SPRN_PMC6);
	81	case 6:
	82	return mfspr(SPRN_PMC7);
	83	case 7:
	84	return mfspr(SPRN_PMC8);
	85	default:
	86	return 0;
	87	}
	88	}
	89
	90	static inline void ctr_write(unsigned int i, unsigned int val)
	91	{
	92	switch(i) {
	93	case 0:
	94	mtspr(SPRN_PMC1, val);
	95	break;
	96	case 1:
	97	mtspr(SPRN_PMC2, val);
	98	break;
	99	case 2:
	100	mtspr(SPRN_PMC3, val);
	101	break;
	102	case 3:
	103	mtspr(SPRN_PMC4, val);
	104	break;
	105	case 4:
	106	mtspr(SPRN_PMC5, val);
	107	break;
	108	case 5:
	109	mtspr(SPRN_PMC6, val);
	110	break;
	111	case 6:
	112	mtspr(SPRN_PMC7, val);
	113	break;
	114	case 7:
	115	mtspr(SPRN_PMC8, val);
	116	break;
	117	default:
	118	break;
	119	}
	120	}
654810ec	121	#endif /* __powerpc64__ */
1da177e4	122
654810ec	123	#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */