[PATCH] smp_processor_id() cleanup
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-parisc / smp.h
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1#ifndef __ASM_SMP_H
2#define __ASM_SMP_H
3
4#include <linux/config.h>
5
6#if defined(CONFIG_SMP)
7
8/* Page Zero Location PDC will look for the address to branch to when we poke
9** slave CPUs still in "Icache loop".
10*/
11#define PDC_OS_BOOT_RENDEZVOUS 0x10
12#define PDC_OS_BOOT_RENDEZVOUS_HI 0x28
13
14#ifndef ASSEMBLY
15#include <linux/bitops.h>
16#include <linux/threads.h> /* for NR_CPUS */
17#include <linux/cpumask.h>
18typedef unsigned long address_t;
19
20extern cpumask_t cpu_online_map;
21
22
23/*
24 * Private routines/data
25 *
26 * physical and logical are equivalent until we support CPU hotplug.
27 */
28#define cpu_number_map(cpu) (cpu)
29#define cpu_logical_map(cpu) (cpu)
30
31extern void smp_send_reschedule(int cpu);
32
33#endif /* !ASSEMBLY */
34
35/*
36 * This magic constant controls our willingness to transfer
37 * a process across CPUs. Such a transfer incurs cache and tlb
38 * misses. The current value is inherited from i386. Still needs
39 * to be tuned for parisc.
40 */
41
42#define PROC_CHANGE_PENALTY 15 /* Schedule penalty */
43
44#undef ENTRY_SYS_CPUS
45#ifdef ENTRY_SYS_CPUS
46#define STATE_RENDEZVOUS 0
47#define STATE_STOPPED 1
48#define STATE_RUNNING 2
49#define STATE_HALTED 3
50#endif
51
52extern unsigned long cpu_present_mask;
53
39c715b7 54#define raw_smp_processor_id() (current_thread_info()->cpu)
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55
56#endif /* CONFIG_SMP */
57
58#define NO_PROC_ID 0xFF /* No processor magic marker */
59#define ANY_PROC_ID 0xFF /* Any processor magic marker */
60static inline int __cpu_disable (void) {
61 return 0;
62}
63static inline void __cpu_die (unsigned int cpu) {
64 while(1)
65 ;
66}
67extern int __cpu_up (unsigned int cpu);
68
69#endif /* __ASM_SMP_H */