[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-mips / delay.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 by Waldorf Electronics
 * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 */
#ifndef _ASM_DELAY_H
#define _ASM_DELAY_H

#include <linux/config.h>
#include <linux/param.h>

#include <asm/compiler.h>

static inline void __delay(unsigned long loops)
{
	if (sizeof(long) == 4)
		__asm__ __volatile__ (
		".set\tnoreorder\n"
		"1:\tbnez\t%0,1b\n\t"
		"subu\t%0,1\n\t"
		".set\treorder"
		: "=r" (loops)
		: "0" (loops));
	else if (sizeof(long) == 8)
		__asm__ __volatile__ (
		".set\tnoreorder\n"
		"1:\tbnez\t%0,1b\n\t"
		"dsubu\t%0,1\n\t"
		".set\treorder"
		:"=r" (loops)
		:"0" (loops));
}


/*
 * Division by multiplication: you don't have to worry about
 * loss of precision.
 *
 * Use only for very small delays ( < 1 msec).  Should probably use a
 * lookup table, really, as the multiplications take much too long with
 * short delays.  This is a "reasonable" implementation, though (and the
 * first constant multiplications gets optimized away if the delay is
 * a constant)
 */

static inline void __udelay(unsigned long usecs, unsigned long lpj)
{
	unsigned long lo;

	/*
	 * The common rates of 1000 and 128 are rounded wrongly by the
	 * catchall case for 64-bit.  Excessive precission?  Probably ...
	 */
#if defined(CONFIG_64BIT) && (HZ == 128)
	usecs *= 0x0008637bd05af6c7UL;		/* 2**64 / (1000000 / HZ) */
#elif defined(CONFIG_64BIT) && (HZ == 1000)
	usecs *= 0x004189374BC6A7f0UL;		/* 2**64 / (1000000 / HZ) */
#elif defined(CONFIG_64BIT)
	usecs *= (0x8000000000000000UL / (500000 / HZ));
#else /* 32-bit junk follows here */
	usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) +
	                           0x80000000ULL) >> 32);
#endif

	if (sizeof(long) == 4)
		__asm__("multu\t%2, %3"
		: "=h" (usecs), "=l" (lo)
		: "r" (usecs), "r" (lpj)
		: GCC_REG_ACCUM);
	else if (sizeof(long) == 8)
		__asm__("dmultu\t%2, %3"
		: "=h" (usecs), "=l" (lo)
		: "r" (usecs), "r" (lpj)
		: GCC_REG_ACCUM);

	__delay(usecs);
}

#define __udelay_val cpu_data[smp_processor_id()].udelay_val

#define udelay(usecs) __udelay((usecs),__udelay_val)

#endif /* _ASM_DELAY_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994 by Waldorf Electronics
	7	* Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle
	8	* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
	9	*/
	10	#ifndef _ASM_DELAY_H
	11	#define _ASM_DELAY_H
	12
	13	#include <linux/config.h>
	14	#include <linux/param.h>
	15
	16	#include <asm/compiler.h>
	17
1da177e4 LT	18	static inline void __delay(unsigned long loops)
	19	{
	20	if (sizeof(long) == 4)
	21	__asm__ __volatile__ (
	22	".set\tnoreorder\n"
	23	"1:\tbnez\t%0,1b\n\t"
	24	"subu\t%0,1\n\t"
	25	".set\treorder"
	26	: "=r" (loops)
	27	: "0" (loops));
	28	else if (sizeof(long) == 8)
	29	__asm__ __volatile__ (
	30	".set\tnoreorder\n"
	31	"1:\tbnez\t%0,1b\n\t"
	32	"dsubu\t%0,1\n\t"
	33	".set\treorder"
	34	:"=r" (loops)
	35	:"0" (loops));
	36	}
	37
	38
	39	/*
	40	* Division by multiplication: you don't have to worry about
	41	* loss of precision.
	42	*
	43	* Use only for very small delays ( < 1 msec). Should probably use a
	44	* lookup table, really, as the multiplications take much too long with
	45	* short delays. This is a "reasonable" implementation, though (and the
	46	* first constant multiplications gets optimized away if the delay is
	47	* a constant)
	48	*/
	49
	50	static inline void __udelay(unsigned long usecs, unsigned long lpj)
	51	{
	52	unsigned long lo;
	53
	54	/*
	55	* The common rates of 1000 and 128 are rounded wrongly by the
	56	* catchall case for 64-bit. Excessive precission? Probably ...
	57	*/
875d43e7	58	#if defined(CONFIG_64BIT) && (HZ == 128)
1da177e4	59	usecs = 0x0008637bd05af6c7UL; / 2*64 / (1000000 / HZ) /
875d43e7	60	#elif defined(CONFIG_64BIT) && (HZ == 1000)
1da177e4	61	usecs = 0x004189374BC6A7f0UL; / 2*64 / (1000000 / HZ) /
875d43e7	62	#elif defined(CONFIG_64BIT)
1da177e4 LT	63	usecs *= (0x8000000000000000UL / (500000 / HZ));
	64	#else /* 32-bit junk follows here */
	65	usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) +
	66	0x80000000ULL) >> 32);
	67	#endif
	68
	69	if (sizeof(long) == 4)
	70	__asm__("multu\t%2, %3"
	71	: "=h" (usecs), "=l" (lo)
	72	: "r" (usecs), "r" (lpj)
	73	: GCC_REG_ACCUM);
	74	else if (sizeof(long) == 8)
	75	__asm__("dmultu\t%2, %3"
	76	: "=h" (usecs), "=l" (lo)
	77	: "r" (usecs), "r" (lpj)
	78	: GCC_REG_ACCUM);
	79
	80	__delay(usecs);
	81	}
	82
1da177e4	83	#define __udelay_val cpu_data[smp_processor_id()].udelay_val
1da177e4 LT	84
	85	#define udelay(usecs) __udelay((usecs),__udelay_val)
	86
	87	#endif /* _ASM_DELAY_H */