projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public | |
| 3 | * License. See the file "COPYING" in the main directory of this archive | |
| 4 | * for more details. | |
| 5 | * | |
| 6 | * This file contains NUMA specific prototypes and definitions. | |
| 7 | * | |
| 8 | * 2002/08/05 Erich Focht <efocht@ess.nec.de> | |
| 9 | * | |
| 10 | */ | |
| 11 | #ifndef _ASM_IA64_NUMA_H | |
| 12 | #define _ASM_IA64_NUMA_H | |
| 13 | ||
| 1da177e4 LT |
14 | |
| 15 | #ifdef CONFIG_NUMA | |
| 16 | ||
| 17 | #include <linux/cache.h> | |
| 18 | #include <linux/cpumask.h> | |
| 19 | #include <linux/numa.h> | |
| 20 | #include <linux/smp.h> | |
| 21 | #include <linux/threads.h> | |
| 22 | ||
| 23 | #include <asm/mmzone.h> | |
| 24 | ||
| a9de9835 | 25 | extern u16 cpu_to_node_map[NR_CPUS] __cacheline_aligned; |
| 1da177e4 LT |
26 | extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned; |
| 27 | ||
| 28 | /* Stuff below this line could be architecture independent */ | |
| 29 | ||
| 30 | extern int num_node_memblks; /* total number of memory chunks */ | |
| 31 | ||
| 32 | /* | |
| 33 | * List of node memory chunks. Filled when parsing SRAT table to | |
| 34 | * obtain information about memory nodes. | |
| 35 | */ | |
| 36 | ||
| 37 | struct node_memblk_s { | |
| 38 | unsigned long start_paddr; | |
| 39 | unsigned long size; | |
| 40 | int nid; /* which logical node contains this chunk? */ | |
| 41 | int bank; /* which mem bank on this node */ | |
| 42 | }; | |
| 43 | ||
| 44 | struct node_cpuid_s { | |
| 45 | u16 phys_id; /* id << 8 | eid */ | |
| 46 | int nid; /* logical node containing this CPU */ | |
| 47 | }; | |
| 48 | ||
| 49 | extern struct node_memblk_s node_memblk[NR_NODE_MEMBLKS]; | |
| 50 | extern struct node_cpuid_s node_cpuid[NR_CPUS]; | |
| 51 | ||
| 52 | /* | |
| 53 | * ACPI 2.0 SLIT (System Locality Information Table) | |
| 54 | * http://devresource.hp.com/devresource/Docs/TechPapers/IA64/slit.pdf | |
| 55 | * | |
| 56 | * This is a matrix with "distances" between nodes, they should be | |
| 57 | * proportional to the memory access latency ratios. | |
| 58 | */ | |
| 59 | ||
| 60 | extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES]; | |
| 61 | #define node_distance(from,to) (numa_slit[(from) * num_online_nodes() + (to)]) | |
| 62 | ||
| 63 | extern int paddr_to_nid(unsigned long paddr); | |
| 64 | ||
| 65 | #define local_nodeid (cpu_to_node_map[smp_processor_id()]) | |
| 66 | ||
| 3212fe15 KH |
67 | extern void map_cpu_to_node(int cpu, int nid); |
| 68 | extern void unmap_cpu_from_node(int cpu, int nid); | |
| 69 | ||
| 70 | ||
| 1da177e4 | 71 | #else /* !CONFIG_NUMA */ |
| bbf2bef9 KH |
72 | #define map_cpu_to_node(cpu, nid) do{}while(0) |
| 73 | #define unmap_cpu_from_node(cpu, nid) do{}while(0) | |
| 1da177e4 LT |
74 | |
| 75 | #define paddr_to_nid(addr) 0 | |
| 76 | ||
| 77 | #endif /* CONFIG_NUMA */ | |
| 78 | ||
| 79 | #endif /* _ASM_IA64_NUMA_H */ |