Commit | Line | Data |
---|---|---|
d3561b7f RR |
1 | #ifndef __ASM_PARAVIRT_H |
2 | #define __ASM_PARAVIRT_H | |
3 | /* Various instructions on x86 need to be replaced for | |
4 | * para-virtualization: those hooks are defined here. */ | |
b239fb25 JF |
5 | |
6 | #ifdef CONFIG_PARAVIRT | |
da181a8b | 7 | #include <asm/page.h> |
d3561b7f | 8 | |
139ec7c4 RR |
9 | /* Bitmask of what can be clobbered: usually at least eax. */ |
10 | #define CLBR_NONE 0x0 | |
11 | #define CLBR_EAX 0x1 | |
12 | #define CLBR_ECX 0x2 | |
13 | #define CLBR_EDX 0x4 | |
14 | #define CLBR_ANY 0x7 | |
15 | ||
d3561b7f | 16 | #ifndef __ASSEMBLY__ |
3dc494e8 | 17 | #include <linux/types.h> |
d4c10477 | 18 | #include <linux/cpumask.h> |
ce6234b5 | 19 | #include <asm/kmap_types.h> |
3dc494e8 | 20 | |
ce6234b5 | 21 | struct page; |
d3561b7f RR |
22 | struct thread_struct; |
23 | struct Xgt_desc_struct; | |
24 | struct tss_struct; | |
da181a8b | 25 | struct mm_struct; |
90a0a06a | 26 | struct desc_struct; |
294688c0 JF |
27 | |
28 | /* Lazy mode for batching updates / context switch */ | |
29 | enum paravirt_lazy_mode { | |
30 | PARAVIRT_LAZY_NONE = 0, | |
31 | PARAVIRT_LAZY_MMU = 1, | |
32 | PARAVIRT_LAZY_CPU = 2, | |
4e0fa856 | 33 | PARAVIRT_LAZY_FLUSH = 3, |
294688c0 JF |
34 | }; |
35 | ||
d3561b7f RR |
36 | struct paravirt_ops |
37 | { | |
38 | unsigned int kernel_rpl; | |
5311ab62 | 39 | int shared_kernel_pmd; |
d3561b7f RR |
40 | int paravirt_enabled; |
41 | const char *name; | |
42 | ||
139ec7c4 RR |
43 | /* |
44 | * Patch may replace one of the defined code sequences with arbitrary | |
45 | * code, subject to the same register constraints. This generally | |
46 | * means the code is not free to clobber any registers other than EAX. | |
47 | * The patch function should return the number of bytes of code | |
48 | * generated, as we nop pad the rest in generic code. | |
49 | */ | |
50 | unsigned (*patch)(u8 type, u16 clobber, void *firstinsn, unsigned len); | |
51 | ||
294688c0 | 52 | /* Basic arch-specific setup */ |
d3561b7f RR |
53 | void (*arch_setup)(void); |
54 | char *(*memory_setup)(void); | |
55 | void (*init_IRQ)(void); | |
294688c0 | 56 | void (*time_init)(void); |
d3561b7f | 57 | |
294688c0 JF |
58 | /* |
59 | * Called before/after init_mm pagetable setup. setup_start | |
60 | * may reset %cr3, and may pre-install parts of the pagetable; | |
61 | * pagetable setup is expected to preserve any existing | |
62 | * mapping. | |
63 | */ | |
b239fb25 JF |
64 | void (*pagetable_setup_start)(pgd_t *pgd_base); |
65 | void (*pagetable_setup_done)(pgd_t *pgd_base); | |
66 | ||
294688c0 | 67 | /* Print a banner to identify the environment */ |
d3561b7f RR |
68 | void (*banner)(void); |
69 | ||
294688c0 | 70 | /* Set and set time of day */ |
d3561b7f RR |
71 | unsigned long (*get_wallclock)(void); |
72 | int (*set_wallclock)(unsigned long); | |
d3561b7f | 73 | |
294688c0 | 74 | /* cpuid emulation, mostly so that caps bits can be disabled */ |
1a1eecd1 | 75 | void (*cpuid)(unsigned int *eax, unsigned int *ebx, |
d3561b7f RR |
76 | unsigned int *ecx, unsigned int *edx); |
77 | ||
294688c0 | 78 | /* hooks for various privileged instructions */ |
1a1eecd1 AK |
79 | unsigned long (*get_debugreg)(int regno); |
80 | void (*set_debugreg)(int regno, unsigned long value); | |
d3561b7f | 81 | |
1a1eecd1 | 82 | void (*clts)(void); |
d3561b7f | 83 | |
1a1eecd1 AK |
84 | unsigned long (*read_cr0)(void); |
85 | void (*write_cr0)(unsigned long); | |
d3561b7f | 86 | |
1a1eecd1 AK |
87 | unsigned long (*read_cr2)(void); |
88 | void (*write_cr2)(unsigned long); | |
d3561b7f | 89 | |
1a1eecd1 AK |
90 | unsigned long (*read_cr3)(void); |
91 | void (*write_cr3)(unsigned long); | |
d3561b7f | 92 | |
1a1eecd1 AK |
93 | unsigned long (*read_cr4_safe)(void); |
94 | unsigned long (*read_cr4)(void); | |
95 | void (*write_cr4)(unsigned long); | |
d3561b7f | 96 | |
294688c0 JF |
97 | /* |
98 | * Get/set interrupt state. save_fl and restore_fl are only | |
99 | * expected to use X86_EFLAGS_IF; all other bits | |
100 | * returned from save_fl are undefined, and may be ignored by | |
101 | * restore_fl. | |
102 | */ | |
1a1eecd1 AK |
103 | unsigned long (*save_fl)(void); |
104 | void (*restore_fl)(unsigned long); | |
105 | void (*irq_disable)(void); | |
106 | void (*irq_enable)(void); | |
107 | void (*safe_halt)(void); | |
108 | void (*halt)(void); | |
294688c0 | 109 | |
1a1eecd1 | 110 | void (*wbinvd)(void); |
d3561b7f | 111 | |
294688c0 JF |
112 | /* MSR, PMC and TSR operations. |
113 | err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */ | |
1a1eecd1 AK |
114 | u64 (*read_msr)(unsigned int msr, int *err); |
115 | int (*write_msr)(unsigned int msr, u64 val); | |
116 | ||
117 | u64 (*read_tsc)(void); | |
118 | u64 (*read_pmc)(void); | |
6cb9a835 | 119 | u64 (*get_scheduled_cycles)(void); |
1182d852 | 120 | unsigned long (*get_cpu_khz)(void); |
1a1eecd1 | 121 | |
294688c0 | 122 | /* Segment descriptor handling */ |
1a1eecd1 AK |
123 | void (*load_tr_desc)(void); |
124 | void (*load_gdt)(const struct Xgt_desc_struct *); | |
125 | void (*load_idt)(const struct Xgt_desc_struct *); | |
126 | void (*store_gdt)(struct Xgt_desc_struct *); | |
127 | void (*store_idt)(struct Xgt_desc_struct *); | |
128 | void (*set_ldt)(const void *desc, unsigned entries); | |
129 | unsigned long (*store_tr)(void); | |
130 | void (*load_tls)(struct thread_struct *t, unsigned int cpu); | |
90a0a06a RR |
131 | void (*write_ldt_entry)(struct desc_struct *, |
132 | int entrynum, u32 low, u32 high); | |
133 | void (*write_gdt_entry)(struct desc_struct *, | |
134 | int entrynum, u32 low, u32 high); | |
135 | void (*write_idt_entry)(struct desc_struct *, | |
136 | int entrynum, u32 low, u32 high); | |
137 | void (*load_esp0)(struct tss_struct *tss, struct thread_struct *t); | |
d3561b7f | 138 | |
1a1eecd1 | 139 | void (*set_iopl_mask)(unsigned mask); |
1a1eecd1 | 140 | void (*io_delay)(void); |
d3561b7f | 141 | |
294688c0 JF |
142 | /* |
143 | * Hooks for intercepting the creation/use/destruction of an | |
144 | * mm_struct. | |
145 | */ | |
d6dd61c8 JF |
146 | void (*activate_mm)(struct mm_struct *prev, |
147 | struct mm_struct *next); | |
148 | void (*dup_mmap)(struct mm_struct *oldmm, | |
149 | struct mm_struct *mm); | |
150 | void (*exit_mmap)(struct mm_struct *mm); | |
151 | ||
13623d79 | 152 | #ifdef CONFIG_X86_LOCAL_APIC |
294688c0 JF |
153 | /* |
154 | * Direct APIC operations, principally for VMI. Ideally | |
155 | * these shouldn't be in this interface. | |
156 | */ | |
1a1eecd1 AK |
157 | void (*apic_write)(unsigned long reg, unsigned long v); |
158 | void (*apic_write_atomic)(unsigned long reg, unsigned long v); | |
159 | unsigned long (*apic_read)(unsigned long reg); | |
bbab4f3b ZA |
160 | void (*setup_boot_clock)(void); |
161 | void (*setup_secondary_clock)(void); | |
294688c0 JF |
162 | |
163 | void (*startup_ipi_hook)(int phys_apicid, | |
164 | unsigned long start_eip, | |
165 | unsigned long start_esp); | |
13623d79 RR |
166 | #endif |
167 | ||
294688c0 | 168 | /* TLB operations */ |
1a1eecd1 AK |
169 | void (*flush_tlb_user)(void); |
170 | void (*flush_tlb_kernel)(void); | |
f8822f42 | 171 | void (*flush_tlb_single)(unsigned long addr); |
d4c10477 JF |
172 | void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm, |
173 | unsigned long va); | |
1a1eecd1 | 174 | |
294688c0 | 175 | /* Hooks for allocating/releasing pagetable pages */ |
1a1eecd1 AK |
176 | void (*alloc_pt)(u32 pfn); |
177 | void (*alloc_pd)(u32 pfn); | |
178 | void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count); | |
179 | void (*release_pt)(u32 pfn); | |
180 | void (*release_pd)(u32 pfn); | |
181 | ||
294688c0 | 182 | /* Pagetable manipulation functions */ |
1a1eecd1 | 183 | void (*set_pte)(pte_t *ptep, pte_t pteval); |
294688c0 JF |
184 | void (*set_pte_at)(struct mm_struct *mm, unsigned long addr, |
185 | pte_t *ptep, pte_t pteval); | |
1a1eecd1 | 186 | void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); |
3dc494e8 | 187 | void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep); |
294688c0 JF |
188 | void (*pte_update_defer)(struct mm_struct *mm, |
189 | unsigned long addr, pte_t *ptep); | |
3dc494e8 | 190 | |
ce6234b5 JF |
191 | #ifdef CONFIG_HIGHPTE |
192 | void *(*kmap_atomic_pte)(struct page *page, enum km_type type); | |
193 | #endif | |
194 | ||
da181a8b | 195 | #ifdef CONFIG_X86_PAE |
1a1eecd1 | 196 | void (*set_pte_atomic)(pte_t *ptep, pte_t pteval); |
3dc494e8 | 197 | void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte); |
1a1eecd1 | 198 | void (*set_pud)(pud_t *pudp, pud_t pudval); |
3dc494e8 | 199 | void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep); |
1a1eecd1 | 200 | void (*pmd_clear)(pmd_t *pmdp); |
3dc494e8 JF |
201 | |
202 | unsigned long long (*pte_val)(pte_t); | |
203 | unsigned long long (*pmd_val)(pmd_t); | |
204 | unsigned long long (*pgd_val)(pgd_t); | |
205 | ||
206 | pte_t (*make_pte)(unsigned long long pte); | |
207 | pmd_t (*make_pmd)(unsigned long long pmd); | |
208 | pgd_t (*make_pgd)(unsigned long long pgd); | |
209 | #else | |
210 | unsigned long (*pte_val)(pte_t); | |
211 | unsigned long (*pgd_val)(pgd_t); | |
212 | ||
213 | pte_t (*make_pte)(unsigned long pte); | |
214 | pgd_t (*make_pgd)(unsigned long pgd); | |
da181a8b RR |
215 | #endif |
216 | ||
294688c0 JF |
217 | /* Set deferred update mode, used for batching operations. */ |
218 | void (*set_lazy_mode)(enum paravirt_lazy_mode mode); | |
9226d125 | 219 | |
d3561b7f | 220 | /* These two are jmp to, not actually called. */ |
1a1eecd1 AK |
221 | void (*irq_enable_sysexit)(void); |
222 | void (*iret)(void); | |
d3561b7f RR |
223 | }; |
224 | ||
c9ccf30d RR |
225 | /* Mark a paravirt probe function. */ |
226 | #define paravirt_probe(fn) \ | |
227 | static asmlinkage void (*__paravirtprobe_##fn)(void) __attribute_used__ \ | |
228 | __attribute__((__section__(".paravirtprobe"))) = fn | |
229 | ||
d3561b7f RR |
230 | extern struct paravirt_ops paravirt_ops; |
231 | ||
d5822035 JF |
232 | #define PARAVIRT_PATCH(x) \ |
233 | (offsetof(struct paravirt_ops, x) / sizeof(void *)) | |
234 | ||
235 | #define paravirt_type(type) \ | |
236 | [paravirt_typenum] "i" (PARAVIRT_PATCH(type)) | |
237 | #define paravirt_clobber(clobber) \ | |
238 | [paravirt_clobber] "i" (clobber) | |
239 | ||
294688c0 JF |
240 | /* |
241 | * Generate some code, and mark it as patchable by the | |
242 | * apply_paravirt() alternate instruction patcher. | |
243 | */ | |
d5822035 JF |
244 | #define _paravirt_alt(insn_string, type, clobber) \ |
245 | "771:\n\t" insn_string "\n" "772:\n" \ | |
246 | ".pushsection .parainstructions,\"a\"\n" \ | |
247 | " .long 771b\n" \ | |
248 | " .byte " type "\n" \ | |
249 | " .byte 772b-771b\n" \ | |
250 | " .short " clobber "\n" \ | |
251 | ".popsection\n" | |
252 | ||
294688c0 | 253 | /* Generate patchable code, with the default asm parameters. */ |
f8822f42 | 254 | #define paravirt_alt(insn_string) \ |
d5822035 JF |
255 | _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") |
256 | ||
63f70270 JF |
257 | unsigned paravirt_patch_nop(void); |
258 | unsigned paravirt_patch_ignore(unsigned len); | |
259 | unsigned paravirt_patch_call(void *target, u16 tgt_clobbers, | |
260 | void *site, u16 site_clobbers, | |
261 | unsigned len); | |
262 | unsigned paravirt_patch_jmp(void *target, void *site, unsigned len); | |
263 | unsigned paravirt_patch_default(u8 type, u16 clobbers, void *site, unsigned len); | |
264 | ||
265 | unsigned paravirt_patch_insns(void *site, unsigned len, | |
266 | const char *start, const char *end); | |
267 | ||
268 | ||
294688c0 JF |
269 | /* |
270 | * This generates an indirect call based on the operation type number. | |
271 | * The type number, computed in PARAVIRT_PATCH, is derived from the | |
272 | * offset into the paravirt_ops structure, and can therefore be freely | |
273 | * converted back into a structure offset. | |
274 | */ | |
275 | #define PARAVIRT_CALL "call *(paravirt_ops+%c[paravirt_typenum]*4);" | |
276 | ||
277 | /* | |
278 | * These macros are intended to wrap calls into a paravirt_ops | |
279 | * operation, so that they can be later identified and patched at | |
280 | * runtime. | |
281 | * | |
282 | * Normally, a call to a pv_op function is a simple indirect call: | |
283 | * (paravirt_ops.operations)(args...). | |
284 | * | |
285 | * Unfortunately, this is a relatively slow operation for modern CPUs, | |
286 | * because it cannot necessarily determine what the destination | |
287 | * address is. In this case, the address is a runtime constant, so at | |
288 | * the very least we can patch the call to e a simple direct call, or | |
289 | * ideally, patch an inline implementation into the callsite. (Direct | |
290 | * calls are essentially free, because the call and return addresses | |
291 | * are completely predictable.) | |
292 | * | |
293 | * These macros rely on the standard gcc "regparm(3)" calling | |
294 | * convention, in which the first three arguments are placed in %eax, | |
295 | * %edx, %ecx (in that order), and the remaining arguments are placed | |
296 | * on the stack. All caller-save registers (eax,edx,ecx) are expected | |
297 | * to be modified (either clobbered or used for return values). | |
298 | * | |
299 | * The call instruction itself is marked by placing its start address | |
300 | * and size into the .parainstructions section, so that | |
301 | * apply_paravirt() in arch/i386/kernel/alternative.c can do the | |
302 | * appropriate patching under the control of the backend paravirt_ops | |
303 | * implementation. | |
304 | * | |
305 | * Unfortunately there's no way to get gcc to generate the args setup | |
306 | * for the call, and then allow the call itself to be generated by an | |
307 | * inline asm. Because of this, we must do the complete arg setup and | |
308 | * return value handling from within these macros. This is fairly | |
309 | * cumbersome. | |
310 | * | |
311 | * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. | |
312 | * It could be extended to more arguments, but there would be little | |
313 | * to be gained from that. For each number of arguments, there are | |
314 | * the two VCALL and CALL variants for void and non-void functions. | |
315 | * | |
316 | * When there is a return value, the invoker of the macro must specify | |
317 | * the return type. The macro then uses sizeof() on that type to | |
318 | * determine whether its a 32 or 64 bit value, and places the return | |
319 | * in the right register(s) (just %eax for 32-bit, and %edx:%eax for | |
320 | * 64-bit). | |
321 | * | |
322 | * 64-bit arguments are passed as a pair of adjacent 32-bit arguments | |
323 | * in low,high order. | |
324 | * | |
325 | * Small structures are passed and returned in registers. The macro | |
326 | * calling convention can't directly deal with this, so the wrapper | |
327 | * functions must do this. | |
328 | * | |
329 | * These PVOP_* macros are only defined within this header. This | |
330 | * means that all uses must be wrapped in inline functions. This also | |
331 | * makes sure the incoming and outgoing types are always correct. | |
332 | */ | |
1a45b7aa | 333 | #define __PVOP_CALL(rettype, op, pre, post, ...) \ |
f8822f42 | 334 | ({ \ |
1a45b7aa | 335 | rettype __ret; \ |
f8822f42 | 336 | unsigned long __eax, __edx, __ecx; \ |
1a45b7aa JF |
337 | if (sizeof(rettype) > sizeof(unsigned long)) { \ |
338 | asm volatile(pre \ | |
339 | paravirt_alt(PARAVIRT_CALL) \ | |
340 | post \ | |
341 | : "=a" (__eax), "=d" (__edx), \ | |
f8822f42 | 342 | "=c" (__ecx) \ |
1a45b7aa JF |
343 | : paravirt_type(op), \ |
344 | paravirt_clobber(CLBR_ANY), \ | |
345 | ##__VA_ARGS__ \ | |
f8822f42 | 346 | : "memory", "cc"); \ |
1a45b7aa | 347 | __ret = (rettype)((((u64)__edx) << 32) | __eax); \ |
f8822f42 | 348 | } else { \ |
1a45b7aa | 349 | asm volatile(pre \ |
f8822f42 | 350 | paravirt_alt(PARAVIRT_CALL) \ |
1a45b7aa JF |
351 | post \ |
352 | : "=a" (__eax), "=d" (__edx), \ | |
353 | "=c" (__ecx) \ | |
354 | : paravirt_type(op), \ | |
355 | paravirt_clobber(CLBR_ANY), \ | |
356 | ##__VA_ARGS__ \ | |
f8822f42 | 357 | : "memory", "cc"); \ |
1a45b7aa | 358 | __ret = (rettype)__eax; \ |
f8822f42 JF |
359 | } \ |
360 | __ret; \ | |
361 | }) | |
1a45b7aa | 362 | #define __PVOP_VCALL(op, pre, post, ...) \ |
f8822f42 JF |
363 | ({ \ |
364 | unsigned long __eax, __edx, __ecx; \ | |
1a45b7aa | 365 | asm volatile(pre \ |
f8822f42 | 366 | paravirt_alt(PARAVIRT_CALL) \ |
1a45b7aa | 367 | post \ |
f8822f42 | 368 | : "=a" (__eax), "=d" (__edx), "=c" (__ecx) \ |
1a45b7aa JF |
369 | : paravirt_type(op), \ |
370 | paravirt_clobber(CLBR_ANY), \ | |
371 | ##__VA_ARGS__ \ | |
f8822f42 JF |
372 | : "memory", "cc"); \ |
373 | }) | |
374 | ||
1a45b7aa JF |
375 | #define PVOP_CALL0(rettype, op) \ |
376 | __PVOP_CALL(rettype, op, "", "") | |
377 | #define PVOP_VCALL0(op) \ | |
378 | __PVOP_VCALL(op, "", "") | |
379 | ||
380 | #define PVOP_CALL1(rettype, op, arg1) \ | |
381 | __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1))) | |
382 | #define PVOP_VCALL1(op, arg1) \ | |
383 | __PVOP_VCALL(op, "", "", "0" ((u32)(arg1))) | |
384 | ||
385 | #define PVOP_CALL2(rettype, op, arg1, arg2) \ | |
386 | __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2))) | |
387 | #define PVOP_VCALL2(op, arg1, arg2) \ | |
388 | __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1" ((u32)(arg2))) | |
389 | ||
390 | #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ | |
391 | __PVOP_CALL(rettype, op, "", "", "0" ((u32)(arg1)), \ | |
392 | "1"((u32)(arg2)), "2"((u32)(arg3))) | |
393 | #define PVOP_VCALL3(op, arg1, arg2, arg3) \ | |
394 | __PVOP_VCALL(op, "", "", "0" ((u32)(arg1)), "1"((u32)(arg2)), \ | |
395 | "2"((u32)(arg3))) | |
396 | ||
397 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ | |
398 | __PVOP_CALL(rettype, op, \ | |
399 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | |
400 | "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ | |
401 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | |
402 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ | |
403 | __PVOP_VCALL(op, \ | |
404 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | |
405 | "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ | |
406 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | |
407 | ||
f8822f42 JF |
408 | static inline int paravirt_enabled(void) |
409 | { | |
410 | return paravirt_ops.paravirt_enabled; | |
411 | } | |
d3561b7f RR |
412 | |
413 | static inline void load_esp0(struct tss_struct *tss, | |
414 | struct thread_struct *thread) | |
415 | { | |
f8822f42 | 416 | PVOP_VCALL2(load_esp0, tss, thread); |
d3561b7f RR |
417 | } |
418 | ||
419 | #define ARCH_SETUP paravirt_ops.arch_setup(); | |
420 | static inline unsigned long get_wallclock(void) | |
421 | { | |
f8822f42 | 422 | return PVOP_CALL0(unsigned long, get_wallclock); |
d3561b7f RR |
423 | } |
424 | ||
425 | static inline int set_wallclock(unsigned long nowtime) | |
426 | { | |
f8822f42 | 427 | return PVOP_CALL1(int, set_wallclock, nowtime); |
d3561b7f RR |
428 | } |
429 | ||
e30fab3a | 430 | static inline void (*choose_time_init(void))(void) |
d3561b7f | 431 | { |
e30fab3a | 432 | return paravirt_ops.time_init; |
d3561b7f RR |
433 | } |
434 | ||
435 | /* The paravirtualized CPUID instruction. */ | |
436 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, | |
437 | unsigned int *ecx, unsigned int *edx) | |
438 | { | |
f8822f42 | 439 | PVOP_VCALL4(cpuid, eax, ebx, ecx, edx); |
d3561b7f RR |
440 | } |
441 | ||
442 | /* | |
443 | * These special macros can be used to get or set a debugging register | |
444 | */ | |
f8822f42 JF |
445 | static inline unsigned long paravirt_get_debugreg(int reg) |
446 | { | |
447 | return PVOP_CALL1(unsigned long, get_debugreg, reg); | |
448 | } | |
449 | #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg) | |
450 | static inline void set_debugreg(unsigned long val, int reg) | |
451 | { | |
452 | PVOP_VCALL2(set_debugreg, reg, val); | |
453 | } | |
d3561b7f | 454 | |
f8822f42 JF |
455 | static inline void clts(void) |
456 | { | |
457 | PVOP_VCALL0(clts); | |
458 | } | |
d3561b7f | 459 | |
f8822f42 JF |
460 | static inline unsigned long read_cr0(void) |
461 | { | |
462 | return PVOP_CALL0(unsigned long, read_cr0); | |
463 | } | |
d3561b7f | 464 | |
f8822f42 JF |
465 | static inline void write_cr0(unsigned long x) |
466 | { | |
467 | PVOP_VCALL1(write_cr0, x); | |
468 | } | |
469 | ||
470 | static inline unsigned long read_cr2(void) | |
471 | { | |
472 | return PVOP_CALL0(unsigned long, read_cr2); | |
473 | } | |
474 | ||
475 | static inline void write_cr2(unsigned long x) | |
476 | { | |
477 | PVOP_VCALL1(write_cr2, x); | |
478 | } | |
479 | ||
480 | static inline unsigned long read_cr3(void) | |
481 | { | |
482 | return PVOP_CALL0(unsigned long, read_cr3); | |
483 | } | |
d3561b7f | 484 | |
f8822f42 JF |
485 | static inline void write_cr3(unsigned long x) |
486 | { | |
487 | PVOP_VCALL1(write_cr3, x); | |
488 | } | |
d3561b7f | 489 | |
f8822f42 JF |
490 | static inline unsigned long read_cr4(void) |
491 | { | |
492 | return PVOP_CALL0(unsigned long, read_cr4); | |
493 | } | |
494 | static inline unsigned long read_cr4_safe(void) | |
495 | { | |
496 | return PVOP_CALL0(unsigned long, read_cr4_safe); | |
497 | } | |
d3561b7f | 498 | |
f8822f42 JF |
499 | static inline void write_cr4(unsigned long x) |
500 | { | |
501 | PVOP_VCALL1(write_cr4, x); | |
502 | } | |
3dc494e8 | 503 | |
d3561b7f RR |
504 | static inline void raw_safe_halt(void) |
505 | { | |
f8822f42 | 506 | PVOP_VCALL0(safe_halt); |
d3561b7f RR |
507 | } |
508 | ||
509 | static inline void halt(void) | |
510 | { | |
f8822f42 JF |
511 | PVOP_VCALL0(safe_halt); |
512 | } | |
513 | ||
514 | static inline void wbinvd(void) | |
515 | { | |
516 | PVOP_VCALL0(wbinvd); | |
d3561b7f | 517 | } |
d3561b7f RR |
518 | |
519 | #define get_kernel_rpl() (paravirt_ops.kernel_rpl) | |
520 | ||
f8822f42 JF |
521 | static inline u64 paravirt_read_msr(unsigned msr, int *err) |
522 | { | |
523 | return PVOP_CALL2(u64, read_msr, msr, err); | |
524 | } | |
525 | static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high) | |
526 | { | |
527 | return PVOP_CALL3(int, write_msr, msr, low, high); | |
528 | } | |
529 | ||
90a0a06a | 530 | /* These should all do BUG_ON(_err), but our headers are too tangled. */ |
f8822f42 JF |
531 | #define rdmsr(msr,val1,val2) do { \ |
532 | int _err; \ | |
533 | u64 _l = paravirt_read_msr(msr, &_err); \ | |
534 | val1 = (u32)_l; \ | |
535 | val2 = _l >> 32; \ | |
d3561b7f RR |
536 | } while(0) |
537 | ||
f8822f42 JF |
538 | #define wrmsr(msr,val1,val2) do { \ |
539 | paravirt_write_msr(msr, val1, val2); \ | |
d3561b7f RR |
540 | } while(0) |
541 | ||
f8822f42 JF |
542 | #define rdmsrl(msr,val) do { \ |
543 | int _err; \ | |
544 | val = paravirt_read_msr(msr, &_err); \ | |
d3561b7f RR |
545 | } while(0) |
546 | ||
f8822f42 JF |
547 | #define wrmsrl(msr,val) ((void)paravirt_write_msr(msr, val, 0)) |
548 | #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b) | |
d3561b7f RR |
549 | |
550 | /* rdmsr with exception handling */ | |
f8822f42 JF |
551 | #define rdmsr_safe(msr,a,b) ({ \ |
552 | int _err; \ | |
553 | u64 _l = paravirt_read_msr(msr, &_err); \ | |
554 | (*a) = (u32)_l; \ | |
555 | (*b) = _l >> 32; \ | |
d3561b7f RR |
556 | _err; }) |
557 | ||
f8822f42 JF |
558 | |
559 | static inline u64 paravirt_read_tsc(void) | |
560 | { | |
561 | return PVOP_CALL0(u64, read_tsc); | |
562 | } | |
563 | #define rdtsc(low,high) do { \ | |
564 | u64 _l = paravirt_read_tsc(); \ | |
565 | low = (u32)_l; \ | |
566 | high = _l >> 32; \ | |
d3561b7f RR |
567 | } while(0) |
568 | ||
f8822f42 JF |
569 | #define rdtscl(low) do { \ |
570 | u64 _l = paravirt_read_tsc(); \ | |
571 | low = (int)_l; \ | |
d3561b7f RR |
572 | } while(0) |
573 | ||
f8822f42 | 574 | #define rdtscll(val) (val = paravirt_read_tsc()) |
d3561b7f | 575 | |
6cb9a835 | 576 | #define get_scheduled_cycles(val) (val = paravirt_ops.get_scheduled_cycles()) |
1182d852 | 577 | #define calculate_cpu_khz() (paravirt_ops.get_cpu_khz()) |
6cb9a835 | 578 | |
d3561b7f RR |
579 | #define write_tsc(val1,val2) wrmsr(0x10, val1, val2) |
580 | ||
f8822f42 JF |
581 | static inline unsigned long long paravirt_read_pmc(int counter) |
582 | { | |
583 | return PVOP_CALL1(u64, read_pmc, counter); | |
584 | } | |
d3561b7f | 585 | |
f8822f42 JF |
586 | #define rdpmc(counter,low,high) do { \ |
587 | u64 _l = paravirt_read_pmc(counter); \ | |
588 | low = (u32)_l; \ | |
589 | high = _l >> 32; \ | |
590 | } while(0) | |
3dc494e8 | 591 | |
f8822f42 JF |
592 | static inline void load_TR_desc(void) |
593 | { | |
594 | PVOP_VCALL0(load_tr_desc); | |
595 | } | |
596 | static inline void load_gdt(const struct Xgt_desc_struct *dtr) | |
597 | { | |
598 | PVOP_VCALL1(load_gdt, dtr); | |
599 | } | |
600 | static inline void load_idt(const struct Xgt_desc_struct *dtr) | |
601 | { | |
602 | PVOP_VCALL1(load_idt, dtr); | |
603 | } | |
604 | static inline void set_ldt(const void *addr, unsigned entries) | |
605 | { | |
606 | PVOP_VCALL2(set_ldt, addr, entries); | |
607 | } | |
608 | static inline void store_gdt(struct Xgt_desc_struct *dtr) | |
609 | { | |
610 | PVOP_VCALL1(store_gdt, dtr); | |
611 | } | |
612 | static inline void store_idt(struct Xgt_desc_struct *dtr) | |
613 | { | |
614 | PVOP_VCALL1(store_idt, dtr); | |
615 | } | |
616 | static inline unsigned long paravirt_store_tr(void) | |
617 | { | |
618 | return PVOP_CALL0(unsigned long, store_tr); | |
619 | } | |
620 | #define store_tr(tr) ((tr) = paravirt_store_tr()) | |
621 | static inline void load_TLS(struct thread_struct *t, unsigned cpu) | |
622 | { | |
623 | PVOP_VCALL2(load_tls, t, cpu); | |
624 | } | |
625 | static inline void write_ldt_entry(void *dt, int entry, u32 low, u32 high) | |
626 | { | |
627 | PVOP_VCALL4(write_ldt_entry, dt, entry, low, high); | |
628 | } | |
629 | static inline void write_gdt_entry(void *dt, int entry, u32 low, u32 high) | |
630 | { | |
631 | PVOP_VCALL4(write_gdt_entry, dt, entry, low, high); | |
632 | } | |
633 | static inline void write_idt_entry(void *dt, int entry, u32 low, u32 high) | |
634 | { | |
635 | PVOP_VCALL4(write_idt_entry, dt, entry, low, high); | |
636 | } | |
637 | static inline void set_iopl_mask(unsigned mask) | |
638 | { | |
639 | PVOP_VCALL1(set_iopl_mask, mask); | |
640 | } | |
3dc494e8 | 641 | |
d3561b7f RR |
642 | /* The paravirtualized I/O functions */ |
643 | static inline void slow_down_io(void) { | |
644 | paravirt_ops.io_delay(); | |
645 | #ifdef REALLY_SLOW_IO | |
646 | paravirt_ops.io_delay(); | |
647 | paravirt_ops.io_delay(); | |
648 | paravirt_ops.io_delay(); | |
649 | #endif | |
650 | } | |
651 | ||
13623d79 RR |
652 | #ifdef CONFIG_X86_LOCAL_APIC |
653 | /* | |
654 | * Basic functions accessing APICs. | |
655 | */ | |
656 | static inline void apic_write(unsigned long reg, unsigned long v) | |
657 | { | |
f8822f42 | 658 | PVOP_VCALL2(apic_write, reg, v); |
13623d79 RR |
659 | } |
660 | ||
661 | static inline void apic_write_atomic(unsigned long reg, unsigned long v) | |
662 | { | |
f8822f42 | 663 | PVOP_VCALL2(apic_write_atomic, reg, v); |
13623d79 RR |
664 | } |
665 | ||
666 | static inline unsigned long apic_read(unsigned long reg) | |
667 | { | |
f8822f42 | 668 | return PVOP_CALL1(unsigned long, apic_read, reg); |
13623d79 | 669 | } |
bbab4f3b ZA |
670 | |
671 | static inline void setup_boot_clock(void) | |
672 | { | |
f8822f42 | 673 | PVOP_VCALL0(setup_boot_clock); |
bbab4f3b ZA |
674 | } |
675 | ||
676 | static inline void setup_secondary_clock(void) | |
677 | { | |
f8822f42 | 678 | PVOP_VCALL0(setup_secondary_clock); |
bbab4f3b | 679 | } |
13623d79 RR |
680 | #endif |
681 | ||
b239fb25 JF |
682 | static inline void paravirt_pagetable_setup_start(pgd_t *base) |
683 | { | |
684 | if (paravirt_ops.pagetable_setup_start) | |
685 | (*paravirt_ops.pagetable_setup_start)(base); | |
686 | } | |
687 | ||
688 | static inline void paravirt_pagetable_setup_done(pgd_t *base) | |
689 | { | |
690 | if (paravirt_ops.pagetable_setup_done) | |
691 | (*paravirt_ops.pagetable_setup_done)(base); | |
692 | } | |
3dc494e8 | 693 | |
ae5da273 ZA |
694 | #ifdef CONFIG_SMP |
695 | static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip, | |
696 | unsigned long start_esp) | |
697 | { | |
f8822f42 | 698 | PVOP_VCALL3(startup_ipi_hook, phys_apicid, start_eip, start_esp); |
ae5da273 ZA |
699 | } |
700 | #endif | |
13623d79 | 701 | |
d6dd61c8 JF |
702 | static inline void paravirt_activate_mm(struct mm_struct *prev, |
703 | struct mm_struct *next) | |
704 | { | |
f8822f42 | 705 | PVOP_VCALL2(activate_mm, prev, next); |
d6dd61c8 JF |
706 | } |
707 | ||
708 | static inline void arch_dup_mmap(struct mm_struct *oldmm, | |
709 | struct mm_struct *mm) | |
710 | { | |
f8822f42 | 711 | PVOP_VCALL2(dup_mmap, oldmm, mm); |
d6dd61c8 JF |
712 | } |
713 | ||
714 | static inline void arch_exit_mmap(struct mm_struct *mm) | |
715 | { | |
f8822f42 | 716 | PVOP_VCALL1(exit_mmap, mm); |
d6dd61c8 JF |
717 | } |
718 | ||
f8822f42 JF |
719 | static inline void __flush_tlb(void) |
720 | { | |
721 | PVOP_VCALL0(flush_tlb_user); | |
722 | } | |
723 | static inline void __flush_tlb_global(void) | |
724 | { | |
725 | PVOP_VCALL0(flush_tlb_kernel); | |
726 | } | |
727 | static inline void __flush_tlb_single(unsigned long addr) | |
728 | { | |
729 | PVOP_VCALL1(flush_tlb_single, addr); | |
730 | } | |
da181a8b | 731 | |
d4c10477 JF |
732 | static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, |
733 | unsigned long va) | |
734 | { | |
735 | PVOP_VCALL3(flush_tlb_others, &cpumask, mm, va); | |
736 | } | |
737 | ||
f8822f42 JF |
738 | static inline void paravirt_alloc_pt(unsigned pfn) |
739 | { | |
740 | PVOP_VCALL1(alloc_pt, pfn); | |
741 | } | |
742 | static inline void paravirt_release_pt(unsigned pfn) | |
743 | { | |
744 | PVOP_VCALL1(release_pt, pfn); | |
745 | } | |
c119ecce | 746 | |
f8822f42 JF |
747 | static inline void paravirt_alloc_pd(unsigned pfn) |
748 | { | |
749 | PVOP_VCALL1(alloc_pd, pfn); | |
750 | } | |
c119ecce | 751 | |
f8822f42 JF |
752 | static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn, |
753 | unsigned start, unsigned count) | |
754 | { | |
755 | PVOP_VCALL4(alloc_pd_clone, pfn, clonepfn, start, count); | |
756 | } | |
757 | static inline void paravirt_release_pd(unsigned pfn) | |
da181a8b | 758 | { |
f8822f42 | 759 | PVOP_VCALL1(release_pd, pfn); |
da181a8b RR |
760 | } |
761 | ||
ce6234b5 JF |
762 | #ifdef CONFIG_HIGHPTE |
763 | static inline void *kmap_atomic_pte(struct page *page, enum km_type type) | |
764 | { | |
765 | unsigned long ret; | |
766 | ret = PVOP_CALL2(unsigned long, kmap_atomic_pte, page, type); | |
767 | return (void *)ret; | |
768 | } | |
769 | #endif | |
770 | ||
f8822f42 JF |
771 | static inline void pte_update(struct mm_struct *mm, unsigned long addr, |
772 | pte_t *ptep) | |
da181a8b | 773 | { |
f8822f42 | 774 | PVOP_VCALL3(pte_update, mm, addr, ptep); |
da181a8b RR |
775 | } |
776 | ||
f8822f42 JF |
777 | static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr, |
778 | pte_t *ptep) | |
da181a8b | 779 | { |
f8822f42 | 780 | PVOP_VCALL3(pte_update_defer, mm, addr, ptep); |
da181a8b RR |
781 | } |
782 | ||
f8822f42 JF |
783 | #ifdef CONFIG_X86_PAE |
784 | static inline pte_t __pte(unsigned long long val) | |
da181a8b | 785 | { |
f8822f42 JF |
786 | unsigned long long ret = PVOP_CALL2(unsigned long long, make_pte, |
787 | val, val >> 32); | |
788 | return (pte_t) { ret, ret >> 32 }; | |
da181a8b RR |
789 | } |
790 | ||
f8822f42 | 791 | static inline pmd_t __pmd(unsigned long long val) |
da181a8b | 792 | { |
f8822f42 JF |
793 | return (pmd_t) { PVOP_CALL2(unsigned long long, make_pmd, val, val >> 32) }; |
794 | } | |
795 | ||
796 | static inline pgd_t __pgd(unsigned long long val) | |
797 | { | |
798 | return (pgd_t) { PVOP_CALL2(unsigned long long, make_pgd, val, val >> 32) }; | |
799 | } | |
800 | ||
801 | static inline unsigned long long pte_val(pte_t x) | |
802 | { | |
803 | return PVOP_CALL2(unsigned long long, pte_val, x.pte_low, x.pte_high); | |
804 | } | |
805 | ||
806 | static inline unsigned long long pmd_val(pmd_t x) | |
807 | { | |
808 | return PVOP_CALL2(unsigned long long, pmd_val, x.pmd, x.pmd >> 32); | |
809 | } | |
810 | ||
811 | static inline unsigned long long pgd_val(pgd_t x) | |
812 | { | |
813 | return PVOP_CALL2(unsigned long long, pgd_val, x.pgd, x.pgd >> 32); | |
814 | } | |
815 | ||
816 | static inline void set_pte(pte_t *ptep, pte_t pteval) | |
817 | { | |
818 | PVOP_VCALL3(set_pte, ptep, pteval.pte_low, pteval.pte_high); | |
819 | } | |
820 | ||
821 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | |
822 | pte_t *ptep, pte_t pteval) | |
823 | { | |
824 | /* 5 arg words */ | |
825 | paravirt_ops.set_pte_at(mm, addr, ptep, pteval); | |
da181a8b RR |
826 | } |
827 | ||
da181a8b RR |
828 | static inline void set_pte_atomic(pte_t *ptep, pte_t pteval) |
829 | { | |
f8822f42 | 830 | PVOP_VCALL3(set_pte_atomic, ptep, pteval.pte_low, pteval.pte_high); |
da181a8b RR |
831 | } |
832 | ||
f8822f42 JF |
833 | static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, |
834 | pte_t *ptep, pte_t pte) | |
da181a8b | 835 | { |
f8822f42 | 836 | /* 5 arg words */ |
da181a8b RR |
837 | paravirt_ops.set_pte_present(mm, addr, ptep, pte); |
838 | } | |
839 | ||
f8822f42 JF |
840 | static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval) |
841 | { | |
842 | PVOP_VCALL3(set_pmd, pmdp, pmdval.pmd, pmdval.pmd >> 32); | |
843 | } | |
844 | ||
da181a8b RR |
845 | static inline void set_pud(pud_t *pudp, pud_t pudval) |
846 | { | |
f8822f42 | 847 | PVOP_VCALL3(set_pud, pudp, pudval.pgd.pgd, pudval.pgd.pgd >> 32); |
da181a8b RR |
848 | } |
849 | ||
850 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
851 | { | |
f8822f42 | 852 | PVOP_VCALL3(pte_clear, mm, addr, ptep); |
da181a8b RR |
853 | } |
854 | ||
855 | static inline void pmd_clear(pmd_t *pmdp) | |
856 | { | |
f8822f42 JF |
857 | PVOP_VCALL1(pmd_clear, pmdp); |
858 | } | |
859 | ||
f8822f42 | 860 | #else /* !CONFIG_X86_PAE */ |
4cdd9c89 | 861 | |
f8822f42 JF |
862 | static inline pte_t __pte(unsigned long val) |
863 | { | |
864 | return (pte_t) { PVOP_CALL1(unsigned long, make_pte, val) }; | |
da181a8b | 865 | } |
f8822f42 JF |
866 | |
867 | static inline pgd_t __pgd(unsigned long val) | |
868 | { | |
869 | return (pgd_t) { PVOP_CALL1(unsigned long, make_pgd, val) }; | |
870 | } | |
871 | ||
872 | static inline unsigned long pte_val(pte_t x) | |
873 | { | |
874 | return PVOP_CALL1(unsigned long, pte_val, x.pte_low); | |
875 | } | |
876 | ||
877 | static inline unsigned long pgd_val(pgd_t x) | |
878 | { | |
879 | return PVOP_CALL1(unsigned long, pgd_val, x.pgd); | |
880 | } | |
881 | ||
882 | static inline void set_pte(pte_t *ptep, pte_t pteval) | |
883 | { | |
884 | PVOP_VCALL2(set_pte, ptep, pteval.pte_low); | |
885 | } | |
886 | ||
887 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | |
888 | pte_t *ptep, pte_t pteval) | |
889 | { | |
890 | PVOP_VCALL4(set_pte_at, mm, addr, ptep, pteval.pte_low); | |
891 | } | |
892 | ||
893 | static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval) | |
894 | { | |
895 | PVOP_VCALL2(set_pmd, pmdp, pmdval.pud.pgd.pgd); | |
896 | } | |
f8822f42 | 897 | #endif /* CONFIG_X86_PAE */ |
da181a8b | 898 | |
9226d125 | 899 | #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE |
f8822f42 JF |
900 | static inline void arch_enter_lazy_cpu_mode(void) |
901 | { | |
902 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_CPU); | |
903 | } | |
904 | ||
905 | static inline void arch_leave_lazy_cpu_mode(void) | |
906 | { | |
907 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE); | |
908 | } | |
909 | ||
910 | static inline void arch_flush_lazy_cpu_mode(void) | |
911 | { | |
912 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH); | |
913 | } | |
914 | ||
9226d125 ZA |
915 | |
916 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE | |
f8822f42 JF |
917 | static inline void arch_enter_lazy_mmu_mode(void) |
918 | { | |
919 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_MMU); | |
920 | } | |
921 | ||
922 | static inline void arch_leave_lazy_mmu_mode(void) | |
923 | { | |
924 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_NONE); | |
925 | } | |
926 | ||
927 | static inline void arch_flush_lazy_mmu_mode(void) | |
928 | { | |
929 | PVOP_VCALL1(set_lazy_mode, PARAVIRT_LAZY_FLUSH); | |
930 | } | |
9226d125 | 931 | |
45876233 JF |
932 | void _paravirt_nop(void); |
933 | #define paravirt_nop ((void *)_paravirt_nop) | |
934 | ||
139ec7c4 | 935 | /* These all sit in the .parainstructions section to tell us what to patch. */ |
98de032b | 936 | struct paravirt_patch_site { |
139ec7c4 RR |
937 | u8 *instr; /* original instructions */ |
938 | u8 instrtype; /* type of this instruction */ | |
939 | u8 len; /* length of original instruction */ | |
940 | u16 clobbers; /* what registers you may clobber */ | |
941 | }; | |
942 | ||
98de032b JF |
943 | extern struct paravirt_patch_site __parainstructions[], |
944 | __parainstructions_end[]; | |
945 | ||
139ec7c4 RR |
946 | static inline unsigned long __raw_local_save_flags(void) |
947 | { | |
948 | unsigned long f; | |
949 | ||
d5822035 JF |
950 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
951 | PARAVIRT_CALL | |
952 | "popl %%edx; popl %%ecx") | |
953 | : "=a"(f) | |
954 | : paravirt_type(save_fl), | |
42c24fa2 | 955 | paravirt_clobber(CLBR_EAX) |
d5822035 | 956 | : "memory", "cc"); |
139ec7c4 RR |
957 | return f; |
958 | } | |
959 | ||
960 | static inline void raw_local_irq_restore(unsigned long f) | |
961 | { | |
d5822035 JF |
962 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
963 | PARAVIRT_CALL | |
964 | "popl %%edx; popl %%ecx") | |
965 | : "=a"(f) | |
966 | : "0"(f), | |
967 | paravirt_type(restore_fl), | |
968 | paravirt_clobber(CLBR_EAX) | |
969 | : "memory", "cc"); | |
139ec7c4 RR |
970 | } |
971 | ||
972 | static inline void raw_local_irq_disable(void) | |
973 | { | |
d5822035 JF |
974 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
975 | PARAVIRT_CALL | |
976 | "popl %%edx; popl %%ecx") | |
977 | : | |
978 | : paravirt_type(irq_disable), | |
979 | paravirt_clobber(CLBR_EAX) | |
980 | : "memory", "eax", "cc"); | |
139ec7c4 RR |
981 | } |
982 | ||
983 | static inline void raw_local_irq_enable(void) | |
984 | { | |
d5822035 JF |
985 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
986 | PARAVIRT_CALL | |
987 | "popl %%edx; popl %%ecx") | |
988 | : | |
989 | : paravirt_type(irq_enable), | |
990 | paravirt_clobber(CLBR_EAX) | |
991 | : "memory", "eax", "cc"); | |
139ec7c4 RR |
992 | } |
993 | ||
994 | static inline unsigned long __raw_local_irq_save(void) | |
995 | { | |
996 | unsigned long f; | |
997 | ||
d5822035 JF |
998 | f = __raw_local_save_flags(); |
999 | raw_local_irq_disable(); | |
139ec7c4 RR |
1000 | return f; |
1001 | } | |
1002 | ||
d5822035 JF |
1003 | #define CLI_STRING \ |
1004 | _paravirt_alt("pushl %%ecx; pushl %%edx;" \ | |
1005 | "call *paravirt_ops+%c[paravirt_cli_type]*4;" \ | |
1006 | "popl %%edx; popl %%ecx", \ | |
1007 | "%c[paravirt_cli_type]", "%c[paravirt_clobber]") | |
1008 | ||
1009 | #define STI_STRING \ | |
1010 | _paravirt_alt("pushl %%ecx; pushl %%edx;" \ | |
1011 | "call *paravirt_ops+%c[paravirt_sti_type]*4;" \ | |
1012 | "popl %%edx; popl %%ecx", \ | |
1013 | "%c[paravirt_sti_type]", "%c[paravirt_clobber]") | |
139ec7c4 | 1014 | |
139ec7c4 | 1015 | #define CLI_STI_CLOBBERS , "%eax" |
d5822035 | 1016 | #define CLI_STI_INPUT_ARGS \ |
139ec7c4 | 1017 | , \ |
d5822035 JF |
1018 | [paravirt_cli_type] "i" (PARAVIRT_PATCH(irq_disable)), \ |
1019 | [paravirt_sti_type] "i" (PARAVIRT_PATCH(irq_enable)), \ | |
1020 | paravirt_clobber(CLBR_EAX) | |
1021 | ||
294688c0 | 1022 | /* Make sure as little as possible of this mess escapes. */ |
d5822035 | 1023 | #undef PARAVIRT_CALL |
1a45b7aa JF |
1024 | #undef __PVOP_CALL |
1025 | #undef __PVOP_VCALL | |
f8822f42 JF |
1026 | #undef PVOP_VCALL0 |
1027 | #undef PVOP_CALL0 | |
1028 | #undef PVOP_VCALL1 | |
1029 | #undef PVOP_CALL1 | |
1030 | #undef PVOP_VCALL2 | |
1031 | #undef PVOP_CALL2 | |
1032 | #undef PVOP_VCALL3 | |
1033 | #undef PVOP_CALL3 | |
1034 | #undef PVOP_VCALL4 | |
1035 | #undef PVOP_CALL4 | |
139ec7c4 | 1036 | |
d3561b7f RR |
1037 | #else /* __ASSEMBLY__ */ |
1038 | ||
d5822035 JF |
1039 | #define PARA_PATCH(off) ((off) / 4) |
1040 | ||
1041 | #define PARA_SITE(ptype, clobbers, ops) \ | |
139ec7c4 RR |
1042 | 771:; \ |
1043 | ops; \ | |
1044 | 772:; \ | |
1045 | .pushsection .parainstructions,"a"; \ | |
1046 | .long 771b; \ | |
1047 | .byte ptype; \ | |
1048 | .byte 772b-771b; \ | |
1049 | .short clobbers; \ | |
1050 | .popsection | |
1051 | ||
d5822035 | 1052 | #define INTERRUPT_RETURN \ |
42c24fa2 | 1053 | PARA_SITE(PARA_PATCH(PARAVIRT_iret), CLBR_NONE, \ |
d5822035 JF |
1054 | jmp *%cs:paravirt_ops+PARAVIRT_iret) |
1055 | ||
1056 | #define DISABLE_INTERRUPTS(clobbers) \ | |
1057 | PARA_SITE(PARA_PATCH(PARAVIRT_irq_disable), clobbers, \ | |
42c24fa2 | 1058 | pushl %eax; pushl %ecx; pushl %edx; \ |
d5822035 | 1059 | call *%cs:paravirt_ops+PARAVIRT_irq_disable; \ |
42c24fa2 | 1060 | popl %edx; popl %ecx; popl %eax) \ |
d5822035 JF |
1061 | |
1062 | #define ENABLE_INTERRUPTS(clobbers) \ | |
1063 | PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable), clobbers, \ | |
42c24fa2 | 1064 | pushl %eax; pushl %ecx; pushl %edx; \ |
d5822035 | 1065 | call *%cs:paravirt_ops+PARAVIRT_irq_enable; \ |
42c24fa2 | 1066 | popl %edx; popl %ecx; popl %eax) |
d5822035 JF |
1067 | |
1068 | #define ENABLE_INTERRUPTS_SYSEXIT \ | |
42c24fa2 | 1069 | PARA_SITE(PARA_PATCH(PARAVIRT_irq_enable_sysexit), CLBR_NONE, \ |
d5822035 | 1070 | jmp *%cs:paravirt_ops+PARAVIRT_irq_enable_sysexit) |
139ec7c4 RR |
1071 | |
1072 | #define GET_CR0_INTO_EAX \ | |
42c24fa2 JF |
1073 | push %ecx; push %edx; \ |
1074 | call *paravirt_ops+PARAVIRT_read_cr0; \ | |
1075 | pop %edx; pop %ecx | |
139ec7c4 | 1076 | |
d3561b7f RR |
1077 | #endif /* __ASSEMBLY__ */ |
1078 | #endif /* CONFIG_PARAVIRT */ | |
1079 | #endif /* __ASM_PARAVIRT_H */ |