projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
| Commit | Line | Data |
|---|---|---|
| 59003145 MH |
1 | /* |
| 2 | * File: include/asm-blackfin/mach-bf527/blackfin.h | |
| 3 | * Based on: | |
| 4 | * Author: | |
| 5 | * | |
| 6 | * Created: | |
| 7 | * Description: | |
| 8 | * | |
| 9 | * Rev: | |
| 10 | * | |
| 11 | * Modified: | |
| 12 | * | |
| 13 | * | |
| 14 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
| 15 | * | |
| 16 | * This program is free software; you can redistribute it and/or modify | |
| 17 | * it under the terms of the GNU General Public License as published by | |
| 18 | * the Free Software Foundation; either version 2, or (at your option) | |
| 19 | * any later version. | |
| 20 | * | |
| 21 | * This program is distributed in the hope that it will be useful, | |
| 22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 24 | * GNU General Public License for more details. | |
| 25 | * | |
| 26 | * You should have received a copy of the GNU General Public License | |
| 27 | * along with this program; see the file COPYING. | |
| 28 | * If not, write to the Free Software Foundation, | |
| 29 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
| 30 | */ | |
| 31 | ||
| 32 | #ifndef _MACH_BLACKFIN_H_ | |
| 33 | #define _MACH_BLACKFIN_H_ | |
| 34 | ||
| 35 | #define BF527_FAMILY | |
| 36 | ||
| 37 | #include "bf527.h" | |
| 38 | #include "mem_map.h" | |
| 39 | #include "defBF522.h" | |
| 40 | #include "anomaly.h" | |
| 41 | ||
| 7e291434 | 42 | #if defined(CONFIG_BF527) || defined(CONFIG_BF526) |
| 59003145 MH |
43 | #include "defBF527.h" |
| 44 | #endif | |
| 45 | ||
| 7e291434 | 46 | #if defined(CONFIG_BF525) || defined(CONFIG_BF524) |
| 59003145 MH |
47 | #include "defBF525.h" |
| 48 | #endif | |
| 49 | ||
| 50 | #if !defined(__ASSEMBLY__) | |
| 51 | #include "cdefBF522.h" | |
| 52 | ||
| 7e291434 | 53 | #if defined(CONFIG_BF527) || defined(CONFIG_BF526) |
| 59003145 MH |
54 | #include "cdefBF527.h" |
| 55 | #endif | |
| 56 | ||
| 7e291434 | 57 | #if defined(CONFIG_BF525) || defined(CONFIG_BF524) |
| 59003145 MH |
58 | #include "cdefBF525.h" |
| 59 | #endif | |
| 60 | #endif | |
| 61 | ||
| 62 | /* UART_IIR Register */ | |
| 63 | #define STATUS(x) ((x << 1) & 0x06) | |
| 64 | #define STATUS_P1 0x02 | |
| 65 | #define STATUS_P0 0x01 | |
| 66 | ||
| 5be36d22 GY |
67 | #define BFIN_UART_NR_PORTS 2 |
| 68 | ||
| 69 | #define OFFSET_THR 0x00 /* Transmit Holding register */ | |
| 70 | #define OFFSET_RBR 0x00 /* Receive Buffer register */ | |
| 71 | #define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */ | |
| 72 | #define OFFSET_IER 0x04 /* Interrupt Enable Register */ | |
| 73 | #define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */ | |
| 74 | #define OFFSET_IIR 0x08 /* Interrupt Identification Register */ | |
| 75 | #define OFFSET_LCR 0x0C /* Line Control Register */ | |
| 76 | #define OFFSET_MCR 0x10 /* Modem Control Register */ | |
| 77 | #define OFFSET_LSR 0x14 /* Line Status Register */ | |
| 78 | #define OFFSET_MSR 0x18 /* Modem Status Register */ | |
| 79 | #define OFFSET_SCR 0x1C /* SCR Scratch Register */ | |
| 80 | #define OFFSET_GCTL 0x24 /* Global Control Register */ | |
| 81 | ||
| 59003145 MH |
82 | /* DPMC*/ |
| 83 | #define bfin_read_STOPCK_OFF() bfin_read_STOPCK() | |
| 84 | #define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val) | |
| 85 | #define STOPCK_OFF STOPCK | |
| 86 | ||
| 87 | /* PLL_DIV Masks */ | |
| 88 | #define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */ | |
| 89 | #define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */ | |
| 90 | #define CCLK_DIV4 CSEL_DIV4 /* CCLK = VCO / 4 */ | |
| 91 | #define CCLK_DIV8 CSEL_DIV8 /* CCLK = VCO / 8 */ | |
| 92 | ||
| 93 | #endif |