Commit | Line | Data |
---|---|---|
7768a13c | 1 | /* |
2817142f | 2 | * omap_wdt.c |
7768a13c | 3 | * |
2817142f | 4 | * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog |
7768a13c KS |
5 | * |
6 | * Author: MontaVista Software, Inc. | |
7 | * <gdavis@mvista.com> or <source@mvista.com> | |
8 | * | |
9 | * 2003 (c) MontaVista Software, Inc. This file is licensed under the | |
10 | * terms of the GNU General Public License version 2. This program is | |
11 | * licensed "as is" without any warranty of any kind, whether express | |
12 | * or implied. | |
13 | * | |
14 | * History: | |
15 | * | |
16 | * 20030527: George G. Davis <gdavis@mvista.com> | |
17 | * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c | |
18 | * (c) Copyright 2000 Oleg Drokin <green@crimea.edu> | |
29fa0586 | 19 | * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk> |
7768a13c KS |
20 | * |
21 | * Copyright (c) 2004 Texas Instruments. | |
22 | * 1. Modified to support OMAP1610 32-KHz watchdog timer | |
23 | * 2. Ported to 2.6 kernel | |
24 | * | |
25 | * Copyright (c) 2005 David Brownell | |
26 | * Use the driver model and standard identifiers; handle bigger timeouts. | |
27 | */ | |
28 | ||
29 | #include <linux/module.h> | |
7768a13c KS |
30 | #include <linux/types.h> |
31 | #include <linux/kernel.h> | |
32 | #include <linux/fs.h> | |
33 | #include <linux/mm.h> | |
34 | #include <linux/miscdevice.h> | |
35 | #include <linux/watchdog.h> | |
36 | #include <linux/reboot.h> | |
7768a13c KS |
37 | #include <linux/init.h> |
38 | #include <linux/err.h> | |
39 | #include <linux/platform_device.h> | |
40 | #include <linux/moduleparam.h> | |
41 | #include <linux/clk.h> | |
1977f032 | 42 | #include <linux/bitops.h> |
089ab079 | 43 | #include <linux/io.h> |
12b9df7d | 44 | #include <linux/uaccess.h> |
a09e64fb | 45 | #include <mach/hardware.h> |
ce491cf8 | 46 | #include <plat/prcm.h> |
7768a13c KS |
47 | |
48 | #include "omap_wdt.h" | |
49 | ||
2817142f FB |
50 | static struct platform_device *omap_wdt_dev; |
51 | ||
7768a13c KS |
52 | static unsigned timer_margin; |
53 | module_param(timer_margin, uint, 0); | |
54 | MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); | |
55 | ||
7768a13c | 56 | static unsigned int wdt_trgr_pattern = 0x1234; |
12b9df7d | 57 | static spinlock_t wdt_lock; |
7768a13c | 58 | |
2817142f FB |
59 | struct omap_wdt_dev { |
60 | void __iomem *base; /* physical */ | |
61 | struct device *dev; | |
62 | int omap_wdt_users; | |
39a80c7f RK |
63 | struct clk *ick; |
64 | struct clk *fck; | |
2817142f FB |
65 | struct resource *mem; |
66 | struct miscdevice omap_wdt_miscdev; | |
67 | }; | |
68 | ||
69 | static void omap_wdt_ping(struct omap_wdt_dev *wdev) | |
7768a13c | 70 | { |
2817142f | 71 | void __iomem *base = wdev->base; |
b3112180 | 72 | |
7768a13c | 73 | /* wait for posted write to complete */ |
9f69e3b0 | 74 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) |
7768a13c | 75 | cpu_relax(); |
b3112180 | 76 | |
7768a13c | 77 | wdt_trgr_pattern = ~wdt_trgr_pattern; |
9f69e3b0 | 78 | __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR)); |
b3112180 | 79 | |
7768a13c | 80 | /* wait for posted write to complete */ |
9f69e3b0 | 81 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) |
7768a13c KS |
82 | cpu_relax(); |
83 | /* reloaded WCRR from WLDR */ | |
84 | } | |
85 | ||
2817142f | 86 | static void omap_wdt_enable(struct omap_wdt_dev *wdev) |
7768a13c | 87 | { |
b3112180 FB |
88 | void __iomem *base = wdev->base; |
89 | ||
7768a13c | 90 | /* Sequence to enable the watchdog */ |
9f69e3b0 FB |
91 | __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR); |
92 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) | |
7768a13c | 93 | cpu_relax(); |
b3112180 | 94 | |
9f69e3b0 FB |
95 | __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR); |
96 | while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) | |
7768a13c KS |
97 | cpu_relax(); |
98 | } | |
99 | ||
2817142f | 100 | static void omap_wdt_disable(struct omap_wdt_dev *wdev) |
7768a13c | 101 | { |
b3112180 FB |
102 | void __iomem *base = wdev->base; |
103 | ||
7768a13c | 104 | /* sequence required to disable watchdog */ |
9f69e3b0 FB |
105 | __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ |
106 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) | |
7768a13c | 107 | cpu_relax(); |
b3112180 | 108 | |
9f69e3b0 FB |
109 | __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ |
110 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) | |
7768a13c KS |
111 | cpu_relax(); |
112 | } | |
113 | ||
114 | static void omap_wdt_adjust_timeout(unsigned new_timeout) | |
115 | { | |
116 | if (new_timeout < TIMER_MARGIN_MIN) | |
117 | new_timeout = TIMER_MARGIN_DEFAULT; | |
118 | if (new_timeout > TIMER_MARGIN_MAX) | |
119 | new_timeout = TIMER_MARGIN_MAX; | |
120 | timer_margin = new_timeout; | |
121 | } | |
122 | ||
2817142f | 123 | static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev) |
7768a13c KS |
124 | { |
125 | u32 pre_margin = GET_WLDR_VAL(timer_margin); | |
b3112180 | 126 | void __iomem *base = wdev->base; |
7768a13c KS |
127 | |
128 | /* just count up at 32 KHz */ | |
9f69e3b0 | 129 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) |
7768a13c | 130 | cpu_relax(); |
b3112180 | 131 | |
9f69e3b0 FB |
132 | __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR); |
133 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) | |
7768a13c KS |
134 | cpu_relax(); |
135 | } | |
136 | ||
137 | /* | |
138 | * Allow only one task to hold it open | |
139 | */ | |
7768a13c KS |
140 | static int omap_wdt_open(struct inode *inode, struct file *file) |
141 | { | |
b3112180 FB |
142 | struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev); |
143 | void __iomem *base = wdev->base; | |
144 | ||
2817142f | 145 | if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users))) |
7768a13c KS |
146 | return -EBUSY; |
147 | ||
4c5e1946 | 148 | clk_enable(wdev->ick); /* Enable the interface clock */ |
39a80c7f | 149 | clk_enable(wdev->fck); /* Enable the functional clock */ |
7768a13c KS |
150 | |
151 | /* initialize prescaler */ | |
9f69e3b0 | 152 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) |
7768a13c | 153 | cpu_relax(); |
b3112180 | 154 | |
9f69e3b0 FB |
155 | __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL); |
156 | while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) | |
7768a13c KS |
157 | cpu_relax(); |
158 | ||
2817142f FB |
159 | file->private_data = (void *) wdev; |
160 | ||
161 | omap_wdt_set_timeout(wdev); | |
789cd470 | 162 | omap_wdt_ping(wdev); /* trigger loading of new timeout value */ |
2817142f | 163 | omap_wdt_enable(wdev); |
b3112180 | 164 | |
ec9505a7 | 165 | return nonseekable_open(inode, file); |
7768a13c KS |
166 | } |
167 | ||
168 | static int omap_wdt_release(struct inode *inode, struct file *file) | |
169 | { | |
b3112180 FB |
170 | struct omap_wdt_dev *wdev = file->private_data; |
171 | ||
7768a13c KS |
172 | /* |
173 | * Shut off the timer unless NOWAYOUT is defined. | |
174 | */ | |
175 | #ifndef CONFIG_WATCHDOG_NOWAYOUT | |
7768a13c | 176 | |
2817142f | 177 | omap_wdt_disable(wdev); |
7768a13c | 178 | |
4c5e1946 | 179 | clk_disable(wdev->ick); |
39a80c7f | 180 | clk_disable(wdev->fck); |
7768a13c KS |
181 | #else |
182 | printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n"); | |
183 | #endif | |
2817142f | 184 | wdev->omap_wdt_users = 0; |
b3112180 | 185 | |
7768a13c KS |
186 | return 0; |
187 | } | |
188 | ||
12b9df7d | 189 | static ssize_t omap_wdt_write(struct file *file, const char __user *data, |
7768a13c KS |
190 | size_t len, loff_t *ppos) |
191 | { | |
b3112180 FB |
192 | struct omap_wdt_dev *wdev = file->private_data; |
193 | ||
7768a13c | 194 | /* Refresh LOAD_TIME. */ |
12b9df7d AC |
195 | if (len) { |
196 | spin_lock(&wdt_lock); | |
2817142f | 197 | omap_wdt_ping(wdev); |
12b9df7d AC |
198 | spin_unlock(&wdt_lock); |
199 | } | |
7768a13c KS |
200 | return len; |
201 | } | |
202 | ||
12b9df7d AC |
203 | static long omap_wdt_ioctl(struct file *file, unsigned int cmd, |
204 | unsigned long arg) | |
7768a13c | 205 | { |
2817142f | 206 | struct omap_wdt_dev *wdev; |
7768a13c | 207 | int new_margin; |
12b9df7d | 208 | static const struct watchdog_info ident = { |
7768a13c KS |
209 | .identity = "OMAP Watchdog", |
210 | .options = WDIOF_SETTIMEOUT, | |
211 | .firmware_version = 0, | |
212 | }; | |
b3112180 | 213 | |
2817142f | 214 | wdev = file->private_data; |
7768a13c KS |
215 | |
216 | switch (cmd) { | |
7768a13c KS |
217 | case WDIOC_GETSUPPORT: |
218 | return copy_to_user((struct watchdog_info __user *)arg, &ident, | |
219 | sizeof(ident)); | |
220 | case WDIOC_GETSTATUS: | |
221 | return put_user(0, (int __user *)arg); | |
222 | case WDIOC_GETBOOTSTATUS: | |
223 | if (cpu_is_omap16xx()) | |
9f69e3b0 | 224 | return put_user(__raw_readw(ARM_SYSST), |
7768a13c KS |
225 | (int __user *)arg); |
226 | if (cpu_is_omap24xx()) | |
227 | return put_user(omap_prcm_get_reset_sources(), | |
228 | (int __user *)arg); | |
229 | case WDIOC_KEEPALIVE: | |
12b9df7d | 230 | spin_lock(&wdt_lock); |
2817142f | 231 | omap_wdt_ping(wdev); |
12b9df7d | 232 | spin_unlock(&wdt_lock); |
7768a13c KS |
233 | return 0; |
234 | case WDIOC_SETTIMEOUT: | |
235 | if (get_user(new_margin, (int __user *)arg)) | |
236 | return -EFAULT; | |
237 | omap_wdt_adjust_timeout(new_margin); | |
238 | ||
12b9df7d | 239 | spin_lock(&wdt_lock); |
2817142f FB |
240 | omap_wdt_disable(wdev); |
241 | omap_wdt_set_timeout(wdev); | |
242 | omap_wdt_enable(wdev); | |
7768a13c | 243 | |
2817142f | 244 | omap_wdt_ping(wdev); |
12b9df7d | 245 | spin_unlock(&wdt_lock); |
7768a13c KS |
246 | /* Fall */ |
247 | case WDIOC_GETTIMEOUT: | |
248 | return put_user(timer_margin, (int __user *)arg); | |
0c06090c WVS |
249 | default: |
250 | return -ENOTTY; | |
7768a13c KS |
251 | } |
252 | } | |
253 | ||
2b8693c0 | 254 | static const struct file_operations omap_wdt_fops = { |
7768a13c KS |
255 | .owner = THIS_MODULE, |
256 | .write = omap_wdt_write, | |
12b9df7d | 257 | .unlocked_ioctl = omap_wdt_ioctl, |
7768a13c KS |
258 | .open = omap_wdt_open, |
259 | .release = omap_wdt_release, | |
260 | }; | |
261 | ||
0e3912c7 | 262 | static int __devinit omap_wdt_probe(struct platform_device *pdev) |
7768a13c KS |
263 | { |
264 | struct resource *res, *mem; | |
2817142f | 265 | struct omap_wdt_dev *wdev; |
b3112180 | 266 | int ret; |
7768a13c KS |
267 | |
268 | /* reserve static register mappings */ | |
269 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
b3112180 FB |
270 | if (!res) { |
271 | ret = -ENOENT; | |
272 | goto err_get_resource; | |
273 | } | |
7768a13c | 274 | |
b3112180 FB |
275 | if (omap_wdt_dev) { |
276 | ret = -EBUSY; | |
277 | goto err_busy; | |
278 | } | |
2817142f | 279 | |
b782a563 | 280 | mem = request_mem_region(res->start, resource_size(res), pdev->name); |
b3112180 FB |
281 | if (!mem) { |
282 | ret = -EBUSY; | |
283 | goto err_busy; | |
284 | } | |
7768a13c | 285 | |
2817142f FB |
286 | wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL); |
287 | if (!wdev) { | |
288 | ret = -ENOMEM; | |
b3112180 | 289 | goto err_kzalloc; |
2817142f | 290 | } |
b3112180 | 291 | |
2817142f FB |
292 | wdev->omap_wdt_users = 0; |
293 | wdev->mem = mem; | |
7768a13c | 294 | |
4c5e1946 RK |
295 | wdev->ick = clk_get(&pdev->dev, "ick"); |
296 | if (IS_ERR(wdev->ick)) { | |
297 | ret = PTR_ERR(wdev->ick); | |
298 | wdev->ick = NULL; | |
299 | goto err_clk; | |
7768a13c | 300 | } |
39a80c7f RK |
301 | wdev->fck = clk_get(&pdev->dev, "fck"); |
302 | if (IS_ERR(wdev->fck)) { | |
303 | ret = PTR_ERR(wdev->fck); | |
304 | wdev->fck = NULL; | |
305 | goto err_clk; | |
2817142f FB |
306 | } |
307 | ||
b782a563 | 308 | wdev->base = ioremap(res->start, resource_size(res)); |
9f69e3b0 FB |
309 | if (!wdev->base) { |
310 | ret = -ENOMEM; | |
b3112180 | 311 | goto err_ioremap; |
9f69e3b0 FB |
312 | } |
313 | ||
2817142f | 314 | platform_set_drvdata(pdev, wdev); |
7768a13c | 315 | |
789cd470 UBH |
316 | clk_enable(wdev->ick); |
317 | clk_enable(wdev->fck); | |
318 | ||
2817142f | 319 | omap_wdt_disable(wdev); |
7768a13c KS |
320 | omap_wdt_adjust_timeout(timer_margin); |
321 | ||
2817142f FB |
322 | wdev->omap_wdt_miscdev.parent = &pdev->dev; |
323 | wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR; | |
324 | wdev->omap_wdt_miscdev.name = "watchdog"; | |
325 | wdev->omap_wdt_miscdev.fops = &omap_wdt_fops; | |
326 | ||
327 | ret = misc_register(&(wdev->omap_wdt_miscdev)); | |
7768a13c | 328 | if (ret) |
b3112180 | 329 | goto err_misc; |
7768a13c | 330 | |
2817142f | 331 | pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n", |
9f69e3b0 | 332 | __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF, |
2817142f | 333 | timer_margin); |
7768a13c KS |
334 | |
335 | /* autogate OCP interface clock */ | |
9f69e3b0 | 336 | __raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG); |
2817142f | 337 | |
789cd470 UBH |
338 | clk_disable(wdev->ick); |
339 | clk_disable(wdev->fck); | |
340 | ||
2817142f FB |
341 | omap_wdt_dev = pdev; |
342 | ||
7768a13c KS |
343 | return 0; |
344 | ||
b3112180 FB |
345 | err_misc: |
346 | platform_set_drvdata(pdev, NULL); | |
347 | iounmap(wdev->base); | |
348 | ||
349 | err_ioremap: | |
350 | wdev->base = NULL; | |
351 | ||
352 | err_clk: | |
39a80c7f RK |
353 | if (wdev->ick) |
354 | clk_put(wdev->ick); | |
355 | if (wdev->fck) | |
356 | clk_put(wdev->fck); | |
b3112180 FB |
357 | kfree(wdev); |
358 | ||
359 | err_kzalloc: | |
b782a563 | 360 | release_mem_region(res->start, resource_size(res)); |
b3112180 FB |
361 | |
362 | err_busy: | |
363 | err_get_resource: | |
364 | ||
7768a13c KS |
365 | return ret; |
366 | } | |
367 | ||
368 | static void omap_wdt_shutdown(struct platform_device *pdev) | |
369 | { | |
b3112180 | 370 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
2817142f FB |
371 | |
372 | if (wdev->omap_wdt_users) | |
373 | omap_wdt_disable(wdev); | |
7768a13c KS |
374 | } |
375 | ||
0e3912c7 | 376 | static int __devexit omap_wdt_remove(struct platform_device *pdev) |
7768a13c | 377 | { |
b3112180 | 378 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
2817142f FB |
379 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
380 | ||
381 | if (!res) | |
382 | return -ENOENT; | |
383 | ||
384 | misc_deregister(&(wdev->omap_wdt_miscdev)); | |
b782a563 | 385 | release_mem_region(res->start, resource_size(res)); |
2817142f | 386 | platform_set_drvdata(pdev, NULL); |
b3112180 | 387 | |
4c5e1946 | 388 | clk_put(wdev->ick); |
39a80c7f | 389 | clk_put(wdev->fck); |
9f69e3b0 FB |
390 | iounmap(wdev->base); |
391 | ||
2817142f FB |
392 | kfree(wdev); |
393 | omap_wdt_dev = NULL; | |
b3112180 | 394 | |
7768a13c KS |
395 | return 0; |
396 | } | |
397 | ||
398 | #ifdef CONFIG_PM | |
399 | ||
400 | /* REVISIT ... not clear this is the best way to handle system suspend; and | |
401 | * it's very inappropriate for selective device suspend (e.g. suspending this | |
402 | * through sysfs rather than by stopping the watchdog daemon). Also, this | |
403 | * may not play well enough with NOWAYOUT... | |
404 | */ | |
405 | ||
406 | static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state) | |
407 | { | |
b3112180 FB |
408 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
409 | ||
2817142f FB |
410 | if (wdev->omap_wdt_users) |
411 | omap_wdt_disable(wdev); | |
b3112180 | 412 | |
7768a13c KS |
413 | return 0; |
414 | } | |
415 | ||
416 | static int omap_wdt_resume(struct platform_device *pdev) | |
417 | { | |
b3112180 FB |
418 | struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); |
419 | ||
2817142f FB |
420 | if (wdev->omap_wdt_users) { |
421 | omap_wdt_enable(wdev); | |
422 | omap_wdt_ping(wdev); | |
7768a13c | 423 | } |
b3112180 | 424 | |
7768a13c KS |
425 | return 0; |
426 | } | |
427 | ||
428 | #else | |
429 | #define omap_wdt_suspend NULL | |
430 | #define omap_wdt_resume NULL | |
431 | #endif | |
432 | ||
433 | static struct platform_driver omap_wdt_driver = { | |
434 | .probe = omap_wdt_probe, | |
0e3912c7 | 435 | .remove = __devexit_p(omap_wdt_remove), |
7768a13c KS |
436 | .shutdown = omap_wdt_shutdown, |
437 | .suspend = omap_wdt_suspend, | |
438 | .resume = omap_wdt_resume, | |
439 | .driver = { | |
440 | .owner = THIS_MODULE, | |
441 | .name = "omap_wdt", | |
442 | }, | |
443 | }; | |
444 | ||
445 | static int __init omap_wdt_init(void) | |
446 | { | |
12b9df7d | 447 | spin_lock_init(&wdt_lock); |
7768a13c KS |
448 | return platform_driver_register(&omap_wdt_driver); |
449 | } | |
450 | ||
451 | static void __exit omap_wdt_exit(void) | |
452 | { | |
453 | platform_driver_unregister(&omap_wdt_driver); | |
454 | } | |
455 | ||
456 | module_init(omap_wdt_init); | |
457 | module_exit(omap_wdt_exit); | |
458 | ||
459 | MODULE_AUTHOR("George G. Davis"); | |
460 | MODULE_LICENSE("GPL"); | |
461 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | |
f37d193c | 462 | MODULE_ALIAS("platform:omap_wdt"); |