[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / watchdog / mpc8xxx_wdt.c

/*
 * mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
 *
 * Authors: Dave Updegraff <dave@cray.org>
 *	    Kumar Gala <galak@kernel.crashing.org>
 *		Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
 *				..and from sc520_wdt
 * Copyright (c) 2008  MontaVista Software, Inc.
 *                     Anton Vorontsov <avorontsov@ru.mvista.com>
 *
 * Note: it appears that you can only actually ENABLE or DISABLE the thing
 * once after POR. Once enabled, you cannot disable, and vice versa.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/fs.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/timer.h>
#include <linux/miscdevice.h>
#include <linux/of_platform.h>
#include <linux/module.h>
#include <linux/watchdog.h>
#include <linux/io.h>
#include <linux/uaccess.h>
#include <sysdev/fsl_soc.h>

struct mpc8xxx_wdt {
	__be32 res0;
	__be32 swcrr; /* System watchdog control register */
#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
	__be32 swcnr; /* System watchdog count register */
	u8 res1[2];
	__be16 swsrr; /* System watchdog service register */
	u8 res2[0xF0];
};

struct mpc8xxx_wdt_type {
	int prescaler;
	bool hw_enabled;
};

static struct mpc8xxx_wdt __iomem *wd_base;
static int mpc8xxx_wdt_init_late(void);

static u16 timeout = 0xffff;
module_param(timeout, ushort, 0);
MODULE_PARM_DESC(timeout,
	"Watchdog timeout in ticks. (0<timeout<65536, default=65535)");

static bool reset = 1;
module_param(reset, bool, 0);
MODULE_PARM_DESC(reset,
	"Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
		 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

/*
 * We always prescale, but if someone really doesn't want to they can set this
 * to 0
 */
static int prescale = 1;
static unsigned int timeout_sec;

static unsigned long wdt_is_open;
static DEFINE_SPINLOCK(wdt_spinlock);

static void mpc8xxx_wdt_keepalive(void)
{
	/* Ping the WDT */
	spin_lock(&wdt_spinlock);
	out_be16(&wd_base->swsrr, 0x556c);
	out_be16(&wd_base->swsrr, 0xaa39);
	spin_unlock(&wdt_spinlock);
}

static void mpc8xxx_wdt_timer_ping(unsigned long arg);
static DEFINE_TIMER(wdt_timer, mpc8xxx_wdt_timer_ping, 0, 0);

static void mpc8xxx_wdt_timer_ping(unsigned long arg)
{
	mpc8xxx_wdt_keepalive();
	/* We're pinging it twice faster than needed, just to be sure. */
	mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
}

static void mpc8xxx_wdt_pr_warn(const char *msg)
{
	pr_crit("%s, expect the %s soon!\n", msg,
		reset ? "reset" : "machine check exception");
}

static ssize_t mpc8xxx_wdt_write(struct file *file, const char __user *buf,
				 size_t count, loff_t *ppos)
{
	if (count)
		mpc8xxx_wdt_keepalive();
	return count;
}

static int mpc8xxx_wdt_open(struct inode *inode, struct file *file)
{
	u32 tmp = SWCRR_SWEN;
	if (test_and_set_bit(0, &wdt_is_open))
		return -EBUSY;

	/* Once we start the watchdog we can't stop it */
	if (nowayout)
		__module_get(THIS_MODULE);

	/* Good, fire up the show */
	if (prescale)
		tmp |= SWCRR_SWPR;
	if (reset)
		tmp |= SWCRR_SWRI;

	tmp |= timeout << 16;

	out_be32(&wd_base->swcrr, tmp);

	del_timer_sync(&wdt_timer);

	return nonseekable_open(inode, file);
}

static int mpc8xxx_wdt_release(struct inode *inode, struct file *file)
{
	if (!nowayout)
		mpc8xxx_wdt_timer_ping(0);
	else
		mpc8xxx_wdt_pr_warn("watchdog closed");
	clear_bit(0, &wdt_is_open);
	return 0;
}

static long mpc8xxx_wdt_ioctl(struct file *file, unsigned int cmd,
							unsigned long arg)
{
	void __user *argp = (void __user *)arg;
	int __user *p = argp;
	static const struct watchdog_info ident = {
		.options = WDIOF_KEEPALIVEPING,
		.firmware_version = 1,
		.identity = "MPC8xxx",
	};

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		return put_user(0, p);
	case WDIOC_KEEPALIVE:
		mpc8xxx_wdt_keepalive();
		return 0;
	case WDIOC_GETTIMEOUT:
		return put_user(timeout_sec, p);
	default:
		return -ENOTTY;
	}
}

static const struct file_operations mpc8xxx_wdt_fops = {
	.owner		= THIS_MODULE,
	.llseek		= no_llseek,
	.write		= mpc8xxx_wdt_write,
	.unlocked_ioctl	= mpc8xxx_wdt_ioctl,
	.open		= mpc8xxx_wdt_open,
	.release	= mpc8xxx_wdt_release,
};

static struct miscdevice mpc8xxx_wdt_miscdev = {
	.minor	= WATCHDOG_MINOR,
	.name	= "watchdog",
	.fops	= &mpc8xxx_wdt_fops,
};

static const struct of_device_id mpc8xxx_wdt_match[];
static int mpc8xxx_wdt_probe(struct platform_device *ofdev)
{
	int ret;
	const struct of_device_id *match;
	struct device_node *np = ofdev->dev.of_node;
	const struct mpc8xxx_wdt_type *wdt_type;
	u32 freq = fsl_get_sys_freq();
	bool enabled;

	match = of_match_device(mpc8xxx_wdt_match, &ofdev->dev);
	if (!match)
		return -EINVAL;
	wdt_type = match->data;

	if (!freq || freq == -1)
		return -EINVAL;

	wd_base = of_iomap(np, 0);
	if (!wd_base)
		return -ENOMEM;

	enabled = in_be32(&wd_base->swcrr) & SWCRR_SWEN;
	if (!enabled && wdt_type->hw_enabled) {
		pr_info("could not be enabled in software\n");
		ret = -ENOSYS;
		goto err_unmap;
	}

	/* Calculate the timeout in seconds */
	if (prescale)
		timeout_sec = (timeout * wdt_type->prescaler) / freq;
	else
		timeout_sec = timeout / freq;

#ifdef MODULE
	ret = mpc8xxx_wdt_init_late();
	if (ret)
		goto err_unmap;
#endif

	pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout=%d (%d seconds)\n",
		reset ? "reset" : "interrupt", timeout, timeout_sec);

	/*
	 * If the watchdog was previously enabled or we're running on
	 * MPC8xxx, we should ping the wdt from the kernel until the
	 * userspace handles it.
	 */
	if (enabled)
		mpc8xxx_wdt_timer_ping(0);
	return 0;
err_unmap:
	iounmap(wd_base);
	wd_base = NULL;
	return ret;
}

static int mpc8xxx_wdt_remove(struct platform_device *ofdev)
{
	mpc8xxx_wdt_pr_warn("watchdog removed");
	del_timer_sync(&wdt_timer);
	misc_deregister(&mpc8xxx_wdt_miscdev);
	iounmap(wd_base);

	return 0;
}

static const struct of_device_id mpc8xxx_wdt_match[] = {
	{
		.compatible = "mpc83xx_wdt",
		.data = &(struct mpc8xxx_wdt_type) {
			.prescaler = 0x10000,
		},
	},
	{
		.compatible = "fsl,mpc8610-wdt",
		.data = &(struct mpc8xxx_wdt_type) {
			.prescaler = 0x10000,
			.hw_enabled = true,
		},
	},
	{
		.compatible = "fsl,mpc823-wdt",
		.data = &(struct mpc8xxx_wdt_type) {
			.prescaler = 0x800,
		},
	},
	{},
};
MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match);

static struct platform_driver mpc8xxx_wdt_driver = {
	.probe		= mpc8xxx_wdt_probe,
	.remove		= mpc8xxx_wdt_remove,
	.driver = {
		.name = "mpc8xxx_wdt",
		.owner = THIS_MODULE,
		.of_match_table = mpc8xxx_wdt_match,
	},
};

/*
 * We do wdt initialization in two steps: arch_initcall probes the wdt
 * very early to start pinging the watchdog (misc devices are not yet
 * available), and later module_init() just registers the misc device.
 */
static int mpc8xxx_wdt_init_late(void)
{
	int ret;

	if (!wd_base)
		return -ENODEV;

	ret = misc_register(&mpc8xxx_wdt_miscdev);
	if (ret) {
		pr_err("cannot register miscdev on minor=%d (err=%d)\n",
		       WATCHDOG_MINOR, ret);
		return ret;
	}
	return 0;
}
#ifndef MODULE
module_init(mpc8xxx_wdt_init_late);
#endif

static int __init mpc8xxx_wdt_init(void)
{
	return platform_driver_register(&mpc8xxx_wdt_driver);
}
arch_initcall(mpc8xxx_wdt_init);

static void __exit mpc8xxx_wdt_exit(void)
{
	platform_driver_unregister(&mpc8xxx_wdt_driver);
}
module_exit(mpc8xxx_wdt_exit);

MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
		   "uProcessors");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
Commit	Line	Data
fabbfb9e	1	/*
0d7b1014	2	* mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
fabbfb9e KG	3	*
fabbfb9e KG	4	* Authors: Dave Updegraff <dave@cray.org>
5f3b2756 WVS	5	* Kumar Gala <galak@kernel.crashing.org>
	6	* Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
	7	* ..and from sc520_wdt
500c919e AV	8	* Copyright (c) 2008 MontaVista Software, Inc.
500c919e AV	9	* Anton Vorontsov <avorontsov@ru.mvista.com>
fabbfb9e KG	10	*
	11	* Note: it appears that you can only actually ENABLE or DISABLE the thing
	12	* once after POR. Once enabled, you cannot disable, and vice versa.
	13	*
	14	* This program is free software; you can redistribute it and/or modify it
	15	* under the terms of the GNU General Public License as published by the
	16	* Free Software Foundation; either version 2 of the License, or (at your
	17	* option) any later version.
	18	*/
	19
27c766aa JP	20	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	21
fabbfb9e KG	22	#include <linux/fs.h>
	23	#include <linux/init.h>
	24	#include <linux/kernel.h>
500c919e	25	#include <linux/timer.h>
fabbfb9e	26	#include <linux/miscdevice.h>
ef8ab12e	27	#include <linux/of_platform.h>
fabbfb9e KG	28	#include <linux/module.h>
fabbfb9e KG	29	#include <linux/watchdog.h>
f26ef3dc AC	30	#include <linux/io.h>
f26ef3dc AC	31	#include <linux/uaccess.h>
ef8ab12e	32	#include <sysdev/fsl_soc.h>
fabbfb9e	33
59ca1b0d	34	struct mpc8xxx_wdt {
fabbfb9e KG	35	__be32 res0;
	36	__be32 swcrr; /* System watchdog control register */
	37	#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
	38	#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
	39	#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
	40	#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
	41	__be32 swcnr; /* System watchdog count register */
	42	u8 res1[2];
	43	__be16 swsrr; /* System watchdog service register */
	44	u8 res2[0xF0];
	45	};
	46
59ca1b0d	47	struct mpc8xxx_wdt_type {
500c919e AV	48	int prescaler;
	49	bool hw_enabled;
	50	};
	51
59ca1b0d	52	static struct mpc8xxx_wdt __iomem *wd_base;
593fc178	53	static int mpc8xxx_wdt_init_late(void);
fabbfb9e KG	54
	55	static u16 timeout = 0xffff;
	56	module_param(timeout, ushort, 0);
f26ef3dc	57	MODULE_PARM_DESC(timeout,
76550d32	58	"Watchdog timeout in ticks. (0<timeout<65536, default=65535)");
fabbfb9e	59
90ab5ee9	60	static bool reset = 1;
fabbfb9e	61	module_param(reset, bool, 0);
f26ef3dc AC	62	MODULE_PARM_DESC(reset,
f26ef3dc AC	63	"Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
fabbfb9e	64
86a1e189 WVS	65	static bool nowayout = WATCHDOG_NOWAYOUT;
86a1e189 WVS	66	module_param(nowayout, bool, 0);
500c919e AV	67	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	68	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	69
fabbfb9e KG	70	/*
	71	* We always prescale, but if someone really doesn't want to they can set this
	72	* to 0
	73	*/
	74	static int prescale = 1;
	75	static unsigned int timeout_sec;
	76
	77	static unsigned long wdt_is_open;
c7dfd0cc	78	static DEFINE_SPINLOCK(wdt_spinlock);
fabbfb9e	79
59ca1b0d	80	static void mpc8xxx_wdt_keepalive(void)
fabbfb9e KG	81	{
	82	/* Ping the WDT */
	83	spin_lock(&wdt_spinlock);
	84	out_be16(&wd_base->swsrr, 0x556c);
	85	out_be16(&wd_base->swsrr, 0xaa39);
	86	spin_unlock(&wdt_spinlock);
	87	}
	88
59ca1b0d AV	89	static void mpc8xxx_wdt_timer_ping(unsigned long arg);
59ca1b0d AV	90	static DEFINE_TIMER(wdt_timer, mpc8xxx_wdt_timer_ping, 0, 0);
500c919e	91
59ca1b0d	92	static void mpc8xxx_wdt_timer_ping(unsigned long arg)
500c919e	93	{
59ca1b0d	94	mpc8xxx_wdt_keepalive();
500c919e AV	95	/* We're pinging it twice faster than needed, just to be sure. */
	96	mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
	97	}
	98
59ca1b0d	99	static void mpc8xxx_wdt_pr_warn(const char *msg)
500c919e	100	{
27c766aa	101	pr_crit("%s, expect the %s soon!\n", msg,
500c919e AV	102	reset ? "reset" : "machine check exception");
	103	}
	104
59ca1b0d	105	static ssize_t mpc8xxx_wdt_write(struct file file, const char __user buf,
fabbfb9e KG	106	size_t count, loff_t *ppos)
	107	{
	108	if (count)
59ca1b0d	109	mpc8xxx_wdt_keepalive();
fabbfb9e KG	110	return count;
	111	}
	112
59ca1b0d	113	static int mpc8xxx_wdt_open(struct inode inode, struct file file)
fabbfb9e KG	114	{
	115	u32 tmp = SWCRR_SWEN;
	116	if (test_and_set_bit(0, &wdt_is_open))
	117	return -EBUSY;
	118
	119	/* Once we start the watchdog we can't stop it */
500c919e AV	120	if (nowayout)
500c919e AV	121	__module_get(THIS_MODULE);
fabbfb9e KG	122
	123	/* Good, fire up the show */
	124	if (prescale)
	125	tmp \|= SWCRR_SWPR;
	126	if (reset)
	127	tmp \|= SWCRR_SWRI;
	128
	129	tmp \|= timeout << 16;
	130
	131	out_be32(&wd_base->swcrr, tmp);
	132
500c919e AV	133	del_timer_sync(&wdt_timer);
500c919e AV	134
fabbfb9e KG	135	return nonseekable_open(inode, file);
	136	}
	137
59ca1b0d	138	static int mpc8xxx_wdt_release(struct inode inode, struct file file)
fabbfb9e	139	{
500c919e	140	if (!nowayout)
59ca1b0d	141	mpc8xxx_wdt_timer_ping(0);
500c919e	142	else
59ca1b0d	143	mpc8xxx_wdt_pr_warn("watchdog closed");
fabbfb9e KG	144	clear_bit(0, &wdt_is_open);
	145	return 0;
	146	}
	147
cb55d282	148	static long mpc8xxx_wdt_ioctl(struct file *file, unsigned int cmd,
f26ef3dc	149	unsigned long arg)
fabbfb9e KG	150	{
	151	void __user argp = (void __user )arg;
	152	int __user *p = argp;
42747d71	153	static const struct watchdog_info ident = {
fabbfb9e KG	154	.options = WDIOF_KEEPALIVEPING,
fabbfb9e KG	155	.firmware_version = 1,
59ca1b0d	156	.identity = "MPC8xxx",
fabbfb9e KG	157	};
	158
	159	switch (cmd) {
	160	case WDIOC_GETSUPPORT:
	161	return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
5c4eb61b WVS	162	case WDIOC_GETSTATUS:
	163	case WDIOC_GETBOOTSTATUS:
	164	return put_user(0, p);
fabbfb9e	165	case WDIOC_KEEPALIVE:
59ca1b0d	166	mpc8xxx_wdt_keepalive();
fabbfb9e KG	167	return 0;
	168	case WDIOC_GETTIMEOUT:
	169	return put_user(timeout_sec, p);
	170	default:
795b89d2	171	return -ENOTTY;
fabbfb9e KG	172	}
	173	}
	174
59ca1b0d	175	static const struct file_operations mpc8xxx_wdt_fops = {
fabbfb9e KG	176	.owner = THIS_MODULE,
fabbfb9e KG	177	.llseek = no_llseek,
59ca1b0d AV	178	.write = mpc8xxx_wdt_write,
	179	.unlocked_ioctl = mpc8xxx_wdt_ioctl,
	180	.open = mpc8xxx_wdt_open,
	181	.release = mpc8xxx_wdt_release,
fabbfb9e KG	182	};
fabbfb9e KG	183
59ca1b0d	184	static struct miscdevice mpc8xxx_wdt_miscdev = {
fabbfb9e KG	185	.minor = WATCHDOG_MINOR,
fabbfb9e KG	186	.name = "watchdog",
59ca1b0d	187	.fops = &mpc8xxx_wdt_fops,
fabbfb9e KG	188	};
fabbfb9e KG	189
b1608d69	190	static const struct of_device_id mpc8xxx_wdt_match[];
2d991a16	191	static int mpc8xxx_wdt_probe(struct platform_device *ofdev)
fabbfb9e	192	{
fabbfb9e	193	int ret;
b1608d69	194	const struct of_device_id *match;
de2b606c	195	struct device_node *np = ofdev->dev.of_node;
639397e4	196	const struct mpc8xxx_wdt_type *wdt_type;
ef8ab12e	197	u32 freq = fsl_get_sys_freq();
500c919e	198	bool enabled;
fabbfb9e	199
b1608d69 GL	200	match = of_match_device(mpc8xxx_wdt_match, &ofdev->dev);
b1608d69 GL	201	if (!match)
1c48a5c9	202	return -EINVAL;
b1608d69	203	wdt_type = match->data;
1c48a5c9	204
ef8ab12e AV	205	if (!freq \|\| freq == -1)
ef8ab12e AV	206	return -EINVAL;
fabbfb9e	207
500c919e	208	wd_base = of_iomap(np, 0);
ef8ab12e AV	209	if (!wd_base)
ef8ab12e AV	210	return -ENOMEM;
fabbfb9e	211
500c919e AV	212	enabled = in_be32(&wd_base->swcrr) & SWCRR_SWEN;
500c919e AV	213	if (!enabled && wdt_type->hw_enabled) {
27c766aa	214	pr_info("could not be enabled in software\n");
500c919e AV	215	ret = -ENOSYS;
	216	goto err_unmap;
	217	}
	218
fabbfb9e KG	219	/* Calculate the timeout in seconds */
fabbfb9e KG	220	if (prescale)
500c919e	221	timeout_sec = (timeout * wdt_type->prescaler) / freq;
fabbfb9e	222	else
ef8ab12e	223	timeout_sec = timeout / freq;
fabbfb9e	224
593fc178 AV	225	#ifdef MODULE
	226	ret = mpc8xxx_wdt_init_late();
	227	if (ret)
	228	goto err_unmap;
	229	#endif
	230
27c766aa JP	231	pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout=%d (%d seconds)\n",
27c766aa JP	232	reset ? "reset" : "interrupt", timeout, timeout_sec);
500c919e AV	233
	234	/*
	235	* If the watchdog was previously enabled or we're running on
59ca1b0d	236	* MPC8xxx, we should ping the wdt from the kernel until the
500c919e AV	237	* userspace handles it.
	238	*/
	239	if (enabled)
59ca1b0d	240	mpc8xxx_wdt_timer_ping(0);
fabbfb9e	241	return 0;
fabbfb9e KG	242	err_unmap:
fabbfb9e KG	243	iounmap(wd_base);
0d7b1014	244	wd_base = NULL;
fabbfb9e KG	245	return ret;
	246	}
	247
4b12b896	248	static int mpc8xxx_wdt_remove(struct platform_device *ofdev)
fabbfb9e	249	{
59ca1b0d	250	mpc8xxx_wdt_pr_warn("watchdog removed");
500c919e	251	del_timer_sync(&wdt_timer);
59ca1b0d	252	misc_deregister(&mpc8xxx_wdt_miscdev);
fabbfb9e KG	253	iounmap(wd_base);
	254
	255	return 0;
	256	}
	257
59ca1b0d	258	static const struct of_device_id mpc8xxx_wdt_match[] = {
ef8ab12e AV	259	{
ef8ab12e AV	260	.compatible = "mpc83xx_wdt",
59ca1b0d	261	.data = &(struct mpc8xxx_wdt_type) {
500c919e AV	262	.prescaler = 0x10000,
	263	},
	264	},
	265	{
	266	.compatible = "fsl,mpc8610-wdt",
59ca1b0d	267	.data = &(struct mpc8xxx_wdt_type) {
500c919e AV	268	.prescaler = 0x10000,
	269	.hw_enabled = true,
	270	},
ef8ab12e	271	},
0d7b1014 AV	272	{
	273	.compatible = "fsl,mpc823-wdt",
	274	.data = &(struct mpc8xxx_wdt_type) {
	275	.prescaler = 0x800,
	276	},
	277	},
ef8ab12e AV	278	{},
ef8ab12e AV	279	};
59ca1b0d	280	MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match);
ef8ab12e	281
1c48a5c9	282	static struct platform_driver mpc8xxx_wdt_driver = {
59ca1b0d	283	.probe = mpc8xxx_wdt_probe,
82268714	284	.remove = mpc8xxx_wdt_remove,
4018294b GL	285	.driver = {
	286	.name = "mpc8xxx_wdt",
	287	.owner = THIS_MODULE,
	288	.of_match_table = mpc8xxx_wdt_match,
fabbfb9e KG	289	},
	290	};
	291
0d7b1014 AV	292	/*
	293	* We do wdt initialization in two steps: arch_initcall probes the wdt
	294	* very early to start pinging the watchdog (misc devices are not yet
	295	* available), and later module_init() just registers the misc device.
	296	*/
593fc178	297	static int mpc8xxx_wdt_init_late(void)
0d7b1014 AV	298	{
	299	int ret;
	300
	301	if (!wd_base)
	302	return -ENODEV;
	303
	304	ret = misc_register(&mpc8xxx_wdt_miscdev);
	305	if (ret) {
	306	pr_err("cannot register miscdev on minor=%d (err=%d)\n",
27c766aa	307	WATCHDOG_MINOR, ret);
0d7b1014 AV	308	return ret;
	309	}
	310	return 0;
	311	}
593fc178	312	#ifndef MODULE
0d7b1014	313	module_init(mpc8xxx_wdt_init_late);
593fc178	314	#endif
0d7b1014	315
59ca1b0d	316	static int __init mpc8xxx_wdt_init(void)
fabbfb9e	317	{
1c48a5c9	318	return platform_driver_register(&mpc8xxx_wdt_driver);
fabbfb9e	319	}
0d7b1014	320	arch_initcall(mpc8xxx_wdt_init);
fabbfb9e	321
59ca1b0d	322	static void __exit mpc8xxx_wdt_exit(void)
fabbfb9e	323	{
1c48a5c9	324	platform_driver_unregister(&mpc8xxx_wdt_driver);
fabbfb9e	325	}
59ca1b0d	326	module_exit(mpc8xxx_wdt_exit);
fabbfb9e KG	327
fabbfb9e KG	328	MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
0d7b1014 AV	329	MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
0d7b1014 AV	330	"uProcessors");
fabbfb9e KG	331	MODULE_LICENSE("GPL");
fabbfb9e KG	332	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);