[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / watchdog / cpu5wdt.c

/*
 * sma cpu5 watchdog driver
 *
 * Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/miscdevice.h>
#include <linux/fs.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/timer.h>
#include <linux/completion.h>
#include <linux/jiffies.h>
#include <linux/io.h>
#include <linux/uaccess.h>
#include <linux/watchdog.h>

/* adjustable parameters */

static int verbose;
static int port = 0x91;
static int ticks = 10000;
static DEFINE_SPINLOCK(cpu5wdt_lock);

#define PFX			"cpu5wdt: "

#define CPU5WDT_EXTENT          0x0A

#define CPU5WDT_STATUS_REG      0x00
#define CPU5WDT_TIME_A_REG      0x02
#define CPU5WDT_TIME_B_REG      0x03
#define CPU5WDT_MODE_REG        0x04
#define CPU5WDT_TRIGGER_REG     0x07
#define CPU5WDT_ENABLE_REG      0x08
#define CPU5WDT_RESET_REG       0x09

#define CPU5WDT_INTERVAL	(HZ/10+1)

/* some device data */

static struct {
	struct completion stop;
	int running;
	struct timer_list timer;
	int queue;
	int default_ticks;
	unsigned long inuse;
} cpu5wdt_device;

/* generic helper functions */

static void cpu5wdt_trigger(unsigned long unused)
{
	if (verbose > 2)
		pr_debug("trigger at %i ticks\n", ticks);

	if (cpu5wdt_device.running)
		ticks--;

	spin_lock(&cpu5wdt_lock);
	/* keep watchdog alive */
	outb(1, port + CPU5WDT_TRIGGER_REG);

	/* requeue?? */
	if (cpu5wdt_device.queue && ticks)
		mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
	else {
		/* ticks doesn't matter anyway */
		complete(&cpu5wdt_device.stop);
	}
	spin_unlock(&cpu5wdt_lock);

}

static void cpu5wdt_reset(void)
{
	ticks = cpu5wdt_device.default_ticks;

	if (verbose)
		pr_debug("reset (%i ticks)\n", (int) ticks);

}

static void cpu5wdt_start(void)
{
	unsigned long flags;

	spin_lock_irqsave(&cpu5wdt_lock, flags);
	if (!cpu5wdt_device.queue) {
		cpu5wdt_device.queue = 1;
		outb(0, port + CPU5WDT_TIME_A_REG);
		outb(0, port + CPU5WDT_TIME_B_REG);
		outb(1, port + CPU5WDT_MODE_REG);
		outb(0, port + CPU5WDT_RESET_REG);
		outb(0, port + CPU5WDT_ENABLE_REG);
		mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
	}
	/* if process dies, counter is not decremented */
	cpu5wdt_device.running++;
	spin_unlock_irqrestore(&cpu5wdt_lock, flags);
}

static int cpu5wdt_stop(void)
{
	unsigned long flags;

	spin_lock_irqsave(&cpu5wdt_lock, flags);
	if (cpu5wdt_device.running)
		cpu5wdt_device.running = 0;
	ticks = cpu5wdt_device.default_ticks;
	spin_unlock_irqrestore(&cpu5wdt_lock, flags);
	if (verbose)
		pr_crit("stop not possible\n");
	return -EIO;
}

/* filesystem operations */

static int cpu5wdt_open(struct inode *inode, struct file *file)
{
	if (test_and_set_bit(0, &cpu5wdt_device.inuse))
		return -EBUSY;
	return nonseekable_open(inode, file);
}

static int cpu5wdt_release(struct inode *inode, struct file *file)
{
	clear_bit(0, &cpu5wdt_device.inuse);
	return 0;
}

static long cpu5wdt_ioctl(struct file *file, unsigned int cmd,
						unsigned long arg)
{
	void __user *argp = (void __user *)arg;
	int __user *p = argp;
	unsigned int value;
	static const struct watchdog_info ident = {
		.options = WDIOF_CARDRESET,
		.identity = "CPU5 WDT",
	};

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		if (copy_to_user(argp, &ident, sizeof(ident)))
			return -EFAULT;
		break;
	case WDIOC_GETSTATUS:
		value = inb(port + CPU5WDT_STATUS_REG);
		value = (value >> 2) & 1;
		return put_user(value, p);
	case WDIOC_GETBOOTSTATUS:
		return put_user(0, p);
	case WDIOC_SETOPTIONS:
		if (get_user(value, p))
			return -EFAULT;
		if (value & WDIOS_ENABLECARD)
			cpu5wdt_start();
		if (value & WDIOS_DISABLECARD)
			cpu5wdt_stop();
		break;
	case WDIOC_KEEPALIVE:
		cpu5wdt_reset();
		break;
	default:
		return -ENOTTY;
	}
	return 0;
}

static ssize_t cpu5wdt_write(struct file *file, const char __user *buf,
						size_t count, loff_t *ppos)
{
	if (!count)
		return -EIO;
	cpu5wdt_reset();
	return count;
}

static const struct file_operations cpu5wdt_fops = {
	.owner		= THIS_MODULE,
	.llseek		= no_llseek,
	.unlocked_ioctl	= cpu5wdt_ioctl,
	.open		= cpu5wdt_open,
	.write		= cpu5wdt_write,
	.release	= cpu5wdt_release,
};

static struct miscdevice cpu5wdt_misc = {
	.minor	= WATCHDOG_MINOR,
	.name	= "watchdog",
	.fops	= &cpu5wdt_fops,
};

/* init/exit function */

static int cpu5wdt_init(void)
{
	unsigned int val;
	int err;

	if (verbose)
		pr_debug("port=0x%x, verbose=%i\n", port, verbose);

	init_completion(&cpu5wdt_device.stop);
	cpu5wdt_device.queue = 0;
	setup_timer(&cpu5wdt_device.timer, cpu5wdt_trigger, 0);
	cpu5wdt_device.default_ticks = ticks;

	if (!request_region(port, CPU5WDT_EXTENT, PFX)) {
		pr_err("request_region failed\n");
		err = -EBUSY;
		goto no_port;
	}

	/* watchdog reboot? */
	val = inb(port + CPU5WDT_STATUS_REG);
	val = (val >> 2) & 1;
	if (!val)
		pr_info("sorry, was my fault\n");

	err = misc_register(&cpu5wdt_misc);
	if (err < 0) {
		pr_err("misc_register failed\n");
		goto no_misc;
	}


	pr_info("init success\n");
	return 0;

no_misc:
	release_region(port, CPU5WDT_EXTENT);
no_port:
	return err;
}

static int cpu5wdt_init_module(void)
{
	return cpu5wdt_init();
}

static void cpu5wdt_exit(void)
{
	if (cpu5wdt_device.queue) {
		cpu5wdt_device.queue = 0;
		wait_for_completion(&cpu5wdt_device.stop);
		del_timer(&cpu5wdt_device.timer);
	}

	misc_deregister(&cpu5wdt_misc);

	release_region(port, CPU5WDT_EXTENT);

}

static void cpu5wdt_exit_module(void)
{
	cpu5wdt_exit();
}

/* module entry points */

module_init(cpu5wdt_init_module);
module_exit(cpu5wdt_exit_module);

MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
MODULE_DESCRIPTION("sma cpu5 watchdog driver");
MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);

module_param(port, int, 0);
MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91");

module_param(verbose, int, 0);
MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");

module_param(ticks, int, 0);
MODULE_PARM_DESC(ticks, "count down ticks, default is 10000");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* sma cpu5 watchdog driver
	3	*
	4	* Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	19	*
	20	*/
	21
27c766aa JP	22	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	23
1da177e4 LT	24	#include <linux/module.h>
	25	#include <linux/moduleparam.h>
	26	#include <linux/types.h>
	27	#include <linux/errno.h>
	28	#include <linux/miscdevice.h>
	29	#include <linux/fs.h>
	30	#include <linux/init.h>
	31	#include <linux/ioport.h>
	32	#include <linux/timer.h>
3fe0c277	33	#include <linux/completion.h>
4e57b681	34	#include <linux/jiffies.h>
6f932f18 AC	35	#include <linux/io.h>
6f932f18 AC	36	#include <linux/uaccess.h>
1da177e4 LT	37	#include <linux/watchdog.h>
	38
	39	/* adjustable parameters */
	40
6f932f18	41	static int verbose;
1da177e4 LT	42	static int port = 0x91;
1da177e4 LT	43	static int ticks = 10000;
1334f329	44	static DEFINE_SPINLOCK(cpu5wdt_lock);
1da177e4 LT	45
	46	#define PFX "cpu5wdt: "
	47
	48	#define CPU5WDT_EXTENT 0x0A
	49
	50	#define CPU5WDT_STATUS_REG 0x00
	51	#define CPU5WDT_TIME_A_REG 0x02
	52	#define CPU5WDT_TIME_B_REG 0x03
	53	#define CPU5WDT_MODE_REG 0x04
	54	#define CPU5WDT_TRIGGER_REG 0x07
	55	#define CPU5WDT_ENABLE_REG 0x08
	56	#define CPU5WDT_RESET_REG 0x09
	57
	58	#define CPU5WDT_INTERVAL (HZ/10+1)
	59
	60	/* some device data */
	61
	62	static struct {
3fe0c277	63	struct completion stop;
996d62d4	64	int running;
1da177e4	65	struct timer_list timer;
996d62d4	66	int queue;
1da177e4 LT	67	int default_ticks;
	68	unsigned long inuse;
	69	} cpu5wdt_device;
	70
	71	/* generic helper functions */
	72
	73	static void cpu5wdt_trigger(unsigned long unused)
	74	{
6f932f18	75	if (verbose > 2)
27c766aa	76	pr_debug("trigger at %i ticks\n", ticks);
1da177e4	77
6f932f18	78	if (cpu5wdt_device.running)
1da177e4 LT	79	ticks--;
1da177e4 LT	80
6f932f18	81	spin_lock(&cpu5wdt_lock);
1da177e4 LT	82	/* keep watchdog alive */
	83	outb(1, port + CPU5WDT_TRIGGER_REG);
	84
	85	/* requeue?? */
82eb7c50 JS	86	if (cpu5wdt_device.queue && ticks)
82eb7c50 JS	87	mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
1da177e4 LT	88	else {
1da177e4 LT	89	/* ticks doesn't matter anyway */
3fe0c277	90	complete(&cpu5wdt_device.stop);
1da177e4	91	}
6f932f18	92	spin_unlock(&cpu5wdt_lock);
1da177e4 LT	93
	94	}
	95
	96	static void cpu5wdt_reset(void)
	97	{
	98	ticks = cpu5wdt_device.default_ticks;
	99
6f932f18	100	if (verbose)
27c766aa	101	pr_debug("reset (%i ticks)\n", (int) ticks);
1da177e4 LT	102
	103	}
	104
	105	static void cpu5wdt_start(void)
	106	{
6f932f18 AC	107	unsigned long flags;
	108
	109	spin_lock_irqsave(&cpu5wdt_lock, flags);
	110	if (!cpu5wdt_device.queue) {
1da177e4 LT	111	cpu5wdt_device.queue = 1;
	112	outb(0, port + CPU5WDT_TIME_A_REG);
	113	outb(0, port + CPU5WDT_TIME_B_REG);
	114	outb(1, port + CPU5WDT_MODE_REG);
	115	outb(0, port + CPU5WDT_RESET_REG);
	116	outb(0, port + CPU5WDT_ENABLE_REG);
82eb7c50	117	mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
1da177e4 LT	118	}
	119	/* if process dies, counter is not decremented */
	120	cpu5wdt_device.running++;
6f932f18	121	spin_unlock_irqrestore(&cpu5wdt_lock, flags);
1da177e4 LT	122	}
	123
	124	static int cpu5wdt_stop(void)
	125	{
6f932f18	126	unsigned long flags;
1da177e4	127
6f932f18 AC	128	spin_lock_irqsave(&cpu5wdt_lock, flags);
	129	if (cpu5wdt_device.running)
	130	cpu5wdt_device.running = 0;
1da177e4	131	ticks = cpu5wdt_device.default_ticks;
6f932f18 AC	132	spin_unlock_irqrestore(&cpu5wdt_lock, flags);
6f932f18 AC	133	if (verbose)
27c766aa	134	pr_crit("stop not possible\n");
1da177e4 LT	135	return -EIO;
	136	}
	137
	138	/* filesystem operations */
	139
	140	static int cpu5wdt_open(struct inode inode, struct file file)
	141	{
6f932f18	142	if (test_and_set_bit(0, &cpu5wdt_device.inuse))
1da177e4	143	return -EBUSY;
1da177e4 LT	144	return nonseekable_open(inode, file);
	145	}
	146
	147	static int cpu5wdt_release(struct inode inode, struct file file)
	148	{
	149	clear_bit(0, &cpu5wdt_device.inuse);
	150	return 0;
	151	}
	152
6f932f18 AC	153	static long cpu5wdt_ioctl(struct file *file, unsigned int cmd,
6f932f18 AC	154	unsigned long arg)
1da177e4 LT	155	{
1da177e4 LT	156	void __user argp = (void __user )arg;
6f932f18	157	int __user *p = argp;
1da177e4	158	unsigned int value;
42747d71	159	static const struct watchdog_info ident = {
1da177e4 LT	160	.options = WDIOF_CARDRESET,
	161	.identity = "CPU5 WDT",
	162	};
	163
6f932f18	164	switch (cmd) {
0c06090c WVS	165	case WDIOC_GETSUPPORT:
	166	if (copy_to_user(argp, &ident, sizeof(ident)))
	167	return -EFAULT;
6f932f18 AC	168	break;
	169	case WDIOC_GETSTATUS:
	170	value = inb(port + CPU5WDT_STATUS_REG);
	171	value = (value >> 2) & 1;
	172	return put_user(value, p);
	173	case WDIOC_GETBOOTSTATUS:
	174	return put_user(0, p);
6f932f18 AC	175	case WDIOC_SETOPTIONS:
	176	if (get_user(value, p))
	177	return -EFAULT;
	178	if (value & WDIOS_ENABLECARD)
	179	cpu5wdt_start();
	180	if (value & WDIOS_DISABLECARD)
	181	cpu5wdt_stop();
	182	break;
0c06090c WVS	183	case WDIOC_KEEPALIVE:
	184	cpu5wdt_reset();
	185	break;
6f932f18 AC	186	default:
6f932f18 AC	187	return -ENOTTY;
1da177e4 LT	188	}
	189	return 0;
	190	}
	191
6f932f18 AC	192	static ssize_t cpu5wdt_write(struct file file, const char __user buf,
6f932f18 AC	193	size_t count, loff_t *ppos)
1da177e4	194	{
6f932f18	195	if (!count)
1da177e4	196	return -EIO;
1da177e4	197	cpu5wdt_reset();
1da177e4 LT	198	return count;
	199	}
	200
62322d25	201	static const struct file_operations cpu5wdt_fops = {
1da177e4 LT	202	.owner = THIS_MODULE,
1da177e4 LT	203	.llseek = no_llseek,
6f932f18	204	.unlocked_ioctl = cpu5wdt_ioctl,
1da177e4 LT	205	.open = cpu5wdt_open,
	206	.write = cpu5wdt_write,
	207	.release = cpu5wdt_release,
	208	};
	209
	210	static struct miscdevice cpu5wdt_misc = {
	211	.minor = WATCHDOG_MINOR,
	212	.name = "watchdog",
	213	.fops = &cpu5wdt_fops,
	214	};
	215
	216	/* init/exit function */
	217
2d991a16	218	static int cpu5wdt_init(void)
1da177e4 LT	219	{
	220	unsigned int val;
	221	int err;
	222
6f932f18	223	if (verbose)
27c766aa	224	pr_debug("port=0x%x, verbose=%i\n", port, verbose);
1da177e4	225
6f932f18	226	init_completion(&cpu5wdt_device.stop);
6f932f18 AC	227	cpu5wdt_device.queue = 0;
	228	setup_timer(&cpu5wdt_device.timer, cpu5wdt_trigger, 0);
	229	cpu5wdt_device.default_ticks = ticks;
	230
	231	if (!request_region(port, CPU5WDT_EXTENT, PFX)) {
27c766aa	232	pr_err("request_region failed\n");
1da177e4 LT	233	err = -EBUSY;
	234	goto no_port;
	235	}
	236
	237	/* watchdog reboot? */
	238	val = inb(port + CPU5WDT_STATUS_REG);
	239	val = (val >> 2) & 1;
6f932f18	240	if (!val)
27c766aa	241	pr_info("sorry, was my fault\n");
1da177e4	242
6f932f18 AC	243	err = misc_register(&cpu5wdt_misc);
6f932f18 AC	244	if (err < 0) {
27c766aa	245	pr_err("misc_register failed\n");
6f932f18 AC	246	goto no_misc;
6f932f18 AC	247	}
1da177e4	248
1da177e4	249
27c766aa	250	pr_info("init success\n");
1da177e4 LT	251	return 0;
1da177e4 LT	252
1da177e4	253	no_misc:
fb8f7ba0 AD	254	release_region(port, CPU5WDT_EXTENT);
fb8f7ba0 AD	255	no_port:
1da177e4 LT	256	return err;
	257	}
	258
2d991a16	259	static int cpu5wdt_init_module(void)
1da177e4 LT	260	{
	261	return cpu5wdt_init();
	262	}
	263
4b12b896	264	static void cpu5wdt_exit(void)
1da177e4	265	{
6f932f18	266	if (cpu5wdt_device.queue) {
1da177e4	267	cpu5wdt_device.queue = 0;
3fe0c277	268	wait_for_completion(&cpu5wdt_device.stop);
e09d9c3e	269	del_timer(&cpu5wdt_device.timer);
1da177e4 LT	270	}
	271
	272	misc_deregister(&cpu5wdt_misc);
	273
	274	release_region(port, CPU5WDT_EXTENT);
	275
	276	}
	277
4b12b896	278	static void cpu5wdt_exit_module(void)
1da177e4 LT	279	{
	280	cpu5wdt_exit();
	281	}
	282
	283	/* module entry points */
	284
	285	module_init(cpu5wdt_init_module);
	286	module_exit(cpu5wdt_exit_module);
	287
	288	MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
	289	MODULE_DESCRIPTION("sma cpu5 watchdog driver");
	290	MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog");
	291	MODULE_LICENSE("GPL");
	292	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
	293
	294	module_param(port, int, 0);
	295	MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91");
	296
	297	module_param(verbose, int, 0);
	298	MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
	299
	300	module_param(ticks, int, 0);
	301	MODULE_PARM_DESC(ticks, "count down ticks, default is 10000");