Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
49b1f4b4 | 2 | * Frame buffer driver for Trident TGUI, Blade and Image series |
1da177e4 | 3 | * |
245a2c2c | 4 | * Copyright 2001, 2002 - Jani Monoses <jani@iv.ro> |
1da177e4 LT |
5 | * |
6 | * | |
7 | * CREDITS:(in order of appearance) | |
245a2c2c KH |
8 | * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video |
9 | * Special thanks ;) to Mattia Crivellini <tia@mclink.it> | |
10 | * much inspired by the XFree86 4.x Trident driver sources | |
11 | * by Alan Hourihane the FreeVGA project | |
12 | * Francesco Salvestrini <salvestrini@users.sf.net> XP support, | |
13 | * code, suggestions | |
1da177e4 | 14 | * TODO: |
245a2c2c | 15 | * timing value tweaking so it looks good on every monitor in every mode |
1da177e4 LT |
16 | */ |
17 | ||
1da177e4 LT |
18 | #include <linux/module.h> |
19 | #include <linux/fb.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/pci.h> | |
22 | ||
23 | #include <linux/delay.h> | |
10172ed6 | 24 | #include <video/vga.h> |
1da177e4 LT |
25 | #include <video/trident.h> |
26 | ||
122e8ad3 | 27 | #define VERSION "0.7.9-NEWAPI" |
1da177e4 LT |
28 | |
29 | struct tridentfb_par { | |
245a2c2c | 30 | void __iomem *io_virt; /* iospace virtual memory address */ |
ea8ee55c | 31 | u32 pseudo_pal[16]; |
122e8ad3 | 32 | int chip_id; |
6eed8e1e | 33 | int flatpanel; |
d9cad04b KH |
34 | void (*init_accel) (struct tridentfb_par *, int, int); |
35 | void (*wait_engine) (struct tridentfb_par *); | |
36 | void (*fill_rect) | |
37 | (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32); | |
38 | void (*copy_rect) | |
39 | (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32); | |
1da177e4 LT |
40 | }; |
41 | ||
245a2c2c | 42 | static unsigned char eng_oper; /* engine operation... */ |
1da177e4 LT |
43 | static struct fb_ops tridentfb_ops; |
44 | ||
1da177e4 | 45 | static struct fb_fix_screeninfo tridentfb_fix = { |
245a2c2c | 46 | .id = "Trident", |
1da177e4 LT |
47 | .type = FB_TYPE_PACKED_PIXELS, |
48 | .ypanstep = 1, | |
49 | .visual = FB_VISUAL_PSEUDOCOLOR, | |
50 | .accel = FB_ACCEL_NONE, | |
51 | }; | |
52 | ||
1da177e4 LT |
53 | /* defaults which are normally overriden by user values */ |
54 | ||
55 | /* video mode */ | |
07f41e45 | 56 | static char *mode_option __devinitdata = "640x480"; |
6eed8e1e | 57 | static int bpp __devinitdata = 8; |
1da177e4 | 58 | |
6eed8e1e | 59 | static int noaccel __devinitdata; |
1da177e4 LT |
60 | |
61 | static int center; | |
62 | static int stretch; | |
63 | ||
6eed8e1e KH |
64 | static int fp __devinitdata; |
65 | static int crt __devinitdata; | |
1da177e4 | 66 | |
6eed8e1e KH |
67 | static int memsize __devinitdata; |
68 | static int memdiff __devinitdata; | |
1da177e4 LT |
69 | static int nativex; |
70 | ||
07f41e45 KH |
71 | module_param(mode_option, charp, 0); |
72 | MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'"); | |
9e3f0ca8 KH |
73 | module_param_named(mode, mode_option, charp, 0); |
74 | MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)"); | |
1da177e4 LT |
75 | module_param(bpp, int, 0); |
76 | module_param(center, int, 0); | |
77 | module_param(stretch, int, 0); | |
78 | module_param(noaccel, int, 0); | |
79 | module_param(memsize, int, 0); | |
80 | module_param(memdiff, int, 0); | |
81 | module_param(nativex, int, 0); | |
82 | module_param(fp, int, 0); | |
6eed8e1e | 83 | MODULE_PARM_DESC(fp, "Define if flatpanel is connected"); |
1da177e4 | 84 | module_param(crt, int, 0); |
6eed8e1e | 85 | MODULE_PARM_DESC(crt, "Define if CRT is connected"); |
1da177e4 | 86 | |
6bdf1035 KH |
87 | static int is_oldclock(int id) |
88 | { | |
a0d92256 KH |
89 | return (id == TGUI9440) || |
90 | (id == TGUI9660) || | |
0e73a47f KH |
91 | (id == CYBER9320); |
92 | } | |
93 | ||
94 | static int is_oldprotect(int id) | |
95 | { | |
a0d92256 KH |
96 | return (id == TGUI9440) || |
97 | (id == TGUI9660) || | |
0e73a47f KH |
98 | (id == PROVIDIA9685) || |
99 | (id == CYBER9320) || | |
100 | (id == CYBER9382) || | |
101 | (id == CYBER9385); | |
6bdf1035 KH |
102 | } |
103 | ||
e0759a5f KH |
104 | static int is_blade(int id) |
105 | { | |
106 | return (id == BLADE3D) || | |
107 | (id == CYBERBLADEE4) || | |
108 | (id == CYBERBLADEi7) || | |
109 | (id == CYBERBLADEi7D) || | |
110 | (id == CYBERBLADEi1) || | |
111 | (id == CYBERBLADEi1D) || | |
112 | (id == CYBERBLADEAi1) || | |
113 | (id == CYBERBLADEAi1D); | |
114 | } | |
115 | ||
116 | static int is_xp(int id) | |
117 | { | |
118 | return (id == CYBERBLADEXPAi1) || | |
119 | (id == CYBERBLADEXPm8) || | |
120 | (id == CYBERBLADEXPm16); | |
121 | } | |
122 | ||
1da177e4 LT |
123 | static int is3Dchip(int id) |
124 | { | |
245a2c2c KH |
125 | return ((id == BLADE3D) || (id == CYBERBLADEE4) || |
126 | (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) || | |
127 | (id == CYBER9397) || (id == CYBER9397DVD) || | |
128 | (id == CYBER9520) || (id == CYBER9525DVD) || | |
129 | (id == IMAGE975) || (id == IMAGE985) || | |
130 | (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) || | |
131 | (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) || | |
132 | (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) || | |
133 | (id == CYBERBLADEXPAi1)); | |
1da177e4 LT |
134 | } |
135 | ||
136 | static int iscyber(int id) | |
137 | { | |
138 | switch (id) { | |
245a2c2c KH |
139 | case CYBER9388: |
140 | case CYBER9382: | |
141 | case CYBER9385: | |
142 | case CYBER9397: | |
143 | case CYBER9397DVD: | |
144 | case CYBER9520: | |
145 | case CYBER9525DVD: | |
146 | case CYBERBLADEE4: | |
147 | case CYBERBLADEi7D: | |
148 | case CYBERBLADEi1: | |
149 | case CYBERBLADEi1D: | |
150 | case CYBERBLADEAi1: | |
151 | case CYBERBLADEAi1D: | |
152 | case CYBERBLADEXPAi1: | |
153 | return 1; | |
1da177e4 | 154 | |
245a2c2c KH |
155 | case CYBER9320: |
156 | case TGUI9660: | |
0e73a47f | 157 | case PROVIDIA9685: |
245a2c2c KH |
158 | case IMAGE975: |
159 | case IMAGE985: | |
160 | case BLADE3D: | |
161 | case CYBERBLADEi7: /* VIA MPV4 integrated version */ | |
162 | ||
163 | default: | |
164 | /* case CYBERBLDAEXPm8: Strange */ | |
165 | /* case CYBERBLDAEXPm16: Strange */ | |
166 | return 0; | |
1da177e4 LT |
167 | } |
168 | } | |
169 | ||
306fa6f6 KH |
170 | static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg) |
171 | { | |
172 | fb_writeb(val, p->io_virt + reg); | |
173 | } | |
1da177e4 | 174 | |
306fa6f6 KH |
175 | static inline u8 t_inb(struct tridentfb_par *p, u16 reg) |
176 | { | |
177 | return fb_readb(p->io_virt + reg); | |
178 | } | |
1da177e4 | 179 | |
306fa6f6 KH |
180 | static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v) |
181 | { | |
182 | fb_writel(v, par->io_virt + r); | |
183 | } | |
184 | ||
185 | static inline u32 readmmr(struct tridentfb_par *par, u16 r) | |
186 | { | |
187 | return fb_readl(par->io_virt + r); | |
188 | } | |
1da177e4 | 189 | |
1da177e4 LT |
190 | /* |
191 | * Blade specific acceleration. | |
192 | */ | |
193 | ||
245a2c2c | 194 | #define point(x, y) ((y) << 16 | (x)) |
1da177e4 | 195 | |
306fa6f6 | 196 | static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp) |
1da177e4 | 197 | { |
245a2c2c | 198 | int v1 = (pitch >> 3) << 20; |
49b1f4b4 KH |
199 | int tmp = bpp == 24 ? 2 : (bpp >> 4); |
200 | int v2 = v1 | (tmp << 29); | |
201 | ||
306fa6f6 KH |
202 | writemmr(par, 0x21C0, v2); |
203 | writemmr(par, 0x21C4, v2); | |
204 | writemmr(par, 0x21B8, v2); | |
205 | writemmr(par, 0x21BC, v2); | |
206 | writemmr(par, 0x21D0, v1); | |
207 | writemmr(par, 0x21D4, v1); | |
208 | writemmr(par, 0x21C8, v1); | |
209 | writemmr(par, 0x21CC, v1); | |
210 | writemmr(par, 0x216C, 0); | |
1da177e4 LT |
211 | } |
212 | ||
306fa6f6 | 213 | static void blade_wait_engine(struct tridentfb_par *par) |
1da177e4 | 214 | { |
49b1f4b4 KH |
215 | while (readmmr(par, STATUS) & 0xFA800000) |
216 | cpu_relax(); | |
1da177e4 LT |
217 | } |
218 | ||
306fa6f6 KH |
219 | static void blade_fill_rect(struct tridentfb_par *par, |
220 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
1da177e4 | 221 | { |
49b1f4b4 KH |
222 | writemmr(par, COLOR, c); |
223 | writemmr(par, ROP, rop ? ROP_X : ROP_S); | |
306fa6f6 | 224 | writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2); |
1da177e4 | 225 | |
49b1f4b4 KH |
226 | writemmr(par, DST1, point(x, y)); |
227 | writemmr(par, DST2, point(x + w - 1, y + h - 1)); | |
1da177e4 LT |
228 | } |
229 | ||
306fa6f6 KH |
230 | static void blade_copy_rect(struct tridentfb_par *par, |
231 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
1da177e4 | 232 | { |
1da177e4 | 233 | int direction = 2; |
49b1f4b4 KH |
234 | u32 s1 = point(x1, y1); |
235 | u32 s2 = point(x1 + w - 1, y1 + h - 1); | |
236 | u32 d1 = point(x2, y2); | |
237 | u32 d2 = point(x2 + w - 1, y2 + h - 1); | |
1da177e4 LT |
238 | |
239 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) | |
245a2c2c | 240 | direction = 0; |
1da177e4 | 241 | |
306fa6f6 KH |
242 | writemmr(par, ROP, ROP_S); |
243 | writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction); | |
1da177e4 | 244 | |
49b1f4b4 KH |
245 | writemmr(par, SRC1, direction ? s2 : s1); |
246 | writemmr(par, SRC2, direction ? s1 : s2); | |
247 | writemmr(par, DST1, direction ? d2 : d1); | |
248 | writemmr(par, DST2, direction ? d1 : d2); | |
1da177e4 LT |
249 | } |
250 | ||
1da177e4 LT |
251 | /* |
252 | * BladeXP specific acceleration functions | |
253 | */ | |
254 | ||
306fa6f6 | 255 | static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp) |
1da177e4 | 256 | { |
49b1f4b4 KH |
257 | unsigned char x = bpp == 24 ? 3 : (bpp >> 4); |
258 | int v1 = pitch << (bpp == 24 ? 20 : (18 + x)); | |
1da177e4 LT |
259 | |
260 | switch (pitch << (bpp >> 3)) { | |
245a2c2c KH |
261 | case 8192: |
262 | case 512: | |
263 | x |= 0x00; | |
264 | break; | |
265 | case 1024: | |
266 | x |= 0x04; | |
267 | break; | |
268 | case 2048: | |
269 | x |= 0x08; | |
270 | break; | |
271 | case 4096: | |
272 | x |= 0x0C; | |
273 | break; | |
1da177e4 LT |
274 | } |
275 | ||
306fa6f6 | 276 | t_outb(par, x, 0x2125); |
1da177e4 LT |
277 | |
278 | eng_oper = x | 0x40; | |
279 | ||
306fa6f6 KH |
280 | writemmr(par, 0x2154, v1); |
281 | writemmr(par, 0x2150, v1); | |
282 | t_outb(par, 3, 0x2126); | |
1da177e4 LT |
283 | } |
284 | ||
306fa6f6 | 285 | static void xp_wait_engine(struct tridentfb_par *par) |
1da177e4 | 286 | { |
1da177e4 LT |
287 | int count, timeout; |
288 | ||
289 | count = 0; | |
290 | timeout = 0; | |
49b1f4b4 | 291 | while (t_inb(par, STATUS) & 0x80) { |
1da177e4 LT |
292 | count++; |
293 | if (count == 10000000) { | |
294 | /* Timeout */ | |
295 | count = 9990000; | |
296 | timeout++; | |
297 | if (timeout == 8) { | |
298 | /* Reset engine */ | |
49b1f4b4 | 299 | t_outb(par, 0x00, STATUS); |
1da177e4 LT |
300 | return; |
301 | } | |
302 | } | |
49b1f4b4 | 303 | cpu_relax(); |
1da177e4 LT |
304 | } |
305 | } | |
306 | ||
306fa6f6 KH |
307 | static void xp_fill_rect(struct tridentfb_par *par, |
308 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
1da177e4 | 309 | { |
306fa6f6 KH |
310 | writemmr(par, 0x2127, ROP_P); |
311 | writemmr(par, 0x2158, c); | |
49b1f4b4 KH |
312 | writemmr(par, DRAWFL, 0x4000); |
313 | writemmr(par, OLDDIM, point(h, w)); | |
314 | writemmr(par, OLDDST, point(y, x)); | |
315 | t_outb(par, 0x01, OLDCMD); | |
306fa6f6 | 316 | t_outb(par, eng_oper, 0x2125); |
1da177e4 LT |
317 | } |
318 | ||
306fa6f6 KH |
319 | static void xp_copy_rect(struct tridentfb_par *par, |
320 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
1da177e4 LT |
321 | { |
322 | int direction; | |
245a2c2c | 323 | u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp; |
1da177e4 LT |
324 | |
325 | direction = 0x0004; | |
245a2c2c | 326 | |
1da177e4 LT |
327 | if ((x1 < x2) && (y1 == y2)) { |
328 | direction |= 0x0200; | |
329 | x1_tmp = x1 + w - 1; | |
330 | x2_tmp = x2 + w - 1; | |
331 | } else { | |
332 | x1_tmp = x1; | |
333 | x2_tmp = x2; | |
334 | } | |
245a2c2c | 335 | |
1da177e4 LT |
336 | if (y1 < y2) { |
337 | direction |= 0x0100; | |
338 | y1_tmp = y1 + h - 1; | |
339 | y2_tmp = y2 + h - 1; | |
245a2c2c | 340 | } else { |
1da177e4 LT |
341 | y1_tmp = y1; |
342 | y2_tmp = y2; | |
343 | } | |
344 | ||
49b1f4b4 | 345 | writemmr(par, DRAWFL, direction); |
306fa6f6 | 346 | t_outb(par, ROP_S, 0x2127); |
49b1f4b4 KH |
347 | writemmr(par, OLDSRC, point(y1_tmp, x1_tmp)); |
348 | writemmr(par, OLDDST, point(y2_tmp, x2_tmp)); | |
349 | writemmr(par, OLDDIM, point(h, w)); | |
350 | t_outb(par, 0x01, OLDCMD); | |
1da177e4 LT |
351 | } |
352 | ||
1da177e4 LT |
353 | /* |
354 | * Image specific acceleration functions | |
355 | */ | |
306fa6f6 | 356 | static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp) |
1da177e4 | 357 | { |
49b1f4b4 KH |
358 | int tmp = bpp == 24 ? 2: (bpp >> 4); |
359 | ||
306fa6f6 KH |
360 | writemmr(par, 0x2120, 0xF0000000); |
361 | writemmr(par, 0x2120, 0x40000000 | tmp); | |
362 | writemmr(par, 0x2120, 0x80000000); | |
363 | writemmr(par, 0x2144, 0x00000000); | |
364 | writemmr(par, 0x2148, 0x00000000); | |
365 | writemmr(par, 0x2150, 0x00000000); | |
366 | writemmr(par, 0x2154, 0x00000000); | |
367 | writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch); | |
368 | writemmr(par, 0x216C, 0x00000000); | |
369 | writemmr(par, 0x2170, 0x00000000); | |
370 | writemmr(par, 0x217C, 0x00000000); | |
371 | writemmr(par, 0x2120, 0x10000000); | |
372 | writemmr(par, 0x2130, (2047 << 16) | 2047); | |
1da177e4 LT |
373 | } |
374 | ||
306fa6f6 | 375 | static void image_wait_engine(struct tridentfb_par *par) |
1da177e4 | 376 | { |
49b1f4b4 KH |
377 | while (readmmr(par, 0x2164) & 0xF0000000) |
378 | cpu_relax(); | |
1da177e4 LT |
379 | } |
380 | ||
306fa6f6 KH |
381 | static void image_fill_rect(struct tridentfb_par *par, |
382 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
1da177e4 | 383 | { |
306fa6f6 KH |
384 | writemmr(par, 0x2120, 0x80000000); |
385 | writemmr(par, 0x2120, 0x90000000 | ROP_S); | |
1da177e4 | 386 | |
306fa6f6 | 387 | writemmr(par, 0x2144, c); |
1da177e4 | 388 | |
49b1f4b4 KH |
389 | writemmr(par, DST1, point(x, y)); |
390 | writemmr(par, DST2, point(x + w - 1, y + h - 1)); | |
1da177e4 | 391 | |
306fa6f6 | 392 | writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9); |
1da177e4 LT |
393 | } |
394 | ||
306fa6f6 KH |
395 | static void image_copy_rect(struct tridentfb_par *par, |
396 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
1da177e4 | 397 | { |
2c86a0c2 | 398 | int direction = 0x4; |
49b1f4b4 KH |
399 | u32 s1 = point(x1, y1); |
400 | u32 s2 = point(x1 + w - 1, y1 + h - 1); | |
401 | u32 d1 = point(x2, y2); | |
402 | u32 d2 = point(x2 + w - 1, y2 + h - 1); | |
1da177e4 | 403 | |
245a2c2c KH |
404 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) |
405 | direction = 0; | |
406 | ||
306fa6f6 KH |
407 | writemmr(par, 0x2120, 0x80000000); |
408 | writemmr(par, 0x2120, 0x90000000 | ROP_S); | |
245a2c2c | 409 | |
49b1f4b4 KH |
410 | writemmr(par, SRC1, direction ? s2 : s1); |
411 | writemmr(par, SRC2, direction ? s1 : s2); | |
412 | writemmr(par, DST1, direction ? d2 : d1); | |
413 | writemmr(par, DST2, direction ? d1 : d2); | |
306fa6f6 KH |
414 | writemmr(par, 0x2124, |
415 | 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction); | |
245a2c2c | 416 | } |
1da177e4 | 417 | |
bcac2d5f KH |
418 | /* |
419 | * TGUI 9440/96XX acceleration | |
420 | */ | |
421 | ||
422 | static void tgui_init_accel(struct tridentfb_par *par, int pitch, int bpp) | |
423 | { | |
49b1f4b4 | 424 | unsigned char x = bpp == 24 ? 3 : (bpp >> 4); |
bcac2d5f KH |
425 | |
426 | /* disable clipping */ | |
427 | writemmr(par, 0x2148, 0); | |
428 | writemmr(par, 0x214C, point(4095, 2047)); | |
429 | ||
bcac2d5f KH |
430 | switch ((pitch * bpp) / 8) { |
431 | case 8192: | |
432 | case 512: | |
433 | x |= 0x00; | |
434 | break; | |
435 | case 1024: | |
436 | x |= 0x04; | |
437 | break; | |
438 | case 2048: | |
439 | x |= 0x08; | |
440 | break; | |
441 | case 4096: | |
442 | x |= 0x0C; | |
443 | break; | |
444 | } | |
445 | ||
446 | fb_writew(x, par->io_virt + 0x2122); | |
447 | } | |
448 | ||
449 | static void tgui_fill_rect(struct tridentfb_par *par, | |
450 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
451 | { | |
452 | t_outb(par, ROP_P, 0x2127); | |
49b1f4b4 KH |
453 | writemmr(par, OLDCLR, c); |
454 | writemmr(par, DRAWFL, 0x4020); | |
455 | writemmr(par, OLDDIM, point(w - 1, h - 1)); | |
456 | writemmr(par, OLDDST, point(x, y)); | |
457 | t_outb(par, 1, OLDCMD); | |
bcac2d5f KH |
458 | } |
459 | ||
460 | static void tgui_copy_rect(struct tridentfb_par *par, | |
461 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
462 | { | |
463 | int flags = 0; | |
464 | u16 x1_tmp, x2_tmp, y1_tmp, y2_tmp; | |
465 | ||
466 | if ((x1 < x2) && (y1 == y2)) { | |
467 | flags |= 0x0200; | |
468 | x1_tmp = x1 + w - 1; | |
469 | x2_tmp = x2 + w - 1; | |
470 | } else { | |
471 | x1_tmp = x1; | |
472 | x2_tmp = x2; | |
473 | } | |
474 | ||
475 | if (y1 < y2) { | |
476 | flags |= 0x0100; | |
477 | y1_tmp = y1 + h - 1; | |
478 | y2_tmp = y2 + h - 1; | |
479 | } else { | |
480 | y1_tmp = y1; | |
481 | y2_tmp = y2; | |
482 | } | |
483 | ||
49b1f4b4 | 484 | writemmr(par, DRAWFL, 0x4 | flags); |
bcac2d5f | 485 | t_outb(par, ROP_S, 0x2127); |
49b1f4b4 KH |
486 | writemmr(par, OLDSRC, point(x1_tmp, y1_tmp)); |
487 | writemmr(par, OLDDST, point(x2_tmp, y2_tmp)); | |
488 | writemmr(par, OLDDIM, point(w - 1, h - 1)); | |
489 | t_outb(par, 1, OLDCMD); | |
bcac2d5f KH |
490 | } |
491 | ||
1da177e4 LT |
492 | /* |
493 | * Accel functions called by the upper layers | |
494 | */ | |
495 | #ifdef CONFIG_FB_TRIDENT_ACCEL | |
245a2c2c KH |
496 | static void tridentfb_fillrect(struct fb_info *info, |
497 | const struct fb_fillrect *fr) | |
1da177e4 | 498 | { |
306fa6f6 | 499 | struct tridentfb_par *par = info->par; |
49b1f4b4 | 500 | int col; |
245a2c2c | 501 | |
49b1f4b4 KH |
502 | if (info->var.bits_per_pixel == 8) { |
503 | col = fr->color; | |
245a2c2c KH |
504 | col |= col << 8; |
505 | col |= col << 16; | |
49b1f4b4 | 506 | } else |
245a2c2c | 507 | col = ((u32 *)(info->pseudo_palette))[fr->color]; |
245a2c2c | 508 | |
49b1f4b4 | 509 | par->wait_engine(par); |
d9cad04b | 510 | par->fill_rect(par, fr->dx, fr->dy, fr->width, |
306fa6f6 | 511 | fr->height, col, fr->rop); |
1da177e4 | 512 | } |
49b1f4b4 | 513 | |
245a2c2c KH |
514 | static void tridentfb_copyarea(struct fb_info *info, |
515 | const struct fb_copyarea *ca) | |
1da177e4 | 516 | { |
306fa6f6 KH |
517 | struct tridentfb_par *par = info->par; |
518 | ||
49b1f4b4 | 519 | par->wait_engine(par); |
d9cad04b | 520 | par->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy, |
306fa6f6 | 521 | ca->width, ca->height); |
49b1f4b4 KH |
522 | } |
523 | ||
524 | static int tridentfb_sync(struct fb_info *info) | |
525 | { | |
526 | struct tridentfb_par *par = info->par; | |
527 | ||
d9cad04b | 528 | par->wait_engine(par); |
49b1f4b4 | 529 | return 0; |
1da177e4 | 530 | } |
49b1f4b4 KH |
531 | #else |
532 | #define tridentfb_fillrect cfb_fillrect | |
533 | #define tridentfb_copyarea cfb_copyarea | |
1da177e4 LT |
534 | #endif /* CONFIG_FB_TRIDENT_ACCEL */ |
535 | ||
1da177e4 LT |
536 | /* |
537 | * Hardware access functions | |
538 | */ | |
539 | ||
306fa6f6 | 540 | static inline unsigned char read3X4(struct tridentfb_par *par, int reg) |
1da177e4 | 541 | { |
10172ed6 | 542 | return vga_mm_rcrt(par->io_virt, reg); |
1da177e4 LT |
543 | } |
544 | ||
306fa6f6 KH |
545 | static inline void write3X4(struct tridentfb_par *par, int reg, |
546 | unsigned char val) | |
1da177e4 | 547 | { |
10172ed6 | 548 | vga_mm_wcrt(par->io_virt, reg, val); |
1da177e4 LT |
549 | } |
550 | ||
10172ed6 KH |
551 | static inline unsigned char read3CE(struct tridentfb_par *par, |
552 | unsigned char reg) | |
1da177e4 | 553 | { |
10172ed6 | 554 | return vga_mm_rgfx(par->io_virt, reg); |
1da177e4 LT |
555 | } |
556 | ||
306fa6f6 KH |
557 | static inline void writeAttr(struct tridentfb_par *par, int reg, |
558 | unsigned char val) | |
1da177e4 | 559 | { |
10172ed6 KH |
560 | fb_readb(par->io_virt + VGA_IS1_RC); /* flip-flop to index */ |
561 | vga_mm_wattr(par->io_virt, reg, val); | |
1da177e4 LT |
562 | } |
563 | ||
306fa6f6 KH |
564 | static inline void write3CE(struct tridentfb_par *par, int reg, |
565 | unsigned char val) | |
1da177e4 | 566 | { |
10172ed6 | 567 | vga_mm_wgfx(par->io_virt, reg, val); |
1da177e4 LT |
568 | } |
569 | ||
e8ed857c | 570 | static void enable_mmio(void) |
1da177e4 LT |
571 | { |
572 | /* Goto New Mode */ | |
10172ed6 | 573 | vga_io_rseq(0x0B); |
1da177e4 LT |
574 | |
575 | /* Unprotect registers */ | |
10172ed6 | 576 | vga_io_wseq(NewMode1, 0x80); |
245a2c2c | 577 | |
1da177e4 | 578 | /* Enable MMIO */ |
245a2c2c | 579 | outb(PCIReg, 0x3D4); |
1da177e4 | 580 | outb(inb(0x3D5) | 0x01, 0x3D5); |
e8ed857c KH |
581 | } |
582 | ||
306fa6f6 | 583 | static void disable_mmio(struct tridentfb_par *par) |
e8ed857c | 584 | { |
e8ed857c | 585 | /* Goto New Mode */ |
10172ed6 | 586 | vga_mm_rseq(par->io_virt, 0x0B); |
e8ed857c KH |
587 | |
588 | /* Unprotect registers */ | |
10172ed6 | 589 | vga_mm_wseq(par->io_virt, NewMode1, 0x80); |
e8ed857c KH |
590 | |
591 | /* Disable MMIO */ | |
306fa6f6 KH |
592 | t_outb(par, PCIReg, 0x3D4); |
593 | t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5); | |
1da177e4 LT |
594 | } |
595 | ||
306fa6f6 KH |
596 | static void crtc_unlock(struct tridentfb_par *par) |
597 | { | |
10172ed6 KH |
598 | write3X4(par, VGA_CRTC_V_SYNC_END, |
599 | read3X4(par, VGA_CRTC_V_SYNC_END) & 0x7F); | |
306fa6f6 | 600 | } |
1da177e4 LT |
601 | |
602 | /* Return flat panel's maximum x resolution */ | |
306fa6f6 | 603 | static int __devinit get_nativex(struct tridentfb_par *par) |
1da177e4 | 604 | { |
245a2c2c | 605 | int x, y, tmp; |
1da177e4 LT |
606 | |
607 | if (nativex) | |
608 | return nativex; | |
609 | ||
306fa6f6 | 610 | tmp = (read3CE(par, VertStretch) >> 4) & 3; |
1da177e4 LT |
611 | |
612 | switch (tmp) { | |
245a2c2c KH |
613 | case 0: |
614 | x = 1280; y = 1024; | |
615 | break; | |
616 | case 2: | |
617 | x = 1024; y = 768; | |
618 | break; | |
619 | case 3: | |
620 | x = 800; y = 600; | |
621 | break; | |
622 | case 4: | |
623 | x = 1400; y = 1050; | |
624 | break; | |
625 | case 1: | |
626 | default: | |
627 | x = 640; y = 480; | |
628 | break; | |
1da177e4 LT |
629 | } |
630 | ||
631 | output("%dx%d flat panel found\n", x, y); | |
632 | return x; | |
633 | } | |
634 | ||
635 | /* Set pitch */ | |
306fa6f6 | 636 | static void set_lwidth(struct tridentfb_par *par, int width) |
1da177e4 | 637 | { |
10172ed6 | 638 | write3X4(par, VGA_CRTC_OFFSET, width & 0xFF); |
306fa6f6 KH |
639 | write3X4(par, AddColReg, |
640 | (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4)); | |
1da177e4 LT |
641 | } |
642 | ||
643 | /* For resolutions smaller than FP resolution stretch */ | |
306fa6f6 | 644 | static void screen_stretch(struct tridentfb_par *par) |
1da177e4 | 645 | { |
122e8ad3 | 646 | if (par->chip_id != CYBERBLADEXPAi1) |
306fa6f6 | 647 | write3CE(par, BiosReg, 0); |
245a2c2c | 648 | else |
306fa6f6 KH |
649 | write3CE(par, BiosReg, 8); |
650 | write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1); | |
651 | write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1); | |
1da177e4 LT |
652 | } |
653 | ||
654 | /* For resolutions smaller than FP resolution center */ | |
306fa6f6 | 655 | static void screen_center(struct tridentfb_par *par) |
1da177e4 | 656 | { |
306fa6f6 KH |
657 | write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80); |
658 | write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80); | |
1da177e4 LT |
659 | } |
660 | ||
661 | /* Address of first shown pixel in display memory */ | |
306fa6f6 | 662 | static void set_screen_start(struct tridentfb_par *par, int base) |
1da177e4 | 663 | { |
306fa6f6 | 664 | u8 tmp; |
10172ed6 KH |
665 | write3X4(par, VGA_CRTC_START_LO, base & 0xFF); |
666 | write3X4(par, VGA_CRTC_START_HI, (base & 0xFF00) >> 8); | |
306fa6f6 KH |
667 | tmp = read3X4(par, CRTCModuleTest) & 0xDF; |
668 | write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11)); | |
669 | tmp = read3X4(par, CRTHiOrd) & 0xF8; | |
670 | write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17)); | |
1da177e4 LT |
671 | } |
672 | ||
1da177e4 | 673 | /* Set dotclock frequency */ |
306fa6f6 | 674 | static void set_vclk(struct tridentfb_par *par, unsigned long freq) |
1da177e4 | 675 | { |
245a2c2c | 676 | int m, n, k; |
6bdf1035 KH |
677 | unsigned long fi, d, di; |
678 | unsigned char best_m = 0, best_n = 0, best_k = 0; | |
679 | unsigned char hi, lo; | |
1da177e4 | 680 | |
3f275ea3 | 681 | d = 20000; |
6bdf1035 | 682 | for (k = 1; k >= 0; k--) |
34dec243 KH |
683 | for (m = 0; m < 32; m++) { |
684 | n = 2 * (m + 2) - 8; | |
685 | for (n = (n < 0 ? 0 : n); n < 122; n++) { | |
3f275ea3 | 686 | fi = ((14318l * (n + 8)) / (m + 2)) >> k; |
34dec243 KH |
687 | di = abs(fi - freq); |
688 | if (di <= d) { | |
245a2c2c | 689 | d = di; |
6bdf1035 KH |
690 | best_n = n; |
691 | best_m = m; | |
692 | best_k = k; | |
245a2c2c | 693 | } |
3f275ea3 KH |
694 | if (fi > freq) |
695 | break; | |
245a2c2c | 696 | } |
34dec243 | 697 | } |
6bdf1035 KH |
698 | |
699 | if (is_oldclock(par->chip_id)) { | |
700 | lo = best_n | (best_m << 7); | |
701 | hi = (best_m >> 1) | (best_k << 4); | |
702 | } else { | |
703 | lo = best_n; | |
704 | hi = best_m | (best_k << 6); | |
705 | } | |
706 | ||
122e8ad3 | 707 | if (is3Dchip(par->chip_id)) { |
10172ed6 KH |
708 | vga_mm_wseq(par->io_virt, ClockHigh, hi); |
709 | vga_mm_wseq(par->io_virt, ClockLow, lo); | |
1da177e4 | 710 | } else { |
c1724fec KH |
711 | t_outb(par, lo, 0x43C8); |
712 | t_outb(par, hi, 0x43C9); | |
1da177e4 | 713 | } |
245a2c2c | 714 | debug("VCLK = %X %X\n", hi, lo); |
1da177e4 LT |
715 | } |
716 | ||
717 | /* Set number of lines for flat panels*/ | |
306fa6f6 | 718 | static void set_number_of_lines(struct tridentfb_par *par, int lines) |
1da177e4 | 719 | { |
306fa6f6 | 720 | int tmp = read3CE(par, CyberEnhance) & 0x8F; |
1da177e4 LT |
721 | if (lines > 1024) |
722 | tmp |= 0x50; | |
723 | else if (lines > 768) | |
724 | tmp |= 0x30; | |
725 | else if (lines > 600) | |
726 | tmp |= 0x20; | |
727 | else if (lines > 480) | |
728 | tmp |= 0x10; | |
306fa6f6 | 729 | write3CE(par, CyberEnhance, tmp); |
1da177e4 LT |
730 | } |
731 | ||
732 | /* | |
733 | * If we see that FP is active we assume we have one. | |
6eed8e1e | 734 | * Otherwise we have a CRT display. User can override. |
1da177e4 | 735 | */ |
6eed8e1e | 736 | static int __devinit is_flatpanel(struct tridentfb_par *par) |
1da177e4 LT |
737 | { |
738 | if (fp) | |
6eed8e1e | 739 | return 1; |
122e8ad3 | 740 | if (crt || !iscyber(par->chip_id)) |
6eed8e1e KH |
741 | return 0; |
742 | return (read3CE(par, FPConfig) & 0x10) ? 1 : 0; | |
1da177e4 LT |
743 | } |
744 | ||
745 | /* Try detecting the video memory size */ | |
306fa6f6 | 746 | static unsigned int __devinit get_memsize(struct tridentfb_par *par) |
1da177e4 LT |
747 | { |
748 | unsigned char tmp, tmp2; | |
749 | unsigned int k; | |
750 | ||
751 | /* If memory size provided by user */ | |
752 | if (memsize) | |
753 | k = memsize * Kb; | |
754 | else | |
122e8ad3 | 755 | switch (par->chip_id) { |
245a2c2c KH |
756 | case CYBER9525DVD: |
757 | k = 2560 * Kb; | |
758 | break; | |
1da177e4 | 759 | default: |
306fa6f6 | 760 | tmp = read3X4(par, SPR) & 0x0F; |
1da177e4 LT |
761 | switch (tmp) { |
762 | ||
245a2c2c | 763 | case 0x01: |
b614ce8b | 764 | k = 512 * Kb; |
245a2c2c KH |
765 | break; |
766 | case 0x02: | |
767 | k = 6 * Mb; /* XP */ | |
768 | break; | |
769 | case 0x03: | |
770 | k = 1 * Mb; | |
771 | break; | |
772 | case 0x04: | |
773 | k = 8 * Mb; | |
774 | break; | |
775 | case 0x06: | |
776 | k = 10 * Mb; /* XP */ | |
777 | break; | |
778 | case 0x07: | |
779 | k = 2 * Mb; | |
780 | break; | |
781 | case 0x08: | |
782 | k = 12 * Mb; /* XP */ | |
783 | break; | |
784 | case 0x0A: | |
785 | k = 14 * Mb; /* XP */ | |
786 | break; | |
787 | case 0x0C: | |
788 | k = 16 * Mb; /* XP */ | |
789 | break; | |
790 | case 0x0E: /* XP */ | |
791 | ||
10172ed6 | 792 | tmp2 = vga_mm_rseq(par->io_virt, 0xC1); |
245a2c2c KH |
793 | switch (tmp2) { |
794 | case 0x00: | |
795 | k = 20 * Mb; | |
796 | break; | |
797 | case 0x01: | |
798 | k = 24 * Mb; | |
799 | break; | |
800 | case 0x10: | |
801 | k = 28 * Mb; | |
802 | break; | |
803 | case 0x11: | |
804 | k = 32 * Mb; | |
805 | break; | |
806 | default: | |
807 | k = 1 * Mb; | |
808 | break; | |
809 | } | |
810 | break; | |
811 | ||
812 | case 0x0F: | |
813 | k = 4 * Mb; | |
814 | break; | |
815 | default: | |
816 | k = 1 * Mb; | |
1da177e4 | 817 | break; |
1da177e4 | 818 | } |
245a2c2c | 819 | } |
1da177e4 LT |
820 | |
821 | k -= memdiff * Kb; | |
245a2c2c | 822 | output("framebuffer size = %d Kb\n", k / Kb); |
1da177e4 LT |
823 | return k; |
824 | } | |
825 | ||
826 | /* See if we can handle the video mode described in var */ | |
245a2c2c KH |
827 | static int tridentfb_check_var(struct fb_var_screeninfo *var, |
828 | struct fb_info *info) | |
1da177e4 | 829 | { |
6eed8e1e | 830 | struct tridentfb_par *par = info->par; |
1da177e4 | 831 | int bpp = var->bits_per_pixel; |
bcac2d5f | 832 | int line_length; |
74a933fe | 833 | int ramdac = 230000; /* 230MHz for most 3D chips */ |
1da177e4 LT |
834 | debug("enter\n"); |
835 | ||
836 | /* check color depth */ | |
245a2c2c | 837 | if (bpp == 24) |
1da177e4 | 838 | bpp = var->bits_per_pixel = 32; |
49b1f4b4 KH |
839 | if (bpp != 8 && bpp != 16 && bpp != 32) |
840 | return -EINVAL; | |
54f019e5 KH |
841 | if (par->chip_id == TGUI9440 && bpp == 32) |
842 | return -EINVAL; | |
245a2c2c | 843 | /* check whether resolution fits on panel and in memory */ |
6eed8e1e | 844 | if (par->flatpanel && nativex && var->xres > nativex) |
1da177e4 | 845 | return -EINVAL; |
74a933fe KH |
846 | /* various resolution checks */ |
847 | var->xres = (var->xres + 7) & ~0x7; | |
49b1f4b4 | 848 | if (var->xres > var->xres_virtual) |
74a933fe | 849 | var->xres_virtual = var->xres; |
49b1f4b4 KH |
850 | if (var->yres > var->yres_virtual) |
851 | var->yres_virtual = var->yres; | |
852 | if (var->xres_virtual > 4095 || var->yres > 2048) | |
853 | return -EINVAL; | |
854 | /* prevent from position overflow for acceleration */ | |
855 | if (var->yres_virtual > 0xffff) | |
856 | return -EINVAL; | |
bcac2d5f KH |
857 | line_length = var->xres_virtual * bpp / 8; |
858 | #ifdef CONFIG_FB_TRIDENT_ACCEL | |
859 | if (!is3Dchip(par->chip_id)) { | |
860 | /* acceleration requires line length to be power of 2 */ | |
861 | if (line_length <= 512) | |
862 | var->xres_virtual = 512 * 8 / bpp; | |
863 | else if (line_length <= 1024) | |
864 | var->xres_virtual = 1024 * 8 / bpp; | |
865 | else if (line_length <= 2048) | |
866 | var->xres_virtual = 2048 * 8 / bpp; | |
867 | else if (line_length <= 4096) | |
868 | var->xres_virtual = 4096 * 8 / bpp; | |
869 | else if (line_length <= 8192) | |
870 | var->xres_virtual = 8192 * 8 / bpp; | |
49b1f4b4 KH |
871 | else |
872 | return -EINVAL; | |
bcac2d5f KH |
873 | |
874 | line_length = var->xres_virtual * bpp / 8; | |
875 | } | |
876 | #endif | |
74a933fe KH |
877 | if (var->yres > var->yres_virtual) |
878 | var->yres_virtual = var->yres; | |
bcac2d5f | 879 | if (line_length * var->yres_virtual > info->fix.smem_len) |
1da177e4 LT |
880 | return -EINVAL; |
881 | ||
882 | switch (bpp) { | |
245a2c2c KH |
883 | case 8: |
884 | var->red.offset = 0; | |
885 | var->green.offset = 0; | |
886 | var->blue.offset = 0; | |
887 | var->red.length = 6; | |
888 | var->green.length = 6; | |
889 | var->blue.length = 6; | |
890 | break; | |
891 | case 16: | |
892 | var->red.offset = 11; | |
893 | var->green.offset = 5; | |
894 | var->blue.offset = 0; | |
895 | var->red.length = 5; | |
896 | var->green.length = 6; | |
897 | var->blue.length = 5; | |
898 | break; | |
899 | case 32: | |
900 | var->red.offset = 16; | |
901 | var->green.offset = 8; | |
902 | var->blue.offset = 0; | |
903 | var->red.length = 8; | |
904 | var->green.length = 8; | |
905 | var->blue.length = 8; | |
906 | break; | |
907 | default: | |
908 | return -EINVAL; | |
1da177e4 | 909 | } |
74a933fe KH |
910 | |
911 | if (is_xp(par->chip_id)) | |
912 | ramdac = 350000; | |
913 | ||
914 | switch (par->chip_id) { | |
915 | case TGUI9440: | |
54f019e5 | 916 | ramdac = (bpp >= 16) ? 45000 : 90000; |
74a933fe KH |
917 | break; |
918 | case CYBER9320: | |
919 | case TGUI9660: | |
920 | ramdac = 135000; | |
921 | break; | |
922 | case PROVIDIA9685: | |
923 | case CYBER9388: | |
924 | case CYBER9382: | |
925 | case CYBER9385: | |
926 | ramdac = 170000; | |
927 | break; | |
928 | } | |
929 | ||
930 | /* The clock is doubled for 32 bpp */ | |
931 | if (bpp == 32) | |
932 | ramdac /= 2; | |
933 | ||
934 | if (PICOS2KHZ(var->pixclock) > ramdac) | |
935 | return -EINVAL; | |
936 | ||
1da177e4 LT |
937 | debug("exit\n"); |
938 | ||
939 | return 0; | |
940 | ||
941 | } | |
245a2c2c | 942 | |
1da177e4 LT |
943 | /* Pan the display */ |
944 | static int tridentfb_pan_display(struct fb_var_screeninfo *var, | |
245a2c2c | 945 | struct fb_info *info) |
1da177e4 | 946 | { |
306fa6f6 | 947 | struct tridentfb_par *par = info->par; |
1da177e4 LT |
948 | unsigned int offset; |
949 | ||
950 | debug("enter\n"); | |
bcac2d5f | 951 | offset = (var->xoffset + (var->yoffset * var->xres_virtual)) |
245a2c2c | 952 | * var->bits_per_pixel / 32; |
1da177e4 LT |
953 | info->var.xoffset = var->xoffset; |
954 | info->var.yoffset = var->yoffset; | |
306fa6f6 | 955 | set_screen_start(par, offset); |
1da177e4 LT |
956 | debug("exit\n"); |
957 | return 0; | |
958 | } | |
959 | ||
306fa6f6 KH |
960 | static void shadowmode_on(struct tridentfb_par *par) |
961 | { | |
962 | write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81); | |
963 | } | |
964 | ||
965 | static void shadowmode_off(struct tridentfb_par *par) | |
966 | { | |
967 | write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E); | |
968 | } | |
1da177e4 LT |
969 | |
970 | /* Set the hardware to the requested video mode */ | |
971 | static int tridentfb_set_par(struct fb_info *info) | |
972 | { | |
245a2c2c KH |
973 | struct tridentfb_par *par = (struct tridentfb_par *)(info->par); |
974 | u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend; | |
975 | u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend; | |
976 | struct fb_var_screeninfo *var = &info->var; | |
1da177e4 LT |
977 | int bpp = var->bits_per_pixel; |
978 | unsigned char tmp; | |
3f275ea3 KH |
979 | unsigned long vclk; |
980 | ||
1da177e4 | 981 | debug("enter\n"); |
245a2c2c | 982 | hdispend = var->xres / 8 - 1; |
34dec243 KH |
983 | hsyncstart = (var->xres + var->right_margin) / 8; |
984 | hsyncend = (var->xres + var->right_margin + var->hsync_len) / 8; | |
7f762d23 KH |
985 | htotal = (var->xres + var->left_margin + var->right_margin + |
986 | var->hsync_len) / 8 - 5; | |
0e73a47f | 987 | hblankstart = hdispend + 1; |
7f762d23 | 988 | hblankend = htotal + 3; |
1da177e4 | 989 | |
1da177e4 LT |
990 | vdispend = var->yres - 1; |
991 | vsyncstart = var->yres + var->lower_margin; | |
7f762d23 KH |
992 | vsyncend = vsyncstart + var->vsync_len; |
993 | vtotal = var->upper_margin + vsyncend - 2; | |
0e73a47f | 994 | vblankstart = vdispend + 1; |
7f762d23 | 995 | vblankend = vtotal; |
1da177e4 | 996 | |
34dec243 KH |
997 | if (info->var.vmode & FB_VMODE_INTERLACED) { |
998 | vtotal /= 2; | |
999 | vdispend /= 2; | |
1000 | vsyncstart /= 2; | |
1001 | vsyncend /= 2; | |
1002 | vblankstart /= 2; | |
1003 | vblankend /= 2; | |
1004 | } | |
1005 | ||
306fa6f6 KH |
1006 | crtc_unlock(par); |
1007 | write3CE(par, CyberControl, 8); | |
34dec243 KH |
1008 | tmp = 0xEB; |
1009 | if (var->sync & FB_SYNC_HOR_HIGH_ACT) | |
1010 | tmp &= ~0x40; | |
1011 | if (var->sync & FB_SYNC_VERT_HIGH_ACT) | |
1012 | tmp &= ~0x80; | |
1da177e4 | 1013 | |
6eed8e1e | 1014 | if (par->flatpanel && var->xres < nativex) { |
1da177e4 LT |
1015 | /* |
1016 | * on flat panels with native size larger | |
1017 | * than requested resolution decide whether | |
1018 | * we stretch or center | |
1019 | */ | |
34dec243 | 1020 | t_outb(par, tmp | 0xC0, VGA_MIS_W); |
1da177e4 | 1021 | |
306fa6f6 | 1022 | shadowmode_on(par); |
1da177e4 | 1023 | |
245a2c2c | 1024 | if (center) |
306fa6f6 | 1025 | screen_center(par); |
1da177e4 | 1026 | else if (stretch) |
306fa6f6 | 1027 | screen_stretch(par); |
1da177e4 LT |
1028 | |
1029 | } else { | |
34dec243 | 1030 | t_outb(par, tmp, VGA_MIS_W); |
306fa6f6 | 1031 | write3CE(par, CyberControl, 8); |
1da177e4 LT |
1032 | } |
1033 | ||
1034 | /* vertical timing values */ | |
10172ed6 KH |
1035 | write3X4(par, VGA_CRTC_V_TOTAL, vtotal & 0xFF); |
1036 | write3X4(par, VGA_CRTC_V_DISP_END, vdispend & 0xFF); | |
1037 | write3X4(par, VGA_CRTC_V_SYNC_START, vsyncstart & 0xFF); | |
1038 | write3X4(par, VGA_CRTC_V_SYNC_END, (vsyncend & 0x0F)); | |
1039 | write3X4(par, VGA_CRTC_V_BLANK_START, vblankstart & 0xFF); | |
7f762d23 | 1040 | write3X4(par, VGA_CRTC_V_BLANK_END, vblankend & 0xFF); |
1da177e4 LT |
1041 | |
1042 | /* horizontal timing values */ | |
10172ed6 KH |
1043 | write3X4(par, VGA_CRTC_H_TOTAL, htotal & 0xFF); |
1044 | write3X4(par, VGA_CRTC_H_DISP, hdispend & 0xFF); | |
1045 | write3X4(par, VGA_CRTC_H_SYNC_START, hsyncstart & 0xFF); | |
1046 | write3X4(par, VGA_CRTC_H_SYNC_END, | |
306fa6f6 | 1047 | (hsyncend & 0x1F) | ((hblankend & 0x20) << 2)); |
10172ed6 | 1048 | write3X4(par, VGA_CRTC_H_BLANK_START, hblankstart & 0xFF); |
7f762d23 | 1049 | write3X4(par, VGA_CRTC_H_BLANK_END, hblankend & 0x1F); |
1da177e4 LT |
1050 | |
1051 | /* higher bits of vertical timing values */ | |
1052 | tmp = 0x10; | |
1053 | if (vtotal & 0x100) tmp |= 0x01; | |
1054 | if (vdispend & 0x100) tmp |= 0x02; | |
1055 | if (vsyncstart & 0x100) tmp |= 0x04; | |
1056 | if (vblankstart & 0x100) tmp |= 0x08; | |
1057 | ||
1058 | if (vtotal & 0x200) tmp |= 0x20; | |
1059 | if (vdispend & 0x200) tmp |= 0x40; | |
1060 | if (vsyncstart & 0x200) tmp |= 0x80; | |
10172ed6 | 1061 | write3X4(par, VGA_CRTC_OVERFLOW, tmp); |
1da177e4 | 1062 | |
7f762d23 KH |
1063 | tmp = read3X4(par, CRTHiOrd) & 0x07; |
1064 | tmp |= 0x08; /* line compare bit 10 */ | |
1da177e4 LT |
1065 | if (vtotal & 0x400) tmp |= 0x80; |
1066 | if (vblankstart & 0x400) tmp |= 0x40; | |
1067 | if (vsyncstart & 0x400) tmp |= 0x20; | |
1068 | if (vdispend & 0x400) tmp |= 0x10; | |
306fa6f6 | 1069 | write3X4(par, CRTHiOrd, tmp); |
1da177e4 | 1070 | |
7f762d23 KH |
1071 | tmp = (htotal >> 8) & 0x01; |
1072 | tmp |= (hdispend >> 7) & 0x02; | |
1073 | tmp |= (hsyncstart >> 5) & 0x08; | |
1074 | tmp |= (hblankstart >> 4) & 0x10; | |
306fa6f6 | 1075 | write3X4(par, HorizOverflow, tmp); |
245a2c2c | 1076 | |
1da177e4 LT |
1077 | tmp = 0x40; |
1078 | if (vblankstart & 0x200) tmp |= 0x20; | |
245a2c2c | 1079 | //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; /* double scan for 200 line modes */ |
10172ed6 | 1080 | write3X4(par, VGA_CRTC_MAX_SCAN, tmp); |
1da177e4 | 1081 | |
10172ed6 KH |
1082 | write3X4(par, VGA_CRTC_LINE_COMPARE, 0xFF); |
1083 | write3X4(par, VGA_CRTC_PRESET_ROW, 0); | |
1084 | write3X4(par, VGA_CRTC_MODE, 0xC3); | |
1da177e4 | 1085 | |
306fa6f6 | 1086 | write3X4(par, LinearAddReg, 0x20); /* enable linear addressing */ |
1da177e4 | 1087 | |
245a2c2c | 1088 | tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80; |
306fa6f6 KH |
1089 | /* enable access extended memory */ |
1090 | write3X4(par, CRTCModuleTest, tmp); | |
34dec243 KH |
1091 | tmp = read3CE(par, MiscIntContReg) & ~0x4; |
1092 | if (info->var.vmode & FB_VMODE_INTERLACED) | |
1093 | tmp |= 0x4; | |
1094 | write3CE(par, MiscIntContReg, tmp); | |
1da177e4 | 1095 | |
306fa6f6 KH |
1096 | /* enable GE for text acceleration */ |
1097 | write3X4(par, GraphEngReg, 0x80); | |
1da177e4 | 1098 | |
1da177e4 | 1099 | switch (bpp) { |
245a2c2c KH |
1100 | case 8: |
1101 | tmp = 0x00; | |
1102 | break; | |
1103 | case 16: | |
1104 | tmp = 0x05; | |
1105 | break; | |
1106 | case 24: | |
1107 | tmp = 0x29; | |
1108 | break; | |
1109 | case 32: | |
1110 | tmp = 0x09; | |
1111 | break; | |
1da177e4 LT |
1112 | } |
1113 | ||
306fa6f6 | 1114 | write3X4(par, PixelBusReg, tmp); |
1da177e4 | 1115 | |
0e73a47f KH |
1116 | tmp = read3X4(par, DRAMControl); |
1117 | if (!is_oldprotect(par->chip_id)) | |
1118 | tmp |= 0x10; | |
122e8ad3 | 1119 | if (iscyber(par->chip_id)) |
245a2c2c | 1120 | tmp |= 0x20; |
306fa6f6 | 1121 | write3X4(par, DRAMControl, tmp); /* both IO, linear enable */ |
1da177e4 | 1122 | |
306fa6f6 | 1123 | write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40); |
0e73a47f KH |
1124 | if (!is_xp(par->chip_id)) |
1125 | write3X4(par, Performance, read3X4(par, Performance) | 0x10); | |
306fa6f6 | 1126 | /* MMIO & PCI read and write burst enable */ |
a0d92256 KH |
1127 | if (par->chip_id != TGUI9440) |
1128 | write3X4(par, PCIReg, read3X4(par, PCIReg) | 0x06); | |
1da177e4 | 1129 | |
10172ed6 KH |
1130 | vga_mm_wseq(par->io_virt, 0, 3); |
1131 | vga_mm_wseq(par->io_virt, 1, 1); /* set char clock 8 dots wide */ | |
306fa6f6 | 1132 | /* enable 4 maps because needed in chain4 mode */ |
10172ed6 KH |
1133 | vga_mm_wseq(par->io_virt, 2, 0x0F); |
1134 | vga_mm_wseq(par->io_virt, 3, 0); | |
1135 | vga_mm_wseq(par->io_virt, 4, 0x0E); /* memory mode enable bitmaps ?? */ | |
1da177e4 | 1136 | |
54f019e5 KH |
1137 | /* convert from picoseconds to kHz */ |
1138 | vclk = PICOS2KHZ(info->var.pixclock); | |
1139 | ||
306fa6f6 | 1140 | /* divide clock by 2 if 32bpp chain4 mode display and CPU path */ |
65e93e03 | 1141 | tmp = read3CE(par, MiscExtFunc) & 0xF0; |
54f019e5 | 1142 | if (bpp == 32 || (par->chip_id == TGUI9440 && bpp == 16)) { |
65e93e03 | 1143 | tmp |= 8; |
54f019e5 KH |
1144 | vclk *= 2; |
1145 | } | |
1146 | set_vclk(par, vclk); | |
65e93e03 | 1147 | write3CE(par, MiscExtFunc, tmp | 0x12); |
306fa6f6 KH |
1148 | write3CE(par, 0x5, 0x40); /* no CGA compat, allow 256 col */ |
1149 | write3CE(par, 0x6, 0x05); /* graphics mode */ | |
1150 | write3CE(par, 0x7, 0x0F); /* planes? */ | |
1da177e4 | 1151 | |
122e8ad3 | 1152 | if (par->chip_id == CYBERBLADEXPAi1) { |
1da177e4 | 1153 | /* This fixes snow-effect in 32 bpp */ |
10172ed6 | 1154 | write3X4(par, VGA_CRTC_H_SYNC_START, 0x84); |
1da177e4 LT |
1155 | } |
1156 | ||
306fa6f6 KH |
1157 | /* graphics mode and support 256 color modes */ |
1158 | writeAttr(par, 0x10, 0x41); | |
1159 | writeAttr(par, 0x12, 0x0F); /* planes */ | |
1160 | writeAttr(par, 0x13, 0); /* horizontal pel panning */ | |
1da177e4 | 1161 | |
245a2c2c KH |
1162 | /* colors */ |
1163 | for (tmp = 0; tmp < 0x10; tmp++) | |
306fa6f6 | 1164 | writeAttr(par, tmp, tmp); |
10172ed6 KH |
1165 | fb_readb(par->io_virt + VGA_IS1_RC); /* flip-flop to index */ |
1166 | t_outb(par, 0x20, VGA_ATT_W); /* enable attr */ | |
1da177e4 LT |
1167 | |
1168 | switch (bpp) { | |
245a2c2c KH |
1169 | case 8: |
1170 | tmp = 0; | |
1171 | break; | |
245a2c2c KH |
1172 | case 16: |
1173 | tmp = 0x30; | |
1174 | break; | |
1175 | case 24: | |
1176 | case 32: | |
1177 | tmp = 0xD0; | |
1178 | break; | |
1da177e4 LT |
1179 | } |
1180 | ||
10172ed6 KH |
1181 | t_inb(par, VGA_PEL_IW); |
1182 | t_inb(par, VGA_PEL_MSK); | |
1183 | t_inb(par, VGA_PEL_MSK); | |
1184 | t_inb(par, VGA_PEL_MSK); | |
1185 | t_inb(par, VGA_PEL_MSK); | |
1186 | t_outb(par, tmp, VGA_PEL_MSK); | |
1187 | t_inb(par, VGA_PEL_IW); | |
1da177e4 | 1188 | |
6eed8e1e | 1189 | if (par->flatpanel) |
306fa6f6 | 1190 | set_number_of_lines(par, info->var.yres); |
bcac2d5f KH |
1191 | info->fix.line_length = info->var.xres_virtual * bpp / 8; |
1192 | set_lwidth(par, info->fix.line_length / 8); | |
2c86a0c2 KH |
1193 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
1194 | par->init_accel(par, info->var.xres_virtual, bpp); | |
1195 | #endif | |
1196 | ||
1da177e4 | 1197 | info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; |
245a2c2c | 1198 | info->cmap.len = (bpp == 8) ? 256 : 16; |
1da177e4 LT |
1199 | debug("exit\n"); |
1200 | return 0; | |
1201 | } | |
1202 | ||
1203 | /* Set one color register */ | |
1204 | static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green, | |
245a2c2c KH |
1205 | unsigned blue, unsigned transp, |
1206 | struct fb_info *info) | |
1da177e4 LT |
1207 | { |
1208 | int bpp = info->var.bits_per_pixel; | |
306fa6f6 | 1209 | struct tridentfb_par *par = info->par; |
1da177e4 LT |
1210 | |
1211 | if (regno >= info->cmap.len) | |
1212 | return 1; | |
1213 | ||
973d9ab2 | 1214 | if (bpp == 8) { |
10172ed6 KH |
1215 | t_outb(par, 0xFF, VGA_PEL_MSK); |
1216 | t_outb(par, regno, VGA_PEL_IW); | |
1da177e4 | 1217 | |
10172ed6 KH |
1218 | t_outb(par, red >> 10, VGA_PEL_D); |
1219 | t_outb(par, green >> 10, VGA_PEL_D); | |
1220 | t_outb(par, blue >> 10, VGA_PEL_D); | |
1da177e4 | 1221 | |
973d9ab2 AD |
1222 | } else if (regno < 16) { |
1223 | if (bpp == 16) { /* RGB 565 */ | |
1224 | u32 col; | |
1225 | ||
1226 | col = (red & 0xF800) | ((green & 0xFC00) >> 5) | | |
1227 | ((blue & 0xF800) >> 11); | |
1228 | col |= col << 16; | |
1229 | ((u32 *)(info->pseudo_palette))[regno] = col; | |
1230 | } else if (bpp == 32) /* ARGB 8888 */ | |
1231 | ((u32*)info->pseudo_palette)[regno] = | |
245a2c2c KH |
1232 | ((transp & 0xFF00) << 16) | |
1233 | ((red & 0xFF00) << 8) | | |
973d9ab2 | 1234 | ((green & 0xFF00)) | |
245a2c2c | 1235 | ((blue & 0xFF00) >> 8); |
973d9ab2 | 1236 | } |
1da177e4 | 1237 | |
245a2c2c | 1238 | /* debug("exit\n"); */ |
1da177e4 LT |
1239 | return 0; |
1240 | } | |
1241 | ||
1242 | /* Try blanking the screen.For flat panels it does nothing */ | |
1243 | static int tridentfb_blank(int blank_mode, struct fb_info *info) | |
1244 | { | |
245a2c2c | 1245 | unsigned char PMCont, DPMSCont; |
306fa6f6 | 1246 | struct tridentfb_par *par = info->par; |
1da177e4 LT |
1247 | |
1248 | debug("enter\n"); | |
6eed8e1e | 1249 | if (par->flatpanel) |
1da177e4 | 1250 | return 0; |
306fa6f6 KH |
1251 | t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */ |
1252 | PMCont = t_inb(par, 0x83C6) & 0xFC; | |
1253 | DPMSCont = read3CE(par, PowerStatus) & 0xFC; | |
245a2c2c | 1254 | switch (blank_mode) { |
1da177e4 LT |
1255 | case FB_BLANK_UNBLANK: |
1256 | /* Screen: On, HSync: On, VSync: On */ | |
1257 | case FB_BLANK_NORMAL: | |
1258 | /* Screen: Off, HSync: On, VSync: On */ | |
1259 | PMCont |= 0x03; | |
1260 | DPMSCont |= 0x00; | |
1261 | break; | |
1262 | case FB_BLANK_HSYNC_SUSPEND: | |
1263 | /* Screen: Off, HSync: Off, VSync: On */ | |
1264 | PMCont |= 0x02; | |
1265 | DPMSCont |= 0x01; | |
1266 | break; | |
1267 | case FB_BLANK_VSYNC_SUSPEND: | |
1268 | /* Screen: Off, HSync: On, VSync: Off */ | |
1269 | PMCont |= 0x02; | |
1270 | DPMSCont |= 0x02; | |
1271 | break; | |
1272 | case FB_BLANK_POWERDOWN: | |
1273 | /* Screen: Off, HSync: Off, VSync: Off */ | |
1274 | PMCont |= 0x00; | |
1275 | DPMSCont |= 0x03; | |
1276 | break; | |
245a2c2c | 1277 | } |
1da177e4 | 1278 | |
306fa6f6 KH |
1279 | write3CE(par, PowerStatus, DPMSCont); |
1280 | t_outb(par, 4, 0x83C8); | |
1281 | t_outb(par, PMCont, 0x83C6); | |
1da177e4 LT |
1282 | |
1283 | debug("exit\n"); | |
1284 | ||
1285 | /* let fbcon do a softblank for us */ | |
1286 | return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0; | |
1287 | } | |
1288 | ||
245a2c2c KH |
1289 | static struct fb_ops tridentfb_ops = { |
1290 | .owner = THIS_MODULE, | |
1291 | .fb_setcolreg = tridentfb_setcolreg, | |
1292 | .fb_pan_display = tridentfb_pan_display, | |
1293 | .fb_blank = tridentfb_blank, | |
1294 | .fb_check_var = tridentfb_check_var, | |
1295 | .fb_set_par = tridentfb_set_par, | |
1296 | .fb_fillrect = tridentfb_fillrect, | |
1297 | .fb_copyarea = tridentfb_copyarea, | |
1298 | .fb_imageblit = cfb_imageblit, | |
49b1f4b4 KH |
1299 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
1300 | .fb_sync = tridentfb_sync, | |
bcac2d5f | 1301 | #endif |
245a2c2c KH |
1302 | }; |
1303 | ||
e09ed099 KH |
1304 | static int __devinit trident_pci_probe(struct pci_dev *dev, |
1305 | const struct pci_device_id *id) | |
1da177e4 LT |
1306 | { |
1307 | int err; | |
1308 | unsigned char revision; | |
e09ed099 KH |
1309 | struct fb_info *info; |
1310 | struct tridentfb_par *default_par; | |
122e8ad3 KH |
1311 | int chip3D; |
1312 | int chip_id; | |
1da177e4 LT |
1313 | |
1314 | err = pci_enable_device(dev); | |
1315 | if (err) | |
1316 | return err; | |
1317 | ||
e09ed099 KH |
1318 | info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev); |
1319 | if (!info) | |
1320 | return -ENOMEM; | |
1321 | default_par = info->par; | |
1322 | ||
1da177e4 LT |
1323 | chip_id = id->device; |
1324 | ||
245a2c2c | 1325 | if (chip_id == CYBERBLADEi1) |
9fa68eae KP |
1326 | output("*** Please do use cyblafb, Cyberblade/i1 support " |
1327 | "will soon be removed from tridentfb!\n"); | |
1328 | ||
1329 | ||
1da177e4 | 1330 | /* If PCI id is 0x9660 then further detect chip type */ |
245a2c2c | 1331 | |
1da177e4 | 1332 | if (chip_id == TGUI9660) { |
10172ed6 | 1333 | revision = vga_io_rseq(RevisionID); |
245a2c2c | 1334 | |
1da177e4 | 1335 | switch (revision) { |
0e73a47f KH |
1336 | case 0x21: |
1337 | chip_id = PROVIDIA9685; | |
1338 | break; | |
245a2c2c KH |
1339 | case 0x22: |
1340 | case 0x23: | |
1341 | chip_id = CYBER9397; | |
1342 | break; | |
1343 | case 0x2A: | |
1344 | chip_id = CYBER9397DVD; | |
1345 | break; | |
1346 | case 0x30: | |
1347 | case 0x33: | |
1348 | case 0x34: | |
1349 | case 0x35: | |
1350 | case 0x38: | |
1351 | case 0x3A: | |
1352 | case 0xB3: | |
1353 | chip_id = CYBER9385; | |
1354 | break; | |
1355 | case 0x40 ... 0x43: | |
1356 | chip_id = CYBER9382; | |
1357 | break; | |
1358 | case 0x4A: | |
1359 | chip_id = CYBER9388; | |
1360 | break; | |
1361 | default: | |
1362 | break; | |
1da177e4 LT |
1363 | } |
1364 | } | |
1365 | ||
1366 | chip3D = is3Dchip(chip_id); | |
1da177e4 LT |
1367 | |
1368 | if (is_xp(chip_id)) { | |
d9cad04b KH |
1369 | default_par->init_accel = xp_init_accel; |
1370 | default_par->wait_engine = xp_wait_engine; | |
1371 | default_par->fill_rect = xp_fill_rect; | |
1372 | default_par->copy_rect = xp_copy_rect; | |
245a2c2c | 1373 | } else if (is_blade(chip_id)) { |
d9cad04b KH |
1374 | default_par->init_accel = blade_init_accel; |
1375 | default_par->wait_engine = blade_wait_engine; | |
1376 | default_par->fill_rect = blade_fill_rect; | |
1377 | default_par->copy_rect = blade_copy_rect; | |
bcac2d5f | 1378 | } else if (chip3D) { /* 3DImage family left */ |
d9cad04b KH |
1379 | default_par->init_accel = image_init_accel; |
1380 | default_par->wait_engine = image_wait_engine; | |
1381 | default_par->fill_rect = image_fill_rect; | |
1382 | default_par->copy_rect = image_copy_rect; | |
bcac2d5f KH |
1383 | } else { /* TGUI 9440/96XX family */ |
1384 | default_par->init_accel = tgui_init_accel; | |
1385 | default_par->wait_engine = xp_wait_engine; | |
1386 | default_par->fill_rect = tgui_fill_rect; | |
1387 | default_par->copy_rect = tgui_copy_rect; | |
1da177e4 LT |
1388 | } |
1389 | ||
122e8ad3 KH |
1390 | default_par->chip_id = chip_id; |
1391 | ||
1da177e4 | 1392 | /* setup MMIO region */ |
245a2c2c KH |
1393 | tridentfb_fix.mmio_start = pci_resource_start(dev, 1); |
1394 | tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000; | |
1da177e4 LT |
1395 | |
1396 | if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) { | |
1397 | debug("request_region failed!\n"); | |
3876ae8b | 1398 | framebuffer_release(info); |
1da177e4 LT |
1399 | return -1; |
1400 | } | |
1401 | ||
e09ed099 KH |
1402 | default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start, |
1403 | tridentfb_fix.mmio_len); | |
1da177e4 | 1404 | |
e09ed099 | 1405 | if (!default_par->io_virt) { |
1da177e4 | 1406 | debug("ioremap failed\n"); |
e8ed857c KH |
1407 | err = -1; |
1408 | goto out_unmap1; | |
1da177e4 LT |
1409 | } |
1410 | ||
bcac2d5f KH |
1411 | enable_mmio(); |
1412 | ||
1da177e4 | 1413 | /* setup framebuffer memory */ |
245a2c2c | 1414 | tridentfb_fix.smem_start = pci_resource_start(dev, 0); |
e09ed099 | 1415 | tridentfb_fix.smem_len = get_memsize(default_par); |
245a2c2c | 1416 | |
1da177e4 LT |
1417 | if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { |
1418 | debug("request_mem_region failed!\n"); | |
e09ed099 | 1419 | disable_mmio(info->par); |
a02f6402 | 1420 | err = -1; |
e8ed857c | 1421 | goto out_unmap1; |
1da177e4 LT |
1422 | } |
1423 | ||
e09ed099 KH |
1424 | info->screen_base = ioremap_nocache(tridentfb_fix.smem_start, |
1425 | tridentfb_fix.smem_len); | |
1da177e4 | 1426 | |
e09ed099 | 1427 | if (!info->screen_base) { |
1da177e4 | 1428 | debug("ioremap failed\n"); |
a02f6402 | 1429 | err = -1; |
e8ed857c | 1430 | goto out_unmap2; |
1da177e4 LT |
1431 | } |
1432 | ||
1433 | output("%s board found\n", pci_name(dev)); | |
6eed8e1e | 1434 | default_par->flatpanel = is_flatpanel(default_par); |
1da177e4 | 1435 | |
6eed8e1e | 1436 | if (default_par->flatpanel) |
e09ed099 | 1437 | nativex = get_nativex(default_par); |
1da177e4 | 1438 | |
e09ed099 KH |
1439 | info->fix = tridentfb_fix; |
1440 | info->fbops = &tridentfb_ops; | |
aa0aa8ab | 1441 | info->pseudo_palette = default_par->pseudo_pal; |
1da177e4 | 1442 | |
e09ed099 | 1443 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; |
1da177e4 | 1444 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
e09ed099 | 1445 | info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; |
1da177e4 | 1446 | #endif |
ea8ee55c | 1447 | if (!fb_find_mode(&info->var, info, |
07f41e45 | 1448 | mode_option, NULL, 0, NULL, bpp)) { |
a02f6402 | 1449 | err = -EINVAL; |
e8ed857c | 1450 | goto out_unmap2; |
a02f6402 | 1451 | } |
e09ed099 | 1452 | err = fb_alloc_cmap(&info->cmap, 256, 0); |
e8ed857c KH |
1453 | if (err < 0) |
1454 | goto out_unmap2; | |
1455 | ||
49b1f4b4 | 1456 | if (!noaccel && default_par->init_accel) |
ea8ee55c | 1457 | info->var.accel_flags |= FB_ACCELF_TEXT; |
1da177e4 | 1458 | else |
ea8ee55c KH |
1459 | info->var.accel_flags &= ~FB_ACCELF_TEXT; |
1460 | info->var.activate |= FB_ACTIVATE_NOW; | |
e09ed099 KH |
1461 | info->device = &dev->dev; |
1462 | if (register_framebuffer(info) < 0) { | |
1da177e4 | 1463 | printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n"); |
e09ed099 | 1464 | fb_dealloc_cmap(&info->cmap); |
a02f6402 | 1465 | err = -EINVAL; |
e8ed857c | 1466 | goto out_unmap2; |
1da177e4 LT |
1467 | } |
1468 | output("fb%d: %s frame buffer device %dx%d-%dbpp\n", | |
ea8ee55c KH |
1469 | info->node, info->fix.id, info->var.xres, |
1470 | info->var.yres, info->var.bits_per_pixel); | |
e09ed099 KH |
1471 | |
1472 | pci_set_drvdata(dev, info); | |
1da177e4 | 1473 | return 0; |
a02f6402 | 1474 | |
e8ed857c | 1475 | out_unmap2: |
e09ed099 KH |
1476 | if (info->screen_base) |
1477 | iounmap(info->screen_base); | |
e8ed857c | 1478 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); |
e09ed099 | 1479 | disable_mmio(info->par); |
e8ed857c | 1480 | out_unmap1: |
e09ed099 KH |
1481 | if (default_par->io_virt) |
1482 | iounmap(default_par->io_virt); | |
e8ed857c | 1483 | release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); |
e09ed099 | 1484 | framebuffer_release(info); |
a02f6402 | 1485 | return err; |
1da177e4 LT |
1486 | } |
1487 | ||
245a2c2c | 1488 | static void __devexit trident_pci_remove(struct pci_dev *dev) |
1da177e4 | 1489 | { |
e09ed099 KH |
1490 | struct fb_info *info = pci_get_drvdata(dev); |
1491 | struct tridentfb_par *par = info->par; | |
1492 | ||
1493 | unregister_framebuffer(info); | |
1da177e4 | 1494 | iounmap(par->io_virt); |
e09ed099 | 1495 | iounmap(info->screen_base); |
1da177e4 | 1496 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); |
e8ed857c | 1497 | release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); |
e09ed099 KH |
1498 | pci_set_drvdata(dev, NULL); |
1499 | framebuffer_release(info); | |
1da177e4 LT |
1500 | } |
1501 | ||
1502 | /* List of boards that we are trying to support */ | |
1503 | static struct pci_device_id trident_devices[] = { | |
245a2c2c KH |
1504 | {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1505 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1506 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1507 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1508 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1509 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1510 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1511 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
a0d92256 | 1512 | {PCI_VENDOR_ID_TRIDENT, TGUI9440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
245a2c2c KH |
1513 | {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1514 | {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1515 | {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1516 | {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1517 | {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1518 | {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1519 | {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1520 | {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1521 | {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1522 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1523 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1524 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1da177e4 | 1525 | {0,} |
245a2c2c KH |
1526 | }; |
1527 | ||
1528 | MODULE_DEVICE_TABLE(pci, trident_devices); | |
1da177e4 LT |
1529 | |
1530 | static struct pci_driver tridentfb_pci_driver = { | |
245a2c2c KH |
1531 | .name = "tridentfb", |
1532 | .id_table = trident_devices, | |
1533 | .probe = trident_pci_probe, | |
1534 | .remove = __devexit_p(trident_pci_remove) | |
1da177e4 LT |
1535 | }; |
1536 | ||
1537 | /* | |
1538 | * Parse user specified options (`video=trident:') | |
1539 | * example: | |
245a2c2c | 1540 | * video=trident:800x600,bpp=16,noaccel |
1da177e4 LT |
1541 | */ |
1542 | #ifndef MODULE | |
07f41e45 | 1543 | static int __init tridentfb_setup(char *options) |
1da177e4 | 1544 | { |
245a2c2c | 1545 | char *opt; |
1da177e4 LT |
1546 | if (!options || !*options) |
1547 | return 0; | |
245a2c2c KH |
1548 | while ((opt = strsep(&options, ",")) != NULL) { |
1549 | if (!*opt) | |
1550 | continue; | |
1551 | if (!strncmp(opt, "noaccel", 7)) | |
1da177e4 | 1552 | noaccel = 1; |
245a2c2c | 1553 | else if (!strncmp(opt, "fp", 2)) |
6eed8e1e | 1554 | fp = 1; |
245a2c2c | 1555 | else if (!strncmp(opt, "crt", 3)) |
6eed8e1e | 1556 | fp = 0; |
245a2c2c KH |
1557 | else if (!strncmp(opt, "bpp=", 4)) |
1558 | bpp = simple_strtoul(opt + 4, NULL, 0); | |
1559 | else if (!strncmp(opt, "center", 6)) | |
1da177e4 | 1560 | center = 1; |
245a2c2c | 1561 | else if (!strncmp(opt, "stretch", 7)) |
1da177e4 | 1562 | stretch = 1; |
245a2c2c KH |
1563 | else if (!strncmp(opt, "memsize=", 8)) |
1564 | memsize = simple_strtoul(opt + 8, NULL, 0); | |
1565 | else if (!strncmp(opt, "memdiff=", 8)) | |
1566 | memdiff = simple_strtoul(opt + 8, NULL, 0); | |
1567 | else if (!strncmp(opt, "nativex=", 8)) | |
1568 | nativex = simple_strtoul(opt + 8, NULL, 0); | |
1da177e4 | 1569 | else |
07f41e45 | 1570 | mode_option = opt; |
1da177e4 LT |
1571 | } |
1572 | return 0; | |
1573 | } | |
1574 | #endif | |
1575 | ||
1576 | static int __init tridentfb_init(void) | |
1577 | { | |
1578 | #ifndef MODULE | |
1579 | char *option = NULL; | |
1580 | ||
1581 | if (fb_get_options("tridentfb", &option)) | |
1582 | return -ENODEV; | |
1583 | tridentfb_setup(option); | |
1584 | #endif | |
1585 | output("Trident framebuffer %s initializing\n", VERSION); | |
1586 | return pci_register_driver(&tridentfb_pci_driver); | |
1587 | } | |
1588 | ||
1589 | static void __exit tridentfb_exit(void) | |
1590 | { | |
1591 | pci_unregister_driver(&tridentfb_pci_driver); | |
1592 | } | |
1593 | ||
1da177e4 LT |
1594 | module_init(tridentfb_init); |
1595 | module_exit(tridentfb_exit); | |
1596 | ||
1597 | MODULE_AUTHOR("Jani Monoses <jani@iv.ro>"); | |
1598 | MODULE_DESCRIPTION("Framebuffer driver for Trident cards"); | |
1599 | MODULE_LICENSE("GPL"); | |
1600 |