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sh_mobile_meram: Rename operations to cache_[alloc|free|update]
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / video / sh_mobile_lcdcfb.c
CommitLineData
cfb4f5d1
MD		 1/*
2 * SuperH Mobile LCDC Framebuffer
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
f1f60b5f
LP		 11#include <linux/atomic.h>
12#include <linux/backlight.h>
cfb4f5d1 13#include <linux/clk.h>
f1f60b5f 14#include <linux/console.h>
c5deac3c 15#include <linux/ctype.h>
cfb4f5d1 16#include <linux/dma-mapping.h>
f1f60b5f
LP		 17#include <linux/delay.h>
18#include <linux/gpio.h>
19#include <linux/init.h>
8564557a 20#include <linux/interrupt.h>
40331b21 21#include <linux/ioctl.h>
f1f60b5f
LP		 22#include <linux/kernel.h>
23#include <linux/mm.h>
355b200b 24#include <linux/module.h>
f1f60b5f
LP		 25#include <linux/platform_device.h>
26#include <linux/pm_runtime.h>
27#include <linux/slab.h>
28#include <linux/videodev2.h>
29#include <linux/vmalloc.h>
30
225c9a8d 31#include <video/sh_mobile_lcdc.h>
8a20974f 32#include <video/sh_mobile_meram.h>
cfb4f5d1 33
6de9edd5
GL		 34#include "sh_mobile_lcdcfb.h"
35
c5deac3c
LP		 36/* ----------------------------------------------------------------------------
37 * Overlay register definitions
38 */
39
40#define LDBCR 0xb00
41#define LDBCR_UPC(n) (1 << ((n) + 16))
42#define LDBCR_UPF(n) (1 << ((n) + 8))
43#define LDBCR_UPD(n) (1 << ((n) + 0))
44#define LDBnBSIFR(n) (0xb20 + (n) * 0x20 + 0x00)
45#define LDBBSIFR_EN (1 << 31)
46#define LDBBSIFR_VS (1 << 29)
47#define LDBBSIFR_BRSEL (1 << 28)
48#define LDBBSIFR_MX (1 << 27)
49#define LDBBSIFR_MY (1 << 26)
50#define LDBBSIFR_CV3 (3 << 24)
51#define LDBBSIFR_CV2 (2 << 24)
52#define LDBBSIFR_CV1 (1 << 24)
53#define LDBBSIFR_CV0 (0 << 24)
54#define LDBBSIFR_CV_MASK (3 << 24)
55#define LDBBSIFR_LAY_MASK (0xff << 16)
56#define LDBBSIFR_LAY_SHIFT 16
57#define LDBBSIFR_ROP3_MASK (0xff << 16)
58#define LDBBSIFR_ROP3_SHIFT 16
59#define LDBBSIFR_AL_PL8 (3 << 14)
60#define LDBBSIFR_AL_PL1 (2 << 14)
61#define LDBBSIFR_AL_PK (1 << 14)
62#define LDBBSIFR_AL_1 (0 << 14)
63#define LDBBSIFR_AL_MASK (3 << 14)
64#define LDBBSIFR_SWPL (1 << 10)
65#define LDBBSIFR_SWPW (1 << 9)
66#define LDBBSIFR_SWPB (1 << 8)
67#define LDBBSIFR_RY (1 << 7)
68#define LDBBSIFR_CHRR_420 (2 << 0)
69#define LDBBSIFR_CHRR_422 (1 << 0)
70#define LDBBSIFR_CHRR_444 (0 << 0)
71#define LDBBSIFR_RPKF_ARGB32 (0x00 << 0)
72#define LDBBSIFR_RPKF_RGB16 (0x03 << 0)
73#define LDBBSIFR_RPKF_RGB24 (0x0b << 0)
74#define LDBBSIFR_RPKF_MASK (0x1f << 0)
75#define LDBnBSSZR(n) (0xb20 + (n) * 0x20 + 0x04)
76#define LDBBSSZR_BVSS_MASK (0xfff << 16)
77#define LDBBSSZR_BVSS_SHIFT 16
78#define LDBBSSZR_BHSS_MASK (0xfff << 0)
79#define LDBBSSZR_BHSS_SHIFT 0
80#define LDBnBLOCR(n) (0xb20 + (n) * 0x20 + 0x08)
81#define LDBBLOCR_CVLC_MASK (0xfff << 16)
82#define LDBBLOCR_CVLC_SHIFT 16
83#define LDBBLOCR_CHLC_MASK (0xfff << 0)
84#define LDBBLOCR_CHLC_SHIFT 0
85#define LDBnBSMWR(n) (0xb20 + (n) * 0x20 + 0x0c)
86#define LDBBSMWR_BSMWA_MASK (0xffff << 16)
87#define LDBBSMWR_BSMWA_SHIFT 16
88#define LDBBSMWR_BSMW_MASK (0xffff << 0)
89#define LDBBSMWR_BSMW_SHIFT 0
90#define LDBnBSAYR(n) (0xb20 + (n) * 0x20 + 0x10)
91#define LDBBSAYR_FG1A_MASK (0xff << 24)
92#define LDBBSAYR_FG1A_SHIFT 24
93#define LDBBSAYR_FG1R_MASK (0xff << 16)
94#define LDBBSAYR_FG1R_SHIFT 16
95#define LDBBSAYR_FG1G_MASK (0xff << 8)
96#define LDBBSAYR_FG1G_SHIFT 8
97#define LDBBSAYR_FG1B_MASK (0xff << 0)
98#define LDBBSAYR_FG1B_SHIFT 0
99#define LDBnBSACR(n) (0xb20 + (n) * 0x20 + 0x14)
100#define LDBBSACR_FG2A_MASK (0xff << 24)
101#define LDBBSACR_FG2A_SHIFT 24
102#define LDBBSACR_FG2R_MASK (0xff << 16)
103#define LDBBSACR_FG2R_SHIFT 16
104#define LDBBSACR_FG2G_MASK (0xff << 8)
105#define LDBBSACR_FG2G_SHIFT 8
106#define LDBBSACR_FG2B_MASK (0xff << 0)
107#define LDBBSACR_FG2B_SHIFT 0
108#define LDBnBSAAR(n) (0xb20 + (n) * 0x20 + 0x18)
109#define LDBBSAAR_AP_MASK (0xff << 24)
110#define LDBBSAAR_AP_SHIFT 24
111#define LDBBSAAR_R_MASK (0xff << 16)
112#define LDBBSAAR_R_SHIFT 16
113#define LDBBSAAR_GY_MASK (0xff << 8)
114#define LDBBSAAR_GY_SHIFT 8
115#define LDBBSAAR_B_MASK (0xff << 0)
116#define LDBBSAAR_B_SHIFT 0
117#define LDBnBPPCR(n) (0xb20 + (n) * 0x20 + 0x1c)
118#define LDBBPPCR_AP_MASK (0xff << 24)
119#define LDBBPPCR_AP_SHIFT 24
120#define LDBBPPCR_R_MASK (0xff << 16)
121#define LDBBPPCR_R_SHIFT 16
122#define LDBBPPCR_GY_MASK (0xff << 8)
123#define LDBBPPCR_GY_SHIFT 8
124#define LDBBPPCR_B_MASK (0xff << 0)
125#define LDBBPPCR_B_SHIFT 0
126#define LDBnBBGCL(n) (0xb10 + (n) * 0x04)
127#define LDBBBGCL_BGA_MASK (0xff << 24)
128#define LDBBBGCL_BGA_SHIFT 24
129#define LDBBBGCL_BGR_MASK (0xff << 16)
130#define LDBBBGCL_BGR_SHIFT 16
131#define LDBBBGCL_BGG_MASK (0xff << 8)
132#define LDBBBGCL_BGG_SHIFT 8
133#define LDBBBGCL_BGB_MASK (0xff << 0)
134#define LDBBBGCL_BGB_SHIFT 0
135
a6f15ade
PE		 136#define SIDE_B_OFFSET 0x1000
137#define MIRROR_OFFSET 0x2000
cfb4f5d1 138
d2ecbab5
GL		 139#define MAX_XRES 1920
140#define MAX_YRES 1080
cfb4f5d1 141
c5deac3c
LP		 142enum sh_mobile_lcdc_overlay_mode {
143 LCDC_OVERLAY_BLEND,
144 LCDC_OVERLAY_ROP3,
145};
146
147/*
148 * struct sh_mobile_lcdc_overlay - LCDC display overlay
149 *
150 * @channel: LCDC channel this overlay belongs to
151 * @cfg: Overlay configuration
152 * @info: Frame buffer device
153 * @index: Overlay index (0-3)
154 * @base: Overlay registers base address
155 * @enabled: True if the overlay is enabled
156 * @mode: Overlay blending mode (alpha blend or ROP3)
157 * @alpha: Global alpha blending value (0-255, for alpha blending mode)
158 * @rop3: Raster operation (for ROP3 mode)
159 * @fb_mem: Frame buffer virtual memory address
160 * @fb_size: Frame buffer size in bytes
161 * @dma_handle: Frame buffer DMA address
162 * @base_addr_y: Overlay base address (RGB or luma component)
163 * @base_addr_c: Overlay base address (chroma component)
164 * @pan_offset: Current pan offset in bytes
165 * @format: Current pixelf format
166 * @xres: Horizontal visible resolution
167 * @xres_virtual: Horizontal total resolution
168 * @yres: Vertical visible resolution
169 * @yres_virtual: Vertical total resolution
170 * @pitch: Overlay line pitch
171 * @pos_x: Horizontal overlay position
172 * @pos_y: Vertical overlay position
173 */
174struct sh_mobile_lcdc_overlay {
175 struct sh_mobile_lcdc_chan *channel;
176
177 const struct sh_mobile_lcdc_overlay_cfg *cfg;
178 struct fb_info *info;
179
180 unsigned int index;
181 unsigned long base;
182
183 bool enabled;
184 enum sh_mobile_lcdc_overlay_mode mode;
185 unsigned int alpha;
186 unsigned int rop3;
187
188 void *fb_mem;
189 unsigned long fb_size;
190
191 dma_addr_t dma_handle;
192 unsigned long base_addr_y;
193 unsigned long base_addr_c;
194 unsigned long pan_offset;
195
196 const struct sh_mobile_lcdc_format_info *format;
197 unsigned int xres;
198 unsigned int xres_virtual;
199 unsigned int yres;
200 unsigned int yres_virtual;
201 unsigned int pitch;
202 int pos_x;
203 int pos_y;
204};
205
f1f60b5f
LP		 206struct sh_mobile_lcdc_priv {
207 void __iomem *base;
208 int irq;
209 atomic_t hw_usecnt;
210 struct device *dev;
211 struct clk *dot_clk;
212 unsigned long lddckr;
c5deac3c 213
f1f60b5f 214 struct sh_mobile_lcdc_chan ch[2];
c5deac3c
LP		 215 struct sh_mobile_lcdc_overlay overlays[4];
216
f1f60b5f
LP		 217 struct notifier_block notifier;
218 int started;
219 int forced_fourcc; /* 2 channel LCDC must share fourcc setting */
220 struct sh_mobile_meram_info *meram_dev;
221};
222
223/* -----------------------------------------------------------------------------
224 * Registers access
225 */
226
0246c471 227static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
cfb4f5d1
MD		 228 [LDDCKPAT1R] = 0x400,
229 [LDDCKPAT2R] = 0x404,
230 [LDMT1R] = 0x418,
231 [LDMT2R] = 0x41c,
232 [LDMT3R] = 0x420,
233 [LDDFR] = 0x424,
234 [LDSM1R] = 0x428,
8564557a 235 [LDSM2R] = 0x42c,
cfb4f5d1 236 [LDSA1R] = 0x430,
53b50314 237 [LDSA2R] = 0x434,
cfb4f5d1
MD		 238 [LDMLSR] = 0x438,
239 [LDHCNR] = 0x448,
240 [LDHSYNR] = 0x44c,
241 [LDVLNR] = 0x450,
242 [LDVSYNR] = 0x454,
243 [LDPMR] = 0x460,
6011bdea 244 [LDHAJR] = 0x4a0,
cfb4f5d1
MD		 245};
246
0246c471 247static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
cfb4f5d1
MD		 248 [LDDCKPAT1R] = 0x408,
249 [LDDCKPAT2R] = 0x40c,
250 [LDMT1R] = 0x600,
251 [LDMT2R] = 0x604,
252 [LDMT3R] = 0x608,
253 [LDDFR] = 0x60c,
254 [LDSM1R] = 0x610,
8564557a 255 [LDSM2R] = 0x614,
cfb4f5d1
MD		 256 [LDSA1R] = 0x618,
257 [LDMLSR] = 0x620,
258 [LDHCNR] = 0x624,
259 [LDHSYNR] = 0x628,
260 [LDVLNR] = 0x62c,
261 [LDVSYNR] = 0x630,
262 [LDPMR] = 0x63c,
263};
264
a6f15ade
PE		 265static bool banked(int reg_nr)
266{
267 switch (reg_nr) {
268 case LDMT1R:
269 case LDMT2R:
270 case LDMT3R:
271 case LDDFR:
272 case LDSM1R:
273 case LDSA1R:
53b50314 274 case LDSA2R:
a6f15ade
PE		 275 case LDMLSR:
276 case LDHCNR:
277 case LDHSYNR:
278 case LDVLNR:
279 case LDVSYNR:
280 return true;
281 }
282 return false;
283}
284
f1f60b5f
LP		 285static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
286{
b5ef967d 287 return chan->cfg->chan == LCDC_CHAN_SUBLCD;
f1f60b5f
LP		 288}
289
cfb4f5d1
MD		 290static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
291 int reg_nr, unsigned long data)
292{
293 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
a6f15ade
PE		 294 if (banked(reg_nr))
295 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
296 SIDE_B_OFFSET);
297}
298
299static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
300 int reg_nr, unsigned long data)
301{
302 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
303 MIRROR_OFFSET);
cfb4f5d1
MD		 304}
305
306static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
307 int reg_nr)
308{
309 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
310}
311
c5deac3c
LP		 312static void lcdc_write_overlay(struct sh_mobile_lcdc_overlay *ovl,
313 int reg, unsigned long data)
314{
315 iowrite32(data, ovl->channel->lcdc->base + reg);
316 iowrite32(data, ovl->channel->lcdc->base + reg + SIDE_B_OFFSET);
317}
318
cfb4f5d1
MD		 319static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
320 unsigned long reg_offs, unsigned long data)
321{
322 iowrite32(data, priv->base + reg_offs);
323}
324
325static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
326 unsigned long reg_offs)
327{
328 return ioread32(priv->base + reg_offs);
329}
330
331static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
332 unsigned long reg_offs,
333 unsigned long mask, unsigned long until)
334{
335 while ((lcdc_read(priv, reg_offs) & mask) != until)
336 cpu_relax();
337}
338
f1f60b5f
LP		 339/* -----------------------------------------------------------------------------
340 * Clock management
341 */
342
343static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1 344{
f1f60b5f
LP		 345 if (atomic_inc_and_test(&priv->hw_usecnt)) {
346 if (priv->dot_clk)
347 clk_enable(priv->dot_clk);
348 pm_runtime_get_sync(priv->dev);
349 if (priv->meram_dev && priv->meram_dev->pdev)
350 pm_runtime_get_sync(&priv->meram_dev->pdev->dev);
351 }
cfb4f5d1
MD		 352}
353
f1f60b5f
LP		 354static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
355{
356 if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
357 if (priv->meram_dev && priv->meram_dev->pdev)
358 pm_runtime_put_sync(&priv->meram_dev->pdev->dev);
359 pm_runtime_put(priv->dev);
360 if (priv->dot_clk)
361 clk_disable(priv->dot_clk);
362 }
363}
364
0a7f17aa
LP		 365static int sh_mobile_lcdc_setup_clocks(struct sh_mobile_lcdc_priv *priv,
366 int clock_source)
f1f60b5f 367{
4774c12a 368 struct clk *clk;
f1f60b5f
LP		 369 char *str;
370
371 switch (clock_source) {
372 case LCDC_CLK_BUS:
373 str = "bus_clk";
374 priv->lddckr = LDDCKR_ICKSEL_BUS;
375 break;
376 case LCDC_CLK_PERIPHERAL:
377 str = "peripheral_clk";
378 priv->lddckr = LDDCKR_ICKSEL_MIPI;
379 break;
380 case LCDC_CLK_EXTERNAL:
381 str = NULL;
382 priv->lddckr = LDDCKR_ICKSEL_HDMI;
383 break;
384 default:
385 return -EINVAL;
386 }
387
4774c12a
LP		 388 if (str == NULL)
389 return 0;
390
0a7f17aa 391 clk = clk_get(priv->dev, str);
4774c12a 392 if (IS_ERR(clk)) {
0a7f17aa 393 dev_err(priv->dev, "cannot get dot clock %s\n", str);
4774c12a 394 return PTR_ERR(clk);
f1f60b5f
LP		 395 }
396
4774c12a 397 priv->dot_clk = clk;
f1f60b5f
LP		 398 return 0;
399}
400
401/* -----------------------------------------------------------------------------
37c5dcc2 402 * Display, panel and deferred I/O
f1f60b5f
LP		 403 */
404
cfb4f5d1
MD		 405static void lcdc_sys_write_index(void *handle, unsigned long data)
406{
407 struct sh_mobile_lcdc_chan *ch = handle;
408
ce1c0b08
LP		 409 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT);
410 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
411 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
412 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
413 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD		 414}
415
416static void lcdc_sys_write_data(void *handle, unsigned long data)
417{
418 struct sh_mobile_lcdc_chan *ch = handle;
419
ce1c0b08
LP		 420 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW);
421 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
422 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
423 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
424 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD		 425}
426
427static unsigned long lcdc_sys_read_data(void *handle)
428{
429 struct sh_mobile_lcdc_chan *ch = handle;
430
ce1c0b08
LP		 431 lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR);
432 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
433 lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA |
434 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
cfb4f5d1 435 udelay(1);
ce1c0b08 436 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1 437
ce1c0b08 438 return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK;
cfb4f5d1
MD		 439}
440
441struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
442 lcdc_sys_write_index,
443 lcdc_sys_write_data,
444 lcdc_sys_read_data,
445};
446
1c6a307a
PM		 447static int sh_mobile_lcdc_sginit(struct fb_info *info,
448 struct list_head *pagelist)
449{
450 struct sh_mobile_lcdc_chan *ch = info->par;
58f03d99 451 unsigned int nr_pages_max = ch->fb_size >> PAGE_SHIFT;
1c6a307a
PM		 452 struct page *page;
453 int nr_pages = 0;
454
455 sg_init_table(ch->sglist, nr_pages_max);
456
457 list_for_each_entry(page, pagelist, lru)
458 sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
459
460 return nr_pages;
461}
462
8564557a
MD		 463static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
464 struct list_head *pagelist)
465{
466 struct sh_mobile_lcdc_chan *ch = info->par;
b5ef967d 467 const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg;
8564557a
MD		 468
469 /* enable clocks before accessing hardware */
470 sh_mobile_lcdc_clk_on(ch->lcdc);
471
5c1a56b5
PM		 472 /*
473 * It's possible to get here without anything on the pagelist via
474 * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
475 * invocation. In the former case, the acceleration routines are
476 * stepped in to when using the framebuffer console causing the
477 * workqueue to be scheduled without any dirty pages on the list.
478 *
479 * Despite this, a panel update is still needed given that the
480 * acceleration routines have their own methods for writing in
481 * that still need to be updated.
482 *
483 * The fsync() and empty pagelist case could be optimized for,
484 * but we don't bother, as any application exhibiting such
485 * behaviour is fundamentally broken anyways.
486 */
487 if (!list_empty(pagelist)) {
488 unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
489
490 /* trigger panel update */
e8363140 491 dma_map_sg(ch->lcdc->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
afaad83b
LP		 492 if (panel->start_transfer)
493 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 494 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
e8363140
LP		 495 dma_unmap_sg(ch->lcdc->dev, ch->sglist, nr_pages,
496 DMA_TO_DEVICE);
ef61aae4 497 } else {
afaad83b
LP		 498 if (panel->start_transfer)
499 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 500 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
ef61aae4 501 }
8564557a
MD		 502}
503
504static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
505{
506 struct fb_deferred_io *fbdefio = info->fbdefio;
507
508 if (fbdefio)
509 schedule_delayed_work(&info->deferred_work, fbdefio->delay);
510}
511
37c5dcc2
LP		 512static void sh_mobile_lcdc_display_on(struct sh_mobile_lcdc_chan *ch)
513{
b5ef967d 514 const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg;
37c5dcc2 515
9a2985e7 516 if (ch->tx_dev) {
458981c3
LP		 517 int ret;
518
519 ret = ch->tx_dev->ops->display_on(ch->tx_dev);
520 if (ret < 0)
9a2985e7 521 return;
458981c3
LP		 522
523 if (ret == SH_MOBILE_LCDC_DISPLAY_DISCONNECTED)
524 ch->info->state = FBINFO_STATE_SUSPENDED;
9a2985e7
LP		 525 }
526
37c5dcc2 527 /* HDMI must be enabled before LCDC configuration */
afaad83b
LP		 528 if (panel->display_on)
529 panel->display_on();
37c5dcc2
LP		 530}
531
532static void sh_mobile_lcdc_display_off(struct sh_mobile_lcdc_chan *ch)
533{
b5ef967d 534 const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg;
37c5dcc2 535
afaad83b
LP		 536 if (panel->display_off)
537 panel->display_off();
9a2985e7
LP		 538
539 if (ch->tx_dev)
540 ch->tx_dev->ops->display_off(ch->tx_dev);
37c5dcc2
LP		 541}
542
ecd29947
LP		 543static bool
544sh_mobile_lcdc_must_reconfigure(struct sh_mobile_lcdc_chan *ch,
e0c8601a 545 const struct fb_videomode *new_mode)
ecd29947 546{
ecd29947 547 dev_dbg(ch->info->dev, "Old %ux%u, new %ux%u\n",
2d04559d
LP		 548 ch->display.mode.xres, ch->display.mode.yres,
549 new_mode->xres, new_mode->yres);
ecd29947 550
e0c8601a 551 /* It can be a different monitor with an equal video-mode */
2d04559d 552 if (fb_mode_is_equal(&ch->display.mode, new_mode))
ecd29947 553 return false;
ecd29947
LP		 554
555 dev_dbg(ch->info->dev, "Switching %u -> %u lines\n",
2d04559d
LP		 556 ch->display.mode.yres, new_mode->yres);
557 ch->display.mode = *new_mode;
ecd29947
LP		 558
559 return true;
560}
561
d7ad3342
LP		 562static int sh_mobile_lcdc_check_var(struct fb_var_screeninfo *var,
563 struct fb_info *info);
ecd29947
LP		 564
565static int sh_mobile_lcdc_display_notify(struct sh_mobile_lcdc_chan *ch,
566 enum sh_mobile_lcdc_entity_event event,
e0c8601a
LP		 567 const struct fb_videomode *mode,
568 const struct fb_monspecs *monspec)
ecd29947
LP		 569{
570 struct fb_info *info = ch->info;
e0c8601a 571 struct fb_var_screeninfo var;
ecd29947
LP		 572 int ret = 0;
573
574 switch (event) {
575 case SH_MOBILE_LCDC_EVENT_DISPLAY_CONNECT:
576 /* HDMI plug in */
577 if (lock_fb_info(info)) {
578 console_lock();
579
2d04559d
LP		 580 ch->display.width = monspec->max_x * 10;
581 ch->display.height = monspec->max_y * 10;
e0c8601a
LP		 582
583 if (!sh_mobile_lcdc_must_reconfigure(ch, mode) &&
ecd29947
LP		 584 info->state == FBINFO_STATE_RUNNING) {
585 /* First activation with the default monitor.
586 * Just turn on, if we run a resume here, the
587 * logo disappears.
588 */
e0c8601a
LP		 589 info->var.width = monspec->max_x * 10;
590 info->var.height = monspec->max_y * 10;
ecd29947
LP		 591 sh_mobile_lcdc_display_on(ch);
592 } else {
593 /* New monitor or have to wake up */
594 fb_set_suspend(info, 0);
595 }
596
597 console_unlock();
598 unlock_fb_info(info);
599 }
600 break;
601
602 case SH_MOBILE_LCDC_EVENT_DISPLAY_DISCONNECT:
603 /* HDMI disconnect */
604 if (lock_fb_info(info)) {
605 console_lock();
606 fb_set_suspend(info, 1);
607 console_unlock();
608 unlock_fb_info(info);
609 }
610 break;
611
612 case SH_MOBILE_LCDC_EVENT_DISPLAY_MODE:
613 /* Validate a proposed new mode */
e0c8601a
LP		 614 fb_videomode_to_var(&var, mode);
615 var.bits_per_pixel = info->var.bits_per_pixel;
616 var.grayscale = info->var.grayscale;
d7ad3342 617 ret = sh_mobile_lcdc_check_var(&var, info);
ecd29947
LP		 618 break;
619 }
620
621 return ret;
622}
623
f1f60b5f
LP		 624/* -----------------------------------------------------------------------------
625 * Format helpers
626 */
627
105784bb
LP		 628struct sh_mobile_lcdc_format_info {
629 u32 fourcc;
630 unsigned int bpp;
631 bool yuv;
632 u32 lddfr;
633};
634
635static const struct sh_mobile_lcdc_format_info sh_mobile_format_infos[] = {
636 {
637 .fourcc = V4L2_PIX_FMT_RGB565,
638 .bpp = 16,
639 .yuv = false,
640 .lddfr = LDDFR_PKF_RGB16,
641 }, {
642 .fourcc = V4L2_PIX_FMT_BGR24,
643 .bpp = 24,
644 .yuv = false,
645 .lddfr = LDDFR_PKF_RGB24,
646 }, {
647 .fourcc = V4L2_PIX_FMT_BGR32,
648 .bpp = 32,
649 .yuv = false,
650 .lddfr = LDDFR_PKF_ARGB32,
651 }, {
652 .fourcc = V4L2_PIX_FMT_NV12,
653 .bpp = 12,
654 .yuv = true,
655 .lddfr = LDDFR_CC | LDDFR_YF_420,
656 }, {
657 .fourcc = V4L2_PIX_FMT_NV21,
658 .bpp = 12,
659 .yuv = true,
660 .lddfr = LDDFR_CC | LDDFR_YF_420,
661 }, {
662 .fourcc = V4L2_PIX_FMT_NV16,
663 .bpp = 16,
664 .yuv = true,
665 .lddfr = LDDFR_CC | LDDFR_YF_422,
666 }, {
667 .fourcc = V4L2_PIX_FMT_NV61,
668 .bpp = 16,
669 .yuv = true,
670 .lddfr = LDDFR_CC | LDDFR_YF_422,
671 }, {
672 .fourcc = V4L2_PIX_FMT_NV24,
673 .bpp = 24,
674 .yuv = true,
675 .lddfr = LDDFR_CC | LDDFR_YF_444,
676 }, {
677 .fourcc = V4L2_PIX_FMT_NV42,
678 .bpp = 24,
679 .yuv = true,
680 .lddfr = LDDFR_CC | LDDFR_YF_444,
681 },
682};
683
684static const struct sh_mobile_lcdc_format_info *
685sh_mobile_format_info(u32 fourcc)
686{
687 unsigned int i;
688
689 for (i = 0; i < ARRAY_SIZE(sh_mobile_format_infos); ++i) {
690 if (sh_mobile_format_infos[i].fourcc == fourcc)
691 return &sh_mobile_format_infos[i];
692 }
693
694 return NULL;
695}
696
f1f60b5f
LP		 697static int sh_mobile_format_fourcc(const struct fb_var_screeninfo *var)
698{
699 if (var->grayscale > 1)
700 return var->grayscale;
701
702 switch (var->bits_per_pixel) {
703 case 16:
704 return V4L2_PIX_FMT_RGB565;
705 case 24:
706 return V4L2_PIX_FMT_BGR24;
707 case 32:
708 return V4L2_PIX_FMT_BGR32;
709 default:
710 return 0;
711 }
712}
713
714static int sh_mobile_format_is_fourcc(const struct fb_var_screeninfo *var)
715{
716 return var->grayscale > 1;
717}
718
f1f60b5f
LP		 719/* -----------------------------------------------------------------------------
720 * Start, stop and IRQ
721 */
722
8564557a
MD		 723static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
724{
725 struct sh_mobile_lcdc_priv *priv = data;
2feb075a 726 struct sh_mobile_lcdc_chan *ch;
9dd38819 727 unsigned long ldintr;
2feb075a
MD		 728 int is_sub;
729 int k;
8564557a 730
dc48665f
LP		 731 /* Acknowledge interrupts and disable further VSYNC End IRQs. */
732 ldintr = lcdc_read(priv, _LDINTR);
733 lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE);
8564557a 734
2feb075a 735 /* figure out if this interrupt is for main or sub lcd */
ce1c0b08 736 is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0;
2feb075a 737
9dd38819 738 /* wake up channel and disable clocks */
2feb075a
MD		 739 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
740 ch = &priv->ch[k];
741
742 if (!ch->enabled)
743 continue;
744
dc48665f 745 /* Frame End */
9dd38819
PE		 746 if (ldintr & LDINTR_FS) {
747 if (is_sub == lcdc_chan_is_sublcd(ch)) {
748 ch->frame_end = 1;
749 wake_up(&ch->frame_end_wait);
2feb075a 750
9dd38819
PE		 751 sh_mobile_lcdc_clk_off(priv);
752 }
753 }
754
755 /* VSYNC End */
40331b21
PE		 756 if (ldintr & LDINTR_VES)
757 complete(&ch->vsync_completion);
2feb075a
MD		 758 }
759
8564557a
MD		 760 return IRQ_HANDLED;
761}
762
d7ad3342 763static int sh_mobile_lcdc_wait_for_vsync(struct sh_mobile_lcdc_chan *ch)
4976677f
LP		 764{
765 unsigned long ldintr;
766 int ret;
767
768 /* Enable VSync End interrupt and be careful not to acknowledge any
769 * pending interrupt.
770 */
771 ldintr = lcdc_read(ch->lcdc, _LDINTR);
772 ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK;
773 lcdc_write(ch->lcdc, _LDINTR, ldintr);
774
775 ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
776 msecs_to_jiffies(100));
777 if (!ret)
778 return -ETIMEDOUT;
779
780 return 0;
781}
782
cfb4f5d1
MD		 783static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
784 int start)
785{
786 unsigned long tmp = lcdc_read(priv, _LDCNT2R);
787 int k;
788
789 /* start or stop the lcdc */
790 if (start)
ce1c0b08 791 lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO);
cfb4f5d1 792 else
ce1c0b08 793 lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO);
cfb4f5d1
MD		 794
795 /* wait until power is applied/stopped on all channels */
796 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
797 if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
798 while (1) {
ce1c0b08
LP		 799 tmp = lcdc_read_chan(&priv->ch[k], LDPMR)
800 & LDPMR_LPS;
801 if (start && tmp == LDPMR_LPS)
cfb4f5d1
MD		 802 break;
803 if (!start && tmp == 0)
804 break;
805 cpu_relax();
806 }
807
808 if (!start)
809 lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
810}
811
6011bdea
GL		 812static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
813{
2d04559d
LP		 814 const struct fb_var_screeninfo *var = &ch->info->var;
815 const struct fb_videomode *mode = &ch->display.mode;
1c120deb 816 unsigned long h_total, hsync_pos, display_h_total;
6011bdea
GL		 817 u32 tmp;
818
819 tmp = ch->ldmt1r_value;
ce1c0b08
LP		 820 tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL;
821 tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL;
b5ef967d
LP		 822 tmp |= (ch->cfg->flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0;
823 tmp |= (ch->cfg->flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0;
824 tmp |= (ch->cfg->flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0;
825 tmp |= (ch->cfg->flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0;
826 tmp |= (ch->cfg->flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0;
6011bdea
GL		 827 lcdc_write_chan(ch, LDMT1R, tmp);
828
829 /* setup SYS bus */
b5ef967d
LP		 830 lcdc_write_chan(ch, LDMT2R, ch->cfg->sys_bus_cfg.ldmt2r);
831 lcdc_write_chan(ch, LDMT3R, ch->cfg->sys_bus_cfg.ldmt3r);
6011bdea
GL		 832
833 /* horizontal configuration */
2d04559d
LP		 834 h_total = mode->xres + mode->hsync_len + mode->left_margin
835 + mode->right_margin;
6011bdea 836 tmp = h_total / 8; /* HTCN */
58f03d99 837 tmp |= (min(mode->xres, ch->xres) / 8) << 16; /* HDCN */
6011bdea
GL		 838 lcdc_write_chan(ch, LDHCNR, tmp);
839
2d04559d 840 hsync_pos = mode->xres + mode->right_margin;
6011bdea 841 tmp = hsync_pos / 8; /* HSYNP */
2d04559d 842 tmp |= (mode->hsync_len / 8) << 16; /* HSYNW */
6011bdea
GL		 843 lcdc_write_chan(ch, LDHSYNR, tmp);
844
845 /* vertical configuration */
2d04559d
LP		 846 tmp = mode->yres + mode->vsync_len + mode->upper_margin
847 + mode->lower_margin; /* VTLN */
58f03d99 848 tmp |= min(mode->yres, ch->yres) << 16; /* VDLN */
6011bdea
GL		 849 lcdc_write_chan(ch, LDVLNR, tmp);
850
2d04559d
LP		 851 tmp = mode->yres + mode->lower_margin; /* VSYNP */
852 tmp |= mode->vsync_len << 16; /* VSYNW */
6011bdea
GL		 853 lcdc_write_chan(ch, LDVSYNR, tmp);
854
855 /* Adjust horizontal synchronisation for HDMI */
2d04559d
LP		 856 display_h_total = mode->xres + mode->hsync_len + mode->left_margin
857 + mode->right_margin;
858 tmp = ((mode->xres & 7) << 24) | ((display_h_total & 7) << 16)
859 | ((mode->hsync_len & 7) << 8) | (hsync_pos & 7);
6011bdea
GL		 860 lcdc_write_chan(ch, LDHAJR, tmp);
861}
862
c5deac3c
LP		 863static void sh_mobile_lcdc_overlay_setup(struct sh_mobile_lcdc_overlay *ovl)
864{
865 u32 format = 0;
866
867 if (!ovl->enabled) {
868 lcdc_write(ovl->channel->lcdc, LDBCR, LDBCR_UPC(ovl->index));
869 lcdc_write_overlay(ovl, LDBnBSIFR(ovl->index), 0);
870 lcdc_write(ovl->channel->lcdc, LDBCR,
871 LDBCR_UPF(ovl->index) | LDBCR_UPD(ovl->index));
872 return;
873 }
874
875 ovl->base_addr_y = ovl->dma_handle;
876 ovl->base_addr_c = ovl->base_addr_y + ovl->xres
877 * ovl->yres_virtual;
878
879 switch (ovl->mode) {
880 case LCDC_OVERLAY_BLEND:
881 format = LDBBSIFR_EN | (ovl->alpha << LDBBSIFR_LAY_SHIFT);
882 break;
883
884 case LCDC_OVERLAY_ROP3:
885 format = LDBBSIFR_EN | LDBBSIFR_BRSEL
886 | (ovl->rop3 << LDBBSIFR_ROP3_SHIFT);
887 break;
888 }
889
890 switch (ovl->format->fourcc) {
891 case V4L2_PIX_FMT_RGB565:
892 case V4L2_PIX_FMT_NV21:
893 case V4L2_PIX_FMT_NV61:
894 case V4L2_PIX_FMT_NV42:
895 format |= LDBBSIFR_SWPL | LDBBSIFR_SWPW;
896 break;
897 case V4L2_PIX_FMT_BGR24:
898 case V4L2_PIX_FMT_NV12:
899 case V4L2_PIX_FMT_NV16:
900 case V4L2_PIX_FMT_NV24:
901 format |= LDBBSIFR_SWPL | LDBBSIFR_SWPW | LDBBSIFR_SWPB;
902 break;
903 case V4L2_PIX_FMT_BGR32:
904 default:
905 format |= LDBBSIFR_SWPL;
906 break;
907 }
908
909 switch (ovl->format->fourcc) {
910 case V4L2_PIX_FMT_RGB565:
911 format |= LDBBSIFR_AL_1 | LDBBSIFR_RY | LDBBSIFR_RPKF_RGB16;
912 break;
913 case V4L2_PIX_FMT_BGR24:
914 format |= LDBBSIFR_AL_1 | LDBBSIFR_RY | LDBBSIFR_RPKF_RGB24;
915 break;
916 case V4L2_PIX_FMT_BGR32:
917 format |= LDBBSIFR_AL_PK | LDBBSIFR_RY | LDDFR_PKF_ARGB32;
918 break;
919 case V4L2_PIX_FMT_NV12:
920 case V4L2_PIX_FMT_NV21:
921 format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_420;
922 break;
923 case V4L2_PIX_FMT_NV16:
924 case V4L2_PIX_FMT_NV61:
925 format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_422;
926 break;
927 case V4L2_PIX_FMT_NV24:
928 case V4L2_PIX_FMT_NV42:
929 format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_444;
930 break;
931 }
932
933 lcdc_write(ovl->channel->lcdc, LDBCR, LDBCR_UPC(ovl->index));
934
935 lcdc_write_overlay(ovl, LDBnBSIFR(ovl->index), format);
936
937 lcdc_write_overlay(ovl, LDBnBSSZR(ovl->index),
938 (ovl->yres << LDBBSSZR_BVSS_SHIFT) |
939 (ovl->xres << LDBBSSZR_BHSS_SHIFT));
940 lcdc_write_overlay(ovl, LDBnBLOCR(ovl->index),
941 (ovl->pos_y << LDBBLOCR_CVLC_SHIFT) |
942 (ovl->pos_x << LDBBLOCR_CHLC_SHIFT));
943 lcdc_write_overlay(ovl, LDBnBSMWR(ovl->index),
944 ovl->pitch << LDBBSMWR_BSMW_SHIFT);
945
946 lcdc_write_overlay(ovl, LDBnBSAYR(ovl->index), ovl->base_addr_y);
947 lcdc_write_overlay(ovl, LDBnBSACR(ovl->index), ovl->base_addr_c);
948
949 lcdc_write(ovl->channel->lcdc, LDBCR,
950 LDBCR_UPF(ovl->index) | LDBCR_UPD(ovl->index));
951}
952
9a217e34 953/*
d7ad3342 954 * __sh_mobile_lcdc_start - Configure and start the LCDC
9a217e34
LP		 955 * @priv: LCDC device
956 *
957 * Configure all enabled channels and start the LCDC device. All external
958 * devices (clocks, MERAM, panels, ...) are not touched by this function.
959 */
960static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1
MD		 961{
962 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1 963 unsigned long tmp;
9a217e34 964 int k, m;
8564557a 965
9a217e34
LP		 966 /* Enable LCDC channels. Read data from external memory, avoid using the
967 * BEU for now.
968 */
969 lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled);
cfb4f5d1 970
9a217e34 971 /* Stop the LCDC first and disable all interrupts. */
cfb4f5d1 972 sh_mobile_lcdc_start_stop(priv, 0);
9a217e34 973 lcdc_write(priv, _LDINTR, 0);
cfb4f5d1 974
9a217e34 975 /* Configure power supply, dot clocks and start them. */
cfb4f5d1
MD		 976 tmp = priv->lddckr;
977 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
978 ch = &priv->ch[k];
9a217e34 979 if (!ch->enabled)
cfb4f5d1
MD		 980 continue;
981
9a217e34
LP		 982 /* Power supply */
983 lcdc_write_chan(ch, LDPMR, 0);
984
b5ef967d 985 m = ch->cfg->clock_divider;
cfb4f5d1
MD		 986 if (!m)
987 continue;
988
505c7de5
LP		 989 /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
990 * denominator.
991 */
992 lcdc_write_chan(ch, LDDCKPAT1R, 0);
993 lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
994
cfb4f5d1 995 if (m == 1)
ce1c0b08 996 m = LDDCKR_MOSEL;
cfb4f5d1 997 tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
cfb4f5d1
MD		 998 }
999
1000 lcdc_write(priv, _LDDCKR, tmp);
cfb4f5d1
MD		 1001 lcdc_write(priv, _LDDCKSTPR, 0);
1002 lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
1003
9a217e34 1004 /* Setup geometry, format, frame buffer memory and operation mode. */
cfb4f5d1
MD		 1005 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
1006 ch = &priv->ch[k];
cfb4f5d1
MD		 1007 if (!ch->enabled)
1008 continue;
1009
6011bdea 1010 sh_mobile_lcdc_geometry(ch);
cfb4f5d1 1011
fc9e78e6 1012 tmp = ch->format->lddfr;
edd153a3 1013
fc9e78e6 1014 if (ch->format->yuv) {
58f03d99 1015 switch (ch->colorspace) {
edd153a3
LP		 1016 case V4L2_COLORSPACE_REC709:
1017 tmp |= LDDFR_CF1;
53b50314 1018 break;
edd153a3
LP		 1019 case V4L2_COLORSPACE_JPEG:
1020 tmp |= LDDFR_CF0;
53b50314
DHG		 1021 break;
1022 }
417d4827 1023 }
7caa4342 1024
9a217e34 1025 lcdc_write_chan(ch, LDDFR, tmp);
72c04af9 1026 lcdc_write_chan(ch, LDMLSR, ch->line_size);
9a217e34 1027 lcdc_write_chan(ch, LDSA1R, ch->base_addr_y);
fc9e78e6 1028 if (ch->format->yuv)
9a217e34 1029 lcdc_write_chan(ch, LDSA2R, ch->base_addr_c);
7caa4342 1030
9a217e34
LP		 1031 /* When using deferred I/O mode, configure the LCDC for one-shot
1032 * operation and enable the frame end interrupt. Otherwise use
1033 * continuous read mode.
1034 */
1035 if (ch->ldmt1r_value & LDMT1R_IFM &&
b5ef967d 1036 ch->cfg->sys_bus_cfg.deferred_io_msec) {
9a217e34
LP		 1037 lcdc_write_chan(ch, LDSM1R, LDSM1R_OS);
1038 lcdc_write(priv, _LDINTR, LDINTR_FE);
1039 } else {
1040 lcdc_write_chan(ch, LDSM1R, 0);
1041 }
1042 }
7caa4342 1043
9a217e34 1044 /* Word and long word swap. */
fc9e78e6 1045 switch (priv->ch[0].format->fourcc) {
edd153a3
LP		 1046 case V4L2_PIX_FMT_RGB565:
1047 case V4L2_PIX_FMT_NV21:
1048 case V4L2_PIX_FMT_NV61:
1049 case V4L2_PIX_FMT_NV42:
1050 tmp = LDDDSR_LS | LDDDSR_WS;
1051 break;
1052 case V4L2_PIX_FMT_BGR24:
1053 case V4L2_PIX_FMT_NV12:
1054 case V4L2_PIX_FMT_NV16:
1055 case V4L2_PIX_FMT_NV24:
9a217e34 1056 tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
edd153a3
LP		 1057 break;
1058 case V4L2_PIX_FMT_BGR32:
1059 default:
1060 tmp = LDDDSR_LS;
1061 break;
9a217e34
LP		 1062 }
1063 lcdc_write(priv, _LDDDSR, tmp);
7caa4342 1064
9a217e34
LP		 1065 /* Enable the display output. */
1066 lcdc_write(priv, _LDCNT1R, LDCNT1R_DE);
1067 sh_mobile_lcdc_start_stop(priv, 1);
1068 priv->started = 1;
1069}
cfb4f5d1 1070
9a217e34
LP		 1071static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
1072{
1073 struct sh_mobile_meram_info *mdev = priv->meram_dev;
9a217e34
LP		 1074 struct sh_mobile_lcdc_chan *ch;
1075 unsigned long tmp;
1076 int ret;
1077 int k;
cfb4f5d1 1078
9a217e34
LP		 1079 /* enable clocks before accessing the hardware */
1080 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
1081 if (priv->ch[k].enabled)
1082 sh_mobile_lcdc_clk_on(priv);
1083 }
8564557a 1084
9a217e34
LP		 1085 /* reset */
1086 lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR);
1087 lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0);
8564557a 1088
9a217e34 1089 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
b5ef967d 1090 const struct sh_mobile_lcdc_panel_cfg *panel;
8564557a 1091
37c5dcc2 1092 ch = &priv->ch[k];
9a217e34
LP		 1093 if (!ch->enabled)
1094 continue;
1095
b5ef967d 1096 panel = &ch->cfg->panel_cfg;
afaad83b
LP		 1097 if (panel->setup_sys) {
1098 ret = panel->setup_sys(ch, &sh_mobile_lcdc_sys_bus_ops);
9a217e34
LP		 1099 if (ret)
1100 return ret;
8564557a 1101 }
cfb4f5d1
MD		 1102 }
1103
9a217e34
LP		 1104 /* Compute frame buffer base address and pitch for each channel. */
1105 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
9a217e34 1106 int pixelformat;
4a237177 1107 void *cache;
cfb4f5d1 1108
9a217e34
LP		 1109 ch = &priv->ch[k];
1110 if (!ch->enabled)
1111 continue;
cfb4f5d1 1112
58f03d99
LP		 1113 ch->base_addr_y = ch->dma_handle;
1114 ch->base_addr_c = ch->base_addr_y + ch->xres * ch->yres_virtual;
72c04af9 1115 ch->line_size = ch->pitch;
9a217e34
LP		 1116
1117 /* Enable MERAM if possible. */
b5ef967d
LP		 1118 if (mdev == NULL || mdev->ops == NULL ||
1119 ch->cfg->meram_cfg == NULL)
9a217e34
LP		 1120 continue;
1121
4a237177
LP		 1122 /* Free the allocated MERAM cache. */
1123 if (ch->cache) {
1124 mdev->ops->cache_free(mdev, ch->cache);
1125 ch->cache = NULL;
9a217e34
LP		 1126 }
1127
fc9e78e6 1128 switch (ch->format->fourcc) {
edd153a3
LP		 1129 case V4L2_PIX_FMT_NV12:
1130 case V4L2_PIX_FMT_NV21:
1131 case V4L2_PIX_FMT_NV16:
1132 case V4L2_PIX_FMT_NV61:
9a217e34 1133 pixelformat = SH_MOBILE_MERAM_PF_NV;
edd153a3
LP		 1134 break;
1135 case V4L2_PIX_FMT_NV24:
1136 case V4L2_PIX_FMT_NV42:
1137 pixelformat = SH_MOBILE_MERAM_PF_NV24;
1138 break;
1139 case V4L2_PIX_FMT_RGB565:
1140 case V4L2_PIX_FMT_BGR24:
1141 case V4L2_PIX_FMT_BGR32:
1142 default:
1143 pixelformat = SH_MOBILE_MERAM_PF_RGB;
1144 break;
1145 }
9a217e34 1146
4a237177 1147 cache = mdev->ops->cache_alloc(mdev, ch->cfg->meram_cfg,
b5ef967d 1148 ch->pitch, ch->yres, pixelformat,
72c04af9 1149 &ch->line_size);
4a237177
LP		 1150 if (!IS_ERR(cache)) {
1151 mdev->ops->cache_update(mdev, cache,
97d16fe6
LP		 1152 ch->base_addr_y, ch->base_addr_c,
1153 &ch->base_addr_y, &ch->base_addr_c);
4a237177 1154 ch->cache = cache;
97d16fe6 1155 }
9a217e34
LP		 1156 }
1157
c5deac3c
LP		 1158 for (k = 0; k < ARRAY_SIZE(priv->overlays); ++k) {
1159 struct sh_mobile_lcdc_overlay *ovl = &priv->overlays[k];
1160 sh_mobile_lcdc_overlay_setup(ovl);
1161 }
1162
9a217e34
LP		 1163 /* Start the LCDC. */
1164 __sh_mobile_lcdc_start(priv);
1165
1166 /* Setup deferred I/O, tell the board code to enable the panels, and
1167 * turn backlight on.
1168 */
cfb4f5d1
MD		 1169 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
1170 ch = &priv->ch[k];
21bc1f02
MD		 1171 if (!ch->enabled)
1172 continue;
1173
b5ef967d 1174 tmp = ch->cfg->sys_bus_cfg.deferred_io_msec;
9a217e34
LP		 1175 if (ch->ldmt1r_value & LDMT1R_IFM && tmp) {
1176 ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
1177 ch->defio.delay = msecs_to_jiffies(tmp);
1178 ch->info->fbdefio = &ch->defio;
1179 fb_deferred_io_init(ch->info);
1180 }
1181
37c5dcc2 1182 sh_mobile_lcdc_display_on(ch);
3b0fd9d7
AC		 1183
1184 if (ch->bl) {
1185 ch->bl->props.power = FB_BLANK_UNBLANK;
1186 backlight_update_status(ch->bl);
1187 }
cfb4f5d1
MD		 1188 }
1189
1190 return 0;
1191}
1192
1193static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
1194{
1195 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1
MD		 1196 int k;
1197
2feb075a 1198 /* clean up deferred io and ask board code to disable panel */
cfb4f5d1
MD		 1199 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
1200 ch = &priv->ch[k];
21bc1f02
MD		 1201 if (!ch->enabled)
1202 continue;
8564557a 1203
2feb075a
MD		 1204 /* deferred io mode:
1205 * flush frame, and wait for frame end interrupt
1206 * clean up deferred io and enable clock
1207 */
5ef6b505 1208 if (ch->info && ch->info->fbdefio) {
2feb075a 1209 ch->frame_end = 0;
e33afddc 1210 schedule_delayed_work(&ch->info->deferred_work, 0);
2feb075a 1211 wait_event(ch->frame_end_wait, ch->frame_end);
e33afddc
PM		 1212 fb_deferred_io_cleanup(ch->info);
1213 ch->info->fbdefio = NULL;
2feb075a 1214 sh_mobile_lcdc_clk_on(priv);
8564557a 1215 }
2feb075a 1216
3b0fd9d7
AC		 1217 if (ch->bl) {
1218 ch->bl->props.power = FB_BLANK_POWERDOWN;
1219 backlight_update_status(ch->bl);
1220 }
1221
37c5dcc2 1222 sh_mobile_lcdc_display_off(ch);
7caa4342 1223
4a237177
LP		 1224 /* Free the MERAM cache. */
1225 if (ch->cache) {
7caa4342 1226 struct sh_mobile_meram_info *mdev;
7caa4342 1227 mdev = priv->meram_dev;
4a237177
LP		 1228 mdev->ops->cache_free(mdev, ch->cache);
1229 ch->cache = 0;
7caa4342
DHG		 1230 }
1231
cfb4f5d1
MD		 1232 }
1233
1234 /* stop the lcdc */
8e9bb19e
MD		 1235 if (priv->started) {
1236 sh_mobile_lcdc_start_stop(priv, 0);
1237 priv->started = 0;
1238 }
b51339ff 1239
8564557a
MD		 1240 /* stop clocks */
1241 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
1242 if (priv->ch[k].enabled)
1243 sh_mobile_lcdc_clk_off(priv);
cfb4f5d1
MD		 1244}
1245
c5deac3c
LP		 1246static int __sh_mobile_lcdc_check_var(struct fb_var_screeninfo *var,
1247 struct fb_info *info)
1248{
1249 if (var->xres > MAX_XRES || var->yres > MAX_YRES)
1250 return -EINVAL;
1251
1252 /* Make sure the virtual resolution is at least as big as the visible
1253 * resolution.
1254 */
1255 if (var->xres_virtual < var->xres)
1256 var->xres_virtual = var->xres;
1257 if (var->yres_virtual < var->yres)
1258 var->yres_virtual = var->yres;
1259
1260 if (sh_mobile_format_is_fourcc(var)) {
1261 const struct sh_mobile_lcdc_format_info *format;
1262
1263 format = sh_mobile_format_info(var->grayscale);
1264 if (format == NULL)
1265 return -EINVAL;
1266 var->bits_per_pixel = format->bpp;
1267
1268 /* Default to RGB and JPEG color-spaces for RGB and YUV formats
1269 * respectively.
1270 */
1271 if (!format->yuv)
1272 var->colorspace = V4L2_COLORSPACE_SRGB;
1273 else if (var->colorspace != V4L2_COLORSPACE_REC709)
1274 var->colorspace = V4L2_COLORSPACE_JPEG;
1275 } else {
1276 if (var->bits_per_pixel <= 16) { /* RGB 565 */
1277 var->bits_per_pixel = 16;
1278 var->red.offset = 11;
1279 var->red.length = 5;
1280 var->green.offset = 5;
1281 var->green.length = 6;
1282 var->blue.offset = 0;
1283 var->blue.length = 5;
1284 var->transp.offset = 0;
1285 var->transp.length = 0;
1286 } else if (var->bits_per_pixel <= 24) { /* RGB 888 */
1287 var->bits_per_pixel = 24;
1288 var->red.offset = 16;
1289 var->red.length = 8;
1290 var->green.offset = 8;
1291 var->green.length = 8;
1292 var->blue.offset = 0;
1293 var->blue.length = 8;
1294 var->transp.offset = 0;
1295 var->transp.length = 0;
1296 } else if (var->bits_per_pixel <= 32) { /* RGBA 888 */
1297 var->bits_per_pixel = 32;
1298 var->red.offset = 16;
1299 var->red.length = 8;
1300 var->green.offset = 8;
1301 var->green.length = 8;
1302 var->blue.offset = 0;
1303 var->blue.length = 8;
1304 var->transp.offset = 24;
1305 var->transp.length = 8;
1306 } else
1307 return -EINVAL;
1308
1309 var->red.msb_right = 0;
1310 var->green.msb_right = 0;
1311 var->blue.msb_right = 0;
1312 var->transp.msb_right = 0;
1313 }
1314
1315 /* Make sure we don't exceed our allocated memory. */
1316 if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
1317 info->fix.smem_len)
1318 return -EINVAL;
1319
1320 return 0;
1321}
1322
1323/* -----------------------------------------------------------------------------
1324 * Frame buffer operations - Overlays
1325 */
1326
1327static ssize_t
1328overlay_alpha_show(struct device *dev, struct device_attribute *attr, char *buf)
1329{
1330 struct fb_info *info = dev_get_drvdata(dev);
1331 struct sh_mobile_lcdc_overlay *ovl = info->par;
1332
1333 return scnprintf(buf, PAGE_SIZE, "%u\n", ovl->alpha);
1334}
1335
1336static ssize_t
1337overlay_alpha_store(struct device *dev, struct device_attribute *attr,
1338 const char *buf, size_t count)
1339{
1340 struct fb_info *info = dev_get_drvdata(dev);
1341 struct sh_mobile_lcdc_overlay *ovl = info->par;
1342 unsigned int alpha;
1343 char *endp;
1344
1345 alpha = simple_strtoul(buf, &endp, 10);
1346 if (isspace(*endp))
1347 endp++;
1348
1349 if (endp - buf != count)
1350 return -EINVAL;
1351
1352 if (alpha > 255)
1353 return -EINVAL;
1354
1355 if (ovl->alpha != alpha) {
1356 ovl->alpha = alpha;
1357
1358 if (ovl->mode == LCDC_OVERLAY_BLEND && ovl->enabled)
1359 sh_mobile_lcdc_overlay_setup(ovl);
1360 }
1361
1362 return count;
1363}
1364
1365static ssize_t
1366overlay_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
1367{
1368 struct fb_info *info = dev_get_drvdata(dev);
1369 struct sh_mobile_lcdc_overlay *ovl = info->par;
1370
1371 return scnprintf(buf, PAGE_SIZE, "%u\n", ovl->mode);
1372}
1373
1374static ssize_t
1375overlay_mode_store(struct device *dev, struct device_attribute *attr,
1376 const char *buf, size_t count)
1377{
1378 struct fb_info *info = dev_get_drvdata(dev);
1379 struct sh_mobile_lcdc_overlay *ovl = info->par;
1380 unsigned int mode;
1381 char *endp;
1382
1383 mode = simple_strtoul(buf, &endp, 10);
1384 if (isspace(*endp))
1385 endp++;
1386
1387 if (endp - buf != count)
1388 return -EINVAL;
1389
1390 if (mode != LCDC_OVERLAY_BLEND && mode != LCDC_OVERLAY_ROP3)
1391 return -EINVAL;
1392
1393 if (ovl->mode != mode) {
1394 ovl->mode = mode;
1395
1396 if (ovl->enabled)
1397 sh_mobile_lcdc_overlay_setup(ovl);
1398 }
1399
1400 return count;
1401}
1402
1403static ssize_t
1404overlay_position_show(struct device *dev, struct device_attribute *attr,
1405 char *buf)
1406{
1407 struct fb_info *info = dev_get_drvdata(dev);
1408 struct sh_mobile_lcdc_overlay *ovl = info->par;
1409
1410 return scnprintf(buf, PAGE_SIZE, "%d,%d\n", ovl->pos_x, ovl->pos_y);
1411}
1412
1413static ssize_t
1414overlay_position_store(struct device *dev, struct device_attribute *attr,
1415 const char *buf, size_t count)
1416{
1417 struct fb_info *info = dev_get_drvdata(dev);
1418 struct sh_mobile_lcdc_overlay *ovl = info->par;
1419 char *endp;
1420 int pos_x;
1421 int pos_y;
1422
1423 pos_x = simple_strtol(buf, &endp, 10);
1424 if (*endp != ',')
1425 return -EINVAL;
1426
1427 pos_y = simple_strtol(endp + 1, &endp, 10);
1428 if (isspace(*endp))
1429 endp++;
1430
1431 if (endp - buf != count)
1432 return -EINVAL;
1433
1434 if (ovl->pos_x != pos_x || ovl->pos_y != pos_y) {
1435 ovl->pos_x = pos_x;
1436 ovl->pos_y = pos_y;
1437
1438 if (ovl->enabled)
1439 sh_mobile_lcdc_overlay_setup(ovl);
1440 }
1441
1442 return count;
1443}
1444
1445static ssize_t
1446overlay_rop3_show(struct device *dev, struct device_attribute *attr, char *buf)
1447{
1448 struct fb_info *info = dev_get_drvdata(dev);
1449 struct sh_mobile_lcdc_overlay *ovl = info->par;
1450
1451 return scnprintf(buf, PAGE_SIZE, "%u\n", ovl->rop3);
1452}
1453
1454static ssize_t
1455overlay_rop3_store(struct device *dev, struct device_attribute *attr,
1456 const char *buf, size_t count)
1457{
1458 struct fb_info *info = dev_get_drvdata(dev);
1459 struct sh_mobile_lcdc_overlay *ovl = info->par;
1460 unsigned int rop3;
1461 char *endp;
1462
1463 rop3 = !!simple_strtoul(buf, &endp, 10);
1464 if (isspace(*endp))
1465 endp++;
1466
1467 if (endp - buf != count)
1468 return -EINVAL;
1469
1470 if (rop3 > 255)
1471 return -EINVAL;
1472
1473 if (ovl->rop3 != rop3) {
1474 ovl->rop3 = rop3;
1475
1476 if (ovl->mode == LCDC_OVERLAY_ROP3 && ovl->enabled)
1477 sh_mobile_lcdc_overlay_setup(ovl);
1478 }
1479
1480 return count;
1481}
1482
1483static const struct device_attribute overlay_sysfs_attrs[] = {
1484 __ATTR(ovl_alpha, S_IRUGO|S_IWUSR,
1485 overlay_alpha_show, overlay_alpha_store),
1486 __ATTR(ovl_mode, S_IRUGO|S_IWUSR,
1487 overlay_mode_show, overlay_mode_store),
1488 __ATTR(ovl_position, S_IRUGO|S_IWUSR,
1489 overlay_position_show, overlay_position_store),
1490 __ATTR(ovl_rop3, S_IRUGO|S_IWUSR,
1491 overlay_rop3_show, overlay_rop3_store),
1492};
1493
1494static const struct fb_fix_screeninfo sh_mobile_lcdc_overlay_fix = {
1495 .id = "SH Mobile LCDC",
1496 .type = FB_TYPE_PACKED_PIXELS,
1497 .visual = FB_VISUAL_TRUECOLOR,
1498 .accel = FB_ACCEL_NONE,
1499 .xpanstep = 0,
1500 .ypanstep = 1,
1501 .ywrapstep = 0,
1502 .capabilities = FB_CAP_FOURCC,
1503};
1504
1505static int sh_mobile_lcdc_overlay_pan(struct fb_var_screeninfo *var,
1506 struct fb_info *info)
1507{
1508 struct sh_mobile_lcdc_overlay *ovl = info->par;
1509 unsigned long base_addr_y;
1510 unsigned long base_addr_c;
1511 unsigned long pan_offset;
1512 unsigned long c_offset;
1513
1514 if (!ovl->format->yuv)
1515 pan_offset = var->yoffset * ovl->pitch
1516 + var->xoffset * (ovl->format->bpp / 8);
1517 else
1518 pan_offset = var->yoffset * ovl->pitch + var->xoffset;
1519
1520 if (pan_offset == ovl->pan_offset)
1521 return 0; /* No change, do nothing */
1522
1523 /* Set the source address for the next refresh */
1524 base_addr_y = ovl->dma_handle + pan_offset;
1525
1526 ovl->base_addr_y = base_addr_y;
1527 ovl->base_addr_c = base_addr_y;
1528
1529 if (ovl->format->yuv) {
1530 /* Set Y offset */
1531 c_offset = var->yoffset * ovl->pitch
1532 * (ovl->format->bpp - 8) / 8;
1533 base_addr_c = ovl->dma_handle
1534 + ovl->xres * ovl->yres_virtual
1535 + c_offset;
1536 /* Set X offset */
1537 if (ovl->format->fourcc == V4L2_PIX_FMT_NV24)
1538 base_addr_c += 2 * var->xoffset;
1539 else
1540 base_addr_c += var->xoffset;
1541
1542 ovl->base_addr_c = base_addr_c;
1543 }
1544
1545 lcdc_write_overlay(ovl, LDBnBSAYR(ovl->index), ovl->base_addr_y);
1546 lcdc_write_overlay(ovl, LDBnBSACR(ovl->index), ovl->base_addr_c);
1547
1548 ovl->pan_offset = pan_offset;
1549
1550 return 0;
1551}
1552
1553static int sh_mobile_lcdc_overlay_ioctl(struct fb_info *info, unsigned int cmd,
1554 unsigned long arg)
1555{
1556 struct sh_mobile_lcdc_overlay *ovl = info->par;
1557
1558 switch (cmd) {
1559 case FBIO_WAITFORVSYNC:
1560 return sh_mobile_lcdc_wait_for_vsync(ovl->channel);
1561
1562 default:
1563 return -ENOIOCTLCMD;
1564 }
1565}
1566
1567static int sh_mobile_lcdc_overlay_check_var(struct fb_var_screeninfo *var,
1568 struct fb_info *info)
1569{
1570 return __sh_mobile_lcdc_check_var(var, info);
1571}
1572
1573static int sh_mobile_lcdc_overlay_set_par(struct fb_info *info)
1574{
1575 struct sh_mobile_lcdc_overlay *ovl = info->par;
1576
1577 ovl->format =
1578 sh_mobile_format_info(sh_mobile_format_fourcc(&info->var));
1579
1580 ovl->xres = info->var.xres;
1581 ovl->xres_virtual = info->var.xres_virtual;
1582 ovl->yres = info->var.yres;
1583 ovl->yres_virtual = info->var.yres_virtual;
1584
1585 if (ovl->format->yuv)
1586 ovl->pitch = info->var.xres;
1587 else
1588 ovl->pitch = info->var.xres * ovl->format->bpp / 8;
1589
1590 sh_mobile_lcdc_overlay_setup(ovl);
1591
1592 info->fix.line_length = ovl->pitch;
1593
1594 if (sh_mobile_format_is_fourcc(&info->var)) {
1595 info->fix.type = FB_TYPE_FOURCC;
1596 info->fix.visual = FB_VISUAL_FOURCC;
1597 } else {
1598 info->fix.type = FB_TYPE_PACKED_PIXELS;
1599 info->fix.visual = FB_VISUAL_TRUECOLOR;
1600 }
1601
1602 return 0;
1603}
1604
1605/* Overlay blanking. Disable the overlay when blanked. */
1606static int sh_mobile_lcdc_overlay_blank(int blank, struct fb_info *info)
1607{
1608 struct sh_mobile_lcdc_overlay *ovl = info->par;
1609
1610 ovl->enabled = !blank;
1611 sh_mobile_lcdc_overlay_setup(ovl);
1612
1613 /* Prevent the backlight from receiving a blanking event by returning
1614 * a non-zero value.
1615 */
1616 return 1;
1617}
1618
1619static struct fb_ops sh_mobile_lcdc_overlay_ops = {
1620 .owner = THIS_MODULE,
1621 .fb_read = fb_sys_read,
1622 .fb_write = fb_sys_write,
1623 .fb_fillrect = sys_fillrect,
1624 .fb_copyarea = sys_copyarea,
1625 .fb_imageblit = sys_imageblit,
1626 .fb_blank = sh_mobile_lcdc_overlay_blank,
1627 .fb_pan_display = sh_mobile_lcdc_overlay_pan,
1628 .fb_ioctl = sh_mobile_lcdc_overlay_ioctl,
1629 .fb_check_var = sh_mobile_lcdc_overlay_check_var,
1630 .fb_set_par = sh_mobile_lcdc_overlay_set_par,
1631};
1632
1633static void
1634sh_mobile_lcdc_overlay_fb_unregister(struct sh_mobile_lcdc_overlay *ovl)
1635{
1636 struct fb_info *info = ovl->info;
1637
1638 if (info == NULL || info->dev == NULL)
1639 return;
1640
1641 unregister_framebuffer(ovl->info);
1642}
1643
1644static int __devinit
1645sh_mobile_lcdc_overlay_fb_register(struct sh_mobile_lcdc_overlay *ovl)
1646{
1647 struct sh_mobile_lcdc_priv *lcdc = ovl->channel->lcdc;
1648 struct fb_info *info = ovl->info;
1649 unsigned int i;
1650 int ret;
1651
1652 if (info == NULL)
1653 return 0;
1654
1655 ret = register_framebuffer(info);
1656 if (ret < 0)
1657 return ret;
1658
1659 dev_info(lcdc->dev, "registered %s/overlay %u as %dx%d %dbpp.\n",
1660 dev_name(lcdc->dev), ovl->index, info->var.xres,
1661 info->var.yres, info->var.bits_per_pixel);
1662
1663 for (i = 0; i < ARRAY_SIZE(overlay_sysfs_attrs); ++i) {
1664 ret = device_create_file(info->dev, &overlay_sysfs_attrs[i]);
1665 if (ret < 0)
1666 return ret;
1667 }
1668
1669 return 0;
1670}
1671
1672static void
1673sh_mobile_lcdc_overlay_fb_cleanup(struct sh_mobile_lcdc_overlay *ovl)
1674{
1675 struct fb_info *info = ovl->info;
1676
1677 if (info == NULL || info->device == NULL)
1678 return;
1679
1680 framebuffer_release(info);
1681}
1682
1683static int __devinit
1684sh_mobile_lcdc_overlay_fb_init(struct sh_mobile_lcdc_overlay *ovl)
1685{
1686 struct sh_mobile_lcdc_priv *priv = ovl->channel->lcdc;
1687 struct fb_var_screeninfo *var;
1688 struct fb_info *info;
1689
1690 /* Allocate and initialize the frame buffer device. */
1691 info = framebuffer_alloc(0, priv->dev);
1692 if (info == NULL) {
1693 dev_err(priv->dev, "unable to allocate fb_info\n");
1694 return -ENOMEM;
1695 }
1696
1697 ovl->info = info;
1698
1699 info->flags = FBINFO_FLAG_DEFAULT;
1700 info->fbops = &sh_mobile_lcdc_overlay_ops;
1701 info->device = priv->dev;
1702 info->screen_base = ovl->fb_mem;
1703 info->par = ovl;
1704
1705 /* Initialize fixed screen information. Restrict pan to 2 lines steps
1706 * for NV12 and NV21.
1707 */
1708 info->fix = sh_mobile_lcdc_overlay_fix;
1709 snprintf(info->fix.id, sizeof(info->fix.id),
1710 "SH Mobile LCDC Overlay %u", ovl->index);
1711 info->fix.smem_start = ovl->dma_handle;
1712 info->fix.smem_len = ovl->fb_size;
1713 info->fix.line_length = ovl->pitch;
1714
1715 if (ovl->format->yuv)
1716 info->fix.visual = FB_VISUAL_FOURCC;
1717 else
1718 info->fix.visual = FB_VISUAL_TRUECOLOR;
1719
1720 if (ovl->format->fourcc == V4L2_PIX_FMT_NV12 ||
1721 ovl->format->fourcc == V4L2_PIX_FMT_NV21)
1722 info->fix.ypanstep = 2;
1723
1724 /* Initialize variable screen information. */
1725 var = &info->var;
1726 memset(var, 0, sizeof(*var));
1727 var->xres = ovl->xres;
1728 var->yres = ovl->yres;
1729 var->xres_virtual = ovl->xres_virtual;
1730 var->yres_virtual = ovl->yres_virtual;
1731 var->activate = FB_ACTIVATE_NOW;
1732
1733 /* Use the legacy API by default for RGB formats, and the FOURCC API
1734 * for YUV formats.
1735 */
1736 if (!ovl->format->yuv)
1737 var->bits_per_pixel = ovl->format->bpp;
1738 else
1739 var->grayscale = ovl->format->fourcc;
1740
1741 return sh_mobile_lcdc_overlay_check_var(var, info);
1742}
1743
f1f60b5f 1744/* -----------------------------------------------------------------------------
c5deac3c 1745 * Frame buffer operations - main frame buffer
f1f60b5f 1746 */
cfb4f5d1
MD		 1747
1748static int sh_mobile_lcdc_setcolreg(u_int regno,
1749 u_int red, u_int green, u_int blue,
1750 u_int transp, struct fb_info *info)
1751{
1752 u32 *palette = info->pseudo_palette;
1753
1754 if (regno >= PALETTE_NR)
1755 return -EINVAL;
1756
1757 /* only FB_VISUAL_TRUECOLOR supported */
1758
1759 red >>= 16 - info->var.red.length;
1760 green >>= 16 - info->var.green.length;
1761 blue >>= 16 - info->var.blue.length;
1762 transp >>= 16 - info->var.transp.length;
1763
1764 palette[regno] = (red << info->var.red.offset) |
1765 (green << info->var.green.offset) |
1766 (blue << info->var.blue.offset) |
1767 (transp << info->var.transp.offset);
1768
1769 return 0;
1770}
1771
3281e54c 1772static const struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
cfb4f5d1
MD		 1773 .id = "SH Mobile LCDC",
1774 .type = FB_TYPE_PACKED_PIXELS,
1775 .visual = FB_VISUAL_TRUECOLOR,
1776 .accel = FB_ACCEL_NONE,
9dd38819
PE		 1777 .xpanstep = 0,
1778 .ypanstep = 1,
1779 .ywrapstep = 0,
edd153a3 1780 .capabilities = FB_CAP_FOURCC,
cfb4f5d1
MD		 1781};
1782
8564557a
MD		 1783static void sh_mobile_lcdc_fillrect(struct fb_info *info,
1784 const struct fb_fillrect *rect)
1785{
1786 sys_fillrect(info, rect);
1787 sh_mobile_lcdc_deferred_io_touch(info);
1788}
1789
1790static void sh_mobile_lcdc_copyarea(struct fb_info *info,
1791 const struct fb_copyarea *area)
1792{
1793 sys_copyarea(info, area);
1794 sh_mobile_lcdc_deferred_io_touch(info);
1795}
1796
1797static void sh_mobile_lcdc_imageblit(struct fb_info *info,
1798 const struct fb_image *image)
1799{
1800 sys_imageblit(info, image);
1801 sh_mobile_lcdc_deferred_io_touch(info);
1802}
1803
d7ad3342
LP		 1804static int sh_mobile_lcdc_pan(struct fb_var_screeninfo *var,
1805 struct fb_info *info)
9dd38819
PE		 1806{
1807 struct sh_mobile_lcdc_chan *ch = info->par;
92e1f9a7
PE		 1808 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
1809 unsigned long ldrcntr;
1810 unsigned long new_pan_offset;
53b50314
DHG		 1811 unsigned long base_addr_y, base_addr_c;
1812 unsigned long c_offset;
92e1f9a7 1813
58f03d99
LP		 1814 if (!ch->format->yuv)
1815 new_pan_offset = var->yoffset * ch->pitch
1816 + var->xoffset * (ch->format->bpp / 8);
53b50314 1817 else
58f03d99 1818 new_pan_offset = var->yoffset * ch->pitch + var->xoffset;
9dd38819 1819
92e1f9a7 1820 if (new_pan_offset == ch->pan_offset)
9dd38819
PE		 1821 return 0; /* No change, do nothing */
1822
92e1f9a7 1823 ldrcntr = lcdc_read(priv, _LDRCNTR);
9dd38819 1824
92e1f9a7 1825 /* Set the source address for the next refresh */
53b50314 1826 base_addr_y = ch->dma_handle + new_pan_offset;
58f03d99 1827 if (ch->format->yuv) {
53b50314 1828 /* Set y offset */
58f03d99
LP		 1829 c_offset = var->yoffset * ch->pitch
1830 * (ch->format->bpp - 8) / 8;
1831 base_addr_c = ch->dma_handle + ch->xres * ch->yres_virtual
dc1d5ada 1832 + c_offset;
53b50314 1833 /* Set x offset */
fc9e78e6 1834 if (ch->format->fourcc == V4L2_PIX_FMT_NV24)
53b50314
DHG		 1835 base_addr_c += 2 * var->xoffset;
1836 else
1837 base_addr_c += var->xoffset;
49d79ba2 1838 }
53b50314 1839
4a237177 1840 if (ch->cache) {
7caa4342 1841 struct sh_mobile_meram_info *mdev;
7caa4342 1842
7caa4342 1843 mdev = priv->meram_dev;
4a237177 1844 mdev->ops->cache_update(mdev, ch->cache,
7caa4342 1845 base_addr_y, base_addr_c,
49d79ba2 1846 &base_addr_y, &base_addr_c);
49d79ba2 1847 }
7caa4342 1848
49d79ba2
LP		 1849 ch->base_addr_y = base_addr_y;
1850 ch->base_addr_c = base_addr_c;
7caa4342 1851
49d79ba2 1852 lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
58f03d99 1853 if (ch->format->yuv)
49d79ba2 1854 lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
53b50314 1855
92e1f9a7
PE		 1856 if (lcdc_chan_is_sublcd(ch))
1857 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
1858 else
1859 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
1860
1861 ch->pan_offset = new_pan_offset;
1862
1863 sh_mobile_lcdc_deferred_io_touch(info);
9dd38819
PE		 1864
1865 return 0;
1866}
1867
d7ad3342
LP		 1868static int sh_mobile_lcdc_ioctl(struct fb_info *info, unsigned int cmd,
1869 unsigned long arg)
40331b21 1870{
d7ad3342 1871 struct sh_mobile_lcdc_chan *ch = info->par;
40331b21
PE		 1872 int retval;
1873
1874 switch (cmd) {
1875 case FBIO_WAITFORVSYNC:
d7ad3342 1876 retval = sh_mobile_lcdc_wait_for_vsync(ch);
40331b21
PE		 1877 break;
1878
1879 default:
1880 retval = -ENOIOCTLCMD;
1881 break;
1882 }
1883 return retval;
1884}
1885
dd210503
GL		 1886static void sh_mobile_fb_reconfig(struct fb_info *info)
1887{
1888 struct sh_mobile_lcdc_chan *ch = info->par;
2d04559d
LP		 1889 struct fb_var_screeninfo var;
1890 struct fb_videomode mode;
dd210503
GL		 1891 struct fb_event event;
1892 int evnt = FB_EVENT_MODE_CHANGE_ALL;
1893
1894 if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
1895 /* More framebuffer users are active */
1896 return;
1897
2d04559d 1898 fb_var_to_videomode(&mode, &info->var);
dd210503 1899
2d04559d 1900 if (fb_mode_is_equal(&ch->display.mode, &mode))
dd210503
GL		 1901 return;
1902
1903 /* Display has been re-plugged, framebuffer is free now, reconfigure */
2d04559d
LP		 1904 var = info->var;
1905 fb_videomode_to_var(&var, &ch->display.mode);
1906 var.width = ch->display.width;
1907 var.height = ch->display.height;
1908 var.activate = FB_ACTIVATE_NOW;
1909
1910 if (fb_set_var(info, &var) < 0)
dd210503
GL		 1911 /* Couldn't reconfigure, hopefully, can continue as before */
1912 return;
1913
dd210503
GL		 1914 /*
1915 * fb_set_var() calls the notifier change internally, only if
1916 * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
1917 * user event, we have to call the chain ourselves.
1918 */
1919 event.info = info;
2d04559d 1920 event.data = &ch->display.mode;
dd210503
GL		 1921 fb_notifier_call_chain(evnt, &event);
1922}
1923
1924/*
1925 * Locking: both .fb_release() and .fb_open() are called with info->lock held if
1926 * user == 1, or with console sem held, if user == 0.
1927 */
d7ad3342 1928static int sh_mobile_lcdc_release(struct fb_info *info, int user)
dd210503
GL		 1929{
1930 struct sh_mobile_lcdc_chan *ch = info->par;
1931
1932 mutex_lock(&ch->open_lock);
1933 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1934
1935 ch->use_count--;
1936
1937 /* Nothing to reconfigure, when called from fbcon */
1938 if (user) {
ac751efa 1939 console_lock();
dd210503 1940 sh_mobile_fb_reconfig(info);
ac751efa 1941 console_unlock();
dd210503
GL		 1942 }
1943
1944 mutex_unlock(&ch->open_lock);
1945
1946 return 0;
1947}
1948
d7ad3342 1949static int sh_mobile_lcdc_open(struct fb_info *info, int user)
dd210503
GL		 1950{
1951 struct sh_mobile_lcdc_chan *ch = info->par;
1952
1953 mutex_lock(&ch->open_lock);
1954 ch->use_count++;
1955
1956 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1957 mutex_unlock(&ch->open_lock);
1958
1959 return 0;
1960}
1961
d7ad3342
LP		 1962static int sh_mobile_lcdc_check_var(struct fb_var_screeninfo *var,
1963 struct fb_info *info)
dd210503
GL		 1964{
1965 struct sh_mobile_lcdc_chan *ch = info->par;
417d4827 1966 struct sh_mobile_lcdc_priv *p = ch->lcdc;
03862194
LP		 1967 unsigned int best_dist = (unsigned int)-1;
1968 unsigned int best_xres = 0;
1969 unsigned int best_yres = 0;
1970 unsigned int i;
c5deac3c 1971 int ret;
03862194
LP		 1972
1973 /* If board code provides us with a list of available modes, make sure
1974 * we use one of them. Find the mode closest to the requested one. The
1975 * distance between two modes is defined as the size of the
1976 * non-overlapping parts of the two rectangles.
1977 */
b5ef967d
LP		 1978 for (i = 0; i < ch->cfg->num_modes; ++i) {
1979 const struct fb_videomode *mode = &ch->cfg->lcd_modes[i];
03862194
LP		 1980 unsigned int dist;
1981
1982 /* We can only round up. */
1983 if (var->xres > mode->xres || var->yres > mode->yres)
1984 continue;
1985
1986 dist = var->xres * var->yres + mode->xres * mode->yres
1987 - 2 * min(var->xres, mode->xres)
1988 * min(var->yres, mode->yres);
1989
1990 if (dist < best_dist) {
1991 best_xres = mode->xres;
1992 best_yres = mode->yres;
1993 best_dist = dist;
1994 }
dd210503 1995 }
417d4827 1996
03862194 1997 /* If no available mode can be used, return an error. */
b5ef967d 1998 if (ch->cfg->num_modes != 0) {
03862194
LP		 1999 if (best_dist == (unsigned int)-1)
2000 return -EINVAL;
2001
2002 var->xres = best_xres;
2003 var->yres = best_yres;
2004 }
2005
c5deac3c
LP		 2006 ret = __sh_mobile_lcdc_check_var(var, info);
2007 if (ret < 0)
2008 return ret;
03862194 2009
edd153a3
LP		 2010 /* only accept the forced_fourcc for dual channel configurations */
2011 if (p->forced_fourcc &&
2012 p->forced_fourcc != sh_mobile_format_fourcc(var))
417d4827 2013 return -EINVAL;
417d4827 2014
dd210503
GL		 2015 return 0;
2016}
40331b21 2017
d7ad3342 2018static int sh_mobile_lcdc_set_par(struct fb_info *info)
ed5bebf2
LP		 2019{
2020 struct sh_mobile_lcdc_chan *ch = info->par;
2021 int ret;
2022
2023 sh_mobile_lcdc_stop(ch->lcdc);
91fba48d 2024
fc9e78e6 2025 ch->format = sh_mobile_format_info(sh_mobile_format_fourcc(&info->var));
58f03d99
LP		 2026 ch->colorspace = info->var.colorspace;
2027
2028 ch->xres = info->var.xres;
2029 ch->xres_virtual = info->var.xres_virtual;
2030 ch->yres = info->var.yres;
2031 ch->yres_virtual = info->var.yres_virtual;
2032
2033 if (ch->format->yuv)
2034 ch->pitch = info->var.xres;
2035 else
2036 ch->pitch = info->var.xres * ch->format->bpp / 8;
fc9e78e6 2037
ed5bebf2 2038 ret = sh_mobile_lcdc_start(ch->lcdc);
58f03d99 2039 if (ret < 0)
ed5bebf2 2040 dev_err(info->dev, "%s: unable to restart LCDC\n", __func__);
58f03d99
LP		 2041
2042 info->fix.line_length = ch->pitch;
ed5bebf2 2043
edd153a3
LP		 2044 if (sh_mobile_format_is_fourcc(&info->var)) {
2045 info->fix.type = FB_TYPE_FOURCC;
2046 info->fix.visual = FB_VISUAL_FOURCC;
2047 } else {
2048 info->fix.type = FB_TYPE_PACKED_PIXELS;
2049 info->fix.visual = FB_VISUAL_TRUECOLOR;
2050 }
2051
ed5bebf2
LP		 2052 return ret;
2053}
2054
8857b9aa
AC		 2055/*
2056 * Screen blanking. Behavior is as follows:
2057 * FB_BLANK_UNBLANK: screen unblanked, clocks enabled
2058 * FB_BLANK_NORMAL: screen blanked, clocks enabled
2059 * FB_BLANK_VSYNC,
2060 * FB_BLANK_HSYNC,
2061 * FB_BLANK_POWEROFF: screen blanked, clocks disabled
2062 */
2063static int sh_mobile_lcdc_blank(int blank, struct fb_info *info)
2064{
2065 struct sh_mobile_lcdc_chan *ch = info->par;
2066 struct sh_mobile_lcdc_priv *p = ch->lcdc;
2067
2068 /* blank the screen? */
2069 if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) {
2070 struct fb_fillrect rect = {
58f03d99
LP		 2071 .width = ch->xres,
2072 .height = ch->yres,
8857b9aa
AC		 2073 };
2074 sh_mobile_lcdc_fillrect(info, &rect);
2075 }
2076 /* turn clocks on? */
2077 if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) {
2078 sh_mobile_lcdc_clk_on(p);
2079 }
2080 /* turn clocks off? */
2081 if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) {
2082 /* make sure the screen is updated with the black fill before
2083 * switching the clocks off. one vsync is not enough since
2084 * blanking may occur in the middle of a refresh. deferred io
2085 * mode will reenable the clocks and update the screen in time,
2086 * so it does not need this. */
2087 if (!info->fbdefio) {
d7ad3342
LP		 2088 sh_mobile_lcdc_wait_for_vsync(ch);
2089 sh_mobile_lcdc_wait_for_vsync(ch);
8857b9aa
AC		 2090 }
2091 sh_mobile_lcdc_clk_off(p);
2092 }
2093
2094 ch->blank_status = blank;
2095 return 0;
2096}
2097
cfb4f5d1 2098static struct fb_ops sh_mobile_lcdc_ops = {
9dd38819 2099 .owner = THIS_MODULE,
cfb4f5d1 2100 .fb_setcolreg = sh_mobile_lcdc_setcolreg,
2540c111
MD		 2101 .fb_read = fb_sys_read,
2102 .fb_write = fb_sys_write,
8564557a
MD		 2103 .fb_fillrect = sh_mobile_lcdc_fillrect,
2104 .fb_copyarea = sh_mobile_lcdc_copyarea,
2105 .fb_imageblit = sh_mobile_lcdc_imageblit,
8857b9aa 2106 .fb_blank = sh_mobile_lcdc_blank,
d7ad3342
LP		 2107 .fb_pan_display = sh_mobile_lcdc_pan,
2108 .fb_ioctl = sh_mobile_lcdc_ioctl,
2109 .fb_open = sh_mobile_lcdc_open,
2110 .fb_release = sh_mobile_lcdc_release,
2111 .fb_check_var = sh_mobile_lcdc_check_var,
2112 .fb_set_par = sh_mobile_lcdc_set_par,
cfb4f5d1
MD		 2113};
2114
a67f379d
LP		 2115static void
2116sh_mobile_lcdc_channel_fb_unregister(struct sh_mobile_lcdc_chan *ch)
2117{
2118 if (ch->info && ch->info->dev)
2119 unregister_framebuffer(ch->info);
2120}
2121
2122static int __devinit
2123sh_mobile_lcdc_channel_fb_register(struct sh_mobile_lcdc_chan *ch)
2124{
2125 struct fb_info *info = ch->info;
2126 int ret;
2127
2128 if (info->fbdefio) {
2129 ch->sglist = vmalloc(sizeof(struct scatterlist) *
2130 ch->fb_size >> PAGE_SHIFT);
2131 if (!ch->sglist) {
2132 dev_err(ch->lcdc->dev, "cannot allocate sglist\n");
2133 return -ENOMEM;
2134 }
2135 }
2136
2137 info->bl_dev = ch->bl;
2138
2139 ret = register_framebuffer(info);
2140 if (ret < 0)
2141 return ret;
2142
2143 dev_info(ch->lcdc->dev, "registered %s/%s as %dx%d %dbpp.\n",
b5ef967d 2144 dev_name(ch->lcdc->dev), (ch->cfg->chan == LCDC_CHAN_MAINLCD) ?
a67f379d
LP		 2145 "mainlcd" : "sublcd", info->var.xres, info->var.yres,
2146 info->var.bits_per_pixel);
2147
2148 /* deferred io mode: disable clock to save power */
2149 if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
2150 sh_mobile_lcdc_clk_off(ch->lcdc);
2151
2152 return ret;
2153}
2154
2155static void
2156sh_mobile_lcdc_channel_fb_cleanup(struct sh_mobile_lcdc_chan *ch)
2157{
2158 struct fb_info *info = ch->info;
2159
2160 if (!info || !info->device)
2161 return;
2162
2163 if (ch->sglist)
2164 vfree(ch->sglist);
2165
2166 fb_dealloc_cmap(&info->cmap);
2167 framebuffer_release(info);
2168}
2169
2170static int __devinit
2171sh_mobile_lcdc_channel_fb_init(struct sh_mobile_lcdc_chan *ch,
2172 const struct fb_videomode *mode,
2173 unsigned int num_modes)
2174{
2175 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
2176 struct fb_var_screeninfo *var;
2177 struct fb_info *info;
2178 int ret;
2179
2180 /* Allocate and initialize the frame buffer device. Create the modes
2181 * list and allocate the color map.
2182 */
2183 info = framebuffer_alloc(0, priv->dev);
2184 if (info == NULL) {
2185 dev_err(priv->dev, "unable to allocate fb_info\n");
2186 return -ENOMEM;
2187 }
2188
2189 ch->info = info;
2190
2191 info->flags = FBINFO_FLAG_DEFAULT;
2192 info->fbops = &sh_mobile_lcdc_ops;
2193 info->device = priv->dev;
2194 info->screen_base = ch->fb_mem;
2195 info->pseudo_palette = &ch->pseudo_palette;
2196 info->par = ch;
2197
2198 fb_videomode_to_modelist(mode, num_modes, &info->modelist);
2199
2200 ret = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
2201 if (ret < 0) {
2202 dev_err(priv->dev, "unable to allocate cmap\n");
2203 return ret;
2204 }
2205
2206 /* Initialize fixed screen information. Restrict pan to 2 lines steps
2207 * for NV12 and NV21.
2208 */
2209 info->fix = sh_mobile_lcdc_fix;
2210 info->fix.smem_start = ch->dma_handle;
2211 info->fix.smem_len = ch->fb_size;
58f03d99
LP		 2212 info->fix.line_length = ch->pitch;
2213
2214 if (ch->format->yuv)
2215 info->fix.visual = FB_VISUAL_FOURCC;
2216 else
2217 info->fix.visual = FB_VISUAL_TRUECOLOR;
2218
a67f379d
LP		 2219 if (ch->format->fourcc == V4L2_PIX_FMT_NV12 ||
2220 ch->format->fourcc == V4L2_PIX_FMT_NV21)
2221 info->fix.ypanstep = 2;
2222
2223 /* Initialize variable screen information using the first mode as
2224 * default. The default Y virtual resolution is twice the panel size to
2225 * allow for double-buffering.
2226 */
2227 var = &info->var;
2228 fb_videomode_to_var(var, mode);
b5ef967d
LP		 2229 var->width = ch->cfg->panel_cfg.width;
2230 var->height = ch->cfg->panel_cfg.height;
a67f379d
LP		 2231 var->yres_virtual = var->yres * 2;
2232 var->activate = FB_ACTIVATE_NOW;
2233
2234 /* Use the legacy API by default for RGB formats, and the FOURCC API
2235 * for YUV formats.
2236 */
2237 if (!ch->format->yuv)
2238 var->bits_per_pixel = ch->format->bpp;
2239 else
2240 var->grayscale = ch->format->fourcc;
2241
d7ad3342 2242 ret = sh_mobile_lcdc_check_var(var, info);
a67f379d
LP		 2243 if (ret)
2244 return ret;
2245
a67f379d
LP		 2246 return 0;
2247}
2248
f1f60b5f
LP		 2249/* -----------------------------------------------------------------------------
2250 * Backlight
2251 */
2252
3b0fd9d7
AC		 2253static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev)
2254{
2255 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7
AC		 2256 int brightness = bdev->props.brightness;
2257
2258 if (bdev->props.power != FB_BLANK_UNBLANK ||
2259 bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
2260 brightness = 0;
2261
b5ef967d 2262 return ch->cfg->bl_info.set_brightness(brightness);
3b0fd9d7
AC		 2263}
2264
2265static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev)
2266{
2267 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7 2268
b5ef967d 2269 return ch->cfg->bl_info.get_brightness();
3b0fd9d7
AC		 2270}
2271
2272static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev,
2273 struct fb_info *info)
2274{
2275 return (info->bl_dev == bdev);
2276}
2277
2278static struct backlight_ops sh_mobile_lcdc_bl_ops = {
2279 .options = BL_CORE_SUSPENDRESUME,
2280 .update_status = sh_mobile_lcdc_update_bl,
2281 .get_brightness = sh_mobile_lcdc_get_brightness,
2282 .check_fb = sh_mobile_lcdc_check_fb,
2283};
2284
2285static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent,
2286 struct sh_mobile_lcdc_chan *ch)
2287{
2288 struct backlight_device *bl;
2289
b5ef967d 2290 bl = backlight_device_register(ch->cfg->bl_info.name, parent, ch,
3b0fd9d7 2291 &sh_mobile_lcdc_bl_ops, NULL);
beee1f20
DC		 2292 if (IS_ERR(bl)) {
2293 dev_err(parent, "unable to register backlight device: %ld\n",
2294 PTR_ERR(bl));
3b0fd9d7
AC		 2295 return NULL;
2296 }
2297
b5ef967d 2298 bl->props.max_brightness = ch->cfg->bl_info.max_brightness;
3b0fd9d7
AC		 2299 bl->props.brightness = bl->props.max_brightness;
2300 backlight_update_status(bl);
2301
2302 return bl;
2303}
2304
2305static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev)
2306{
2307 backlight_device_unregister(bdev);
2308}
2309
f1f60b5f
LP		 2310/* -----------------------------------------------------------------------------
2311 * Power management
2312 */
2313
2feb075a
MD		 2314static int sh_mobile_lcdc_suspend(struct device *dev)
2315{
2316 struct platform_device *pdev = to_platform_device(dev);
2317
2318 sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
2319 return 0;
2320}
2321
2322static int sh_mobile_lcdc_resume(struct device *dev)
2323{
2324 struct platform_device *pdev = to_platform_device(dev);
2325
2326 return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
2327}
2328
0246c471
MD		 2329static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
2330{
2331 struct platform_device *pdev = to_platform_device(dev);
2427bb24 2332 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471
MD		 2333
2334 /* turn off LCDC hardware */
2427bb24
LP		 2335 lcdc_write(priv, _LDCNT1R, 0);
2336
0246c471
MD		 2337 return 0;
2338}
2339
2340static int sh_mobile_lcdc_runtime_resume(struct device *dev)
2341{
2342 struct platform_device *pdev = to_platform_device(dev);
2427bb24 2343 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471 2344
2427bb24 2345 __sh_mobile_lcdc_start(priv);
0246c471
MD		 2346
2347 return 0;
2348}
2349
47145210 2350static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
2feb075a
MD		 2351 .suspend = sh_mobile_lcdc_suspend,
2352 .resume = sh_mobile_lcdc_resume,
0246c471
MD		 2353 .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
2354 .runtime_resume = sh_mobile_lcdc_runtime_resume,
2feb075a
MD		 2355};
2356
f1f60b5f
LP		 2357/* -----------------------------------------------------------------------------
2358 * Framebuffer notifier
2359 */
2360
6de9edd5 2361/* locking: called with info->lock held */
6011bdea
GL		 2362static int sh_mobile_lcdc_notify(struct notifier_block *nb,
2363 unsigned long action, void *data)
2364{
2365 struct fb_event *event = data;
2366 struct fb_info *info = event->info;
2367 struct sh_mobile_lcdc_chan *ch = info->par;
6011bdea
GL		 2368
2369 if (&ch->lcdc->notifier != nb)
baf16374 2370 return NOTIFY_DONE;
6011bdea
GL		 2371
2372 dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
2373 __func__, action, event->data);
2374
2375 switch(action) {
2376 case FB_EVENT_SUSPEND:
37c5dcc2 2377 sh_mobile_lcdc_display_off(ch);
afe417c0 2378 sh_mobile_lcdc_stop(ch->lcdc);
6011bdea
GL		 2379 break;
2380 case FB_EVENT_RESUME:
dd210503
GL		 2381 mutex_lock(&ch->open_lock);
2382 sh_mobile_fb_reconfig(info);
2383 mutex_unlock(&ch->open_lock);
6011bdea 2384
37c5dcc2 2385 sh_mobile_lcdc_display_on(ch);
ebe5e12d 2386 sh_mobile_lcdc_start(ch->lcdc);
6011bdea
GL		 2387 }
2388
baf16374 2389 return NOTIFY_OK;
6011bdea
GL		 2390}
2391
f1f60b5f
LP		 2392/* -----------------------------------------------------------------------------
2393 * Probe/remove and driver init/exit
2394 */
2395
217e9c43 2396static const struct fb_videomode default_720p __devinitconst = {
f1f60b5f
LP		 2397 .name = "HDMI 720p",
2398 .xres = 1280,
2399 .yres = 720,
2400
2401 .left_margin = 220,
2402 .right_margin = 110,
2403 .hsync_len = 40,
2404
2405 .upper_margin = 20,
2406 .lower_margin = 5,
2407 .vsync_len = 5,
2408
2409 .pixclock = 13468,
2410 .refresh = 60,
2411 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
2412};
2413
b4bee692
LP		 2414static int sh_mobile_lcdc_remove(struct platform_device *pdev)
2415{
2416 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
c5deac3c 2417 unsigned int i;
b4bee692
LP		 2418
2419 fb_unregister_client(&priv->notifier);
2420
c5deac3c
LP		 2421 for (i = 0; i < ARRAY_SIZE(priv->overlays); i++)
2422 sh_mobile_lcdc_overlay_fb_unregister(&priv->overlays[i]);
b4bee692 2423 for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
a67f379d 2424 sh_mobile_lcdc_channel_fb_unregister(&priv->ch[i]);
b4bee692
LP		 2425
2426 sh_mobile_lcdc_stop(priv);
2427
c5deac3c
LP		 2428 for (i = 0; i < ARRAY_SIZE(priv->overlays); i++) {
2429 struct sh_mobile_lcdc_overlay *ovl = &priv->overlays[i];
2430
2431 sh_mobile_lcdc_overlay_fb_cleanup(ovl);
2432
2433 if (ovl->fb_mem)
2434 dma_free_coherent(&pdev->dev, ovl->fb_size,
2435 ovl->fb_mem, ovl->dma_handle);
2436 }
2437
b4bee692 2438 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
9a2985e7 2439 struct sh_mobile_lcdc_chan *ch = &priv->ch[i];
b4bee692 2440
e34d0bbb
LP		 2441 if (ch->tx_dev) {
2442 ch->tx_dev->lcdc = NULL;
b5ef967d 2443 module_put(ch->cfg->tx_dev->dev.driver->owner);
e34d0bbb 2444 }
9a2985e7 2445
a67f379d 2446 sh_mobile_lcdc_channel_fb_cleanup(ch);
b4bee692 2447
a67f379d
LP		 2448 if (ch->fb_mem)
2449 dma_free_coherent(&pdev->dev, ch->fb_size,
2450 ch->fb_mem, ch->dma_handle);
b4bee692
LP		 2451 }
2452
2453 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
2454 if (priv->ch[i].bl)
2455 sh_mobile_lcdc_bl_remove(priv->ch[i].bl);
2456 }
2457
4774c12a
LP		 2458 if (priv->dot_clk) {
2459 pm_runtime_disable(&pdev->dev);
b4bee692 2460 clk_put(priv->dot_clk);
4774c12a 2461 }
b4bee692
LP		 2462
2463 if (priv->base)
2464 iounmap(priv->base);
2465
2466 if (priv->irq)
2467 free_irq(priv->irq, priv);
2468 kfree(priv);
2469 return 0;
2470}
cfb4f5d1 2471
217e9c43 2472static int __devinit sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
f1f60b5f 2473{
b5ef967d 2474 int interface_type = ch->cfg->interface_type;
f1f60b5f
LP		 2475
2476 switch (interface_type) {
2477 case RGB8:
2478 case RGB9:
2479 case RGB12A:
2480 case RGB12B:
2481 case RGB16:
2482 case RGB18:
2483 case RGB24:
2484 case SYS8A:
2485 case SYS8B:
2486 case SYS8C:
2487 case SYS8D:
2488 case SYS9:
2489 case SYS12:
2490 case SYS16A:
2491 case SYS16B:
2492 case SYS16C:
2493 case SYS18:
2494 case SYS24:
2495 break;
2496 default:
2497 return -EINVAL;
2498 }
2499
2500 /* SUBLCD only supports SYS interface */
2501 if (lcdc_chan_is_sublcd(ch)) {
2502 if (!(interface_type & LDMT1R_IFM))
2503 return -EINVAL;
2504
2505 interface_type &= ~LDMT1R_IFM;
2506 }
2507
2508 ch->ldmt1r_value = interface_type;
2509 return 0;
2510}
2511
c5deac3c
LP		 2512static int __devinit
2513sh_mobile_lcdc_overlay_init(struct sh_mobile_lcdc_priv *priv,
2514 struct sh_mobile_lcdc_overlay *ovl)
2515{
2516 const struct sh_mobile_lcdc_format_info *format;
2517 int ret;
2518
2519 if (ovl->cfg->fourcc == 0)
2520 return 0;
2521
2522 /* Validate the format. */
2523 format = sh_mobile_format_info(ovl->cfg->fourcc);
2524 if (format == NULL) {
2525 dev_err(priv->dev, "Invalid FOURCC %08x\n", ovl->cfg->fourcc);
2526 return -EINVAL;
2527 }
2528
2529 ovl->enabled = false;
2530 ovl->mode = LCDC_OVERLAY_BLEND;
2531 ovl->alpha = 255;
2532 ovl->rop3 = 0;
2533 ovl->pos_x = 0;
2534 ovl->pos_y = 0;
2535
2536 /* The default Y virtual resolution is twice the panel size to allow for
2537 * double-buffering.
2538 */
2539 ovl->format = format;
2540 ovl->xres = ovl->cfg->max_xres;
2541 ovl->xres_virtual = ovl->xres;
2542 ovl->yres = ovl->cfg->max_yres;
2543 ovl->yres_virtual = ovl->yres * 2;
2544
2545 if (!format->yuv)
2546 ovl->pitch = ovl->xres * format->bpp / 8;
2547 else
2548 ovl->pitch = ovl->xres;
2549
2550 /* Allocate frame buffer memory. */
2551 ovl->fb_size = ovl->cfg->max_xres * ovl->cfg->max_yres
2552 * format->bpp / 8 * 2;
2553 ovl->fb_mem = dma_alloc_coherent(priv->dev, ovl->fb_size,
2554 &ovl->dma_handle, GFP_KERNEL);
2555 if (!ovl->fb_mem) {
2556 dev_err(priv->dev, "unable to allocate buffer\n");
2557 return -ENOMEM;
2558 }
2559
2560 ret = sh_mobile_lcdc_overlay_fb_init(ovl);
2561 if (ret < 0)
2562 return ret;
2563
2564 return 0;
2565}
2566
0a7f17aa
LP		 2567static int __devinit
2568sh_mobile_lcdc_channel_init(struct sh_mobile_lcdc_priv *priv,
2569 struct sh_mobile_lcdc_chan *ch)
cfb4f5d1 2570{
105784bb 2571 const struct sh_mobile_lcdc_format_info *format;
b5ef967d 2572 const struct sh_mobile_lcdc_chan_cfg *cfg = ch->cfg;
3ce05599
LP		 2573 const struct fb_videomode *max_mode;
2574 const struct fb_videomode *mode;
a67f379d 2575 unsigned int num_modes;
3ce05599 2576 unsigned int max_size;
a67f379d 2577 unsigned int i;
3ce05599 2578
a67472ad 2579 mutex_init(&ch->open_lock);
ecd29947 2580 ch->notify = sh_mobile_lcdc_display_notify;
a67472ad 2581
105784bb
LP		 2582 /* Validate the format. */
2583 format = sh_mobile_format_info(cfg->fourcc);
2584 if (format == NULL) {
2585 dev_err(priv->dev, "Invalid FOURCC %08x.\n", cfg->fourcc);
2586 return -EINVAL;
2587 }
2588
3ce05599
LP		 2589 /* Iterate through the modes to validate them and find the highest
2590 * resolution.
2591 */
2592 max_mode = NULL;
2593 max_size = 0;
2594
93ff2598 2595 for (i = 0, mode = cfg->lcd_modes; i < cfg->num_modes; i++, mode++) {
3ce05599
LP		 2596 unsigned int size = mode->yres * mode->xres;
2597
edd153a3
LP		 2598 /* NV12/NV21 buffers must have even number of lines */
2599 if ((cfg->fourcc == V4L2_PIX_FMT_NV12 ||
2600 cfg->fourcc == V4L2_PIX_FMT_NV21) && (mode->yres & 0x1)) {
0a7f17aa
LP		 2601 dev_err(priv->dev, "yres must be multiple of 2 for "
2602 "YCbCr420 mode.\n");
3ce05599
LP		 2603 return -EINVAL;
2604 }
2605
2606 if (size > max_size) {
2607 max_mode = mode;
2608 max_size = size;
2609 }
2610 }
2611
2612 if (!max_size)
2613 max_size = MAX_XRES * MAX_YRES;
2614 else
0a7f17aa 2615 dev_dbg(priv->dev, "Found largest videomode %ux%u\n",
3ce05599
LP		 2616 max_mode->xres, max_mode->yres);
2617
93ff2598 2618 if (cfg->lcd_modes == NULL) {
3ce05599 2619 mode = &default_720p;
93ff2598 2620 num_modes = 1;
3ce05599 2621 } else {
93ff2598
LP		 2622 mode = cfg->lcd_modes;
2623 num_modes = cfg->num_modes;
3ce05599
LP		 2624 }
2625
58f03d99
LP		 2626 /* Use the first mode as default. */
2627 ch->format = format;
2628 ch->xres = mode->xres;
2629 ch->xres_virtual = mode->xres;
2630 ch->yres = mode->yres;
2631 ch->yres_virtual = mode->yres * 2;
2632
2633 if (!format->yuv) {
2634 ch->colorspace = V4L2_COLORSPACE_SRGB;
2635 ch->pitch = ch->xres * format->bpp / 8;
2636 } else {
2637 ch->colorspace = V4L2_COLORSPACE_REC709;
2638 ch->pitch = ch->xres;
2639 }
2640
a67f379d
LP		 2641 ch->display.width = cfg->panel_cfg.width;
2642 ch->display.height = cfg->panel_cfg.height;
2643 ch->display.mode = *mode;
2644
2645 /* Allocate frame buffer memory. */
2646 ch->fb_size = max_size * format->bpp / 8 * 2;
2647 ch->fb_mem = dma_alloc_coherent(priv->dev, ch->fb_size, &ch->dma_handle,
2648 GFP_KERNEL);
2649 if (ch->fb_mem == NULL) {
2650 dev_err(priv->dev, "unable to allocate buffer\n");
2651 return -ENOMEM;
2652 }
3ce05599 2653
13f80eea
LP		 2654 /* Initialize the transmitter device if present. */
2655 if (cfg->tx_dev) {
2656 if (!cfg->tx_dev->dev.driver ||
2657 !try_module_get(cfg->tx_dev->dev.driver->owner)) {
2658 dev_warn(priv->dev,
2659 "unable to get transmitter device\n");
2660 return -EINVAL;
2661 }
2662 ch->tx_dev = platform_get_drvdata(cfg->tx_dev);
2663 ch->tx_dev->lcdc = ch;
2664 ch->tx_dev->def_mode = *mode;
2665 }
2666
a67f379d 2667 return sh_mobile_lcdc_channel_fb_init(ch, mode, num_modes);
3ce05599
LP		 2668}
2669
2670static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
2671{
01ac25b5 2672 struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
3ce05599 2673 struct sh_mobile_lcdc_priv *priv;
cfb4f5d1 2674 struct resource *res;
3ce05599 2675 int num_channels;
cfb4f5d1 2676 int error;
3ce05599 2677 int i;
cfb4f5d1 2678
01ac25b5 2679 if (!pdata) {
cfb4f5d1 2680 dev_err(&pdev->dev, "no platform data defined\n");
8bed9055 2681 return -EINVAL;
cfb4f5d1
MD		 2682 }
2683
2684 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8564557a
MD		 2685 i = platform_get_irq(pdev, 0);
2686 if (!res || i < 0) {
2687 dev_err(&pdev->dev, "cannot get platform resources\n");
8bed9055 2688 return -ENOENT;
cfb4f5d1
MD		 2689 }
2690
2691 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
2692 if (!priv) {
2693 dev_err(&pdev->dev, "cannot allocate device data\n");
8bed9055 2694 return -ENOMEM;
cfb4f5d1
MD		 2695 }
2696
4774c12a
LP		 2697 priv->dev = &pdev->dev;
2698 priv->meram_dev = pdata->meram_dev;
8bed9055
GL		 2699 platform_set_drvdata(pdev, priv);
2700
f8798ccb 2701 error = request_irq(i, sh_mobile_lcdc_irq, 0,
7ad33e74 2702 dev_name(&pdev->dev), priv);
8564557a
MD		 2703 if (error) {
2704 dev_err(&pdev->dev, "unable to request irq\n");
2705 goto err1;
2706 }
2707
2708 priv->irq = i;
5ef6b505 2709 atomic_set(&priv->hw_usecnt, -1);
cfb4f5d1 2710
3ce05599
LP		 2711 for (i = 0, num_channels = 0; i < ARRAY_SIZE(pdata->ch); i++) {
2712 struct sh_mobile_lcdc_chan *ch = priv->ch + num_channels;
cfb4f5d1 2713
01ac25b5 2714 ch->lcdc = priv;
b5ef967d 2715 ch->cfg = &pdata->ch[i];
cfb4f5d1 2716
01ac25b5 2717 error = sh_mobile_lcdc_check_interface(ch);
cfb4f5d1
MD		 2718 if (error) {
2719 dev_err(&pdev->dev, "unsupported interface type\n");
2720 goto err1;
2721 }
01ac25b5
GL		 2722 init_waitqueue_head(&ch->frame_end_wait);
2723 init_completion(&ch->vsync_completion);
2724 ch->pan_offset = 0;
cfb4f5d1 2725
3b0fd9d7 2726 /* probe the backlight is there is one defined */
b5ef967d 2727 if (ch->cfg->bl_info.max_brightness)
3b0fd9d7
AC		 2728 ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch);
2729
cfb4f5d1
MD		 2730 switch (pdata->ch[i].chan) {
2731 case LCDC_CHAN_MAINLCD:
ce1c0b08 2732 ch->enabled = LDCNT2R_ME;
01ac25b5 2733 ch->reg_offs = lcdc_offs_mainlcd;
3ce05599 2734 num_channels++;
cfb4f5d1
MD		 2735 break;
2736 case LCDC_CHAN_SUBLCD:
ce1c0b08 2737 ch->enabled = LDCNT2R_SE;
01ac25b5 2738 ch->reg_offs = lcdc_offs_sublcd;
3ce05599 2739 num_channels++;
cfb4f5d1
MD		 2740 break;
2741 }
2742 }
2743
3ce05599 2744 if (!num_channels) {
cfb4f5d1
MD		 2745 dev_err(&pdev->dev, "no channels defined\n");
2746 error = -EINVAL;
2747 goto err1;
2748 }
2749
edd153a3 2750 /* for dual channel LCDC (MAIN + SUB) force shared format setting */
3ce05599 2751 if (num_channels == 2)
edd153a3 2752 priv->forced_fourcc = pdata->ch[0].fourcc;
417d4827 2753
dba6f385
GL		 2754 priv->base = ioremap_nocache(res->start, resource_size(res));
2755 if (!priv->base)
2756 goto err1;
2757
0a7f17aa 2758 error = sh_mobile_lcdc_setup_clocks(priv, pdata->clock_source);
cfb4f5d1
MD		 2759 if (error) {
2760 dev_err(&pdev->dev, "unable to setup clocks\n");
2761 goto err1;
2762 }
2763
4774c12a
LP		 2764 /* Enable runtime PM. */
2765 pm_runtime_enable(&pdev->dev);
7caa4342 2766
3ce05599 2767 for (i = 0; i < num_channels; i++) {
01ac25b5 2768 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
c44f9f76 2769
0a7f17aa 2770 error = sh_mobile_lcdc_channel_init(priv, ch);
cfb4f5d1 2771 if (error)
3ce05599 2772 goto err1;
cfb4f5d1
MD		 2773 }
2774
c5deac3c
LP		 2775 for (i = 0; i < ARRAY_SIZE(pdata->overlays); i++) {
2776 struct sh_mobile_lcdc_overlay *ovl = &priv->overlays[i];
2777
2778 ovl->cfg = &pdata->overlays[i];
2779 ovl->channel = &priv->ch[0];
2780
2781 error = sh_mobile_lcdc_overlay_init(priv, ovl);
2782 if (error)
2783 goto err1;
2784 }
2785
cfb4f5d1
MD		 2786 error = sh_mobile_lcdc_start(priv);
2787 if (error) {
2788 dev_err(&pdev->dev, "unable to start hardware\n");
2789 goto err1;
2790 }
2791
3ce05599 2792 for (i = 0; i < num_channels; i++) {
1c6a307a 2793 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
1c6a307a 2794
a67f379d
LP		 2795 error = sh_mobile_lcdc_channel_fb_register(ch);
2796 if (error)
cfb4f5d1 2797 goto err1;
cfb4f5d1
MD		 2798 }
2799
c5deac3c
LP		 2800 for (i = 0; i < ARRAY_SIZE(pdata->overlays); i++) {
2801 struct sh_mobile_lcdc_overlay *ovl = &priv->overlays[i];
2802
2803 error = sh_mobile_lcdc_overlay_fb_register(ovl);
2804 if (error)
2805 goto err1;
2806 }
2807
6011bdea
GL		 2808 /* Failure ignored */
2809 priv->notifier.notifier_call = sh_mobile_lcdc_notify;
2810 fb_register_client(&priv->notifier);
2811
cfb4f5d1 2812 return 0;
8bed9055 2813err1:
cfb4f5d1 2814 sh_mobile_lcdc_remove(pdev);
8bed9055 2815
cfb4f5d1
MD		 2816 return error;
2817}
2818
cfb4f5d1
MD		 2819static struct platform_driver sh_mobile_lcdc_driver = {
2820 .driver = {
2821 .name = "sh_mobile_lcdc_fb",
2822 .owner = THIS_MODULE,
2feb075a 2823 .pm = &sh_mobile_lcdc_dev_pm_ops,
cfb4f5d1
MD		 2824 },
2825 .probe = sh_mobile_lcdc_probe,
2826 .remove = sh_mobile_lcdc_remove,
2827};
2828
4277f2c4 2829module_platform_driver(sh_mobile_lcdc_driver);
cfb4f5d1
MD		 2830
2831MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
2832MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
2833MODULE_LICENSE("GPL v2");
kernel source for telekom puls (alcatel/mediatek)