[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / video / riva / rivafb-i2c.c

/*
 * linux/drivers/video/riva/fbdev-i2c.c - nVidia i2c
 *
 * Maintained by Ani Joshi <ajoshi@shell.unixbox.com>
 *
 * Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
 *
 * Based on radeonfb-i2c.c
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/fb.h>
#include <linux/jiffies.h>

#include <asm/io.h>

#include "rivafb.h"
#include "../edid.h"

static void riva_gpio_setscl(void* data, int state)
{
	struct riva_i2c_chan 	*chan = data;
	struct riva_par 	*par = chan->par;
	u32			val;

	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
	val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;

	if (state)
		val |= 0x20;
	else
		val &= ~0x20;

	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
	VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1);
}

static void riva_gpio_setsda(void* data, int state)
{
	struct riva_i2c_chan 	*chan = data;
	struct riva_par 	*par = chan->par;
	u32			val;

	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
	val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;

	if (state)
		val |= 0x10;
	else
		val &= ~0x10;

	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
	VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1);
}

static int riva_gpio_getscl(void* data)
{
	struct riva_i2c_chan 	*chan = data;
	struct riva_par 	*par = chan->par;
	u32			val = 0;

	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
	if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x04)
		val = 1;

	return val;
}

static int riva_gpio_getsda(void* data)
{
	struct riva_i2c_chan 	*chan = data;
	struct riva_par 	*par = chan->par;
	u32			val = 0;

	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
	if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x08)
		val = 1;

	return val;
}

static int __devinit riva_setup_i2c_bus(struct riva_i2c_chan *chan,
					const char *name,
					unsigned int i2c_class)
{
	int rc;

	strcpy(chan->adapter.name, name);
	chan->adapter.owner		= THIS_MODULE;
	chan->adapter.class		= i2c_class;
	chan->adapter.algo_data		= &chan->algo;
	chan->adapter.dev.parent	= &chan->par->pdev->dev;
	chan->algo.setsda		= riva_gpio_setsda;
	chan->algo.setscl		= riva_gpio_setscl;
	chan->algo.getsda		= riva_gpio_getsda;
	chan->algo.getscl		= riva_gpio_getscl;
	chan->algo.udelay		= 40;
	chan->algo.timeout		= msecs_to_jiffies(2);
	chan->algo.data 		= chan;

	i2c_set_adapdata(&chan->adapter, chan);

	/* Raise SCL and SDA */
	riva_gpio_setsda(chan, 1);
	riva_gpio_setscl(chan, 1);
	udelay(20);

	rc = i2c_bit_add_bus(&chan->adapter);
	if (rc == 0)
		dev_dbg(&chan->par->pdev->dev, "I2C bus %s registered.\n", name);
	else {
		dev_warn(&chan->par->pdev->dev,
			 "Failed to register I2C bus %s.\n", name);
		chan->par = NULL;
	}

	return rc;
}

void __devinit riva_create_i2c_busses(struct riva_par *par)
{
	par->chan[0].par	= par;
	par->chan[1].par	= par;
	par->chan[2].par        = par;

	par->chan[0].ddc_base = 0x36;
	par->chan[1].ddc_base = 0x3e;
	par->chan[2].ddc_base = 0x50;
	riva_setup_i2c_bus(&par->chan[0], "BUS1", I2C_CLASS_HWMON);
	riva_setup_i2c_bus(&par->chan[1], "BUS2", 0);
	riva_setup_i2c_bus(&par->chan[2], "BUS3", 0);
}

void riva_delete_i2c_busses(struct riva_par *par)
{
	int i;

	for (i = 0; i < 3; i++) {
		if (!par->chan[i].par)
			continue;
		i2c_del_adapter(&par->chan[i].adapter);
		par->chan[i].par = NULL;
	}
}

int __devinit riva_probe_i2c_connector(struct riva_par *par, int conn, u8 **out_edid)
{
	u8 *edid = NULL;

	if (par->chan[conn].par)
		edid = fb_ddc_read(&par->chan[conn].adapter);

	if (out_edid)
		*out_edid = edid;
	if (!edid)
		return 1;

	return 0;
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/drivers/video/riva/fbdev-i2c.c - nVidia i2c
	3	*
	4	* Maintained by Ani Joshi <ajoshi@shell.unixbox.com>
	5	*
	6	* Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
	7	*
	8	* Based on radeonfb-i2c.c
	9	*
	10	* This file is subject to the terms and conditions of the GNU General Public
	11	* License. See the file COPYING in the main directory of this archive
	12	* for more details.
	13	*/
	14
1da177e4 LT	15	#include <linux/module.h>
1da177e4 LT	16	#include <linux/kernel.h>
1da177e4 LT	17	#include <linux/delay.h>
	18	#include <linux/pci.h>
	19	#include <linux/fb.h>
	20	#include <linux/jiffies.h>
	21
	22	#include <asm/io.h>
	23
	24	#include "rivafb.h"
	25	#include "../edid.h"
	26
1da177e4 LT	27	static void riva_gpio_setscl(void* data, int state)
1da177e4 LT	28	{
f4a41836	29	struct riva_i2c_chan *chan = data;
1da177e4 LT	30	struct riva_par *par = chan->par;
	31	u32 val;
	32
	33	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
	34	val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;
	35
	36	if (state)
	37	val \|= 0x20;
	38	else
	39	val &= ~0x20;
	40
	41	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
	42	VGA_WR08(par->riva.PCIO, 0x3d5, val \| 0x1);
	43	}
	44
	45	static void riva_gpio_setsda(void* data, int state)
	46	{
f4a41836	47	struct riva_i2c_chan *chan = data;
1da177e4 LT	48	struct riva_par *par = chan->par;
	49	u32 val;
	50
	51	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
	52	val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;
	53
	54	if (state)
	55	val \|= 0x10;
	56	else
	57	val &= ~0x10;
	58
	59	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
	60	VGA_WR08(par->riva.PCIO, 0x3d5, val \| 0x1);
	61	}
	62
	63	static int riva_gpio_getscl(void* data)
	64	{
f4a41836	65	struct riva_i2c_chan *chan = data;
1da177e4 LT	66	struct riva_par *par = chan->par;
	67	u32 val = 0;
	68
	69	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
	70	if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x04)
	71	val = 1;
	72
1da177e4 LT	73	return val;
	74	}
	75
	76	static int riva_gpio_getsda(void* data)
	77	{
f4a41836	78	struct riva_i2c_chan *chan = data;
1da177e4 LT	79	struct riva_par *par = chan->par;
	80	u32 val = 0;
	81
	82	VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
	83	if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x08)
	84	val = 1;
	85
	86	return val;
	87	}
	88
a65ff76a JD	89	static int __devinit riva_setup_i2c_bus(struct riva_i2c_chan *chan,
	90	const char *name,
	91	unsigned int i2c_class)
1da177e4 LT	92	{
	93	int rc;
	94
	95	strcpy(chan->adapter.name, name);
	96	chan->adapter.owner = THIS_MODULE;
1e73db25	97	chan->adapter.class = i2c_class;
1da177e4 LT	98	chan->adapter.algo_data = &chan->algo;
	99	chan->adapter.dev.parent = &chan->par->pdev->dev;
	100	chan->algo.setsda = riva_gpio_setsda;
	101	chan->algo.setscl = riva_gpio_setscl;
	102	chan->algo.getsda = riva_gpio_getsda;
	103	chan->algo.getscl = riva_gpio_getscl;
	104	chan->algo.udelay = 40;
	105	chan->algo.timeout = msecs_to_jiffies(2);
	106	chan->algo.data = chan;
	107
	108	i2c_set_adapdata(&chan->adapter, chan);
	109
	110	/* Raise SCL and SDA */
	111	riva_gpio_setsda(chan, 1);
	112	riva_gpio_setscl(chan, 1);
	113	udelay(20);
	114
	115	rc = i2c_bit_add_bus(&chan->adapter);
	116	if (rc == 0)
	117	dev_dbg(&chan->par->pdev->dev, "I2C bus %s registered.\n", name);
	118	else {
	119	dev_warn(&chan->par->pdev->dev,
	120	"Failed to register I2C bus %s.\n", name);
	121	chan->par = NULL;
	122	}
	123
	124	return rc;
	125	}
	126
a65ff76a	127	void __devinit riva_create_i2c_busses(struct riva_par *par)
1da177e4	128	{
1da177e4 LT	129	par->chan[0].par = par;
	130	par->chan[1].par = par;
	131	par->chan[2].par = par;
	132
04043849 AD	133	par->chan[0].ddc_base = 0x36;
04043849 AD	134	par->chan[1].ddc_base = 0x3e;
1da177e4	135	par->chan[2].ddc_base = 0x50;
04043849 AD	136	riva_setup_i2c_bus(&par->chan[0], "BUS1", I2C_CLASS_HWMON);
04043849 AD	137	riva_setup_i2c_bus(&par->chan[1], "BUS2", 0);
1e73db25	138	riva_setup_i2c_bus(&par->chan[2], "BUS3", 0);
1da177e4 LT	139	}
	140
	141	void riva_delete_i2c_busses(struct riva_par *par)
	142	{
a65ff76a	143	int i;
1da177e4	144
a65ff76a JD	145	for (i = 0; i < 3; i++) {
	146	if (!par->chan[i].par)
	147	continue;
	148	i2c_del_adapter(&par->chan[i].adapter);
	149	par->chan[i].par = NULL;
	150	}
1da177e4 LT	151	}
1da177e4 LT	152
a65ff76a	153	int __devinit riva_probe_i2c_connector(struct riva_par par, int conn, u8 *out_edid)
1da177e4 LT	154	{
1da177e4 LT	155	u8 *edid = NULL;
1da177e4	156
a65ff76a JD	157	if (par->chan[conn].par)
a65ff76a JD	158	edid = fb_ddc_read(&par->chan[conn].adapter);
bf5df0a2	159
1da177e4 LT	160	if (out_edid)
	161	*out_edid = edid;
	162	if (!edid)
	163	return 1;
	164
	165	return 0;
	166	}
	167