[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / video / omap2 / dss / dpi.c

/*
 * linux/drivers/video/omap2/dss/dpi.c
 *
 * Copyright (C) 2009 Nokia Corporation
 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
 *
 * Some code and ideas taken from drivers/video/omap/ driver
 * by Imre Deak.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#define DSS_SUBSYS_NAME "DPI"

#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/export.h>
#include <linux/err.h>
#include <linux/errno.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/string.h>

#include <video/omapdss.h>

#include "dss.h"
#include "dss_features.h"

static struct {
	struct regulator *vdds_dsi_reg;
	struct platform_device *dsidev;

	struct mutex lock;

	struct omap_video_timings timings;
	struct dss_lcd_mgr_config mgr_config;
	int data_lines;

	struct omap_dss_output output;
} dpi;

static struct platform_device *dpi_get_dsidev(enum omap_channel channel)
{
	switch (channel) {
	case OMAP_DSS_CHANNEL_LCD:
		return dsi_get_dsidev_from_id(0);
	case OMAP_DSS_CHANNEL_LCD2:
		return dsi_get_dsidev_from_id(1);
	default:
		return NULL;
	}
}

static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
{
	switch (channel) {
	case OMAP_DSS_CHANNEL_LCD:
		return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
	case OMAP_DSS_CHANNEL_LCD2:
		return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
	default:
		/* this shouldn't happen */
		WARN_ON(1);
		return OMAP_DSS_CLK_SRC_FCK;
	}
}

static int dpi_set_dsi_clk(struct omap_dss_device *dssdev,
		unsigned long pck_req, unsigned long *fck, int *lck_div,
		int *pck_div)
{
	struct omap_overlay_manager *mgr = dssdev->output->manager;
	struct dsi_clock_info dsi_cinfo;
	struct dispc_clock_info dispc_cinfo;
	int r;

	r = dsi_pll_calc_clock_div_pck(dpi.dsidev, pck_req, &dsi_cinfo,
			&dispc_cinfo);
	if (r)
		return r;

	r = dsi_pll_set_clock_div(dpi.dsidev, &dsi_cinfo);
	if (r)
		return r;

	dss_select_lcd_clk_source(mgr->id,
			dpi_get_alt_clk_src(mgr->id));

	dpi.mgr_config.clock_info = dispc_cinfo;

	*fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
	*lck_div = dispc_cinfo.lck_div;
	*pck_div = dispc_cinfo.pck_div;

	return 0;
}

static int dpi_set_dispc_clk(struct omap_dss_device *dssdev,
		unsigned long pck_req, unsigned long *fck, int *lck_div,
		int *pck_div)
{
	struct dss_clock_info dss_cinfo;
	struct dispc_clock_info dispc_cinfo;
	int r;

	r = dss_calc_clock_div(pck_req, &dss_cinfo, &dispc_cinfo);
	if (r)
		return r;

	r = dss_set_clock_div(&dss_cinfo);
	if (r)
		return r;

	dpi.mgr_config.clock_info = dispc_cinfo;

	*fck = dss_cinfo.fck;
	*lck_div = dispc_cinfo.lck_div;
	*pck_div = dispc_cinfo.pck_div;

	return 0;
}

static int dpi_set_mode(struct omap_dss_device *dssdev)
{
	struct omap_video_timings *t = &dpi.timings;
	struct omap_overlay_manager *mgr = dssdev->output->manager;
	int lck_div = 0, pck_div = 0;
	unsigned long fck = 0;
	unsigned long pck;
	int r = 0;

	if (dpi.dsidev)
		r = dpi_set_dsi_clk(dssdev, t->pixel_clock * 1000, &fck,
				&lck_div, &pck_div);
	else
		r = dpi_set_dispc_clk(dssdev, t->pixel_clock * 1000, &fck,
				&lck_div, &pck_div);
	if (r)
		return r;

	pck = fck / lck_div / pck_div / 1000;

	if (pck != t->pixel_clock) {
		DSSWARN("Could not find exact pixel clock. "
				"Requested %d kHz, got %lu kHz\n",
				t->pixel_clock, pck);

		t->pixel_clock = pck;
	}

	dss_mgr_set_timings(mgr, t);

	return 0;
}

static void dpi_config_lcd_manager(struct omap_dss_device *dssdev)
{
	struct omap_overlay_manager *mgr = dssdev->output->manager;

	dpi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;

	dpi.mgr_config.stallmode = false;
	dpi.mgr_config.fifohandcheck = false;

	dpi.mgr_config.video_port_width = dpi.data_lines;

	dpi.mgr_config.lcden_sig_polarity = 0;

	dss_mgr_set_lcd_config(mgr, &dpi.mgr_config);
}

int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
{
	struct omap_dss_output *out = dssdev->output;
	int r;

	mutex_lock(&dpi.lock);

	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi.vdds_dsi_reg) {
		DSSERR("no VDSS_DSI regulator\n");
		r = -ENODEV;
		goto err_no_reg;
	}

	if (out == NULL || out->manager == NULL) {
		DSSERR("failed to enable display: no output/manager\n");
		r = -ENODEV;
		goto err_no_out_mgr;
	}

	r = omap_dss_start_device(dssdev);
	if (r) {
		DSSERR("failed to start device\n");
		goto err_start_dev;
	}

	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
		r = regulator_enable(dpi.vdds_dsi_reg);
		if (r)
			goto err_reg_enable;
	}

	r = dispc_runtime_get();
	if (r)
		goto err_get_dispc;

	r = dss_dpi_select_source(dssdev->channel);
	if (r)
		goto err_src_sel;

	if (dpi.dsidev) {
		r = dsi_runtime_get(dpi.dsidev);
		if (r)
			goto err_get_dsi;

		r = dsi_pll_init(dpi.dsidev, 0, 1);
		if (r)
			goto err_dsi_pll_init;
	}

	r = dpi_set_mode(dssdev);
	if (r)
		goto err_set_mode;

	dpi_config_lcd_manager(dssdev);

	mdelay(2);

	r = dss_mgr_enable(out->manager);
	if (r)
		goto err_mgr_enable;

	mutex_unlock(&dpi.lock);

	return 0;

err_mgr_enable:
err_set_mode:
	if (dpi.dsidev)
		dsi_pll_uninit(dpi.dsidev, true);
err_dsi_pll_init:
	if (dpi.dsidev)
		dsi_runtime_put(dpi.dsidev);
err_get_dsi:
err_src_sel:
	dispc_runtime_put();
err_get_dispc:
	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
		regulator_disable(dpi.vdds_dsi_reg);
err_reg_enable:
	omap_dss_stop_device(dssdev);
err_start_dev:
err_no_out_mgr:
err_no_reg:
	mutex_unlock(&dpi.lock);
	return r;
}
EXPORT_SYMBOL(omapdss_dpi_display_enable);

void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
{
	struct omap_overlay_manager *mgr = dssdev->output->manager;

	mutex_lock(&dpi.lock);

	dss_mgr_disable(mgr);

	if (dpi.dsidev) {
		dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
		dsi_pll_uninit(dpi.dsidev, true);
		dsi_runtime_put(dpi.dsidev);
	}

	dispc_runtime_put();

	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
		regulator_disable(dpi.vdds_dsi_reg);

	omap_dss_stop_device(dssdev);

	mutex_unlock(&dpi.lock);
}
EXPORT_SYMBOL(omapdss_dpi_display_disable);

void omapdss_dpi_set_timings(struct omap_dss_device *dssdev,
		struct omap_video_timings *timings)
{
	DSSDBG("dpi_set_timings\n");

	mutex_lock(&dpi.lock);

	dpi.timings = *timings;

	mutex_unlock(&dpi.lock);
}
EXPORT_SYMBOL(omapdss_dpi_set_timings);

int dpi_check_timings(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings)
{
	int r;
	struct omap_overlay_manager *mgr = dssdev->output->manager;
	int lck_div, pck_div;
	unsigned long fck;
	unsigned long pck;
	struct dispc_clock_info dispc_cinfo;

	if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
		return -EINVAL;

	if (timings->pixel_clock == 0)
		return -EINVAL;

	if (dpi.dsidev) {
		struct dsi_clock_info dsi_cinfo;
		r = dsi_pll_calc_clock_div_pck(dpi.dsidev,
				timings->pixel_clock * 1000,
				&dsi_cinfo, &dispc_cinfo);

		if (r)
			return r;

		fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
	} else {
		struct dss_clock_info dss_cinfo;
		r = dss_calc_clock_div(timings->pixel_clock * 1000,
				&dss_cinfo, &dispc_cinfo);

		if (r)
			return r;

		fck = dss_cinfo.fck;
	}

	lck_div = dispc_cinfo.lck_div;
	pck_div = dispc_cinfo.pck_div;

	pck = fck / lck_div / pck_div / 1000;

	timings->pixel_clock = pck;

	return 0;
}
EXPORT_SYMBOL(dpi_check_timings);

void omapdss_dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
{
	mutex_lock(&dpi.lock);

	dpi.data_lines = data_lines;

	mutex_unlock(&dpi.lock);
}
EXPORT_SYMBOL(omapdss_dpi_set_data_lines);

static int __init dpi_verify_dsi_pll(struct platform_device *dsidev)
{
	int r;

	/* do initial setup with the PLL to see if it is operational */

	r = dsi_runtime_get(dsidev);
	if (r)
		return r;

	r = dsi_pll_init(dsidev, 0, 1);
	if (r) {
		dsi_runtime_put(dsidev);
		return r;
	}

	dsi_pll_uninit(dsidev, true);
	dsi_runtime_put(dsidev);

	return 0;
}

static int __init dpi_init_display(struct omap_dss_device *dssdev)
{
	struct platform_device *dsidev;

	DSSDBG("init_display\n");

	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) &&
					dpi.vdds_dsi_reg == NULL) {
		struct regulator *vdds_dsi;

		vdds_dsi = dss_get_vdds_dsi();

		if (IS_ERR(vdds_dsi)) {
			DSSERR("can't get VDDS_DSI regulator\n");
			return PTR_ERR(vdds_dsi);
		}

		dpi.vdds_dsi_reg = vdds_dsi;
	}

	/*
	 * XXX We shouldn't need dssdev->channel for this. The dsi pll clock
	 * source for DPI is SoC integration detail, not something that should
	 * be configured in the dssdev
	 */
	dsidev = dpi_get_dsidev(dssdev->channel);

	if (dsidev && dpi_verify_dsi_pll(dsidev)) {
		dsidev = NULL;
		DSSWARN("DSI PLL not operational\n");
	}

	if (dsidev)
		DSSDBG("using DSI PLL for DPI clock\n");

	dpi.dsidev = dsidev;

	return 0;
}

static struct omap_dss_device * __init dpi_find_dssdev(struct platform_device *pdev)
{
	struct omap_dss_board_info *pdata = pdev->dev.platform_data;
	const char *def_disp_name = omapdss_get_default_display_name();
	struct omap_dss_device *def_dssdev;
	int i;

	def_dssdev = NULL;

	for (i = 0; i < pdata->num_devices; ++i) {
		struct omap_dss_device *dssdev = pdata->devices[i];

		if (dssdev->type != OMAP_DISPLAY_TYPE_DPI)
			continue;

		if (def_dssdev == NULL)
			def_dssdev = dssdev;

		if (def_disp_name != NULL &&
				strcmp(dssdev->name, def_disp_name) == 0) {
			def_dssdev = dssdev;
			break;
		}
	}

	return def_dssdev;
}

static void __init dpi_probe_pdata(struct platform_device *dpidev)
{
	struct omap_dss_device *plat_dssdev;
	struct omap_dss_device *dssdev;
	int r;

	plat_dssdev = dpi_find_dssdev(dpidev);

	if (!plat_dssdev)
		return;

	dssdev = dss_alloc_and_init_device(&dpidev->dev);
	if (!dssdev)
		return;

	dss_copy_device_pdata(dssdev, plat_dssdev);

	r = dpi_init_display(dssdev);
	if (r) {
		DSSERR("device %s init failed: %d\n", dssdev->name, r);
		dss_put_device(dssdev);
		return;
	}

	r = omapdss_output_set_device(&dpi.output, dssdev);
	if (r) {
		DSSERR("failed to connect output to new device: %s\n",
				dssdev->name);
		dss_put_device(dssdev);
		return;
	}

	r = dss_add_device(dssdev);
	if (r) {
		DSSERR("device %s register failed: %d\n", dssdev->name, r);
		omapdss_output_unset_device(&dpi.output);
		dss_put_device(dssdev);
		return;
	}
}

static void __init dpi_init_output(struct platform_device *pdev)
{
	struct omap_dss_output *out = &dpi.output;

	out->pdev = pdev;
	out->id = OMAP_DSS_OUTPUT_DPI;
	out->type = OMAP_DISPLAY_TYPE_DPI;

	dss_register_output(out);
}

static void __exit dpi_uninit_output(struct platform_device *pdev)
{
	struct omap_dss_output *out = &dpi.output;

	dss_unregister_output(out);
}

static int __init omap_dpi_probe(struct platform_device *pdev)
{
	mutex_init(&dpi.lock);

	dpi_init_output(pdev);

	dpi_probe_pdata(pdev);

	return 0;
}

static int __exit omap_dpi_remove(struct platform_device *pdev)
{
	dss_unregister_child_devices(&pdev->dev);

	dpi_uninit_output(pdev);

	return 0;
}

static struct platform_driver omap_dpi_driver = {
	.remove         = __exit_p(omap_dpi_remove),
	.driver         = {
		.name   = "omapdss_dpi",
		.owner  = THIS_MODULE,
	},
};

int __init dpi_init_platform_driver(void)
{
	return platform_driver_probe(&omap_dpi_driver, omap_dpi_probe);
}

void __exit dpi_uninit_platform_driver(void)
{
	platform_driver_unregister(&omap_dpi_driver);
}
Commit	Line	Data
553c48cf TV	1	/*
	2	* linux/drivers/video/omap2/dss/dpi.c
	3	*
	4	* Copyright (C) 2009 Nokia Corporation
	5	* Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
	6	*
	7	* Some code and ideas taken from drivers/video/omap/ driver
	8	* by Imre Deak.
	9	*
	10	* This program is free software; you can redistribute it and/or modify it
	11	* under the terms of the GNU General Public License version 2 as published by
	12	* the Free Software Foundation.
	13	*
	14	* This program is distributed in the hope that it will be useful, but WITHOUT
	15	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	16	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	17	* more details.
	18	*
	19	* You should have received a copy of the GNU General Public License along with
	20	* this program. If not, see <http://www.gnu.org/licenses/>.
	21	*/
	22
	23	#define DSS_SUBSYS_NAME "DPI"
	24
	25	#include <linux/kernel.h>
553c48cf	26	#include <linux/delay.h>
a8a35931	27	#include <linux/export.h>
8a2cfea8	28	#include <linux/err.h>
553c48cf	29	#include <linux/errno.h>
8a2cfea8 TV	30	#include <linux/platform_device.h>
8a2cfea8 TV	31	#include <linux/regulator/consumer.h>
13b1ba7d	32	#include <linux/string.h>
553c48cf	33
a0b38cc4	34	#include <video/omapdss.h>
553c48cf TV	35
553c48cf TV	36	#include "dss.h"
195e672a	37	#include "dss_features.h"
553c48cf TV	38
553c48cf TV	39	static struct {
8a2cfea8	40	struct regulator *vdds_dsi_reg;
a72b64b9	41	struct platform_device *dsidev;
5cf9a264	42
c8a5e4e8 AT	43	struct mutex lock;
c8a5e4e8 AT	44
c499144c	45	struct omap_video_timings timings;
5cf9a264	46	struct dss_lcd_mgr_config mgr_config;
c6b393d4	47	int data_lines;
81b87f51 AT	48
81b87f51 AT	49	struct omap_dss_output output;
553c48cf TV	50	} dpi;
553c48cf TV	51
0e8276ef	52	static struct platform_device *dpi_get_dsidev(enum omap_channel channel)
a72b64b9	53	{
0e8276ef TV	54	switch (channel) {
	55	case OMAP_DSS_CHANNEL_LCD:
	56	return dsi_get_dsidev_from_id(0);
	57	case OMAP_DSS_CHANNEL_LCD2:
	58	return dsi_get_dsidev_from_id(1);
	59	default:
	60	return NULL;
	61	}
a72b64b9 AT	62	}
a72b64b9 AT	63
0e8276ef	64	static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
7636b3b4	65	{
0e8276ef TV	66	switch (channel) {
	67	case OMAP_DSS_CHANNEL_LCD:
	68	return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
	69	case OMAP_DSS_CHANNEL_LCD2:
	70	return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
	71	default:
	72	/* this shouldn't happen */
	73	WARN_ON(1);
	74	return OMAP_DSS_CLK_SRC_FCK;
	75	}
7636b3b4 AT	76	}
7636b3b4 AT	77
6d523e7b	78	static int dpi_set_dsi_clk(struct omap_dss_device *dssdev,
ff1b2cde SS	79	unsigned long pck_req, unsigned long fck, int lck_div,
ff1b2cde SS	80	int *pck_div)
553c48cf	81	{
a5b8399f	82	struct omap_overlay_manager *mgr = dssdev->output->manager;
553c48cf TV	83	struct dsi_clock_info dsi_cinfo;
	84	struct dispc_clock_info dispc_cinfo;
	85	int r;
	86
6d523e7b AT	87	r = dsi_pll_calc_clock_div_pck(dpi.dsidev, pck_req, &dsi_cinfo,
6d523e7b AT	88	&dispc_cinfo);
553c48cf TV	89	if (r)
	90	return r;
	91
a72b64b9	92	r = dsi_pll_set_clock_div(dpi.dsidev, &dsi_cinfo);
553c48cf TV	93	if (r)
	94	return r;
	95
a5b8399f	96	dss_select_lcd_clk_source(mgr->id,
0e8276ef	97	dpi_get_alt_clk_src(mgr->id));
553c48cf	98
5cf9a264	99	dpi.mgr_config.clock_info = dispc_cinfo;
553c48cf	100
1bb47835	101	*fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
553c48cf TV	102	*lck_div = dispc_cinfo.lck_div;
	103	*pck_div = dispc_cinfo.pck_div;
	104
	105	return 0;
	106	}
7636b3b4	107
6d523e7b	108	static int dpi_set_dispc_clk(struct omap_dss_device *dssdev,
ff1b2cde SS	109	unsigned long pck_req, unsigned long fck, int lck_div,
ff1b2cde SS	110	int *pck_div)
553c48cf TV	111	{
	112	struct dss_clock_info dss_cinfo;
	113	struct dispc_clock_info dispc_cinfo;
	114	int r;
	115
6d523e7b	116	r = dss_calc_clock_div(pck_req, &dss_cinfo, &dispc_cinfo);
553c48cf TV	117	if (r)
	118	return r;
	119
	120	r = dss_set_clock_div(&dss_cinfo);
	121	if (r)
	122	return r;
	123
5cf9a264	124	dpi.mgr_config.clock_info = dispc_cinfo;
553c48cf TV	125
	126	*fck = dss_cinfo.fck;
	127	*lck_div = dispc_cinfo.lck_div;
	128	*pck_div = dispc_cinfo.pck_div;
	129
	130	return 0;
	131	}
553c48cf TV	132
	133	static int dpi_set_mode(struct omap_dss_device *dssdev)
	134	{
c499144c	135	struct omap_video_timings *t = &dpi.timings;
5d512fcd	136	struct omap_overlay_manager *mgr = dssdev->output->manager;
7636b3b4 AT	137	int lck_div = 0, pck_div = 0;
7636b3b4 AT	138	unsigned long fck = 0;
553c48cf	139	unsigned long pck;
553c48cf TV	140	int r = 0;
553c48cf TV	141
8a3db406	142	if (dpi.dsidev)
6d523e7b AT	143	r = dpi_set_dsi_clk(dssdev, t->pixel_clock * 1000, &fck,
6d523e7b AT	144	&lck_div, &pck_div);
7636b3b4	145	else
6d523e7b AT	146	r = dpi_set_dispc_clk(dssdev, t->pixel_clock * 1000, &fck,
6d523e7b AT	147	&lck_div, &pck_div);
553c48cf	148	if (r)
4fbafaf3	149	return r;
553c48cf TV	150
	151	pck = fck / lck_div / pck_div / 1000;
	152
	153	if (pck != t->pixel_clock) {
	154	DSSWARN("Could not find exact pixel clock. "
	155	"Requested %d kHz, got %lu kHz\n",
	156	t->pixel_clock, pck);
	157
	158	t->pixel_clock = pck;
	159	}
	160
5d512fcd	161	dss_mgr_set_timings(mgr, t);
553c48cf	162
4fbafaf3	163	return 0;
553c48cf TV	164	}
553c48cf TV	165
5cf9a264	166	static void dpi_config_lcd_manager(struct omap_dss_device *dssdev)
553c48cf	167	{
5d512fcd AT	168	struct omap_overlay_manager *mgr = dssdev->output->manager;
5d512fcd AT	169
5cf9a264	170	dpi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
569969d6	171
5cf9a264 AT	172	dpi.mgr_config.stallmode = false;
	173	dpi.mgr_config.fifohandcheck = false;
	174
c6b393d4	175	dpi.mgr_config.video_port_width = dpi.data_lines;
5cf9a264 AT	176
	177	dpi.mgr_config.lcden_sig_polarity = 0;
	178
5d512fcd	179	dss_mgr_set_lcd_config(mgr, &dpi.mgr_config);
553c48cf TV	180	}
553c48cf TV	181
37ac60e4	182	int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
553c48cf	183	{
5d512fcd	184	struct omap_dss_output *out = dssdev->output;
553c48cf TV	185	int r;
553c48cf TV	186
c8a5e4e8 AT	187	mutex_lock(&dpi.lock);
c8a5e4e8 AT	188
195e672a	189	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi.vdds_dsi_reg) {
40410715	190	DSSERR("no VDSS_DSI regulator\n");
c8a5e4e8 AT	191	r = -ENODEV;
c8a5e4e8 AT	192	goto err_no_reg;
40410715 RK	193	}
40410715 RK	194
5d512fcd AT	195	if (out == NULL \|\| out->manager == NULL) {
5d512fcd AT	196	DSSERR("failed to enable display: no output/manager\n");
c8a5e4e8	197	r = -ENODEV;
5d512fcd	198	goto err_no_out_mgr;
05e1d606 TV	199	}
05e1d606 TV	200
553c48cf TV	201	r = omap_dss_start_device(dssdev);
	202	if (r) {
	203	DSSERR("failed to start device\n");
4fbafaf3	204	goto err_start_dev;
553c48cf TV	205	}
553c48cf TV	206
195e672a	207	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
8a2cfea8 TV	208	r = regulator_enable(dpi.vdds_dsi_reg);
8a2cfea8 TV	209	if (r)
4fbafaf3	210	goto err_reg_enable;
8a2cfea8 TV	211	}
8a2cfea8 TV	212
4fbafaf3	213	r = dispc_runtime_get();
553c48cf	214	if (r)
4fbafaf3 TV	215	goto err_get_dispc;
4fbafaf3 TV	216
de09e455 TV	217	r = dss_dpi_select_source(dssdev->channel);
	218	if (r)
	219	goto err_src_sel;
	220
8a3db406	221	if (dpi.dsidev) {
4fbafaf3 TV	222	r = dsi_runtime_get(dpi.dsidev);
	223	if (r)
	224	goto err_get_dsi;
	225
a72b64b9	226	r = dsi_pll_init(dpi.dsidev, 0, 1);
7636b3b4	227	if (r)
4fbafaf3	228	goto err_dsi_pll_init;
7636b3b4 AT	229	}
7636b3b4 AT	230
553c48cf TV	231	r = dpi_set_mode(dssdev);
553c48cf TV	232	if (r)
4fbafaf3	233	goto err_set_mode;
553c48cf	234
5cf9a264 AT	235	dpi_config_lcd_manager(dssdev);
5cf9a264 AT	236
553c48cf TV	237	mdelay(2);
553c48cf TV	238
5d512fcd	239	r = dss_mgr_enable(out->manager);
33ca237f TV	240	if (r)
33ca237f TV	241	goto err_mgr_enable;
553c48cf	242
c8a5e4e8 AT	243	mutex_unlock(&dpi.lock);
c8a5e4e8 AT	244
553c48cf TV	245	return 0;
553c48cf TV	246
33ca237f	247	err_mgr_enable:
4fbafaf3	248	err_set_mode:
8a3db406	249	if (dpi.dsidev)
19077a73	250	dsi_pll_uninit(dpi.dsidev, true);
4fbafaf3	251	err_dsi_pll_init:
8a3db406	252	if (dpi.dsidev)
4fbafaf3 TV	253	dsi_runtime_put(dpi.dsidev);
4fbafaf3 TV	254	err_get_dsi:
de09e455	255	err_src_sel:
4fbafaf3 TV	256	dispc_runtime_put();
4fbafaf3 TV	257	err_get_dispc:
195e672a	258	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
8a2cfea8	259	regulator_disable(dpi.vdds_dsi_reg);
4fbafaf3	260	err_reg_enable:
553c48cf	261	omap_dss_stop_device(dssdev);
4fbafaf3	262	err_start_dev:
5d512fcd	263	err_no_out_mgr:
c8a5e4e8 AT	264	err_no_reg:
c8a5e4e8 AT	265	mutex_unlock(&dpi.lock);
553c48cf TV	266	return r;
553c48cf TV	267	}
37ac60e4	268	EXPORT_SYMBOL(omapdss_dpi_display_enable);
553c48cf	269
37ac60e4	270	void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
553c48cf	271	{
5d512fcd AT	272	struct omap_overlay_manager *mgr = dssdev->output->manager;
5d512fcd AT	273
c8a5e4e8 AT	274	mutex_lock(&dpi.lock);
c8a5e4e8 AT	275
5d512fcd	276	dss_mgr_disable(mgr);
553c48cf	277
8a3db406	278	if (dpi.dsidev) {
a5b8399f	279	dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
a72b64b9	280	dsi_pll_uninit(dpi.dsidev, true);
4fbafaf3	281	dsi_runtime_put(dpi.dsidev);
7636b3b4	282	}
553c48cf	283
4fbafaf3	284	dispc_runtime_put();
553c48cf	285
195e672a	286	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
8a2cfea8 TV	287	regulator_disable(dpi.vdds_dsi_reg);
8a2cfea8 TV	288
553c48cf	289	omap_dss_stop_device(dssdev);
c8a5e4e8 AT	290
c8a5e4e8 AT	291	mutex_unlock(&dpi.lock);
553c48cf	292	}
37ac60e4	293	EXPORT_SYMBOL(omapdss_dpi_display_disable);
553c48cf	294
c499144c AT	295	void omapdss_dpi_set_timings(struct omap_dss_device *dssdev,
c499144c AT	296	struct omap_video_timings *timings)
553c48cf TV	297	{
553c48cf TV	298	DSSDBG("dpi_set_timings\n");
c8a5e4e8 AT	299
	300	mutex_lock(&dpi.lock);
	301
c499144c	302	dpi.timings = *timings;
c499144c	303
c8a5e4e8	304	mutex_unlock(&dpi.lock);
553c48cf	305	}
c499144c	306	EXPORT_SYMBOL(omapdss_dpi_set_timings);
553c48cf	307
69b2048f	308	int dpi_check_timings(struct omap_dss_device *dssdev,
553c48cf TV	309	struct omap_video_timings *timings)
553c48cf TV	310	{
553c48cf	311	int r;
5d512fcd	312	struct omap_overlay_manager *mgr = dssdev->output->manager;
553c48cf TV	313	int lck_div, pck_div;
	314	unsigned long fck;
	315	unsigned long pck;
7636b3b4	316	struct dispc_clock_info dispc_cinfo;
553c48cf	317
8b095513	318	if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
553c48cf TV	319	return -EINVAL;
	320
	321	if (timings->pixel_clock == 0)
	322	return -EINVAL;
	323
8a3db406	324	if (dpi.dsidev) {
553c48cf	325	struct dsi_clock_info dsi_cinfo;
6d523e7b	326	r = dsi_pll_calc_clock_div_pck(dpi.dsidev,
553c48cf TV	327	timings->pixel_clock * 1000,
	328	&dsi_cinfo, &dispc_cinfo);
	329
	330	if (r)
	331	return r;
	332
1bb47835	333	fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
7636b3b4	334	} else {
553c48cf	335	struct dss_clock_info dss_cinfo;
6d523e7b	336	r = dss_calc_clock_div(timings->pixel_clock * 1000,
553c48cf TV	337	&dss_cinfo, &dispc_cinfo);
	338
	339	if (r)
	340	return r;
	341
	342	fck = dss_cinfo.fck;
553c48cf	343	}
7636b3b4 AT	344
	345	lck_div = dispc_cinfo.lck_div;
	346	pck_div = dispc_cinfo.pck_div;
553c48cf TV	347
	348	pck = fck / lck_div / pck_div / 1000;
	349
	350	timings->pixel_clock = pck;
	351
	352	return 0;
	353	}
69b2048f	354	EXPORT_SYMBOL(dpi_check_timings);
553c48cf	355
c6b393d4 AT	356	void omapdss_dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
	357	{
	358	mutex_lock(&dpi.lock);
	359
	360	dpi.data_lines = data_lines;
	361
	362	mutex_unlock(&dpi.lock);
	363	}
	364	EXPORT_SYMBOL(omapdss_dpi_set_data_lines);
	365
6061675b TV	366	static int __init dpi_verify_dsi_pll(struct platform_device *dsidev)
	367	{
	368	int r;
	369
	370	/* do initial setup with the PLL to see if it is operational */
	371
	372	r = dsi_runtime_get(dsidev);
	373	if (r)
	374	return r;
	375
	376	r = dsi_pll_init(dsidev, 0, 1);
	377	if (r) {
	378	dsi_runtime_put(dsidev);
	379	return r;
	380	}
	381
	382	dsi_pll_uninit(dsidev, true);
	383	dsi_runtime_put(dsidev);
	384
	385	return 0;
	386	}
	387
9d8232a7	388	static int __init dpi_init_display(struct omap_dss_device *dssdev)
553c48cf	389	{
0e8276ef TV	390	struct platform_device *dsidev;
0e8276ef TV	391
553c48cf TV	392	DSSDBG("init_display\n");
553c48cf TV	393
195e672a CM	394	if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) &&
195e672a CM	395	dpi.vdds_dsi_reg == NULL) {
5f42f2ce	396	struct regulator *vdds_dsi;
553c48cf	397
5f42f2ce TV	398	vdds_dsi = dss_get_vdds_dsi();
	399
	400	if (IS_ERR(vdds_dsi)) {
8a2cfea8	401	DSSERR("can't get VDDS_DSI regulator\n");
5f42f2ce	402	return PTR_ERR(vdds_dsi);
8a2cfea8	403	}
5f42f2ce TV	404
5f42f2ce TV	405	dpi.vdds_dsi_reg = vdds_dsi;
8a2cfea8 TV	406	}
8a2cfea8 TV	407
0e8276ef TV	408	/*
	409	* XXX We shouldn't need dssdev->channel for this. The dsi pll clock
	410	* source for DPI is SoC integration detail, not something that should
	411	* be configured in the dssdev
	412	*/
	413	dsidev = dpi_get_dsidev(dssdev->channel);
6061675b	414
1de8e129	415	if (dsidev && dpi_verify_dsi_pll(dsidev)) {
0e8276ef TV	416	dsidev = NULL;
0e8276ef TV	417	DSSWARN("DSI PLL not operational\n");
a72b64b9 AT	418	}
a72b64b9 AT	419
0e8276ef TV	420	if (dsidev)
	421	DSSDBG("using DSI PLL for DPI clock\n");
	422
	423	dpi.dsidev = dsidev;
	424
553c48cf TV	425	return 0;
	426	}
	427
1521653c	428	static struct omap_dss_device * __init dpi_find_dssdev(struct platform_device *pdev)
5f42f2ce	429	{
35deca3d	430	struct omap_dss_board_info *pdata = pdev->dev.platform_data;
2bbcce5e	431	const char *def_disp_name = omapdss_get_default_display_name();
1521653c TV	432	struct omap_dss_device *def_dssdev;
	433	int i;
	434
	435	def_dssdev = NULL;
35deca3d TV	436
	437	for (i = 0; i < pdata->num_devices; ++i) {
	438	struct omap_dss_device *dssdev = pdata->devices[i];
	439
	440	if (dssdev->type != OMAP_DISPLAY_TYPE_DPI)
	441	continue;
	442
1521653c TV	443	if (def_dssdev == NULL)
	444	def_dssdev = dssdev;
	445
	446	if (def_disp_name != NULL &&
	447	strcmp(dssdev->name, def_disp_name) == 0) {
	448	def_dssdev = dssdev;
	449	break;
9d8232a7	450	}
1521653c	451	}
9d8232a7	452
1521653c TV	453	return def_dssdev;
	454	}
	455
5274484b	456	static void __init dpi_probe_pdata(struct platform_device *dpidev)
1521653c	457	{
5274484b	458	struct omap_dss_device *plat_dssdev;
1521653c TV	459	struct omap_dss_device *dssdev;
	460	int r;
	461
5274484b	462	plat_dssdev = dpi_find_dssdev(dpidev);
1521653c	463
5274484b TV	464	if (!plat_dssdev)
	465	return;
	466
	467	dssdev = dss_alloc_and_init_device(&dpidev->dev);
1521653c TV	468	if (!dssdev)
	469	return;
	470
5274484b TV	471	dss_copy_device_pdata(dssdev, plat_dssdev);
5274484b TV	472
1521653c TV	473	r = dpi_init_display(dssdev);
	474	if (r) {
	475	DSSERR("device %s init failed: %d\n", dssdev->name, r);
5274484b	476	dss_put_device(dssdev);
1521653c TV	477	return;
	478	}
	479
486c0e17 TV	480	r = omapdss_output_set_device(&dpi.output, dssdev);
	481	if (r) {
	482	DSSERR("failed to connect output to new device: %s\n",
	483	dssdev->name);
	484	dss_put_device(dssdev);
	485	return;
	486	}
	487
5274484b	488	r = dss_add_device(dssdev);
1521653c TV	489	if (r) {
1521653c TV	490	DSSERR("device %s register failed: %d\n", dssdev->name, r);
486c0e17	491	omapdss_output_unset_device(&dpi.output);
5274484b	492	dss_put_device(dssdev);
1521653c	493	return;
35deca3d	494	}
38f3daf6 TV	495	}
38f3daf6 TV	496
81b87f51 AT	497	static void __init dpi_init_output(struct platform_device *pdev)
	498	{
	499	struct omap_dss_output *out = &dpi.output;
	500
	501	out->pdev = pdev;
	502	out->id = OMAP_DSS_OUTPUT_DPI;
	503	out->type = OMAP_DISPLAY_TYPE_DPI;
	504
	505	dss_register_output(out);
	506	}
	507
	508	static void __exit dpi_uninit_output(struct platform_device *pdev)
	509	{
	510	struct omap_dss_output *out = &dpi.output;
	511
	512	dss_unregister_output(out);
	513	}
	514
38f3daf6 TV	515	static int __init omap_dpi_probe(struct platform_device *pdev)
38f3daf6 TV	516	{
c8a5e4e8 AT	517	mutex_init(&dpi.lock);
c8a5e4e8 AT	518
81b87f51 AT	519	dpi_init_output(pdev);
81b87f51 AT	520
38f3daf6	521	dpi_probe_pdata(pdev);
35deca3d	522
5f42f2ce TV	523	return 0;
	524	}
	525
6e7e8f06	526	static int __exit omap_dpi_remove(struct platform_device *pdev)
553c48cf	527	{
5274484b	528	dss_unregister_child_devices(&pdev->dev);
35deca3d	529
81b87f51 AT	530	dpi_uninit_output(pdev);
81b87f51 AT	531
a57dd4fe	532	return 0;
553c48cf TV	533	}
553c48cf TV	534
a57dd4fe	535	static struct platform_driver omap_dpi_driver = {
6e7e8f06	536	.remove = __exit_p(omap_dpi_remove),
a57dd4fe TV	537	.driver = {
	538	.name = "omapdss_dpi",
	539	.owner = THIS_MODULE,
	540	},
	541	};
	542
6e7e8f06	543	int __init dpi_init_platform_driver(void)
a57dd4fe	544	{
61055d4b	545	return platform_driver_probe(&omap_dpi_driver, omap_dpi_probe);
a57dd4fe TV	546	}
a57dd4fe TV	547
6e7e8f06	548	void __exit dpi_uninit_platform_driver(void)
a57dd4fe TV	549	{
	550	platform_driver_unregister(&omap_dpi_driver);
	551	}