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7654b4d3 SS |
1 | /* |
2 | * LCD panel driver for LG.Philips LB035Q02 | |
3 | * | |
4 | * Author: Steve Sakoman <steve@sakoman.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published by | |
8 | * the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along with | |
16 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
17 | */ | |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/spi/spi.h> | |
22 | #include <linux/mutex.h> | |
23 | ||
a0b38cc4 | 24 | #include <video/omapdss.h> |
7654b4d3 SS |
25 | |
26 | struct lb035q02_data { | |
27 | struct mutex lock; | |
28 | }; | |
29 | ||
30 | static struct omap_video_timings lb035q02_timings = { | |
31 | .x_res = 320, | |
32 | .y_res = 240, | |
33 | ||
34 | .pixel_clock = 6500, | |
35 | ||
36 | .hsw = 2, | |
37 | .hfp = 20, | |
38 | .hbp = 68, | |
39 | ||
40 | .vsw = 2, | |
41 | .vfp = 4, | |
42 | .vbp = 18, | |
a8d5e41c AT |
43 | |
44 | .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, | |
45 | .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, | |
46 | .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, | |
47 | .de_level = OMAPDSS_SIG_ACTIVE_HIGH, | |
48 | .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, | |
7654b4d3 SS |
49 | }; |
50 | ||
51 | static int lb035q02_panel_power_on(struct omap_dss_device *dssdev) | |
52 | { | |
53 | int r; | |
54 | ||
55 | if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) | |
56 | return 0; | |
57 | ||
c499144c | 58 | omapdss_dpi_set_timings(dssdev, &dssdev->panel.timings); |
c6b393d4 | 59 | omapdss_dpi_set_data_lines(dssdev, dssdev->phy.dpi.data_lines); |
c499144c | 60 | |
7654b4d3 SS |
61 | r = omapdss_dpi_display_enable(dssdev); |
62 | if (r) | |
63 | goto err0; | |
64 | ||
65 | if (dssdev->platform_enable) { | |
66 | r = dssdev->platform_enable(dssdev); | |
67 | if (r) | |
68 | goto err1; | |
69 | } | |
70 | ||
71 | return 0; | |
72 | err1: | |
73 | omapdss_dpi_display_disable(dssdev); | |
74 | err0: | |
75 | return r; | |
76 | } | |
77 | ||
78 | static void lb035q02_panel_power_off(struct omap_dss_device *dssdev) | |
79 | { | |
80 | if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) | |
81 | return; | |
82 | ||
83 | if (dssdev->platform_disable) | |
84 | dssdev->platform_disable(dssdev); | |
85 | ||
86 | omapdss_dpi_display_disable(dssdev); | |
87 | } | |
88 | ||
89 | static int lb035q02_panel_probe(struct omap_dss_device *dssdev) | |
90 | { | |
91 | struct lb035q02_data *ld; | |
92 | int r; | |
93 | ||
7654b4d3 SS |
94 | dssdev->panel.timings = lb035q02_timings; |
95 | ||
96 | ld = kzalloc(sizeof(*ld), GFP_KERNEL); | |
97 | if (!ld) { | |
98 | r = -ENOMEM; | |
99 | goto err; | |
100 | } | |
101 | mutex_init(&ld->lock); | |
102 | dev_set_drvdata(&dssdev->dev, ld); | |
103 | return 0; | |
104 | err: | |
105 | return r; | |
106 | } | |
107 | ||
108 | static void lb035q02_panel_remove(struct omap_dss_device *dssdev) | |
109 | { | |
110 | struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev); | |
111 | ||
112 | kfree(ld); | |
113 | } | |
114 | ||
115 | static int lb035q02_panel_enable(struct omap_dss_device *dssdev) | |
116 | { | |
117 | struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev); | |
118 | int r; | |
119 | ||
120 | mutex_lock(&ld->lock); | |
121 | ||
122 | r = lb035q02_panel_power_on(dssdev); | |
123 | if (r) | |
124 | goto err; | |
125 | dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; | |
126 | ||
127 | mutex_unlock(&ld->lock); | |
128 | return 0; | |
129 | err: | |
130 | mutex_unlock(&ld->lock); | |
131 | return r; | |
132 | } | |
133 | ||
134 | static void lb035q02_panel_disable(struct omap_dss_device *dssdev) | |
135 | { | |
136 | struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev); | |
137 | ||
138 | mutex_lock(&ld->lock); | |
139 | ||
140 | lb035q02_panel_power_off(dssdev); | |
141 | dssdev->state = OMAP_DSS_DISPLAY_DISABLED; | |
142 | ||
143 | mutex_unlock(&ld->lock); | |
144 | } | |
145 | ||
7654b4d3 SS |
146 | static struct omap_dss_driver lb035q02_driver = { |
147 | .probe = lb035q02_panel_probe, | |
148 | .remove = lb035q02_panel_remove, | |
149 | ||
150 | .enable = lb035q02_panel_enable, | |
151 | .disable = lb035q02_panel_disable, | |
7654b4d3 SS |
152 | |
153 | .driver = { | |
154 | .name = "lgphilips_lb035q02_panel", | |
155 | .owner = THIS_MODULE, | |
156 | }, | |
157 | }; | |
158 | ||
159 | static int lb035q02_write_reg(struct spi_device *spi, u8 reg, u16 val) | |
160 | { | |
161 | struct spi_message msg; | |
162 | struct spi_transfer index_xfer = { | |
163 | .len = 3, | |
164 | .cs_change = 1, | |
165 | }; | |
166 | struct spi_transfer value_xfer = { | |
167 | .len = 3, | |
168 | }; | |
169 | u8 buffer[16]; | |
170 | ||
171 | spi_message_init(&msg); | |
172 | ||
173 | /* register index */ | |
174 | buffer[0] = 0x70; | |
175 | buffer[1] = 0x00; | |
176 | buffer[2] = reg & 0x7f; | |
177 | index_xfer.tx_buf = buffer; | |
178 | spi_message_add_tail(&index_xfer, &msg); | |
179 | ||
180 | /* register value */ | |
181 | buffer[4] = 0x72; | |
182 | buffer[5] = val >> 8; | |
183 | buffer[6] = val; | |
184 | value_xfer.tx_buf = buffer + 4; | |
185 | spi_message_add_tail(&value_xfer, &msg); | |
186 | ||
187 | return spi_sync(spi, &msg); | |
188 | } | |
189 | ||
190 | static void init_lb035q02_panel(struct spi_device *spi) | |
191 | { | |
192 | /* Init sequence from page 28 of the lb035q02 spec */ | |
193 | lb035q02_write_reg(spi, 0x01, 0x6300); | |
194 | lb035q02_write_reg(spi, 0x02, 0x0200); | |
195 | lb035q02_write_reg(spi, 0x03, 0x0177); | |
196 | lb035q02_write_reg(spi, 0x04, 0x04c7); | |
197 | lb035q02_write_reg(spi, 0x05, 0xffc0); | |
198 | lb035q02_write_reg(spi, 0x06, 0xe806); | |
199 | lb035q02_write_reg(spi, 0x0a, 0x4008); | |
200 | lb035q02_write_reg(spi, 0x0b, 0x0000); | |
201 | lb035q02_write_reg(spi, 0x0d, 0x0030); | |
202 | lb035q02_write_reg(spi, 0x0e, 0x2800); | |
203 | lb035q02_write_reg(spi, 0x0f, 0x0000); | |
204 | lb035q02_write_reg(spi, 0x16, 0x9f80); | |
205 | lb035q02_write_reg(spi, 0x17, 0x0a0f); | |
206 | lb035q02_write_reg(spi, 0x1e, 0x00c1); | |
207 | lb035q02_write_reg(spi, 0x30, 0x0300); | |
208 | lb035q02_write_reg(spi, 0x31, 0x0007); | |
209 | lb035q02_write_reg(spi, 0x32, 0x0000); | |
210 | lb035q02_write_reg(spi, 0x33, 0x0000); | |
211 | lb035q02_write_reg(spi, 0x34, 0x0707); | |
212 | lb035q02_write_reg(spi, 0x35, 0x0004); | |
213 | lb035q02_write_reg(spi, 0x36, 0x0302); | |
214 | lb035q02_write_reg(spi, 0x37, 0x0202); | |
215 | lb035q02_write_reg(spi, 0x3a, 0x0a0d); | |
216 | lb035q02_write_reg(spi, 0x3b, 0x0806); | |
217 | } | |
218 | ||
48c68c4f | 219 | static int lb035q02_panel_spi_probe(struct spi_device *spi) |
7654b4d3 SS |
220 | { |
221 | init_lb035q02_panel(spi); | |
222 | return omap_dss_register_driver(&lb035q02_driver); | |
223 | } | |
224 | ||
48c68c4f | 225 | static int lb035q02_panel_spi_remove(struct spi_device *spi) |
7654b4d3 SS |
226 | { |
227 | omap_dss_unregister_driver(&lb035q02_driver); | |
228 | return 0; | |
229 | } | |
230 | ||
231 | static struct spi_driver lb035q02_spi_driver = { | |
232 | .driver = { | |
233 | .name = "lgphilips_lb035q02_panel-spi", | |
234 | .owner = THIS_MODULE, | |
235 | }, | |
236 | .probe = lb035q02_panel_spi_probe, | |
48c68c4f | 237 | .remove = lb035q02_panel_spi_remove, |
7654b4d3 SS |
238 | }; |
239 | ||
c6d242aa | 240 | module_spi_driver(lb035q02_spi_driver); |
7654b4d3 | 241 | |
7654b4d3 | 242 | MODULE_LICENSE("GPL"); |