Commit | Line | Data |
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7c2f891c | 1 | /* |
7c2f891c SH |
2 | * Freescale i.MX Frame Buffer device driver |
3 | * | |
4 | * Copyright (C) 2004 Sascha Hauer, Pengutronix | |
5 | * Based on acornfb.c Copyright (C) Russell King. | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file COPYING in the main directory of this archive for | |
9 | * more details. | |
10 | * | |
11 | * Please direct your questions and comments on this driver to the following | |
12 | * email address: | |
13 | * | |
14 | * linux-arm-kernel@lists.arm.linux.org.uk | |
15 | */ | |
16 | ||
7c2f891c | 17 | |
7c2f891c SH |
18 | #include <linux/module.h> |
19 | #include <linux/kernel.h> | |
7c2f891c SH |
20 | #include <linux/errno.h> |
21 | #include <linux/string.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/slab.h> | |
27ac792c | 24 | #include <linux/mm.h> |
7c2f891c SH |
25 | #include <linux/fb.h> |
26 | #include <linux/delay.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/ioport.h> | |
29 | #include <linux/cpufreq.h> | |
d052d1be | 30 | #include <linux/platform_device.h> |
7c2f891c | 31 | #include <linux/dma-mapping.h> |
72330b0e | 32 | #include <linux/io.h> |
7c2f891c | 33 | |
a09e64fb | 34 | #include <mach/imxfb.h> |
7c2f891c SH |
35 | |
36 | /* | |
37 | * Complain if VAR is out of range. | |
38 | */ | |
39 | #define DEBUG_VAR 1 | |
40 | ||
72330b0e JB |
41 | #define DRIVER_NAME "imx-fb" |
42 | ||
43 | #define LCDC_SSA 0x00 | |
44 | ||
45 | #define LCDC_SIZE 0x04 | |
46 | #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) | |
47 | #define SIZE_YMAX(y) ((y) & 0x1ff) | |
48 | ||
49 | #define LCDC_VPW 0x08 | |
50 | #define VPW_VPW(x) ((x) & 0x3ff) | |
51 | ||
52 | #define LCDC_CPOS 0x0C | |
53 | #define CPOS_CC1 (1<<31) | |
54 | #define CPOS_CC0 (1<<30) | |
55 | #define CPOS_OP (1<<28) | |
56 | #define CPOS_CXP(x) (((x) & 3ff) << 16) | |
57 | #define CPOS_CYP(y) ((y) & 0x1ff) | |
58 | ||
59 | #define LCDC_LCWHB 0x10 | |
60 | #define LCWHB_BK_EN (1<<31) | |
61 | #define LCWHB_CW(w) (((w) & 0x1f) << 24) | |
62 | #define LCWHB_CH(h) (((h) & 0x1f) << 16) | |
63 | #define LCWHB_BD(x) ((x) & 0xff) | |
64 | ||
65 | #define LCDC_LCHCC 0x14 | |
66 | #define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) | |
67 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) | |
68 | #define LCHCC_CUR_COL_B(b) ((b) & 0x1f) | |
69 | ||
70 | #define LCDC_PCR 0x18 | |
71 | ||
72 | #define LCDC_HCR 0x1C | |
73 | #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) | |
74 | #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) | |
75 | #define HCR_H_WAIT_2(x) ((x) & 0xff) | |
76 | ||
77 | #define LCDC_VCR 0x20 | |
78 | #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) | |
79 | #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) | |
80 | #define VCR_V_WAIT_2(x) ((x) & 0xff) | |
81 | ||
82 | #define LCDC_POS 0x24 | |
83 | #define POS_POS(x) ((x) & 1f) | |
84 | ||
85 | #define LCDC_LSCR1 0x28 | |
86 | /* bit fields in imxfb.h */ | |
87 | ||
88 | #define LCDC_PWMR 0x2C | |
89 | /* bit fields in imxfb.h */ | |
90 | ||
91 | #define LCDC_DMACR 0x30 | |
92 | /* bit fields in imxfb.h */ | |
93 | ||
94 | #define LCDC_RMCR 0x34 | |
95 | #define RMCR_LCDC_EN (1<<1) | |
96 | #define RMCR_SELF_REF (1<<0) | |
97 | ||
98 | #define LCDC_LCDICR 0x38 | |
99 | #define LCDICR_INT_SYN (1<<2) | |
100 | #define LCDICR_INT_CON (1) | |
101 | ||
102 | #define LCDC_LCDISR 0x40 | |
103 | #define LCDISR_UDR_ERR (1<<3) | |
104 | #define LCDISR_ERR_RES (1<<2) | |
105 | #define LCDISR_EOF (1<<1) | |
106 | #define LCDISR_BOF (1<<0) | |
107 | ||
24b9baf7 SH |
108 | /* |
109 | * These are the bitfields for each | |
110 | * display depth that we support. | |
111 | */ | |
112 | struct imxfb_rgb { | |
113 | struct fb_bitfield red; | |
114 | struct fb_bitfield green; | |
115 | struct fb_bitfield blue; | |
116 | struct fb_bitfield transp; | |
117 | }; | |
118 | ||
119 | #define RGB_16 (0) | |
120 | #define RGB_8 (1) | |
121 | #define NR_RGB 2 | |
122 | ||
123 | struct imxfb_info { | |
124 | struct platform_device *pdev; | |
125 | void __iomem *regs; | |
126 | ||
127 | struct imxfb_rgb *rgb[NR_RGB]; | |
128 | ||
129 | u_int max_bpp; | |
130 | u_int max_xres; | |
131 | u_int max_yres; | |
132 | ||
133 | /* | |
134 | * These are the addresses we mapped | |
135 | * the framebuffer memory region to. | |
136 | */ | |
137 | dma_addr_t map_dma; | |
138 | u_char *map_cpu; | |
139 | u_int map_size; | |
140 | ||
141 | u_char *screen_cpu; | |
142 | dma_addr_t screen_dma; | |
143 | u_int palette_size; | |
144 | ||
145 | dma_addr_t dbar1; | |
146 | dma_addr_t dbar2; | |
147 | ||
148 | u_int pcr; | |
149 | u_int pwmr; | |
150 | u_int lscr1; | |
151 | u_int dmacr; | |
152 | u_int cmap_inverse:1, | |
153 | cmap_static:1, | |
154 | unused:30; | |
155 | ||
156 | void (*lcd_power)(int); | |
157 | void (*backlight_power)(int); | |
158 | }; | |
159 | ||
160 | #define IMX_NAME "IMX" | |
161 | ||
162 | /* | |
163 | * Minimum X and Y resolutions | |
164 | */ | |
165 | #define MIN_XRES 64 | |
166 | #define MIN_YRES 64 | |
167 | ||
7c2f891c | 168 | static struct imxfb_rgb def_rgb_16 = { |
66c8719b SH |
169 | .red = {.offset = 8, .length = 4,}, |
170 | .green = {.offset = 4, .length = 4,}, | |
171 | .blue = {.offset = 0, .length = 4,}, | |
172 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
173 | }; |
174 | ||
175 | static struct imxfb_rgb def_rgb_8 = { | |
66c8719b SH |
176 | .red = {.offset = 0, .length = 8,}, |
177 | .green = {.offset = 0, .length = 8,}, | |
178 | .blue = {.offset = 0, .length = 8,}, | |
179 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
180 | }; |
181 | ||
66c8719b SH |
182 | static int imxfb_activate_var(struct fb_var_screeninfo *var, |
183 | struct fb_info *info); | |
7c2f891c SH |
184 | |
185 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | |
186 | { | |
187 | chan &= 0xffff; | |
188 | chan >>= 16 - bf->length; | |
189 | return chan << bf->offset; | |
190 | } | |
191 | ||
66c8719b SH |
192 | static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
193 | u_int trans, struct fb_info *info) | |
7c2f891c SH |
194 | { |
195 | struct imxfb_info *fbi = info->par; | |
196 | u_int val, ret = 1; | |
197 | ||
198 | #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) | |
199 | if (regno < fbi->palette_size) { | |
200 | val = (CNVT_TOHW(red, 4) << 8) | | |
201 | (CNVT_TOHW(green,4) << 4) | | |
202 | CNVT_TOHW(blue, 4); | |
203 | ||
72330b0e | 204 | writel(val, fbi->regs + 0x800 + (regno << 2)); |
7c2f891c SH |
205 | ret = 0; |
206 | } | |
207 | return ret; | |
208 | } | |
209 | ||
66c8719b | 210 | static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
7c2f891c SH |
211 | u_int trans, struct fb_info *info) |
212 | { | |
213 | struct imxfb_info *fbi = info->par; | |
214 | unsigned int val; | |
215 | int ret = 1; | |
216 | ||
217 | /* | |
218 | * If inverse mode was selected, invert all the colours | |
219 | * rather than the register number. The register number | |
220 | * is what you poke into the framebuffer to produce the | |
221 | * colour you requested. | |
222 | */ | |
223 | if (fbi->cmap_inverse) { | |
224 | red = 0xffff - red; | |
225 | green = 0xffff - green; | |
226 | blue = 0xffff - blue; | |
227 | } | |
228 | ||
229 | /* | |
230 | * If greyscale is true, then we convert the RGB value | |
231 | * to greyscale no mater what visual we are using. | |
232 | */ | |
233 | if (info->var.grayscale) | |
234 | red = green = blue = (19595 * red + 38470 * green + | |
235 | 7471 * blue) >> 16; | |
236 | ||
237 | switch (info->fix.visual) { | |
238 | case FB_VISUAL_TRUECOLOR: | |
239 | /* | |
240 | * 12 or 16-bit True Colour. We encode the RGB value | |
241 | * according to the RGB bitfield information. | |
242 | */ | |
243 | if (regno < 16) { | |
244 | u32 *pal = info->pseudo_palette; | |
245 | ||
246 | val = chan_to_field(red, &info->var.red); | |
247 | val |= chan_to_field(green, &info->var.green); | |
248 | val |= chan_to_field(blue, &info->var.blue); | |
249 | ||
250 | pal[regno] = val; | |
251 | ret = 0; | |
252 | } | |
253 | break; | |
254 | ||
255 | case FB_VISUAL_STATIC_PSEUDOCOLOR: | |
256 | case FB_VISUAL_PSEUDOCOLOR: | |
257 | ret = imxfb_setpalettereg(regno, red, green, blue, trans, info); | |
258 | break; | |
259 | } | |
260 | ||
261 | return ret; | |
262 | } | |
263 | ||
264 | /* | |
265 | * imxfb_check_var(): | |
266 | * Round up in the following order: bits_per_pixel, xres, | |
267 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, | |
268 | * bitfields, horizontal timing, vertical timing. | |
269 | */ | |
66c8719b | 270 | static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
7c2f891c SH |
271 | { |
272 | struct imxfb_info *fbi = info->par; | |
273 | int rgbidx; | |
274 | ||
275 | if (var->xres < MIN_XRES) | |
276 | var->xres = MIN_XRES; | |
277 | if (var->yres < MIN_YRES) | |
278 | var->yres = MIN_YRES; | |
279 | if (var->xres > fbi->max_xres) | |
280 | var->xres = fbi->max_xres; | |
281 | if (var->yres > fbi->max_yres) | |
282 | var->yres = fbi->max_yres; | |
283 | var->xres_virtual = max(var->xres_virtual, var->xres); | |
284 | var->yres_virtual = max(var->yres_virtual, var->yres); | |
285 | ||
286 | pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); | |
287 | switch (var->bits_per_pixel) { | |
288 | case 16: | |
289 | rgbidx = RGB_16; | |
290 | break; | |
291 | case 8: | |
292 | rgbidx = RGB_8; | |
293 | break; | |
294 | default: | |
295 | rgbidx = RGB_16; | |
296 | } | |
297 | ||
298 | /* | |
299 | * Copy the RGB parameters for this display | |
300 | * from the machine specific parameters. | |
301 | */ | |
302 | var->red = fbi->rgb[rgbidx]->red; | |
303 | var->green = fbi->rgb[rgbidx]->green; | |
304 | var->blue = fbi->rgb[rgbidx]->blue; | |
305 | var->transp = fbi->rgb[rgbidx]->transp; | |
306 | ||
307 | pr_debug("RGBT length = %d:%d:%d:%d\n", | |
308 | var->red.length, var->green.length, var->blue.length, | |
309 | var->transp.length); | |
310 | ||
311 | pr_debug("RGBT offset = %d:%d:%d:%d\n", | |
312 | var->red.offset, var->green.offset, var->blue.offset, | |
313 | var->transp.offset); | |
314 | ||
315 | return 0; | |
316 | } | |
317 | ||
318 | /* | |
319 | * imxfb_set_par(): | |
320 | * Set the user defined part of the display for the specified console | |
321 | */ | |
322 | static int imxfb_set_par(struct fb_info *info) | |
323 | { | |
324 | struct imxfb_info *fbi = info->par; | |
325 | struct fb_var_screeninfo *var = &info->var; | |
326 | ||
327 | pr_debug("set_par\n"); | |
328 | ||
329 | if (var->bits_per_pixel == 16) | |
330 | info->fix.visual = FB_VISUAL_TRUECOLOR; | |
331 | else if (!fbi->cmap_static) | |
332 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
333 | else { | |
334 | /* | |
335 | * Some people have weird ideas about wanting static | |
336 | * pseudocolor maps. I suspect their user space | |
337 | * applications are broken. | |
338 | */ | |
339 | info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; | |
340 | } | |
341 | ||
66c8719b | 342 | info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; |
7c2f891c SH |
343 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; |
344 | ||
345 | imxfb_activate_var(var, info); | |
346 | ||
347 | return 0; | |
348 | } | |
349 | ||
350 | static void imxfb_enable_controller(struct imxfb_info *fbi) | |
351 | { | |
352 | pr_debug("Enabling LCD controller\n"); | |
353 | ||
354 | /* initialize LCDC */ | |
72330b0e JB |
355 | writel(readl(fbi->regs + LCDC_RMCR) & ~RMCR_LCDC_EN, |
356 | fbi->regs + LCDC_RMCR); /* just to be safe... */ | |
357 | ||
358 | writel(fbi->screen_dma, fbi->regs + LCDC_SSA); | |
7c2f891c | 359 | |
7c2f891c | 360 | /* physical screen start address */ |
72330b0e JB |
361 | writel(VPW_VPW(fbi->max_xres * fbi->max_bpp / 8 / 4), |
362 | fbi->regs + LCDC_VPW); | |
7c2f891c | 363 | |
72330b0e JB |
364 | /* panning offset 0 (0 pixel offset) */ |
365 | writel(0x00000000, fbi->regs + LCDC_POS); | |
7c2f891c SH |
366 | |
367 | /* disable hardware cursor */ | |
72330b0e JB |
368 | writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), |
369 | fbi->regs + LCDC_CPOS); | |
7c2f891c | 370 | |
72330b0e | 371 | writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); |
7c2f891c | 372 | |
66c8719b | 373 | if (fbi->backlight_power) |
7c2f891c | 374 | fbi->backlight_power(1); |
66c8719b | 375 | if (fbi->lcd_power) |
7c2f891c SH |
376 | fbi->lcd_power(1); |
377 | } | |
378 | ||
379 | static void imxfb_disable_controller(struct imxfb_info *fbi) | |
380 | { | |
381 | pr_debug("Disabling LCD controller\n"); | |
382 | ||
66c8719b | 383 | if (fbi->backlight_power) |
7c2f891c | 384 | fbi->backlight_power(0); |
66c8719b | 385 | if (fbi->lcd_power) |
7c2f891c SH |
386 | fbi->lcd_power(0); |
387 | ||
72330b0e | 388 | writel(0, fbi->regs + LCDC_RMCR); |
7c2f891c SH |
389 | } |
390 | ||
391 | static int imxfb_blank(int blank, struct fb_info *info) | |
392 | { | |
393 | struct imxfb_info *fbi = info->par; | |
394 | ||
395 | pr_debug("imxfb_blank: blank=%d\n", blank); | |
396 | ||
397 | switch (blank) { | |
398 | case FB_BLANK_POWERDOWN: | |
399 | case FB_BLANK_VSYNC_SUSPEND: | |
400 | case FB_BLANK_HSYNC_SUSPEND: | |
401 | case FB_BLANK_NORMAL: | |
402 | imxfb_disable_controller(fbi); | |
403 | break; | |
404 | ||
405 | case FB_BLANK_UNBLANK: | |
406 | imxfb_enable_controller(fbi); | |
407 | break; | |
408 | } | |
409 | return 0; | |
410 | } | |
411 | ||
412 | static struct fb_ops imxfb_ops = { | |
413 | .owner = THIS_MODULE, | |
414 | .fb_check_var = imxfb_check_var, | |
415 | .fb_set_par = imxfb_set_par, | |
416 | .fb_setcolreg = imxfb_setcolreg, | |
417 | .fb_fillrect = cfb_fillrect, | |
418 | .fb_copyarea = cfb_copyarea, | |
419 | .fb_imageblit = cfb_imageblit, | |
420 | .fb_blank = imxfb_blank, | |
7c2f891c SH |
421 | }; |
422 | ||
423 | /* | |
424 | * imxfb_activate_var(): | |
425 | * Configures LCD Controller based on entries in var parameter. Settings are | |
426 | * only written to the controller if changes were made. | |
427 | */ | |
428 | static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
429 | { | |
430 | struct imxfb_info *fbi = info->par; | |
431 | pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", | |
432 | var->xres, var->hsync_len, | |
433 | var->left_margin, var->right_margin); | |
434 | pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n", | |
435 | var->yres, var->vsync_len, | |
436 | var->upper_margin, var->lower_margin); | |
437 | ||
438 | #if DEBUG_VAR | |
439 | if (var->xres < 16 || var->xres > 1024) | |
440 | printk(KERN_ERR "%s: invalid xres %d\n", | |
441 | info->fix.id, var->xres); | |
442 | if (var->hsync_len < 1 || var->hsync_len > 64) | |
443 | printk(KERN_ERR "%s: invalid hsync_len %d\n", | |
444 | info->fix.id, var->hsync_len); | |
445 | if (var->left_margin > 255) | |
446 | printk(KERN_ERR "%s: invalid left_margin %d\n", | |
447 | info->fix.id, var->left_margin); | |
448 | if (var->right_margin > 255) | |
449 | printk(KERN_ERR "%s: invalid right_margin %d\n", | |
450 | info->fix.id, var->right_margin); | |
451 | if (var->yres < 1 || var->yres > 511) | |
452 | printk(KERN_ERR "%s: invalid yres %d\n", | |
453 | info->fix.id, var->yres); | |
454 | if (var->vsync_len > 100) | |
455 | printk(KERN_ERR "%s: invalid vsync_len %d\n", | |
456 | info->fix.id, var->vsync_len); | |
457 | if (var->upper_margin > 63) | |
458 | printk(KERN_ERR "%s: invalid upper_margin %d\n", | |
459 | info->fix.id, var->upper_margin); | |
460 | if (var->lower_margin > 255) | |
461 | printk(KERN_ERR "%s: invalid lower_margin %d\n", | |
462 | info->fix.id, var->lower_margin); | |
463 | #endif | |
464 | ||
72330b0e | 465 | writel(HCR_H_WIDTH(var->hsync_len) | |
d6ed5755 SH |
466 | HCR_H_WAIT_1(var->right_margin) | |
467 | HCR_H_WAIT_2(var->left_margin), | |
72330b0e | 468 | fbi->regs + LCDC_HCR); |
7c2f891c | 469 | |
72330b0e | 470 | writel(VCR_V_WIDTH(var->vsync_len) | |
d6ed5755 SH |
471 | VCR_V_WAIT_1(var->lower_margin) | |
472 | VCR_V_WAIT_2(var->upper_margin), | |
72330b0e | 473 | fbi->regs + LCDC_VCR); |
7c2f891c | 474 | |
72330b0e JB |
475 | writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), |
476 | fbi->regs + LCDC_SIZE); | |
477 | writel(fbi->pcr, fbi->regs + LCDC_PCR); | |
478 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | |
479 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); | |
480 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); | |
7c2f891c SH |
481 | |
482 | return 0; | |
483 | } | |
484 | ||
7c2f891c SH |
485 | #ifdef CONFIG_PM |
486 | /* | |
487 | * Power management hooks. Note that we won't be called from IRQ context, | |
488 | * unlike the blank functions above, so we may sleep. | |
489 | */ | |
3ae5eaec | 490 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) |
7c2f891c | 491 | { |
3ae5eaec | 492 | struct imxfb_info *fbi = platform_get_drvdata(dev); |
66c8719b SH |
493 | |
494 | pr_debug("%s\n", __func__); | |
7c2f891c | 495 | |
9480e307 | 496 | imxfb_disable_controller(fbi); |
7c2f891c SH |
497 | return 0; |
498 | } | |
499 | ||
3ae5eaec | 500 | static int imxfb_resume(struct platform_device *dev) |
7c2f891c | 501 | { |
3ae5eaec | 502 | struct imxfb_info *fbi = platform_get_drvdata(dev); |
66c8719b SH |
503 | |
504 | pr_debug("%s\n", __func__); | |
7c2f891c | 505 | |
9480e307 | 506 | imxfb_enable_controller(fbi); |
7c2f891c SH |
507 | return 0; |
508 | } | |
509 | #else | |
510 | #define imxfb_suspend NULL | |
511 | #define imxfb_resume NULL | |
512 | #endif | |
513 | ||
72330b0e | 514 | static int __init imxfb_init_fbinfo(struct platform_device *pdev) |
7c2f891c | 515 | { |
27889273 | 516 | struct imx_fb_platform_data *pdata = pdev->dev.platform_data; |
72330b0e | 517 | struct fb_info *info = dev_get_drvdata(&pdev->dev); |
7c2f891c SH |
518 | struct imxfb_info *fbi = info->par; |
519 | ||
5ae12170 | 520 | pr_debug("%s\n",__func__); |
7c2f891c | 521 | |
66c8719b | 522 | info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); |
7c2f891c SH |
523 | if (!info->pseudo_palette) |
524 | return -ENOMEM; | |
525 | ||
526 | memset(fbi, 0, sizeof(struct imxfb_info)); | |
7c2f891c SH |
527 | |
528 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); | |
529 | ||
66c8719b | 530 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
7c2f891c SH |
531 | info->fix.type_aux = 0; |
532 | info->fix.xpanstep = 0; | |
533 | info->fix.ypanstep = 0; | |
534 | info->fix.ywrapstep = 0; | |
66c8719b | 535 | info->fix.accel = FB_ACCEL_NONE; |
7c2f891c SH |
536 | |
537 | info->var.nonstd = 0; | |
538 | info->var.activate = FB_ACTIVATE_NOW; | |
539 | info->var.height = -1; | |
540 | info->var.width = -1; | |
541 | info->var.accel_flags = 0; | |
66c8719b | 542 | info->var.vmode = FB_VMODE_NONINTERLACED; |
7c2f891c SH |
543 | |
544 | info->fbops = &imxfb_ops; | |
66c8719b SH |
545 | info->flags = FBINFO_FLAG_DEFAULT | |
546 | FBINFO_READS_FAST; | |
7c2f891c SH |
547 | |
548 | fbi->rgb[RGB_16] = &def_rgb_16; | |
549 | fbi->rgb[RGB_8] = &def_rgb_8; | |
550 | ||
27889273 SH |
551 | fbi->max_xres = pdata->xres; |
552 | info->var.xres = pdata->xres; | |
553 | info->var.xres_virtual = pdata->xres; | |
554 | fbi->max_yres = pdata->yres; | |
555 | info->var.yres = pdata->yres; | |
556 | info->var.yres_virtual = pdata->yres; | |
557 | fbi->max_bpp = pdata->bpp; | |
558 | info->var.bits_per_pixel = pdata->bpp; | |
559 | info->var.nonstd = pdata->nonstd; | |
560 | info->var.pixclock = pdata->pixclock; | |
561 | info->var.hsync_len = pdata->hsync_len; | |
562 | info->var.left_margin = pdata->left_margin; | |
563 | info->var.right_margin = pdata->right_margin; | |
564 | info->var.vsync_len = pdata->vsync_len; | |
565 | info->var.upper_margin = pdata->upper_margin; | |
566 | info->var.lower_margin = pdata->lower_margin; | |
567 | info->var.sync = pdata->sync; | |
568 | info->var.grayscale = pdata->cmap_greyscale; | |
569 | fbi->cmap_inverse = pdata->cmap_inverse; | |
570 | fbi->cmap_static = pdata->cmap_static; | |
571 | fbi->pcr = pdata->pcr; | |
572 | fbi->lscr1 = pdata->lscr1; | |
573 | fbi->dmacr = pdata->dmacr; | |
574 | fbi->pwmr = pdata->pwmr; | |
575 | fbi->lcd_power = pdata->lcd_power; | |
576 | fbi->backlight_power = pdata->backlight_power; | |
7c2f891c SH |
577 | info->fix.smem_len = fbi->max_xres * fbi->max_yres * |
578 | fbi->max_bpp / 8; | |
579 | ||
580 | return 0; | |
581 | } | |
582 | ||
3ae5eaec | 583 | static int __init imxfb_probe(struct platform_device *pdev) |
7c2f891c | 584 | { |
7c2f891c SH |
585 | struct imxfb_info *fbi; |
586 | struct fb_info *info; | |
27889273 | 587 | struct imx_fb_platform_data *pdata; |
7c2f891c SH |
588 | struct resource *res; |
589 | int ret; | |
590 | ||
591 | printk("i.MX Framebuffer driver\n"); | |
592 | ||
593 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
66c8719b | 594 | if (!res) |
7c2f891c SH |
595 | return -ENODEV; |
596 | ||
27889273 SH |
597 | pdata = pdev->dev.platform_data; |
598 | if (!pdata) { | |
f99c8929 | 599 | dev_err(&pdev->dev,"No platform_data available\n"); |
7c2f891c SH |
600 | return -ENOMEM; |
601 | } | |
602 | ||
3ae5eaec | 603 | info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); |
66c8719b | 604 | if (!info) |
7c2f891c SH |
605 | return -ENOMEM; |
606 | ||
607 | fbi = info->par; | |
608 | ||
3ae5eaec | 609 | platform_set_drvdata(pdev, info); |
7c2f891c | 610 | |
72330b0e | 611 | ret = imxfb_init_fbinfo(pdev); |
66c8719b | 612 | if (ret < 0) |
7c2f891c SH |
613 | goto failed_init; |
614 | ||
72330b0e JB |
615 | res = request_mem_region(res->start, resource_size(res), |
616 | DRIVER_NAME); | |
7c2f891c SH |
617 | if (!res) { |
618 | ret = -EBUSY; | |
72330b0e JB |
619 | goto failed_req; |
620 | } | |
621 | ||
622 | fbi->regs = ioremap(res->start, resource_size(res)); | |
623 | if (fbi->regs == NULL) { | |
624 | printk(KERN_ERR"Cannot map frame buffer registers\n"); | |
625 | goto failed_ioremap; | |
7c2f891c SH |
626 | } |
627 | ||
27889273 | 628 | if (!pdata->fixed_screen_cpu) { |
72330b0e JB |
629 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); |
630 | fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, | |
631 | fbi->map_size, &fbi->map_dma, GFP_KERNEL); | |
632 | ||
633 | if (!fbi->map_cpu) { | |
f99c8929 | 634 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); |
7c2f891c SH |
635 | ret = -ENOMEM; |
636 | goto failed_map; | |
637 | } | |
72330b0e JB |
638 | |
639 | info->screen_base = fbi->map_cpu; | |
640 | fbi->screen_cpu = fbi->map_cpu; | |
641 | fbi->screen_dma = fbi->map_dma; | |
642 | info->fix.smem_start = fbi->screen_dma; | |
7c2f891c SH |
643 | } else { |
644 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ | |
27889273 SH |
645 | fbi->map_cpu = pdata->fixed_screen_cpu; |
646 | fbi->map_dma = pdata->fixed_screen_dma; | |
7c2f891c SH |
647 | info->screen_base = fbi->map_cpu; |
648 | fbi->screen_cpu = fbi->map_cpu; | |
649 | fbi->screen_dma = fbi->map_dma; | |
650 | info->fix.smem_start = fbi->screen_dma; | |
651 | } | |
652 | ||
653 | /* | |
654 | * This makes sure that our colour bitfield | |
655 | * descriptors are correctly initialised. | |
656 | */ | |
657 | imxfb_check_var(&info->var, info); | |
658 | ||
66c8719b | 659 | ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0); |
7c2f891c SH |
660 | if (ret < 0) |
661 | goto failed_cmap; | |
662 | ||
7c2f891c SH |
663 | imxfb_set_par(info); |
664 | ret = register_framebuffer(info); | |
665 | if (ret < 0) { | |
f99c8929 | 666 | dev_err(&pdev->dev, "failed to register framebuffer\n"); |
7c2f891c SH |
667 | goto failed_register; |
668 | } | |
669 | ||
670 | imxfb_enable_controller(fbi); | |
671 | ||
672 | return 0; | |
673 | ||
674 | failed_register: | |
675 | fb_dealloc_cmap(&info->cmap); | |
676 | failed_cmap: | |
27889273 | 677 | if (!pdata->fixed_screen_cpu) |
3ae5eaec | 678 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, |
72330b0e | 679 | fbi->map_dma); |
7c2f891c | 680 | failed_map: |
72330b0e JB |
681 | iounmap(fbi->regs); |
682 | failed_ioremap: | |
7c2f891c | 683 | release_mem_region(res->start, res->end - res->start); |
72330b0e JB |
684 | failed_req: |
685 | kfree(info->pseudo_palette); | |
7c2f891c | 686 | failed_init: |
3ae5eaec | 687 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
688 | framebuffer_release(info); |
689 | return ret; | |
690 | } | |
691 | ||
72330b0e | 692 | static int __devexit imxfb_remove(struct platform_device *pdev) |
7c2f891c | 693 | { |
3ae5eaec | 694 | struct fb_info *info = platform_get_drvdata(pdev); |
772a9e63 | 695 | struct imxfb_info *fbi = info->par; |
7c2f891c SH |
696 | struct resource *res; |
697 | ||
698 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
699 | ||
772a9e63 | 700 | imxfb_disable_controller(fbi); |
7c2f891c SH |
701 | |
702 | unregister_framebuffer(info); | |
703 | ||
704 | fb_dealloc_cmap(&info->cmap); | |
705 | kfree(info->pseudo_palette); | |
706 | framebuffer_release(info); | |
707 | ||
72330b0e | 708 | iounmap(fbi->regs); |
7c2f891c | 709 | release_mem_region(res->start, res->end - res->start + 1); |
3ae5eaec | 710 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
711 | |
712 | return 0; | |
713 | } | |
714 | ||
3ae5eaec | 715 | void imxfb_shutdown(struct platform_device * dev) |
7c2f891c | 716 | { |
3ae5eaec | 717 | struct fb_info *info = platform_get_drvdata(dev); |
772a9e63 SH |
718 | struct imxfb_info *fbi = info->par; |
719 | imxfb_disable_controller(fbi); | |
7c2f891c SH |
720 | } |
721 | ||
3ae5eaec | 722 | static struct platform_driver imxfb_driver = { |
7c2f891c SH |
723 | .suspend = imxfb_suspend, |
724 | .resume = imxfb_resume, | |
72330b0e | 725 | .remove = __devexit_p(imxfb_remove), |
7c2f891c | 726 | .shutdown = imxfb_shutdown, |
3ae5eaec | 727 | .driver = { |
72330b0e | 728 | .name = DRIVER_NAME, |
3ae5eaec | 729 | }, |
7c2f891c SH |
730 | }; |
731 | ||
732 | int __init imxfb_init(void) | |
733 | { | |
72330b0e | 734 | return platform_driver_probe(&imxfb_driver, imxfb_probe); |
7c2f891c SH |
735 | } |
736 | ||
737 | static void __exit imxfb_cleanup(void) | |
738 | { | |
3ae5eaec | 739 | platform_driver_unregister(&imxfb_driver); |
7c2f891c SH |
740 | } |
741 | ||
742 | module_init(imxfb_init); | |
743 | module_exit(imxfb_cleanup); | |
744 | ||
745 | MODULE_DESCRIPTION("Motorola i.MX framebuffer driver"); | |
746 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); | |
747 | MODULE_LICENSE("GPL"); |