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14340586 NF |
1 | /* |
2 | * Driver for AT91/AT32 LCD Controller | |
3 | * | |
4 | * Copyright (C) 2007 Atmel Corporation | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file COPYING in the main directory of this archive for | |
8 | * more details. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/platform_device.h> | |
13 | #include <linux/dma-mapping.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/clk.h> | |
16 | #include <linux/fb.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/delay.h> | |
19 | ||
20 | #include <asm/arch/board.h> | |
21 | #include <asm/arch/cpu.h> | |
22 | #include <asm/arch/gpio.h> | |
23 | ||
24 | #include <video/atmel_lcdc.h> | |
25 | ||
26 | #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg)) | |
27 | #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg)) | |
28 | ||
29 | /* configurable parameters */ | |
30 | #define ATMEL_LCDC_CVAL_DEFAULT 0xc8 | |
31 | #define ATMEL_LCDC_DMA_BURST_LEN 8 | |
32 | ||
33 | #if defined(CONFIG_ARCH_AT91SAM9263) | |
34 | #define ATMEL_LCDC_FIFO_SIZE 2048 | |
35 | #else | |
36 | #define ATMEL_LCDC_FIFO_SIZE 512 | |
37 | #endif | |
38 | ||
39 | #if defined(CONFIG_ARCH_AT91) | |
40 | #define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT | |
41 | ||
42 | static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, | |
43 | struct fb_var_screeninfo *var) | |
44 | { | |
45 | ||
46 | } | |
47 | #elif defined(CONFIG_AVR32) | |
48 | #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ | |
49 | | FBINFO_PARTIAL_PAN_OK \ | |
50 | | FBINFO_HWACCEL_XPAN \ | |
51 | | FBINFO_HWACCEL_YPAN) | |
52 | ||
53 | static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, | |
54 | struct fb_var_screeninfo *var) | |
55 | { | |
56 | u32 dma2dcfg; | |
57 | u32 pixeloff; | |
58 | ||
59 | pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f; | |
60 | ||
61 | dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8; | |
62 | dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET; | |
63 | lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg); | |
64 | ||
65 | /* Update configuration */ | |
66 | lcdc_writel(sinfo, ATMEL_LCDC_DMACON, | |
67 | lcdc_readl(sinfo, ATMEL_LCDC_DMACON) | |
68 | | ATMEL_LCDC_DMAUPDT); | |
69 | } | |
70 | #endif | |
71 | ||
72 | ||
73 | static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = { | |
74 | .type = FB_TYPE_PACKED_PIXELS, | |
75 | .visual = FB_VISUAL_TRUECOLOR, | |
76 | .xpanstep = 0, | |
77 | .ypanstep = 0, | |
78 | .ywrapstep = 0, | |
79 | .accel = FB_ACCEL_NONE, | |
80 | }; | |
81 | ||
250a269d NF |
82 | static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2) |
83 | { | |
84 | unsigned long value; | |
85 | ||
86 | if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000())) | |
87 | return xres; | |
88 | ||
89 | value = xres; | |
90 | if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) { | |
91 | /* STN display */ | |
92 | if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) { | |
93 | value *= 3; | |
94 | } | |
95 | if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4 | |
96 | || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8 | |
97 | && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL )) | |
98 | value = DIV_ROUND_UP(value, 4); | |
99 | else | |
100 | value = DIV_ROUND_UP(value, 8); | |
101 | } | |
102 | ||
103 | return value; | |
104 | } | |
14340586 NF |
105 | |
106 | static void atmel_lcdfb_update_dma(struct fb_info *info, | |
107 | struct fb_var_screeninfo *var) | |
108 | { | |
109 | struct atmel_lcdfb_info *sinfo = info->par; | |
110 | struct fb_fix_screeninfo *fix = &info->fix; | |
111 | unsigned long dma_addr; | |
112 | ||
113 | dma_addr = (fix->smem_start + var->yoffset * fix->line_length | |
114 | + var->xoffset * var->bits_per_pixel / 8); | |
115 | ||
116 | dma_addr &= ~3UL; | |
117 | ||
118 | /* Set framebuffer DMA base address and pixel offset */ | |
119 | lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr); | |
120 | ||
121 | atmel_lcdfb_update_dma2d(sinfo, var); | |
122 | } | |
123 | ||
124 | static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo) | |
125 | { | |
126 | struct fb_info *info = sinfo->info; | |
127 | ||
128 | dma_free_writecombine(info->device, info->fix.smem_len, | |
129 | info->screen_base, info->fix.smem_start); | |
130 | } | |
131 | ||
132 | /** | |
133 | * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory | |
134 | * @sinfo: the frame buffer to allocate memory for | |
135 | */ | |
136 | static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo) | |
137 | { | |
138 | struct fb_info *info = sinfo->info; | |
139 | struct fb_var_screeninfo *var = &info->var; | |
140 | ||
141 | info->fix.smem_len = (var->xres_virtual * var->yres_virtual | |
142 | * ((var->bits_per_pixel + 7) / 8)); | |
143 | ||
144 | info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len, | |
145 | (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL); | |
146 | ||
147 | if (!info->screen_base) { | |
148 | return -ENOMEM; | |
149 | } | |
150 | ||
151 | return 0; | |
152 | } | |
153 | ||
154 | /** | |
155 | * atmel_lcdfb_check_var - Validates a var passed in. | |
156 | * @var: frame buffer variable screen structure | |
157 | * @info: frame buffer structure that represents a single frame buffer | |
158 | * | |
159 | * Checks to see if the hardware supports the state requested by | |
160 | * var passed in. This function does not alter the hardware | |
161 | * state!!! This means the data stored in struct fb_info and | |
162 | * struct atmel_lcdfb_info do not change. This includes the var | |
163 | * inside of struct fb_info. Do NOT change these. This function | |
164 | * can be called on its own if we intent to only test a mode and | |
165 | * not actually set it. The stuff in modedb.c is a example of | |
166 | * this. If the var passed in is slightly off by what the | |
167 | * hardware can support then we alter the var PASSED in to what | |
168 | * we can do. If the hardware doesn't support mode change a | |
169 | * -EINVAL will be returned by the upper layers. You don't need | |
170 | * to implement this function then. If you hardware doesn't | |
171 | * support changing the resolution then this function is not | |
172 | * needed. In this case the driver would just provide a var that | |
173 | * represents the static state the screen is in. | |
174 | * | |
175 | * Returns negative errno on error, or zero on success. | |
176 | */ | |
177 | static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, | |
178 | struct fb_info *info) | |
179 | { | |
180 | struct device *dev = info->device; | |
181 | struct atmel_lcdfb_info *sinfo = info->par; | |
182 | unsigned long clk_value_khz; | |
183 | ||
184 | clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; | |
185 | ||
186 | dev_dbg(dev, "%s:\n", __func__); | |
187 | dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres); | |
188 | dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock)); | |
189 | dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel); | |
190 | dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz); | |
191 | ||
192 | if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) { | |
193 | dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock)); | |
194 | return -EINVAL; | |
195 | } | |
196 | ||
197 | /* Force same alignment for each line */ | |
198 | var->xres = (var->xres + 3) & ~3UL; | |
199 | var->xres_virtual = (var->xres_virtual + 3) & ~3UL; | |
200 | ||
201 | var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0; | |
202 | var->transp.msb_right = 0; | |
203 | var->transp.offset = var->transp.length = 0; | |
204 | var->xoffset = var->yoffset = 0; | |
205 | ||
206 | switch (var->bits_per_pixel) { | |
250a269d | 207 | case 1: |
14340586 NF |
208 | case 2: |
209 | case 4: | |
210 | case 8: | |
211 | var->red.offset = var->green.offset = var->blue.offset = 0; | |
212 | var->red.length = var->green.length = var->blue.length | |
213 | = var->bits_per_pixel; | |
214 | break; | |
215 | case 15: | |
216 | case 16: | |
217 | var->red.offset = 0; | |
218 | var->green.offset = 5; | |
219 | var->blue.offset = 10; | |
220 | var->red.length = var->green.length = var->blue.length = 5; | |
221 | break; | |
14340586 | 222 | case 32: |
4440e0e1 HS |
223 | var->transp.offset = 24; |
224 | var->transp.length = 8; | |
225 | /* fall through */ | |
226 | case 24: | |
14340586 NF |
227 | var->red.offset = 0; |
228 | var->green.offset = 8; | |
229 | var->blue.offset = 16; | |
230 | var->red.length = var->green.length = var->blue.length = 8; | |
231 | break; | |
232 | default: | |
233 | dev_err(dev, "color depth %d not supported\n", | |
234 | var->bits_per_pixel); | |
235 | return -EINVAL; | |
236 | } | |
237 | ||
238 | return 0; | |
239 | } | |
240 | ||
241 | /** | |
242 | * atmel_lcdfb_set_par - Alters the hardware state. | |
243 | * @info: frame buffer structure that represents a single frame buffer | |
244 | * | |
245 | * Using the fb_var_screeninfo in fb_info we set the resolution | |
246 | * of the this particular framebuffer. This function alters the | |
247 | * par AND the fb_fix_screeninfo stored in fb_info. It doesn't | |
248 | * not alter var in fb_info since we are using that data. This | |
249 | * means we depend on the data in var inside fb_info to be | |
250 | * supported by the hardware. atmel_lcdfb_check_var is always called | |
251 | * before atmel_lcdfb_set_par to ensure this. Again if you can't | |
252 | * change the resolution you don't need this function. | |
253 | * | |
254 | */ | |
255 | static int atmel_lcdfb_set_par(struct fb_info *info) | |
256 | { | |
257 | struct atmel_lcdfb_info *sinfo = info->par; | |
250a269d | 258 | unsigned long hozval_linesz; |
14340586 NF |
259 | unsigned long value; |
260 | unsigned long clk_value_khz; | |
250a269d | 261 | unsigned long bits_per_line; |
14340586 NF |
262 | |
263 | dev_dbg(info->device, "%s:\n", __func__); | |
264 | dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n", | |
265 | info->var.xres, info->var.yres, | |
266 | info->var.xres_virtual, info->var.yres_virtual); | |
267 | ||
268 | /* Turn off the LCD controller and the DMA controller */ | |
269 | lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET); | |
270 | ||
e593f070 AS |
271 | /* Wait for the LCDC core to become idle */ |
272 | while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY) | |
273 | msleep(10); | |
274 | ||
14340586 NF |
275 | lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); |
276 | ||
250a269d NF |
277 | if (info->var.bits_per_pixel == 1) |
278 | info->fix.visual = FB_VISUAL_MONO01; | |
279 | else if (info->var.bits_per_pixel <= 8) | |
14340586 NF |
280 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; |
281 | else | |
282 | info->fix.visual = FB_VISUAL_TRUECOLOR; | |
283 | ||
250a269d NF |
284 | bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel; |
285 | info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8); | |
14340586 NF |
286 | |
287 | /* Re-initialize the DMA engine... */ | |
288 | dev_dbg(info->device, " * update DMA engine\n"); | |
289 | atmel_lcdfb_update_dma(info, &info->var); | |
290 | ||
291 | /* ...set frame size and burst length = 8 words (?) */ | |
292 | value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32; | |
293 | value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET); | |
294 | lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value); | |
295 | ||
296 | /* Now, the LCDC core... */ | |
297 | ||
298 | /* Set pixel clock */ | |
299 | clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; | |
300 | ||
250a269d | 301 | value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); |
14340586 NF |
302 | |
303 | value = (value / 2) - 1; | |
250a269d | 304 | dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value); |
14340586 NF |
305 | |
306 | if (value <= 0) { | |
307 | dev_notice(info->device, "Bypassing pixel clock divider\n"); | |
308 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); | |
250a269d | 309 | } else { |
14340586 | 310 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET); |
250a269d NF |
311 | info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1))); |
312 | dev_dbg(info->device, " updated pixclk: %lu KHz\n", | |
313 | PICOS2KHZ(info->var.pixclock)); | |
314 | } | |
315 | ||
14340586 NF |
316 | |
317 | /* Initialize control register 2 */ | |
318 | value = sinfo->default_lcdcon2; | |
319 | ||
320 | if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT)) | |
321 | value |= ATMEL_LCDC_INVLINE_INVERTED; | |
322 | if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT)) | |
323 | value |= ATMEL_LCDC_INVFRAME_INVERTED; | |
324 | ||
325 | switch (info->var.bits_per_pixel) { | |
326 | case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break; | |
327 | case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break; | |
328 | case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break; | |
329 | case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break; | |
330 | case 15: /* fall through */ | |
331 | case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break; | |
332 | case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break; | |
333 | case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break; | |
334 | default: BUG(); break; | |
335 | } | |
336 | dev_dbg(info->device, " * LCDCON2 = %08lx\n", value); | |
337 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value); | |
338 | ||
339 | /* Vertical timing */ | |
340 | value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET; | |
341 | value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET; | |
342 | value |= info->var.lower_margin; | |
343 | dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value); | |
344 | lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value); | |
345 | ||
346 | /* Horizontal timing */ | |
347 | value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET; | |
348 | value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET; | |
349 | value |= (info->var.left_margin - 1); | |
350 | dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value); | |
351 | lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value); | |
352 | ||
250a269d NF |
353 | /* Horizontal value (aka line size) */ |
354 | hozval_linesz = compute_hozval(info->var.xres, | |
355 | lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2)); | |
356 | ||
14340586 | 357 | /* Display size */ |
250a269d | 358 | value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET; |
14340586 | 359 | value |= info->var.yres - 1; |
250a269d | 360 | dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value); |
14340586 NF |
361 | lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value); |
362 | ||
363 | /* FIFO Threshold: Use formula from data sheet */ | |
364 | value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3); | |
365 | lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value); | |
366 | ||
367 | /* Toggle LCD_MODE every frame */ | |
368 | lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0); | |
369 | ||
370 | /* Disable all interrupts */ | |
371 | lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); | |
372 | ||
373 | /* Set contrast */ | |
374 | value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE; | |
375 | lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value); | |
376 | lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT); | |
377 | /* ...wait for DMA engine to become idle... */ | |
378 | while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) | |
379 | msleep(10); | |
380 | ||
381 | dev_dbg(info->device, " * re-enable DMA engine\n"); | |
382 | /* ...and enable it with updated configuration */ | |
383 | lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon); | |
384 | ||
385 | dev_dbg(info->device, " * re-enable LCDC core\n"); | |
386 | lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, | |
387 | (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR); | |
388 | ||
389 | dev_dbg(info->device, " * DONE\n"); | |
390 | ||
391 | return 0; | |
392 | } | |
393 | ||
394 | static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf) | |
395 | { | |
396 | chan &= 0xffff; | |
397 | chan >>= 16 - bf->length; | |
398 | return chan << bf->offset; | |
399 | } | |
400 | ||
401 | /** | |
402 | * atmel_lcdfb_setcolreg - Optional function. Sets a color register. | |
403 | * @regno: Which register in the CLUT we are programming | |
404 | * @red: The red value which can be up to 16 bits wide | |
405 | * @green: The green value which can be up to 16 bits wide | |
406 | * @blue: The blue value which can be up to 16 bits wide. | |
407 | * @transp: If supported the alpha value which can be up to 16 bits wide. | |
408 | * @info: frame buffer info structure | |
409 | * | |
410 | * Set a single color register. The values supplied have a 16 bit | |
411 | * magnitude which needs to be scaled in this function for the hardware. | |
412 | * Things to take into consideration are how many color registers, if | |
413 | * any, are supported with the current color visual. With truecolor mode | |
414 | * no color palettes are supported. Here a psuedo palette is created | |
415 | * which we store the value in pseudo_palette in struct fb_info. For | |
416 | * pseudocolor mode we have a limited color palette. To deal with this | |
417 | * we can program what color is displayed for a particular pixel value. | |
418 | * DirectColor is similar in that we can program each color field. If | |
419 | * we have a static colormap we don't need to implement this function. | |
420 | * | |
421 | * Returns negative errno on error, or zero on success. In an | |
422 | * ideal world, this would have been the case, but as it turns | |
423 | * out, the other drivers return 1 on failure, so that's what | |
424 | * we're going to do. | |
425 | */ | |
426 | static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red, | |
427 | unsigned int green, unsigned int blue, | |
428 | unsigned int transp, struct fb_info *info) | |
429 | { | |
430 | struct atmel_lcdfb_info *sinfo = info->par; | |
431 | unsigned int val; | |
432 | u32 *pal; | |
433 | int ret = 1; | |
434 | ||
435 | if (info->var.grayscale) | |
436 | red = green = blue = (19595 * red + 38470 * green | |
437 | + 7471 * blue) >> 16; | |
438 | ||
439 | switch (info->fix.visual) { | |
440 | case FB_VISUAL_TRUECOLOR: | |
441 | if (regno < 16) { | |
442 | pal = info->pseudo_palette; | |
443 | ||
444 | val = chan_to_field(red, &info->var.red); | |
445 | val |= chan_to_field(green, &info->var.green); | |
446 | val |= chan_to_field(blue, &info->var.blue); | |
447 | ||
448 | pal[regno] = val; | |
449 | ret = 0; | |
450 | } | |
451 | break; | |
452 | ||
453 | case FB_VISUAL_PSEUDOCOLOR: | |
454 | if (regno < 256) { | |
455 | val = ((red >> 11) & 0x001f); | |
456 | val |= ((green >> 6) & 0x03e0); | |
457 | val |= ((blue >> 1) & 0x7c00); | |
458 | ||
459 | /* | |
460 | * TODO: intensity bit. Maybe something like | |
461 | * ~(red[10] ^ green[10] ^ blue[10]) & 1 | |
462 | */ | |
463 | ||
464 | lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); | |
465 | ret = 0; | |
466 | } | |
467 | break; | |
250a269d NF |
468 | |
469 | case FB_VISUAL_MONO01: | |
470 | if (regno < 2) { | |
471 | val = (regno == 0) ? 0x00 : 0x1F; | |
472 | lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); | |
473 | ret = 0; | |
474 | } | |
475 | break; | |
476 | ||
14340586 NF |
477 | } |
478 | ||
479 | return ret; | |
480 | } | |
481 | ||
482 | static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var, | |
483 | struct fb_info *info) | |
484 | { | |
485 | dev_dbg(info->device, "%s\n", __func__); | |
486 | ||
487 | atmel_lcdfb_update_dma(info, var); | |
488 | ||
489 | return 0; | |
490 | } | |
491 | ||
492 | static struct fb_ops atmel_lcdfb_ops = { | |
493 | .owner = THIS_MODULE, | |
494 | .fb_check_var = atmel_lcdfb_check_var, | |
495 | .fb_set_par = atmel_lcdfb_set_par, | |
496 | .fb_setcolreg = atmel_lcdfb_setcolreg, | |
497 | .fb_pan_display = atmel_lcdfb_pan_display, | |
498 | .fb_fillrect = cfb_fillrect, | |
499 | .fb_copyarea = cfb_copyarea, | |
500 | .fb_imageblit = cfb_imageblit, | |
501 | }; | |
502 | ||
503 | static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id) | |
504 | { | |
505 | struct fb_info *info = dev_id; | |
506 | struct atmel_lcdfb_info *sinfo = info->par; | |
507 | u32 status; | |
508 | ||
509 | status = lcdc_readl(sinfo, ATMEL_LCDC_ISR); | |
510 | lcdc_writel(sinfo, ATMEL_LCDC_IDR, status); | |
511 | return IRQ_HANDLED; | |
512 | } | |
513 | ||
514 | static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo) | |
515 | { | |
516 | struct fb_info *info = sinfo->info; | |
517 | int ret = 0; | |
518 | ||
519 | memset_io(info->screen_base, 0, info->fix.smem_len); | |
520 | info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW; | |
521 | ||
522 | dev_info(info->device, | |
523 | "%luKiB frame buffer at %08lx (mapped at %p)\n", | |
524 | (unsigned long)info->fix.smem_len / 1024, | |
525 | (unsigned long)info->fix.smem_start, | |
526 | info->screen_base); | |
527 | ||
528 | /* Allocate colormap */ | |
529 | ret = fb_alloc_cmap(&info->cmap, 256, 0); | |
530 | if (ret < 0) | |
531 | dev_err(info->device, "Alloc color map failed\n"); | |
532 | ||
533 | return ret; | |
534 | } | |
535 | ||
536 | static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo) | |
537 | { | |
538 | if (sinfo->bus_clk) | |
539 | clk_enable(sinfo->bus_clk); | |
540 | clk_enable(sinfo->lcdc_clk); | |
541 | } | |
542 | ||
543 | static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo) | |
544 | { | |
545 | if (sinfo->bus_clk) | |
546 | clk_disable(sinfo->bus_clk); | |
547 | clk_disable(sinfo->lcdc_clk); | |
548 | } | |
549 | ||
550 | ||
551 | static int __init atmel_lcdfb_probe(struct platform_device *pdev) | |
552 | { | |
553 | struct device *dev = &pdev->dev; | |
554 | struct fb_info *info; | |
555 | struct atmel_lcdfb_info *sinfo; | |
556 | struct atmel_lcdfb_info *pdata_sinfo; | |
557 | struct resource *regs = NULL; | |
558 | struct resource *map = NULL; | |
559 | int ret; | |
560 | ||
561 | dev_dbg(dev, "%s BEGIN\n", __func__); | |
562 | ||
563 | ret = -ENOMEM; | |
564 | info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev); | |
565 | if (!info) { | |
566 | dev_err(dev, "cannot allocate memory\n"); | |
567 | goto out; | |
568 | } | |
569 | ||
570 | sinfo = info->par; | |
571 | ||
572 | if (dev->platform_data) { | |
573 | pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data; | |
574 | sinfo->default_bpp = pdata_sinfo->default_bpp; | |
575 | sinfo->default_dmacon = pdata_sinfo->default_dmacon; | |
576 | sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2; | |
577 | sinfo->default_monspecs = pdata_sinfo->default_monspecs; | |
578 | sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control; | |
579 | sinfo->guard_time = pdata_sinfo->guard_time; | |
580 | } else { | |
581 | dev_err(dev, "cannot get default configuration\n"); | |
582 | goto free_info; | |
583 | } | |
584 | sinfo->info = info; | |
585 | sinfo->pdev = pdev; | |
586 | ||
587 | strcpy(info->fix.id, sinfo->pdev->name); | |
588 | info->flags = ATMEL_LCDFB_FBINFO_DEFAULT; | |
589 | info->pseudo_palette = sinfo->pseudo_palette; | |
590 | info->fbops = &atmel_lcdfb_ops; | |
591 | ||
592 | memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs)); | |
593 | info->fix = atmel_lcdfb_fix; | |
594 | ||
595 | /* Enable LCDC Clocks */ | |
596 | if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) { | |
597 | sinfo->bus_clk = clk_get(dev, "hck1"); | |
598 | if (IS_ERR(sinfo->bus_clk)) { | |
599 | ret = PTR_ERR(sinfo->bus_clk); | |
600 | goto free_info; | |
601 | } | |
602 | } | |
603 | sinfo->lcdc_clk = clk_get(dev, "lcdc_clk"); | |
604 | if (IS_ERR(sinfo->lcdc_clk)) { | |
605 | ret = PTR_ERR(sinfo->lcdc_clk); | |
606 | goto put_bus_clk; | |
607 | } | |
608 | atmel_lcdfb_start_clock(sinfo); | |
609 | ||
610 | ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb, | |
611 | info->monspecs.modedb_len, info->monspecs.modedb, | |
612 | sinfo->default_bpp); | |
613 | if (!ret) { | |
614 | dev_err(dev, "no suitable video mode found\n"); | |
615 | goto stop_clk; | |
616 | } | |
617 | ||
618 | ||
619 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
620 | if (!regs) { | |
621 | dev_err(dev, "resources unusable\n"); | |
622 | ret = -ENXIO; | |
623 | goto stop_clk; | |
624 | } | |
625 | ||
626 | sinfo->irq_base = platform_get_irq(pdev, 0); | |
627 | if (sinfo->irq_base < 0) { | |
628 | dev_err(dev, "unable to get irq\n"); | |
629 | ret = sinfo->irq_base; | |
630 | goto stop_clk; | |
631 | } | |
632 | ||
633 | /* Initialize video memory */ | |
634 | map = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
635 | if (map) { | |
636 | /* use a pre-allocated memory buffer */ | |
637 | info->fix.smem_start = map->start; | |
638 | info->fix.smem_len = map->end - map->start + 1; | |
639 | if (!request_mem_region(info->fix.smem_start, | |
640 | info->fix.smem_len, pdev->name)) { | |
641 | ret = -EBUSY; | |
642 | goto stop_clk; | |
643 | } | |
644 | ||
645 | info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len); | |
646 | if (!info->screen_base) | |
647 | goto release_intmem; | |
648 | } else { | |
649 | /* alocate memory buffer */ | |
650 | ret = atmel_lcdfb_alloc_video_memory(sinfo); | |
651 | if (ret < 0) { | |
652 | dev_err(dev, "cannot allocate framebuffer: %d\n", ret); | |
653 | goto stop_clk; | |
654 | } | |
655 | } | |
656 | ||
657 | /* LCDC registers */ | |
658 | info->fix.mmio_start = regs->start; | |
659 | info->fix.mmio_len = regs->end - regs->start + 1; | |
660 | ||
661 | if (!request_mem_region(info->fix.mmio_start, | |
662 | info->fix.mmio_len, pdev->name)) { | |
663 | ret = -EBUSY; | |
664 | goto free_fb; | |
665 | } | |
666 | ||
667 | sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len); | |
668 | if (!sinfo->mmio) { | |
669 | dev_err(dev, "cannot map LCDC registers\n"); | |
670 | goto release_mem; | |
671 | } | |
672 | ||
673 | /* interrupt */ | |
674 | ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info); | |
675 | if (ret) { | |
676 | dev_err(dev, "request_irq failed: %d\n", ret); | |
677 | goto unmap_mmio; | |
678 | } | |
679 | ||
680 | ret = atmel_lcdfb_init_fbinfo(sinfo); | |
681 | if (ret < 0) { | |
682 | dev_err(dev, "init fbinfo failed: %d\n", ret); | |
683 | goto unregister_irqs; | |
684 | } | |
685 | ||
686 | /* | |
687 | * This makes sure that our colour bitfield | |
688 | * descriptors are correctly initialised. | |
689 | */ | |
690 | atmel_lcdfb_check_var(&info->var, info); | |
691 | ||
692 | ret = fb_set_var(info, &info->var); | |
693 | if (ret) { | |
694 | dev_warn(dev, "unable to set display parameters\n"); | |
695 | goto free_cmap; | |
696 | } | |
697 | ||
698 | dev_set_drvdata(dev, info); | |
699 | ||
700 | /* | |
701 | * Tell the world that we're ready to go | |
702 | */ | |
703 | ret = register_framebuffer(info); | |
704 | if (ret < 0) { | |
705 | dev_err(dev, "failed to register framebuffer device: %d\n", ret); | |
706 | goto free_cmap; | |
707 | } | |
708 | ||
709 | /* Power up the LCDC screen */ | |
710 | if (sinfo->atmel_lcdfb_power_control) | |
711 | sinfo->atmel_lcdfb_power_control(1); | |
712 | ||
713 | dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n", | |
714 | info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base); | |
715 | ||
716 | return 0; | |
717 | ||
718 | ||
719 | free_cmap: | |
720 | fb_dealloc_cmap(&info->cmap); | |
721 | unregister_irqs: | |
722 | free_irq(sinfo->irq_base, info); | |
723 | unmap_mmio: | |
724 | iounmap(sinfo->mmio); | |
725 | release_mem: | |
726 | release_mem_region(info->fix.mmio_start, info->fix.mmio_len); | |
727 | free_fb: | |
728 | if (map) | |
729 | iounmap(info->screen_base); | |
730 | else | |
731 | atmel_lcdfb_free_video_memory(sinfo); | |
732 | ||
733 | release_intmem: | |
734 | if (map) | |
735 | release_mem_region(info->fix.smem_start, info->fix.smem_len); | |
736 | stop_clk: | |
737 | atmel_lcdfb_stop_clock(sinfo); | |
738 | clk_put(sinfo->lcdc_clk); | |
739 | put_bus_clk: | |
740 | if (sinfo->bus_clk) | |
741 | clk_put(sinfo->bus_clk); | |
742 | free_info: | |
743 | framebuffer_release(info); | |
744 | out: | |
745 | dev_dbg(dev, "%s FAILED\n", __func__); | |
746 | return ret; | |
747 | } | |
748 | ||
749 | static int __exit atmel_lcdfb_remove(struct platform_device *pdev) | |
750 | { | |
751 | struct device *dev = &pdev->dev; | |
752 | struct fb_info *info = dev_get_drvdata(dev); | |
753 | struct atmel_lcdfb_info *sinfo = info->par; | |
754 | ||
755 | if (!sinfo) | |
756 | return 0; | |
757 | ||
758 | if (sinfo->atmel_lcdfb_power_control) | |
759 | sinfo->atmel_lcdfb_power_control(0); | |
760 | unregister_framebuffer(info); | |
761 | atmel_lcdfb_stop_clock(sinfo); | |
762 | clk_put(sinfo->lcdc_clk); | |
763 | if (sinfo->bus_clk) | |
764 | clk_put(sinfo->bus_clk); | |
765 | fb_dealloc_cmap(&info->cmap); | |
766 | free_irq(sinfo->irq_base, info); | |
767 | iounmap(sinfo->mmio); | |
768 | release_mem_region(info->fix.mmio_start, info->fix.mmio_len); | |
769 | if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) { | |
770 | iounmap(info->screen_base); | |
771 | release_mem_region(info->fix.smem_start, info->fix.smem_len); | |
772 | } else { | |
773 | atmel_lcdfb_free_video_memory(sinfo); | |
774 | } | |
775 | ||
776 | dev_set_drvdata(dev, NULL); | |
777 | framebuffer_release(info); | |
778 | ||
779 | return 0; | |
780 | } | |
781 | ||
782 | static struct platform_driver atmel_lcdfb_driver = { | |
783 | .remove = __exit_p(atmel_lcdfb_remove), | |
784 | .driver = { | |
785 | .name = "atmel_lcdfb", | |
786 | .owner = THIS_MODULE, | |
787 | }, | |
788 | }; | |
789 | ||
790 | static int __init atmel_lcdfb_init(void) | |
791 | { | |
792 | return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe); | |
793 | } | |
794 | ||
795 | static void __exit atmel_lcdfb_exit(void) | |
796 | { | |
797 | platform_driver_unregister(&atmel_lcdfb_driver); | |
798 | } | |
799 | ||
800 | module_init(atmel_lcdfb_init); | |
801 | module_exit(atmel_lcdfb_exit); | |
802 | ||
803 | MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver"); | |
804 | MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@rfo.atmel.com>"); | |
805 | MODULE_LICENSE("GPL"); |