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fbdev: framebuffer_alloc() fixes
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / video / atmel_lcdfb.c
CommitLineData
14340586
NF		 1/*
2 * Driver for AT91/AT32 LCD Controller
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
10
11#include <linux/kernel.h>
12#include <linux/platform_device.h>
13#include <linux/dma-mapping.h>
14#include <linux/interrupt.h>
15#include <linux/clk.h>
16#include <linux/fb.h>
17#include <linux/init.h>
18#include <linux/delay.h>
a9a84c37 19#include <linux/backlight.h>
14340586
NF		 20
21#include <asm/arch/board.h>
22#include <asm/arch/cpu.h>
23#include <asm/arch/gpio.h>
24
25#include <video/atmel_lcdc.h>
26
27#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
28#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
29
30/* configurable parameters */
31#define ATMEL_LCDC_CVAL_DEFAULT 0xc8
32#define ATMEL_LCDC_DMA_BURST_LEN 8
33
2b3b3516 34#if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9)
14340586
NF		 35#define ATMEL_LCDC_FIFO_SIZE 2048
36#else
37#define ATMEL_LCDC_FIFO_SIZE 512
38#endif
39
40#if defined(CONFIG_ARCH_AT91)
41#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
42
43static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
44 struct fb_var_screeninfo *var)
45{
46
47}
48#elif defined(CONFIG_AVR32)
49#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
50 | FBINFO_PARTIAL_PAN_OK \
51 | FBINFO_HWACCEL_XPAN \
52 | FBINFO_HWACCEL_YPAN)
53
54static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
55 struct fb_var_screeninfo *var)
56{
57 u32 dma2dcfg;
58 u32 pixeloff;
59
60 pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
61
62 dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
63 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
64 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
65
66 /* Update configuration */
67 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
68 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
69 | ATMEL_LCDC_DMAUPDT);
70}
71#endif
72
a9a84c37
DB		 73static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
74 | ATMEL_LCDC_POL_POSITIVE
75 | ATMEL_LCDC_ENA_PWMENABLE;
76
77#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
78
79/* some bl->props field just changed */
80static int atmel_bl_update_status(struct backlight_device *bl)
81{
82 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
83 int power = sinfo->bl_power;
84 int brightness = bl->props.brightness;
85
86 /* REVISIT there may be a meaningful difference between
87 * fb_blank and power ... there seem to be some cases
88 * this doesn't handle correctly.
89 */
90 if (bl->props.fb_blank != sinfo->bl_power)
91 power = bl->props.fb_blank;
92 else if (bl->props.power != sinfo->bl_power)
93 power = bl->props.power;
94
95 if (brightness < 0 && power == FB_BLANK_UNBLANK)
96 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
97 else if (power != FB_BLANK_UNBLANK)
98 brightness = 0;
99
100 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
101 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
102 brightness ? contrast_ctr : 0);
103
104 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
105
106 return 0;
107}
108
109static int atmel_bl_get_brightness(struct backlight_device *bl)
110{
111 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
112
113 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
114}
115
116static struct backlight_ops atmel_lcdc_bl_ops = {
117 .update_status = atmel_bl_update_status,
118 .get_brightness = atmel_bl_get_brightness,
119};
120
121static void init_backlight(struct atmel_lcdfb_info *sinfo)
122{
123 struct backlight_device *bl;
124
125 sinfo->bl_power = FB_BLANK_UNBLANK;
126
127 if (sinfo->backlight)
128 return;
129
130 bl = backlight_device_register("backlight", &sinfo->pdev->dev,
131 sinfo, &atmel_lcdc_bl_ops);
132 if (IS_ERR(sinfo->backlight)) {
133 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
134 PTR_ERR(bl));
135 return;
136 }
137 sinfo->backlight = bl;
138
139 bl->props.power = FB_BLANK_UNBLANK;
140 bl->props.fb_blank = FB_BLANK_UNBLANK;
141 bl->props.max_brightness = 0xff;
142 bl->props.brightness = atmel_bl_get_brightness(bl);
143}
144
145static void exit_backlight(struct atmel_lcdfb_info *sinfo)
146{
147 if (sinfo->backlight)
148 backlight_device_unregister(sinfo->backlight);
149}
150
151#else
152
153static void init_backlight(struct atmel_lcdfb_info *sinfo)
154{
155 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
156}
157
158static void exit_backlight(struct atmel_lcdfb_info *sinfo)
159{
160}
161
162#endif
163
164static void init_contrast(struct atmel_lcdfb_info *sinfo)
165{
166 /* have some default contrast/backlight settings */
167 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
168 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
169
170 if (sinfo->lcdcon_is_backlight)
171 init_backlight(sinfo);
172}
173
14340586
NF		 174
175static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
176 .type = FB_TYPE_PACKED_PIXELS,
177 .visual = FB_VISUAL_TRUECOLOR,
178 .xpanstep = 0,
179 .ypanstep = 0,
180 .ywrapstep = 0,
181 .accel = FB_ACCEL_NONE,
182};
183
250a269d
NF		 184static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
185{
186 unsigned long value;
187
188 if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
189 return xres;
190
191 value = xres;
192 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
193 /* STN display */
194 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
195 value *= 3;
196 }
197 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
198 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
199 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
200 value = DIV_ROUND_UP(value, 4);
201 else
202 value = DIV_ROUND_UP(value, 8);
203 }
204
205 return value;
206}
14340586
NF		 207
208static void atmel_lcdfb_update_dma(struct fb_info *info,
209 struct fb_var_screeninfo *var)
210{
211 struct atmel_lcdfb_info *sinfo = info->par;
212 struct fb_fix_screeninfo *fix = &info->fix;
213 unsigned long dma_addr;
214
215 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
216 + var->xoffset * var->bits_per_pixel / 8);
217
218 dma_addr &= ~3UL;
219
220 /* Set framebuffer DMA base address and pixel offset */
221 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
222
223 atmel_lcdfb_update_dma2d(sinfo, var);
224}
225
226static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
227{
228 struct fb_info *info = sinfo->info;
229
230 dma_free_writecombine(info->device, info->fix.smem_len,
231 info->screen_base, info->fix.smem_start);
232}
233
234/**
235 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
236 * @sinfo: the frame buffer to allocate memory for
237 */
238static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
239{
240 struct fb_info *info = sinfo->info;
241 struct fb_var_screeninfo *var = &info->var;
242
243 info->fix.smem_len = (var->xres_virtual * var->yres_virtual
244 * ((var->bits_per_pixel + 7) / 8));
245
246 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
247 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
248
249 if (!info->screen_base) {
250 return -ENOMEM;
251 }
252
253 return 0;
254}
255
256/**
257 * atmel_lcdfb_check_var - Validates a var passed in.
258 * @var: frame buffer variable screen structure
259 * @info: frame buffer structure that represents a single frame buffer
260 *
261 * Checks to see if the hardware supports the state requested by
262 * var passed in. This function does not alter the hardware
263 * state!!! This means the data stored in struct fb_info and
264 * struct atmel_lcdfb_info do not change. This includes the var
265 * inside of struct fb_info. Do NOT change these. This function
266 * can be called on its own if we intent to only test a mode and
267 * not actually set it. The stuff in modedb.c is a example of
268 * this. If the var passed in is slightly off by what the
269 * hardware can support then we alter the var PASSED in to what
270 * we can do. If the hardware doesn't support mode change a
271 * -EINVAL will be returned by the upper layers. You don't need
272 * to implement this function then. If you hardware doesn't
273 * support changing the resolution then this function is not
274 * needed. In this case the driver would just provide a var that
275 * represents the static state the screen is in.
276 *
277 * Returns negative errno on error, or zero on success.
278 */
279static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
280 struct fb_info *info)
281{
282 struct device *dev = info->device;
283 struct atmel_lcdfb_info *sinfo = info->par;
284 unsigned long clk_value_khz;
285
286 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
287
288 dev_dbg(dev, "%s:\n", __func__);
289 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
290 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
291 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
292 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
293
294 if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
295 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
296 return -EINVAL;
297 }
298
299 /* Force same alignment for each line */
300 var->xres = (var->xres + 3) & ~3UL;
301 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
302
303 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
304 var->transp.msb_right = 0;
305 var->transp.offset = var->transp.length = 0;
306 var->xoffset = var->yoffset = 0;
307
162b3a08
HS		 308 /* Saturate vertical and horizontal timings at maximum values */
309 var->vsync_len = min_t(u32, var->vsync_len,
310 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
311 var->upper_margin = min_t(u32, var->upper_margin,
312 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
313 var->lower_margin = min_t(u32, var->lower_margin,
314 ATMEL_LCDC_VFP);
315 var->right_margin = min_t(u32, var->right_margin,
316 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
317 var->hsync_len = min_t(u32, var->hsync_len,
318 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
319 var->left_margin = min_t(u32, var->left_margin,
320 ATMEL_LCDC_HBP + 1);
321
322 /* Some parameters can't be zero */
323 var->vsync_len = max_t(u32, var->vsync_len, 1);
324 var->right_margin = max_t(u32, var->right_margin, 1);
325 var->hsync_len = max_t(u32, var->hsync_len, 1);
326 var->left_margin = max_t(u32, var->left_margin, 1);
327
14340586 328 switch (var->bits_per_pixel) {
250a269d 329 case 1:
14340586
NF		 330 case 2:
331 case 4:
332 case 8:
333 var->red.offset = var->green.offset = var->blue.offset = 0;
334 var->red.length = var->green.length = var->blue.length
335 = var->bits_per_pixel;
336 break;
337 case 15:
338 case 16:
339 var->red.offset = 0;
340 var->green.offset = 5;
341 var->blue.offset = 10;
342 var->red.length = var->green.length = var->blue.length = 5;
343 break;
14340586 344 case 32:
4440e0e1
HS		 345 var->transp.offset = 24;
346 var->transp.length = 8;
347 /* fall through */
348 case 24:
14340586
NF		 349 var->red.offset = 0;
350 var->green.offset = 8;
351 var->blue.offset = 16;
352 var->red.length = var->green.length = var->blue.length = 8;
353 break;
354 default:
355 dev_err(dev, "color depth %d not supported\n",
356 var->bits_per_pixel);
357 return -EINVAL;
358 }
359
360 return 0;
361}
362
363/**
364 * atmel_lcdfb_set_par - Alters the hardware state.
365 * @info: frame buffer structure that represents a single frame buffer
366 *
367 * Using the fb_var_screeninfo in fb_info we set the resolution
368 * of the this particular framebuffer. This function alters the
369 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
370 * not alter var in fb_info since we are using that data. This
371 * means we depend on the data in var inside fb_info to be
372 * supported by the hardware. atmel_lcdfb_check_var is always called
373 * before atmel_lcdfb_set_par to ensure this. Again if you can't
374 * change the resolution you don't need this function.
375 *
376 */
377static int atmel_lcdfb_set_par(struct fb_info *info)
378{
379 struct atmel_lcdfb_info *sinfo = info->par;
250a269d 380 unsigned long hozval_linesz;
14340586
NF		 381 unsigned long value;
382 unsigned long clk_value_khz;
250a269d 383 unsigned long bits_per_line;
14340586
NF		 384
385 dev_dbg(info->device, "%s:\n", __func__);
386 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
387 info->var.xres, info->var.yres,
388 info->var.xres_virtual, info->var.yres_virtual);
389
390 /* Turn off the LCD controller and the DMA controller */
391 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
392
e593f070
AS		 393 /* Wait for the LCDC core to become idle */
394 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
395 msleep(10);
396
14340586
NF		 397 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
398
250a269d
NF		 399 if (info->var.bits_per_pixel == 1)
400 info->fix.visual = FB_VISUAL_MONO01;
401 else if (info->var.bits_per_pixel <= 8)
14340586
NF		 402 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
403 else
404 info->fix.visual = FB_VISUAL_TRUECOLOR;
405
250a269d
NF		 406 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
407 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
14340586
NF		 408
409 /* Re-initialize the DMA engine... */
410 dev_dbg(info->device, " * update DMA engine\n");
411 atmel_lcdfb_update_dma(info, &info->var);
412
413 /* ...set frame size and burst length = 8 words (?) */
414 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
415 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
416 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
417
418 /* Now, the LCDC core... */
419
420 /* Set pixel clock */
421 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
422
250a269d 423 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
14340586
NF		 424
425 value = (value / 2) - 1;
250a269d 426 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value);
14340586
NF		 427
428 if (value <= 0) {
429 dev_notice(info->device, "Bypassing pixel clock divider\n");
430 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
250a269d 431 } else {
14340586 432 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
250a269d
NF		 433 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
434 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
435 PICOS2KHZ(info->var.pixclock));
436 }
437
14340586
NF		 438
439 /* Initialize control register 2 */
440 value = sinfo->default_lcdcon2;
441
442 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
443 value |= ATMEL_LCDC_INVLINE_INVERTED;
444 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
445 value |= ATMEL_LCDC_INVFRAME_INVERTED;
446
447 switch (info->var.bits_per_pixel) {
448 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
449 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
450 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
451 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
452 case 15: /* fall through */
453 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
454 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
455 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
456 default: BUG(); break;
457 }
458 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
459 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
460
461 /* Vertical timing */
462 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
463 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
464 value |= info->var.lower_margin;
465 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
466 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
467
468 /* Horizontal timing */
469 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
470 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
471 value |= (info->var.left_margin - 1);
472 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
473 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
474
250a269d
NF		 475 /* Horizontal value (aka line size) */
476 hozval_linesz = compute_hozval(info->var.xres,
477 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
478
14340586 479 /* Display size */
250a269d 480 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
14340586 481 value |= info->var.yres - 1;
250a269d 482 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
14340586
NF		 483 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
484
485 /* FIFO Threshold: Use formula from data sheet */
486 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
487 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
488
489 /* Toggle LCD_MODE every frame */
490 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
491
492 /* Disable all interrupts */
493 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
494
14340586
NF		 495 /* ...wait for DMA engine to become idle... */
496 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
497 msleep(10);
498
499 dev_dbg(info->device, " * re-enable DMA engine\n");
500 /* ...and enable it with updated configuration */
501 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
502
503 dev_dbg(info->device, " * re-enable LCDC core\n");
504 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
505 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
506
507 dev_dbg(info->device, " * DONE\n");
508
509 return 0;
510}
511
512static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
513{
514 chan &= 0xffff;
515 chan >>= 16 - bf->length;
516 return chan << bf->offset;
517}
518
519/**
520 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
521 * @regno: Which register in the CLUT we are programming
522 * @red: The red value which can be up to 16 bits wide
523 * @green: The green value which can be up to 16 bits wide
524 * @blue: The blue value which can be up to 16 bits wide.
525 * @transp: If supported the alpha value which can be up to 16 bits wide.
526 * @info: frame buffer info structure
527 *
528 * Set a single color register. The values supplied have a 16 bit
529 * magnitude which needs to be scaled in this function for the hardware.
530 * Things to take into consideration are how many color registers, if
531 * any, are supported with the current color visual. With truecolor mode
532 * no color palettes are supported. Here a psuedo palette is created
533 * which we store the value in pseudo_palette in struct fb_info. For
534 * pseudocolor mode we have a limited color palette. To deal with this
535 * we can program what color is displayed for a particular pixel value.
536 * DirectColor is similar in that we can program each color field. If
537 * we have a static colormap we don't need to implement this function.
538 *
539 * Returns negative errno on error, or zero on success. In an
540 * ideal world, this would have been the case, but as it turns
541 * out, the other drivers return 1 on failure, so that's what
542 * we're going to do.
543 */
544static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
545 unsigned int green, unsigned int blue,
546 unsigned int transp, struct fb_info *info)
547{
548 struct atmel_lcdfb_info *sinfo = info->par;
549 unsigned int val;
550 u32 *pal;
551 int ret = 1;
552
553 if (info->var.grayscale)
554 red = green = blue = (19595 * red + 38470 * green
555 + 7471 * blue) >> 16;
556
557 switch (info->fix.visual) {
558 case FB_VISUAL_TRUECOLOR:
559 if (regno < 16) {
560 pal = info->pseudo_palette;
561
562 val = chan_to_field(red, &info->var.red);
563 val |= chan_to_field(green, &info->var.green);
564 val |= chan_to_field(blue, &info->var.blue);
565
566 pal[regno] = val;
567 ret = 0;
568 }
569 break;
570
571 case FB_VISUAL_PSEUDOCOLOR:
572 if (regno < 256) {
573 val = ((red >> 11) & 0x001f);
574 val |= ((green >> 6) & 0x03e0);
575 val |= ((blue >> 1) & 0x7c00);
576
577 /*
578 * TODO: intensity bit. Maybe something like
579 * ~(red[10] ^ green[10] ^ blue[10]) & 1
580 */
581
582 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
583 ret = 0;
584 }
585 break;
250a269d
NF		 586
587 case FB_VISUAL_MONO01:
588 if (regno < 2) {
589 val = (regno == 0) ? 0x00 : 0x1F;
590 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
591 ret = 0;
592 }
593 break;
594
14340586
NF		 595 }
596
597 return ret;
598}
599
600static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
601 struct fb_info *info)
602{
603 dev_dbg(info->device, "%s\n", __func__);
604
605 atmel_lcdfb_update_dma(info, var);
606
607 return 0;
608}
609
610static struct fb_ops atmel_lcdfb_ops = {
611 .owner = THIS_MODULE,
612 .fb_check_var = atmel_lcdfb_check_var,
613 .fb_set_par = atmel_lcdfb_set_par,
614 .fb_setcolreg = atmel_lcdfb_setcolreg,
615 .fb_pan_display = atmel_lcdfb_pan_display,
616 .fb_fillrect = cfb_fillrect,
617 .fb_copyarea = cfb_copyarea,
618 .fb_imageblit = cfb_imageblit,
619};
620
621static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
622{
623 struct fb_info *info = dev_id;
624 struct atmel_lcdfb_info *sinfo = info->par;
625 u32 status;
626
627 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
628 lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
629 return IRQ_HANDLED;
630}
631
632static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
633{
634 struct fb_info *info = sinfo->info;
635 int ret = 0;
636
637 memset_io(info->screen_base, 0, info->fix.smem_len);
638 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
639
640 dev_info(info->device,
641 "%luKiB frame buffer at %08lx (mapped at %p)\n",
642 (unsigned long)info->fix.smem_len / 1024,
643 (unsigned long)info->fix.smem_start,
644 info->screen_base);
645
646 /* Allocate colormap */
647 ret = fb_alloc_cmap(&info->cmap, 256, 0);
648 if (ret < 0)
649 dev_err(info->device, "Alloc color map failed\n");
650
651 return ret;
652}
653
654static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
655{
656 if (sinfo->bus_clk)
657 clk_enable(sinfo->bus_clk);
658 clk_enable(sinfo->lcdc_clk);
659}
660
661static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
662{
663 if (sinfo->bus_clk)
664 clk_disable(sinfo->bus_clk);
665 clk_disable(sinfo->lcdc_clk);
666}
667
668
669static int __init atmel_lcdfb_probe(struct platform_device *pdev)
670{
671 struct device *dev = &pdev->dev;
672 struct fb_info *info;
673 struct atmel_lcdfb_info *sinfo;
674 struct atmel_lcdfb_info *pdata_sinfo;
675 struct resource *regs = NULL;
676 struct resource *map = NULL;
677 int ret;
678
679 dev_dbg(dev, "%s BEGIN\n", __func__);
680
681 ret = -ENOMEM;
682 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
683 if (!info) {
684 dev_err(dev, "cannot allocate memory\n");
685 goto out;
686 }
687
688 sinfo = info->par;
689
690 if (dev->platform_data) {
691 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
692 sinfo->default_bpp = pdata_sinfo->default_bpp;
693 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
694 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
695 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
696 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
697 sinfo->guard_time = pdata_sinfo->guard_time;
a9a84c37 698 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
14340586
NF		 699 } else {
700 dev_err(dev, "cannot get default configuration\n");
701 goto free_info;
702 }
703 sinfo->info = info;
704 sinfo->pdev = pdev;
705
706 strcpy(info->fix.id, sinfo->pdev->name);
707 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
708 info->pseudo_palette = sinfo->pseudo_palette;
709 info->fbops = &atmel_lcdfb_ops;
710
711 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
712 info->fix = atmel_lcdfb_fix;
713
714 /* Enable LCDC Clocks */
715 if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
716 sinfo->bus_clk = clk_get(dev, "hck1");
717 if (IS_ERR(sinfo->bus_clk)) {
718 ret = PTR_ERR(sinfo->bus_clk);
719 goto free_info;
720 }
721 }
722 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
723 if (IS_ERR(sinfo->lcdc_clk)) {
724 ret = PTR_ERR(sinfo->lcdc_clk);
725 goto put_bus_clk;
726 }
727 atmel_lcdfb_start_clock(sinfo);
728
729 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
730 info->monspecs.modedb_len, info->monspecs.modedb,
731 sinfo->default_bpp);
732 if (!ret) {
733 dev_err(dev, "no suitable video mode found\n");
734 goto stop_clk;
735 }
736
737
738 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
739 if (!regs) {
740 dev_err(dev, "resources unusable\n");
741 ret = -ENXIO;
742 goto stop_clk;
743 }
744
745 sinfo->irq_base = platform_get_irq(pdev, 0);
746 if (sinfo->irq_base < 0) {
747 dev_err(dev, "unable to get irq\n");
748 ret = sinfo->irq_base;
749 goto stop_clk;
750 }
751
752 /* Initialize video memory */
753 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
754 if (map) {
755 /* use a pre-allocated memory buffer */
756 info->fix.smem_start = map->start;
757 info->fix.smem_len = map->end - map->start + 1;
758 if (!request_mem_region(info->fix.smem_start,
759 info->fix.smem_len, pdev->name)) {
760 ret = -EBUSY;
761 goto stop_clk;
762 }
763
764 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
765 if (!info->screen_base)
766 goto release_intmem;
767 } else {
768 /* alocate memory buffer */
769 ret = atmel_lcdfb_alloc_video_memory(sinfo);
770 if (ret < 0) {
771 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
772 goto stop_clk;
773 }
774 }
775
776 /* LCDC registers */
777 info->fix.mmio_start = regs->start;
778 info->fix.mmio_len = regs->end - regs->start + 1;
779
780 if (!request_mem_region(info->fix.mmio_start,
781 info->fix.mmio_len, pdev->name)) {
782 ret = -EBUSY;
783 goto free_fb;
784 }
785
786 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
787 if (!sinfo->mmio) {
788 dev_err(dev, "cannot map LCDC registers\n");
789 goto release_mem;
790 }
791
a9a84c37
DB		 792 /* Initialize PWM for contrast or backlight ("off") */
793 init_contrast(sinfo);
794
14340586
NF		 795 /* interrupt */
796 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
797 if (ret) {
798 dev_err(dev, "request_irq failed: %d\n", ret);
799 goto unmap_mmio;
800 }
801
802 ret = atmel_lcdfb_init_fbinfo(sinfo);
803 if (ret < 0) {
804 dev_err(dev, "init fbinfo failed: %d\n", ret);
805 goto unregister_irqs;
806 }
807
808 /*
809 * This makes sure that our colour bitfield
810 * descriptors are correctly initialised.
811 */
812 atmel_lcdfb_check_var(&info->var, info);
813
814 ret = fb_set_var(info, &info->var);
815 if (ret) {
816 dev_warn(dev, "unable to set display parameters\n");
817 goto free_cmap;
818 }
819
820 dev_set_drvdata(dev, info);
821
822 /*
823 * Tell the world that we're ready to go
824 */
825 ret = register_framebuffer(info);
826 if (ret < 0) {
827 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
828 goto free_cmap;
829 }
830
831 /* Power up the LCDC screen */
832 if (sinfo->atmel_lcdfb_power_control)
833 sinfo->atmel_lcdfb_power_control(1);
834
835 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
836 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
837
838 return 0;
839
840
841free_cmap:
842 fb_dealloc_cmap(&info->cmap);
843unregister_irqs:
844 free_irq(sinfo->irq_base, info);
845unmap_mmio:
a9a84c37 846 exit_backlight(sinfo);
14340586
NF		 847 iounmap(sinfo->mmio);
848release_mem:
849 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
850free_fb:
851 if (map)
852 iounmap(info->screen_base);
853 else
854 atmel_lcdfb_free_video_memory(sinfo);
855
856release_intmem:
857 if (map)
858 release_mem_region(info->fix.smem_start, info->fix.smem_len);
859stop_clk:
860 atmel_lcdfb_stop_clock(sinfo);
861 clk_put(sinfo->lcdc_clk);
862put_bus_clk:
863 if (sinfo->bus_clk)
864 clk_put(sinfo->bus_clk);
865free_info:
866 framebuffer_release(info);
867out:
868 dev_dbg(dev, "%s FAILED\n", __func__);
869 return ret;
870}
871
872static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
873{
874 struct device *dev = &pdev->dev;
875 struct fb_info *info = dev_get_drvdata(dev);
876 struct atmel_lcdfb_info *sinfo = info->par;
877
878 if (!sinfo)
879 return 0;
880
a9a84c37 881 exit_backlight(sinfo);
14340586
NF		 882 if (sinfo->atmel_lcdfb_power_control)
883 sinfo->atmel_lcdfb_power_control(0);
884 unregister_framebuffer(info);
885 atmel_lcdfb_stop_clock(sinfo);
886 clk_put(sinfo->lcdc_clk);
887 if (sinfo->bus_clk)
888 clk_put(sinfo->bus_clk);
889 fb_dealloc_cmap(&info->cmap);
890 free_irq(sinfo->irq_base, info);
891 iounmap(sinfo->mmio);
892 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
893 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
894 iounmap(info->screen_base);
895 release_mem_region(info->fix.smem_start, info->fix.smem_len);
896 } else {
897 atmel_lcdfb_free_video_memory(sinfo);
898 }
899
900 dev_set_drvdata(dev, NULL);
901 framebuffer_release(info);
902
903 return 0;
904}
905
906static struct platform_driver atmel_lcdfb_driver = {
907 .remove = __exit_p(atmel_lcdfb_remove),
a9a84c37
DB		 908
909// FIXME need suspend, resume
910
14340586
NF		 911 .driver = {
912 .name = "atmel_lcdfb",
913 .owner = THIS_MODULE,
914 },
915};
916
917static int __init atmel_lcdfb_init(void)
918{
919 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
920}
921
922static void __exit atmel_lcdfb_exit(void)
923{
924 platform_driver_unregister(&atmel_lcdfb_driver);
925}
926
927module_init(atmel_lcdfb_init);
928module_exit(atmel_lcdfb_exit);
929
930MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
8f4c79ce 931MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
14340586 932MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)