Commit | Line | Data |
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b6e06983 IPG |
1 | /* |
2 | * Wireless Host Controller: Radio Control Interface (WHCI v0.95[2.3]) | |
3 | * Radio Control command/event transport to the UWB stack | |
4 | * | |
5 | * Copyright (C) 2005-2006 Intel Corporation | |
6 | * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License version | |
10 | * 2 as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
20 | * 02110-1301, USA. | |
21 | * | |
22 | * | |
23 | * Initialize and hook up the Radio Control interface. | |
24 | * | |
25 | * For each device probed, creates an 'struct whcrc' which contains | |
26 | * just the representation of the UWB Radio Controller, and the logic | |
27 | * for reading notifications and passing them to the UWB Core. | |
28 | * | |
29 | * So we initialize all of those, register the UWB Radio Controller | |
30 | * and setup the notification/event handle to pipe the notifications | |
31 | * to the UWB management Daemon. | |
32 | * | |
33 | * Once uwb_rc_add() is called, the UWB stack takes control, resets | |
34 | * the radio and readies the device to take commands the UWB | |
35 | * API/user-space. | |
36 | * | |
37 | * Note this driver is just a transport driver; the commands are | |
38 | * formed at the UWB stack and given to this driver who will deliver | |
39 | * them to the hw and transfer the replies/notifications back to the | |
40 | * UWB stack through the UWB daemon (UWBD). | |
41 | */ | |
42 | #include <linux/version.h> | |
43 | #include <linux/init.h> | |
44 | #include <linux/module.h> | |
45 | #include <linux/pci.h> | |
46 | #include <linux/dma-mapping.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/workqueue.h> | |
49 | #include <linux/uwb.h> | |
50 | #include <linux/uwb/whci.h> | |
51 | #include <linux/uwb/umc.h> | |
52 | #include "uwb-internal.h" | |
53 | ||
54 | #define D_LOCAL 0 | |
55 | #include <linux/uwb/debug.h> | |
56 | ||
57 | /** | |
58 | * Descriptor for an instance of the UWB Radio Control Driver that | |
59 | * attaches to the URC interface of the WHCI PCI card. | |
60 | * | |
61 | * Unless there is a lock specific to the 'data members', all access | |
62 | * is protected by uwb_rc->mutex. | |
63 | */ | |
64 | struct whcrc { | |
65 | struct umc_dev *umc_dev; | |
66 | struct uwb_rc *uwb_rc; /* UWB host controller */ | |
67 | ||
68 | unsigned long area; | |
69 | void __iomem *rc_base; | |
70 | size_t rc_len; | |
71 | spinlock_t irq_lock; | |
72 | ||
73 | void *evt_buf, *cmd_buf; | |
74 | dma_addr_t evt_dma_buf, cmd_dma_buf; | |
75 | wait_queue_head_t cmd_wq; | |
76 | struct work_struct event_work; | |
77 | }; | |
78 | ||
79 | /** | |
80 | * Execute an UWB RC command on WHCI/RC | |
81 | * | |
82 | * @rc: Instance of a Radio Controller that is a whcrc | |
83 | * @cmd: Buffer containing the RCCB and payload to execute | |
84 | * @cmd_size: Size of the command buffer. | |
85 | * | |
86 | * We copy the command into whcrc->cmd_buf (as it is pretty and | |
87 | * aligned`and physically contiguous) and then press the right keys in | |
88 | * the controller's URCCMD register to get it to read it. We might | |
89 | * have to wait for the cmd_sem to be open to us. | |
90 | * | |
91 | * NOTE: rc's mutex has to be locked | |
92 | */ | |
93 | static int whcrc_cmd(struct uwb_rc *uwb_rc, | |
94 | const struct uwb_rccb *cmd, size_t cmd_size) | |
95 | { | |
96 | int result = 0; | |
97 | struct whcrc *whcrc = uwb_rc->priv; | |
98 | struct device *dev = &whcrc->umc_dev->dev; | |
99 | u32 urccmd; | |
100 | ||
101 | d_fnstart(3, dev, "(%p, %p, %zu)\n", uwb_rc, cmd, cmd_size); | |
102 | might_sleep(); | |
103 | ||
104 | if (cmd_size >= 4096) { | |
105 | result = -E2BIG; | |
106 | goto error; | |
107 | } | |
108 | ||
109 | /* | |
110 | * If the URC is halted, then the hardware has reset itself. | |
111 | * Attempt to recover by restarting the device and then return | |
112 | * an error as it's likely that the current command isn't | |
113 | * valid for a newly started RC. | |
114 | */ | |
115 | if (le_readl(whcrc->rc_base + URCSTS) & URCSTS_HALTED) { | |
116 | dev_err(dev, "requesting reset of halted radio controller\n"); | |
117 | uwb_rc_reset_all(uwb_rc); | |
118 | result = -EIO; | |
119 | goto error; | |
120 | } | |
121 | ||
122 | result = wait_event_timeout(whcrc->cmd_wq, | |
123 | !(le_readl(whcrc->rc_base + URCCMD) & URCCMD_ACTIVE), HZ/2); | |
124 | if (result == 0) { | |
125 | dev_err(dev, "device is not ready to execute commands\n"); | |
126 | result = -ETIMEDOUT; | |
127 | goto error; | |
128 | } | |
129 | ||
130 | memmove(whcrc->cmd_buf, cmd, cmd_size); | |
131 | le_writeq(whcrc->cmd_dma_buf, whcrc->rc_base + URCCMDADDR); | |
132 | ||
133 | spin_lock(&whcrc->irq_lock); | |
134 | urccmd = le_readl(whcrc->rc_base + URCCMD); | |
135 | urccmd &= ~(URCCMD_EARV | URCCMD_SIZE_MASK); | |
136 | le_writel(urccmd | URCCMD_ACTIVE | URCCMD_IWR | cmd_size, | |
137 | whcrc->rc_base + URCCMD); | |
138 | spin_unlock(&whcrc->irq_lock); | |
139 | ||
140 | error: | |
141 | d_fnend(3, dev, "(%p, %p, %zu) = %d\n", | |
142 | uwb_rc, cmd, cmd_size, result); | |
143 | return result; | |
144 | } | |
145 | ||
146 | static int whcrc_reset(struct uwb_rc *rc) | |
147 | { | |
148 | struct whcrc *whcrc = rc->priv; | |
149 | ||
150 | return umc_controller_reset(whcrc->umc_dev); | |
151 | } | |
152 | ||
153 | /** | |
154 | * Reset event reception mechanism and tell hw we are ready to get more | |
155 | * | |
156 | * We have read all the events in the event buffer, so we are ready to | |
157 | * reset it to the beginning. | |
158 | * | |
159 | * This is only called during initialization or after an event buffer | |
160 | * has been retired. This means we can be sure that event processing | |
161 | * is disabled and it's safe to update the URCEVTADDR register. | |
162 | * | |
163 | * There's no need to wait for the event processing to start as the | |
164 | * URC will not clear URCCMD_ACTIVE until (internal) event buffer | |
165 | * space is available. | |
166 | */ | |
167 | static | |
168 | void whcrc_enable_events(struct whcrc *whcrc) | |
169 | { | |
170 | struct device *dev = &whcrc->umc_dev->dev; | |
171 | u32 urccmd; | |
172 | ||
173 | d_fnstart(4, dev, "(whcrc %p)\n", whcrc); | |
174 | ||
175 | le_writeq(whcrc->evt_dma_buf, whcrc->rc_base + URCEVTADDR); | |
176 | ||
177 | spin_lock(&whcrc->irq_lock); | |
178 | urccmd = le_readl(whcrc->rc_base + URCCMD) & ~URCCMD_ACTIVE; | |
179 | le_writel(urccmd | URCCMD_EARV, whcrc->rc_base + URCCMD); | |
180 | spin_unlock(&whcrc->irq_lock); | |
181 | ||
182 | d_fnend(4, dev, "(whcrc %p) = void\n", whcrc); | |
183 | } | |
184 | ||
185 | static void whcrc_event_work(struct work_struct *work) | |
186 | { | |
187 | struct whcrc *whcrc = container_of(work, struct whcrc, event_work); | |
188 | struct device *dev = &whcrc->umc_dev->dev; | |
189 | size_t size; | |
190 | u64 urcevtaddr; | |
191 | ||
192 | urcevtaddr = le_readq(whcrc->rc_base + URCEVTADDR); | |
193 | size = urcevtaddr & URCEVTADDR_OFFSET_MASK; | |
194 | ||
195 | d_printf(3, dev, "received %zu octet event\n", size); | |
196 | d_dump(4, dev, whcrc->evt_buf, size > 32 ? 32 : size); | |
197 | ||
198 | uwb_rc_neh_grok(whcrc->uwb_rc, whcrc->evt_buf, size); | |
199 | whcrc_enable_events(whcrc); | |
200 | } | |
201 | ||
202 | /** | |
203 | * Catch interrupts? | |
204 | * | |
205 | * We ack inmediately (and expect the hw to do the right thing and | |
206 | * raise another IRQ if things have changed :) | |
207 | */ | |
208 | static | |
209 | irqreturn_t whcrc_irq_cb(int irq, void *_whcrc) | |
210 | { | |
211 | struct whcrc *whcrc = _whcrc; | |
212 | struct device *dev = &whcrc->umc_dev->dev; | |
213 | u32 urcsts; | |
214 | ||
215 | d_fnstart(4, dev, "irq %d _whcrc %p)\n", irq, _whcrc); | |
216 | urcsts = le_readl(whcrc->rc_base + URCSTS); | |
217 | if (!(urcsts & URCSTS_INT_MASK)) | |
218 | return IRQ_NONE; | |
219 | le_writel(urcsts & URCSTS_INT_MASK, whcrc->rc_base + URCSTS); | |
220 | ||
221 | d_printf(4, dev, "acked 0x%08x, urcsts 0x%08x\n", | |
222 | le_readl(whcrc->rc_base + URCSTS), urcsts); | |
223 | ||
224 | if (whcrc->uwb_rc == NULL) { | |
225 | if (printk_ratelimit()) | |
226 | dev_dbg(dev, "Received interrupt when not yet " | |
227 | "ready!\n"); | |
228 | goto out; | |
229 | } | |
230 | ||
231 | if (urcsts & URCSTS_HSE) { | |
232 | dev_err(dev, "host system error -- hardware halted\n"); | |
233 | /* FIXME: do something sensible here */ | |
234 | goto out; | |
235 | } | |
236 | if (urcsts & URCSTS_ER) { | |
237 | d_printf(3, dev, "ER: event ready\n"); | |
238 | schedule_work(&whcrc->event_work); | |
239 | } | |
240 | if (urcsts & URCSTS_RCI) { | |
241 | d_printf(3, dev, "RCI: ready to execute another command\n"); | |
242 | wake_up_all(&whcrc->cmd_wq); | |
243 | } | |
244 | out: | |
245 | return IRQ_HANDLED; | |
246 | } | |
247 | ||
248 | ||
249 | /** | |
250 | * Initialize a UMC RC interface: map regions, get (shared) IRQ | |
251 | */ | |
252 | static | |
253 | int whcrc_setup_rc_umc(struct whcrc *whcrc) | |
254 | { | |
255 | int result = 0; | |
256 | struct device *dev = &whcrc->umc_dev->dev; | |
257 | struct umc_dev *umc_dev = whcrc->umc_dev; | |
258 | ||
259 | whcrc->area = umc_dev->resource.start; | |
260 | whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1; | |
261 | result = -EBUSY; | |
262 | if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME) | |
263 | == NULL) { | |
264 | dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n", | |
265 | whcrc->rc_len, whcrc->area, result); | |
266 | goto error_request_region; | |
267 | } | |
268 | ||
269 | whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len); | |
270 | if (whcrc->rc_base == NULL) { | |
271 | dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n", | |
272 | whcrc->rc_len, whcrc->area, result); | |
273 | goto error_ioremap_nocache; | |
274 | } | |
275 | ||
276 | result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED, | |
277 | KBUILD_MODNAME, whcrc); | |
278 | if (result < 0) { | |
279 | dev_err(dev, "can't allocate IRQ %d: %d\n", | |
280 | umc_dev->irq, result); | |
281 | goto error_request_irq; | |
282 | } | |
283 | ||
284 | result = -ENOMEM; | |
285 | whcrc->cmd_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE, | |
286 | &whcrc->cmd_dma_buf, GFP_KERNEL); | |
287 | if (whcrc->cmd_buf == NULL) { | |
288 | dev_err(dev, "Can't allocate cmd transfer buffer\n"); | |
289 | goto error_cmd_buffer; | |
290 | } | |
291 | ||
292 | whcrc->evt_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE, | |
293 | &whcrc->evt_dma_buf, GFP_KERNEL); | |
294 | if (whcrc->evt_buf == NULL) { | |
295 | dev_err(dev, "Can't allocate evt transfer buffer\n"); | |
296 | goto error_evt_buffer; | |
297 | } | |
298 | d_printf(3, dev, "UWB RC Interface: %zu bytes at 0x%p, irq %u\n", | |
299 | whcrc->rc_len, whcrc->rc_base, umc_dev->irq); | |
300 | return 0; | |
301 | ||
302 | error_evt_buffer: | |
303 | dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf, | |
304 | whcrc->cmd_dma_buf); | |
305 | error_cmd_buffer: | |
306 | free_irq(umc_dev->irq, whcrc); | |
307 | error_request_irq: | |
308 | iounmap(whcrc->rc_base); | |
309 | error_ioremap_nocache: | |
310 | release_mem_region(whcrc->area, whcrc->rc_len); | |
311 | error_request_region: | |
312 | return result; | |
313 | } | |
314 | ||
315 | ||
316 | /** | |
317 | * Release RC's UMC resources | |
318 | */ | |
319 | static | |
320 | void whcrc_release_rc_umc(struct whcrc *whcrc) | |
321 | { | |
322 | struct umc_dev *umc_dev = whcrc->umc_dev; | |
323 | ||
324 | dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->evt_buf, | |
325 | whcrc->evt_dma_buf); | |
326 | dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf, | |
327 | whcrc->cmd_dma_buf); | |
328 | free_irq(umc_dev->irq, whcrc); | |
329 | iounmap(whcrc->rc_base); | |
330 | release_mem_region(whcrc->area, whcrc->rc_len); | |
331 | } | |
332 | ||
333 | ||
334 | /** | |
335 | * whcrc_start_rc - start a WHCI radio controller | |
336 | * @whcrc: the radio controller to start | |
337 | * | |
338 | * Reset the UMC device, start the radio controller, enable events and | |
339 | * finally enable interrupts. | |
340 | */ | |
341 | static int whcrc_start_rc(struct uwb_rc *rc) | |
342 | { | |
343 | struct whcrc *whcrc = rc->priv; | |
344 | int result = 0; | |
345 | struct device *dev = &whcrc->umc_dev->dev; | |
346 | unsigned long start, duration; | |
347 | ||
348 | /* Reset the thing */ | |
349 | le_writel(URCCMD_RESET, whcrc->rc_base + URCCMD); | |
350 | if (d_test(3)) | |
351 | start = jiffies; | |
352 | if (whci_wait_for(dev, whcrc->rc_base + URCCMD, URCCMD_RESET, 0, | |
353 | 5000, "device to reset at init") < 0) { | |
354 | result = -EBUSY; | |
355 | goto error; | |
356 | } else if (d_test(3)) { | |
357 | duration = jiffies - start; | |
358 | if (duration > msecs_to_jiffies(40)) | |
359 | dev_err(dev, "Device took %ums to " | |
360 | "reset. MAX expected: 40ms\n", | |
361 | jiffies_to_msecs(duration)); | |
362 | } | |
363 | ||
364 | /* Set the event buffer, start the controller (enable IRQs later) */ | |
365 | le_writel(0, whcrc->rc_base + URCINTR); | |
366 | le_writel(URCCMD_RS, whcrc->rc_base + URCCMD); | |
367 | result = -ETIMEDOUT; | |
368 | if (d_test(3)) | |
369 | start = jiffies; | |
370 | if (whci_wait_for(dev, whcrc->rc_base + URCSTS, URCSTS_HALTED, 0, | |
371 | 5000, "device to start") < 0) | |
372 | goto error; | |
373 | if (d_test(3)) { | |
374 | duration = jiffies - start; | |
375 | if (duration > msecs_to_jiffies(40)) | |
376 | dev_err(dev, "Device took %ums to start. " | |
377 | "MAX expected: 40ms\n", | |
378 | jiffies_to_msecs(duration)); | |
379 | } | |
380 | whcrc_enable_events(whcrc); | |
381 | result = 0; | |
382 | le_writel(URCINTR_EN_ALL, whcrc->rc_base + URCINTR); | |
383 | error: | |
384 | return result; | |
385 | } | |
386 | ||
387 | ||
388 | /** | |
389 | * whcrc_stop_rc - stop a WHCI radio controller | |
390 | * @whcrc: the radio controller to stop | |
391 | * | |
392 | * Disable interrupts and cancel any pending event processing work | |
393 | * before clearing the Run/Stop bit. | |
394 | */ | |
395 | static | |
396 | void whcrc_stop_rc(struct uwb_rc *rc) | |
397 | { | |
398 | struct whcrc *whcrc = rc->priv; | |
399 | struct umc_dev *umc_dev = whcrc->umc_dev; | |
400 | ||
401 | le_writel(0, whcrc->rc_base + URCINTR); | |
402 | cancel_work_sync(&whcrc->event_work); | |
403 | ||
404 | le_writel(0, whcrc->rc_base + URCCMD); | |
405 | whci_wait_for(&umc_dev->dev, whcrc->rc_base + URCSTS, | |
406 | URCSTS_HALTED, 0, 40, "URCSTS.HALTED"); | |
407 | } | |
408 | ||
409 | static void whcrc_init(struct whcrc *whcrc) | |
410 | { | |
411 | spin_lock_init(&whcrc->irq_lock); | |
412 | init_waitqueue_head(&whcrc->cmd_wq); | |
413 | INIT_WORK(&whcrc->event_work, whcrc_event_work); | |
414 | } | |
415 | ||
416 | /** | |
417 | * Initialize the radio controller. | |
418 | * | |
419 | * NOTE: we setup whcrc->uwb_rc before calling uwb_rc_add(); in the | |
420 | * IRQ handler we use that to determine if the hw is ready to | |
421 | * handle events. Looks like a race condition, but it really is | |
422 | * not. | |
423 | */ | |
424 | static | |
425 | int whcrc_probe(struct umc_dev *umc_dev) | |
426 | { | |
427 | int result; | |
428 | struct uwb_rc *uwb_rc; | |
429 | struct whcrc *whcrc; | |
430 | struct device *dev = &umc_dev->dev; | |
431 | ||
432 | d_fnstart(3, dev, "(umc_dev %p)\n", umc_dev); | |
433 | result = -ENOMEM; | |
434 | uwb_rc = uwb_rc_alloc(); | |
435 | if (uwb_rc == NULL) { | |
436 | dev_err(dev, "unable to allocate RC instance\n"); | |
437 | goto error_rc_alloc; | |
438 | } | |
439 | whcrc = kzalloc(sizeof(*whcrc), GFP_KERNEL); | |
440 | if (whcrc == NULL) { | |
441 | dev_err(dev, "unable to allocate WHC-RC instance\n"); | |
442 | goto error_alloc; | |
443 | } | |
444 | whcrc_init(whcrc); | |
445 | whcrc->umc_dev = umc_dev; | |
446 | ||
447 | result = whcrc_setup_rc_umc(whcrc); | |
448 | if (result < 0) { | |
449 | dev_err(dev, "Can't setup RC UMC interface: %d\n", result); | |
450 | goto error_setup_rc_umc; | |
451 | } | |
452 | whcrc->uwb_rc = uwb_rc; | |
453 | ||
454 | uwb_rc->owner = THIS_MODULE; | |
455 | uwb_rc->cmd = whcrc_cmd; | |
456 | uwb_rc->reset = whcrc_reset; | |
457 | uwb_rc->start = whcrc_start_rc; | |
458 | uwb_rc->stop = whcrc_stop_rc; | |
459 | ||
460 | result = uwb_rc_add(uwb_rc, dev, whcrc); | |
461 | if (result < 0) | |
462 | goto error_rc_add; | |
463 | umc_set_drvdata(umc_dev, whcrc); | |
464 | d_fnend(3, dev, "(umc_dev %p) = 0\n", umc_dev); | |
465 | return 0; | |
466 | ||
467 | error_rc_add: | |
468 | whcrc_release_rc_umc(whcrc); | |
469 | error_setup_rc_umc: | |
470 | kfree(whcrc); | |
471 | error_alloc: | |
472 | uwb_rc_put(uwb_rc); | |
473 | error_rc_alloc: | |
474 | d_fnend(3, dev, "(umc_dev %p) = %d\n", umc_dev, result); | |
475 | return result; | |
476 | } | |
477 | ||
478 | /** | |
479 | * Clean up the radio control resources | |
480 | * | |
481 | * When we up the command semaphore, everybody possibly held trying to | |
482 | * execute a command should be granted entry and then they'll see the | |
483 | * host is quiescing and up it (so it will chain to the next waiter). | |
484 | * This should not happen (in any case), as we can only remove when | |
485 | * there are no handles open... | |
486 | */ | |
487 | static void whcrc_remove(struct umc_dev *umc_dev) | |
488 | { | |
489 | struct whcrc *whcrc = umc_get_drvdata(umc_dev); | |
490 | struct uwb_rc *uwb_rc = whcrc->uwb_rc; | |
491 | ||
492 | umc_set_drvdata(umc_dev, NULL); | |
493 | uwb_rc_rm(uwb_rc); | |
494 | whcrc_release_rc_umc(whcrc); | |
495 | kfree(whcrc); | |
496 | uwb_rc_put(uwb_rc); | |
497 | d_printf(1, &umc_dev->dev, "freed whcrc %p\n", whcrc); | |
498 | } | |
499 | ||
500 | /* PCI device ID's that we handle [so it gets loaded] */ | |
501 | static struct pci_device_id whcrc_id_table[] = { | |
502 | { PCI_DEVICE_CLASS(PCI_CLASS_WIRELESS_WHCI, ~0) }, | |
503 | { /* empty last entry */ } | |
504 | }; | |
505 | MODULE_DEVICE_TABLE(pci, whcrc_id_table); | |
506 | ||
507 | static struct umc_driver whcrc_driver = { | |
508 | .name = "whc-rc", | |
509 | .cap_id = UMC_CAP_ID_WHCI_RC, | |
510 | .probe = whcrc_probe, | |
511 | .remove = whcrc_remove, | |
512 | }; | |
513 | ||
514 | static int __init whcrc_driver_init(void) | |
515 | { | |
516 | return umc_driver_register(&whcrc_driver); | |
517 | } | |
518 | module_init(whcrc_driver_init); | |
519 | ||
520 | static void __exit whcrc_driver_exit(void) | |
521 | { | |
522 | umc_driver_unregister(&whcrc_driver); | |
523 | } | |
524 | module_exit(whcrc_driver_exit); | |
525 | ||
526 | MODULE_AUTHOR("Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>"); | |
527 | MODULE_DESCRIPTION("Wireless Host Controller Radio Control Driver"); | |
528 | MODULE_LICENSE("GPL"); |