usb: musb: use a Kconfig choice to pick the right DMA method
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / musb / omap2430.c
CommitLineData
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1/*
2 * Copyright (C) 2005-2007 by Texas Instruments
3 * Some code has been taken from tusb6010.c
4 * Copyrights for that are attributable to:
5 * Copyright (C) 2006 Nokia Corporation
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6 * Tony Lindgren <tony@atomide.com>
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27#include <linux/module.h>
28#include <linux/kernel.h>
29#include <linux/sched.h>
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30#include <linux/init.h>
31#include <linux/list.h>
32#include <linux/clk.h>
33#include <linux/io.h>
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34#include <linux/platform_device.h>
35#include <linux/dma-mapping.h>
207b0e1f
HH
36#include <linux/pm_runtime.h>
37#include <linux/err.h>
550a7375 38
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39#include "musb_core.h"
40#include "omap2430.h"
41
a3cee12a
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42struct omap2430_glue {
43 struct device *dev;
44 struct platform_device *musb;
45};
c20aebb9 46#define glue_to_musb(g) platform_get_drvdata(g->musb)
a3cee12a 47
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48static struct timer_list musb_idle_timer;
49
50static void musb_do_idle(unsigned long _musb)
51{
52 struct musb *musb = (void *)_musb;
53 unsigned long flags;
54 u8 power;
55 u8 devctl;
56
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57 spin_lock_irqsave(&musb->lock, flags);
58
84e250ff 59 switch (musb->xceiv->state) {
550a7375 60 case OTG_STATE_A_WAIT_BCON:
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61
62 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
63 if (devctl & MUSB_DEVCTL_BDEVICE) {
84e250ff 64 musb->xceiv->state = OTG_STATE_B_IDLE;
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65 MUSB_DEV_MODE(musb);
66 } else {
84e250ff 67 musb->xceiv->state = OTG_STATE_A_IDLE;
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68 MUSB_HST_MODE(musb);
69 }
70 break;
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71 case OTG_STATE_A_SUSPEND:
72 /* finish RESUME signaling? */
73 if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
74 power = musb_readb(musb->mregs, MUSB_POWER);
75 power &= ~MUSB_POWER_RESUME;
5c8a86e1 76 dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
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77 musb_writeb(musb->mregs, MUSB_POWER, power);
78 musb->is_active = 1;
79 musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
80 | MUSB_PORT_STAT_RESUME);
81 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
82 usb_hcd_poll_rh_status(musb_to_hcd(musb));
83 /* NOTE: it might really be A_WAIT_BCON ... */
84e250ff 84 musb->xceiv->state = OTG_STATE_A_HOST;
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85 }
86 break;
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87 case OTG_STATE_A_HOST:
88 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
89 if (devctl & MUSB_DEVCTL_BDEVICE)
84e250ff 90 musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375 91 else
84e250ff 92 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
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93 default:
94 break;
95 }
96 spin_unlock_irqrestore(&musb->lock, flags);
97}
98
99
743411b3 100static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
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101{
102 unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
103 static unsigned long last_timer;
104
105 if (timeout == 0)
106 timeout = default_timeout;
107
108 /* Never idle if active, or when VBUS timeout is not set as host */
109 if (musb->is_active || ((musb->a_wait_bcon == 0)
84e250ff 110 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
5c8a86e1 111 dev_dbg(musb->controller, "%s active, deleting timer\n",
3df00453 112 otg_state_string(musb->xceiv->state));
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113 del_timer(&musb_idle_timer);
114 last_timer = jiffies;
115 return;
116 }
117
118 if (time_after(last_timer, timeout)) {
119 if (!timer_pending(&musb_idle_timer))
120 last_timer = timeout;
121 else {
5c8a86e1 122 dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
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123 return;
124 }
125 }
126 last_timer = timeout;
127
5c8a86e1 128 dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
3df00453 129 otg_state_string(musb->xceiv->state),
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130 (unsigned long)jiffies_to_msecs(timeout - jiffies));
131 mod_timer(&musb_idle_timer, timeout);
132}
133
743411b3 134static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
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135{
136 u8 devctl;
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HH
137 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
138 int ret = 1;
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139 /* HDRC controls CPEN, but beware current surges during device
140 * connect. They can trigger transient overcurrent conditions
141 * that must be ignored.
142 */
143
144 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
145
146 if (is_on) {
594632ef
HH
147 if (musb->xceiv->state == OTG_STATE_A_IDLE) {
148 /* start the session */
149 devctl |= MUSB_DEVCTL_SESSION;
150 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
151 /*
152 * Wait for the musb to set as A device to enable the
153 * VBUS
154 */
155 while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
156
157 cpu_relax();
158
159 if (time_after(jiffies, timeout)) {
160 dev_err(musb->controller,
161 "configured as A device timeout");
162 ret = -EINVAL;
163 break;
164 }
165 }
166
167 if (ret && musb->xceiv->set_vbus)
168 otg_set_vbus(musb->xceiv, 1);
169 } else {
170 musb->is_active = 1;
171 musb->xceiv->default_a = 1;
172 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
173 devctl |= MUSB_DEVCTL_SESSION;
174 MUSB_HST_MODE(musb);
175 }
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176 } else {
177 musb->is_active = 0;
178
179 /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
180 * jumping right to B_IDLE...
181 */
182
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DB
183 musb->xceiv->default_a = 0;
184 musb->xceiv->state = OTG_STATE_B_IDLE;
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185 devctl &= ~MUSB_DEVCTL_SESSION;
186
187 MUSB_DEV_MODE(musb);
188 }
189 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
190
5c8a86e1 191 dev_dbg(musb->controller, "VBUS %s, devctl %02x "
550a7375 192 /* otg %3x conf %08x prcm %08x */ "\n",
3df00453 193 otg_state_string(musb->xceiv->state),
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194 musb_readb(musb->mregs, MUSB_DEVCTL));
195}
550a7375 196
743411b3 197static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
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198{
199 u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
200
201 devctl |= MUSB_DEVCTL_SESSION;
202 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
203
96a274d1 204 return 0;
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205}
206
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207static inline void omap2430_low_level_exit(struct musb *musb)
208{
209 u32 l;
210
211 /* in any role */
212 l = musb_readl(musb->mregs, OTG_FORCESTDBY);
213 l |= ENABLEFORCE; /* enable MSTANDBY */
214 musb_writel(musb->mregs, OTG_FORCESTDBY, l);
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215}
216
217static inline void omap2430_low_level_init(struct musb *musb)
218{
219 u32 l;
220
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221 l = musb_readl(musb->mregs, OTG_FORCESTDBY);
222 l &= ~ENABLEFORCE; /* disable MSTANDBY */
223 musb_writel(musb->mregs, OTG_FORCESTDBY, l);
224}
225
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226/* blocking notifier support */
227static int musb_otg_notifications(struct notifier_block *nb,
228 unsigned long event, void *unused)
229{
230 struct musb *musb = container_of(nb, struct musb, nb);
231 struct device *dev = musb->controller;
232 struct musb_hdrc_platform_data *pdata = dev->platform_data;
233 struct omap_musb_board_data *data = pdata->board_data;
234
235 switch (event) {
236 case USB_EVENT_ID:
5c8a86e1 237 dev_dbg(musb->controller, "ID GND\n");
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HH
238
239 if (is_otg_enabled(musb)) {
594632ef 240 if (musb->gadget_driver) {
7acc6197 241 pm_runtime_get_sync(musb->controller);
594632ef 242 otg_init(musb->xceiv);
70045c57 243 omap2430_musb_set_vbus(musb, 1);
594632ef 244 }
594632ef 245 } else {
7acc6197 246 pm_runtime_get_sync(musb->controller);
594632ef 247 otg_init(musb->xceiv);
70045c57 248 omap2430_musb_set_vbus(musb, 1);
594632ef
HH
249 }
250 break;
251
252 case USB_EVENT_VBUS:
5c8a86e1 253 dev_dbg(musb->controller, "VBUS Connect\n");
594632ef 254
7acc6197
HH
255 if (musb->gadget_driver)
256 pm_runtime_get_sync(musb->controller);
594632ef
HH
257 otg_init(musb->xceiv);
258 break;
259
260 case USB_EVENT_NONE:
5c8a86e1 261 dev_dbg(musb->controller, "VBUS Disconnect\n");
594632ef 262
383cf4e8 263 if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
62285963 264 if (musb->gadget_driver) {
7acc6197
HH
265 pm_runtime_mark_last_busy(musb->controller);
266 pm_runtime_put_autosuspend(musb->controller);
267 }
268
594632ef
HH
269 if (data->interface_type == MUSB_INTERFACE_UTMI) {
270 if (musb->xceiv->set_vbus)
271 otg_set_vbus(musb->xceiv, 0);
272 }
273 otg_shutdown(musb->xceiv);
274 break;
275 default:
5c8a86e1 276 dev_dbg(musb->controller, "ID float\n");
594632ef
HH
277 return NOTIFY_DONE;
278 }
279
280 return NOTIFY_OK;
281}
282
743411b3 283static int omap2430_musb_init(struct musb *musb)
550a7375 284{
594632ef 285 u32 l, status = 0;
ea65df57
HK
286 struct device *dev = musb->controller;
287 struct musb_hdrc_platform_data *plat = dev->platform_data;
288 struct omap_musb_board_data *data = plat->board_data;
550a7375 289
84e250ff
DB
290 /* We require some kind of external transceiver, hooked
291 * up through ULPI. TWL4030-family PMICs include one,
292 * which needs a driver, drivers aren't always needed.
293 */
294 musb->xceiv = otg_get_transceiver();
295 if (!musb->xceiv) {
296 pr_err("HS USB OTG: no transceiver configured\n");
297 return -ENODEV;
298 }
299
7acc6197
HH
300 status = pm_runtime_get_sync(dev);
301 if (status < 0) {
302 dev_err(dev, "pm_runtime_get_sync FAILED");
303 goto err1;
304 }
550a7375 305
8573e6a6 306 l = musb_readl(musb->mregs, OTG_INTERFSEL);
de2e1b0c
MM
307
308 if (data->interface_type == MUSB_INTERFACE_UTMI) {
309 /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
310 l &= ~ULPI_12PIN; /* Disable ULPI */
311 l |= UTMI_8BIT; /* Enable UTMI */
312 } else {
313 l |= ULPI_12PIN;
314 }
315
8573e6a6 316 musb_writel(musb->mregs, OTG_INTERFSEL, l);
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317
318 pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
319 "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
8573e6a6
FB
320 musb_readl(musb->mregs, OTG_REVISION),
321 musb_readl(musb->mregs, OTG_SYSCONFIG),
322 musb_readl(musb->mregs, OTG_SYSSTATUS),
323 musb_readl(musb->mregs, OTG_INTERFSEL),
324 musb_readl(musb->mregs, OTG_SIMENABLE));
550a7375 325
594632ef
HH
326 musb->nb.notifier_call = musb_otg_notifications;
327 status = otg_register_notifier(musb->xceiv, &musb->nb);
328
329 if (status)
5c8a86e1 330 dev_dbg(musb->controller, "notification register failed\n");
594632ef 331
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332 setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
333
334 return 0;
7acc6197
HH
335
336err1:
337 pm_runtime_disable(dev);
338 return status;
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FB
339}
340
002eda13
HH
341static void omap2430_musb_enable(struct musb *musb)
342{
343 u8 devctl;
344 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
345 struct device *dev = musb->controller;
346 struct musb_hdrc_platform_data *pdata = dev->platform_data;
347 struct omap_musb_board_data *data = pdata->board_data;
348
349 switch (musb->xceiv->last_event) {
350
351 case USB_EVENT_ID:
352 otg_init(musb->xceiv);
353 if (data->interface_type == MUSB_INTERFACE_UTMI) {
354 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
355 /* start the session */
356 devctl |= MUSB_DEVCTL_SESSION;
357 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
358 while (musb_readb(musb->mregs, MUSB_DEVCTL) &
359 MUSB_DEVCTL_BDEVICE) {
360 cpu_relax();
361
362 if (time_after(jiffies, timeout)) {
363 dev_err(musb->controller,
364 "configured as A device timeout");
365 break;
366 }
367 }
368 }
369 break;
370
371 case USB_EVENT_VBUS:
372 otg_init(musb->xceiv);
373 break;
374
375 default:
376 break;
377 }
378}
379
380static void omap2430_musb_disable(struct musb *musb)
381{
382 if (musb->xceiv->last_event)
383 otg_shutdown(musb->xceiv);
550a7375
FB
384}
385
743411b3 386static int omap2430_musb_exit(struct musb *musb)
550a7375 387{
19b9a83e 388 del_timer_sync(&musb_idle_timer);
550a7375 389
c20aebb9 390 omap2430_low_level_exit(musb);
f4053874 391 otg_put_transceiver(musb->xceiv);
c20aebb9 392
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393 return 0;
394}
743411b3 395
f7ec9437 396static const struct musb_platform_ops omap2430_ops = {
743411b3
FB
397 .init = omap2430_musb_init,
398 .exit = omap2430_musb_exit,
399
743411b3
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400 .set_mode = omap2430_musb_set_mode,
401 .try_idle = omap2430_musb_try_idle,
402
403 .set_vbus = omap2430_musb_set_vbus,
002eda13
HH
404
405 .enable = omap2430_musb_enable,
406 .disable = omap2430_musb_disable,
743411b3 407};
dc09886b
FB
408
409static u64 omap2430_dmamask = DMA_BIT_MASK(32);
410
411static int __init omap2430_probe(struct platform_device *pdev)
412{
413 struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
414 struct platform_device *musb;
a3cee12a 415 struct omap2430_glue *glue;
dc09886b
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416 int ret = -ENOMEM;
417
a3cee12a
FB
418 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
419 if (!glue) {
420 dev_err(&pdev->dev, "failed to allocate glue context\n");
421 goto err0;
422 }
423
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FB
424 musb = platform_device_alloc("musb-hdrc", -1);
425 if (!musb) {
426 dev_err(&pdev->dev, "failed to allocate musb device\n");
a3cee12a 427 goto err1;
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428 }
429
430 musb->dev.parent = &pdev->dev;
431 musb->dev.dma_mask = &omap2430_dmamask;
432 musb->dev.coherent_dma_mask = omap2430_dmamask;
433
a3cee12a
FB
434 glue->dev = &pdev->dev;
435 glue->musb = musb;
436
f7ec9437
FB
437 pdata->platform_ops = &omap2430_ops;
438
a3cee12a 439 platform_set_drvdata(pdev, glue);
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440
441 ret = platform_device_add_resources(musb, pdev->resource,
442 pdev->num_resources);
443 if (ret) {
444 dev_err(&pdev->dev, "failed to add resources\n");
207b0e1f 445 goto err2;
dc09886b
FB
446 }
447
448 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
449 if (ret) {
450 dev_err(&pdev->dev, "failed to add platform_data\n");
207b0e1f 451 goto err2;
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FB
452 }
453
454 ret = platform_device_add(musb);
455 if (ret) {
456 dev_err(&pdev->dev, "failed to register musb device\n");
207b0e1f 457 goto err2;
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FB
458 }
459
207b0e1f 460 pm_runtime_enable(&pdev->dev);
03491761 461
207b0e1f 462 return 0;
03491761 463
a3cee12a 464err2:
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465 platform_device_put(musb);
466
a3cee12a
FB
467err1:
468 kfree(glue);
469
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470err0:
471 return ret;
472}
473
474static int __exit omap2430_remove(struct platform_device *pdev)
475{
a3cee12a 476 struct omap2430_glue *glue = platform_get_drvdata(pdev);
dc09886b 477
a3cee12a
FB
478 platform_device_del(glue->musb);
479 platform_device_put(glue->musb);
207b0e1f
HH
480 pm_runtime_put(&pdev->dev);
481 pm_runtime_disable(&pdev->dev);
a3cee12a 482 kfree(glue);
dc09886b
FB
483
484 return 0;
485}
486
c20aebb9 487#ifdef CONFIG_PM
c20aebb9 488
7acc6197 489static int omap2430_runtime_suspend(struct device *dev)
c20aebb9
FB
490{
491 struct omap2430_glue *glue = dev_get_drvdata(dev);
492 struct musb *musb = glue_to_musb(glue);
493
e25bec16
HH
494 musb->context.otg_interfsel = musb_readl(musb->mregs,
495 OTG_INTERFSEL);
496
c20aebb9
FB
497 omap2430_low_level_exit(musb);
498 otg_set_suspend(musb->xceiv, 1);
c20aebb9
FB
499
500 return 0;
501}
502
7acc6197 503static int omap2430_runtime_resume(struct device *dev)
c20aebb9
FB
504{
505 struct omap2430_glue *glue = dev_get_drvdata(dev);
506 struct musb *musb = glue_to_musb(glue);
c20aebb9
FB
507
508 omap2430_low_level_init(musb);
e25bec16
HH
509 musb_writel(musb->mregs, OTG_INTERFSEL,
510 musb->context.otg_interfsel);
511
c20aebb9
FB
512 otg_set_suspend(musb->xceiv, 0);
513
514 return 0;
515}
516
517static struct dev_pm_ops omap2430_pm_ops = {
7acc6197
HH
518 .runtime_suspend = omap2430_runtime_suspend,
519 .runtime_resume = omap2430_runtime_resume,
c20aebb9
FB
520};
521
522#define DEV_PM_OPS (&omap2430_pm_ops)
523#else
524#define DEV_PM_OPS NULL
525#endif
526
dc09886b
FB
527static struct platform_driver omap2430_driver = {
528 .remove = __exit_p(omap2430_remove),
529 .driver = {
530 .name = "musb-omap2430",
c20aebb9 531 .pm = DEV_PM_OPS,
dc09886b
FB
532 },
533};
534
535MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
536MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
537MODULE_LICENSE("GPL v2");
538
539static int __init omap2430_init(void)
540{
541 return platform_driver_probe(&omap2430_driver, omap2430_probe);
542}
543subsys_initcall(omap2430_init);
544
545static void __exit omap2430_exit(void)
546{
547 platform_driver_unregister(&omap2430_driver);
548}
549module_exit(omap2430_exit);