ARM: OMAP2+: Introduce local usb.h
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / musb / musb_dsps.c
CommitLineData
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1/*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
32#include <linux/init.h>
33#include <linux/io.h>
65145677 34#include <linux/of.h>
ded017ee 35#include <linux/err.h>
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36#include <linux/platform_device.h>
37#include <linux/dma-mapping.h>
38#include <linux/pm_runtime.h>
39#include <linux/module.h>
78c289f8 40#include <linux/usb/nop-usb-xceiv.h>
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41
42#include <linux/of.h>
43#include <linux/of_device.h>
44#include <linux/of_address.h>
45
46#include <plat/usb.h>
47
48#include "musb_core.h"
49
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50#ifdef CONFIG_OF
51static const struct of_device_id musb_dsps_of_match[];
52#endif
53
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54/**
55 * avoid using musb_readx()/musb_writex() as glue layer should not be
56 * dependent on musb core layer symbols.
57 */
58static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
59 { return __raw_readb(addr + offset); }
60
61static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
62 { return __raw_readl(addr + offset); }
63
64static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
65 { __raw_writeb(data, addr + offset); }
66
67static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
68 { __raw_writel(data, addr + offset); }
69
70/**
71 * DSPS musb wrapper register offset.
72 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
73 * musb ips.
74 */
75struct dsps_musb_wrapper {
76 u16 revision;
77 u16 control;
78 u16 status;
79 u16 eoi;
80 u16 epintr_set;
81 u16 epintr_clear;
82 u16 epintr_status;
83 u16 coreintr_set;
84 u16 coreintr_clear;
85 u16 coreintr_status;
86 u16 phy_utmi;
87 u16 mode;
88
89 /* bit positions for control */
90 unsigned reset:5;
91
92 /* bit positions for interrupt */
93 unsigned usb_shift:5;
94 u32 usb_mask;
95 u32 usb_bitmap;
96 unsigned drvvbus:5;
97
98 unsigned txep_shift:5;
99 u32 txep_mask;
100 u32 txep_bitmap;
101
102 unsigned rxep_shift:5;
103 u32 rxep_mask;
104 u32 rxep_bitmap;
105
106 /* bit positions for phy_utmi */
107 unsigned otg_disable:5;
108
109 /* bit positions for mode */
110 unsigned iddig:5;
111 /* miscellaneous stuff */
112 u32 musb_core_offset;
113 u8 poll_seconds;
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114 /* number of musb instances */
115 u8 instances;
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116};
117
118/**
119 * DSPS glue structure.
120 */
121struct dsps_glue {
122 struct device *dev;
db4a9320 123 struct platform_device *musb[2]; /* child musb pdev */
9ecb8875 124 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
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125 struct timer_list timer[2]; /* otg_workaround timer */
126 unsigned long last_timer[2]; /* last timer data for each instance */
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127};
128
129/**
130 * dsps_musb_enable - enable interrupts
131 */
132static void dsps_musb_enable(struct musb *musb)
133{
134 struct device *dev = musb->controller;
135 struct platform_device *pdev = to_platform_device(dev->parent);
136 struct dsps_glue *glue = platform_get_drvdata(pdev);
137 const struct dsps_musb_wrapper *wrp = glue->wrp;
138 void __iomem *reg_base = musb->ctrl_base;
139 u32 epmask, coremask;
140
141 /* Workaround: setup IRQs through both register sets. */
142 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
143 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
144 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
145
146 dsps_writel(reg_base, wrp->epintr_set, epmask);
147 dsps_writel(reg_base, wrp->coreintr_set, coremask);
148 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
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149 dsps_writel(reg_base, wrp->coreintr_set,
150 (1 << wrp->drvvbus) << wrp->usb_shift);
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151}
152
153/**
154 * dsps_musb_disable - disable HDRC and flush interrupts
155 */
156static void dsps_musb_disable(struct musb *musb)
157{
158 struct device *dev = musb->controller;
159 struct platform_device *pdev = to_platform_device(dev->parent);
160 struct dsps_glue *glue = platform_get_drvdata(pdev);
161 const struct dsps_musb_wrapper *wrp = glue->wrp;
162 void __iomem *reg_base = musb->ctrl_base;
163
164 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
165 dsps_writel(reg_base, wrp->epintr_clear,
166 wrp->txep_bitmap | wrp->rxep_bitmap);
167 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
168 dsps_writel(reg_base, wrp->eoi, 0);
169}
170
171static void otg_timer(unsigned long _musb)
172{
173 struct musb *musb = (void *)_musb;
174 void __iomem *mregs = musb->mregs;
175 struct device *dev = musb->controller;
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176 struct platform_device *pdev = to_platform_device(dev);
177 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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178 const struct dsps_musb_wrapper *wrp = glue->wrp;
179 u8 devctl;
180 unsigned long flags;
181
182 /*
183 * We poll because DSPS IP's won't expose several OTG-critical
184 * status change events (from the transceiver) otherwise.
185 */
186 devctl = dsps_readb(mregs, MUSB_DEVCTL);
187 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
188 otg_state_string(musb->xceiv->state));
189
190 spin_lock_irqsave(&musb->lock, flags);
191 switch (musb->xceiv->state) {
192 case OTG_STATE_A_WAIT_BCON:
193 devctl &= ~MUSB_DEVCTL_SESSION;
194 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
195
196 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
197 if (devctl & MUSB_DEVCTL_BDEVICE) {
198 musb->xceiv->state = OTG_STATE_B_IDLE;
199 MUSB_DEV_MODE(musb);
200 } else {
201 musb->xceiv->state = OTG_STATE_A_IDLE;
202 MUSB_HST_MODE(musb);
203 }
204 break;
205 case OTG_STATE_A_WAIT_VFALL:
206 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
207 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
208 MUSB_INTR_VBUSERROR << wrp->usb_shift);
209 break;
210 case OTG_STATE_B_IDLE:
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211 devctl = dsps_readb(mregs, MUSB_DEVCTL);
212 if (devctl & MUSB_DEVCTL_BDEVICE)
db4a9320 213 mod_timer(&glue->timer[pdev->id],
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214 jiffies + wrp->poll_seconds * HZ);
215 else
216 musb->xceiv->state = OTG_STATE_A_IDLE;
217 break;
218 default:
219 break;
220 }
221 spin_unlock_irqrestore(&musb->lock, flags);
222}
223
224static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
225{
226 struct device *dev = musb->controller;
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227 struct platform_device *pdev = to_platform_device(dev);
228 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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229
230 if (timeout == 0)
231 timeout = jiffies + msecs_to_jiffies(3);
232
233 /* Never idle if active, or when VBUS timeout is not set as host */
234 if (musb->is_active || (musb->a_wait_bcon == 0 &&
235 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
236 dev_dbg(musb->controller, "%s active, deleting timer\n",
237 otg_state_string(musb->xceiv->state));
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238 del_timer(&glue->timer[pdev->id]);
239 glue->last_timer[pdev->id] = jiffies;
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240 return;
241 }
242
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243 if (time_after(glue->last_timer[pdev->id], timeout) &&
244 timer_pending(&glue->timer[pdev->id])) {
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245 dev_dbg(musb->controller,
246 "Longer idle timer already pending, ignoring...\n");
247 return;
248 }
db4a9320 249 glue->last_timer[pdev->id] = timeout;
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250
251 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
252 otg_state_string(musb->xceiv->state),
253 jiffies_to_msecs(timeout - jiffies));
db4a9320 254 mod_timer(&glue->timer[pdev->id], timeout);
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255}
256
257static irqreturn_t dsps_interrupt(int irq, void *hci)
258{
259 struct musb *musb = hci;
260 void __iomem *reg_base = musb->ctrl_base;
261 struct device *dev = musb->controller;
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262 struct platform_device *pdev = to_platform_device(dev);
263 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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264 const struct dsps_musb_wrapper *wrp = glue->wrp;
265 unsigned long flags;
266 irqreturn_t ret = IRQ_NONE;
267 u32 epintr, usbintr;
268
269 spin_lock_irqsave(&musb->lock, flags);
270
271 /* Get endpoint interrupts */
272 epintr = dsps_readl(reg_base, wrp->epintr_status);
273 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
274 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
275
276 if (epintr)
277 dsps_writel(reg_base, wrp->epintr_status, epintr);
278
279 /* Get usb core interrupts */
280 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
281 if (!usbintr && !epintr)
282 goto eoi;
283
284 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
285 if (usbintr)
286 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
287
288 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
289 usbintr, epintr);
290 /*
291 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
292 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
293 * switch appropriately between halves of the OTG state machine.
294 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
295 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
296 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
297 */
032ec49f 298 if (usbintr & MUSB_INTR_BABBLE)
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299 pr_info("CAUTION: musb: Babble Interrupt Occured\n");
300
301 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
302 int drvvbus = dsps_readl(reg_base, wrp->status);
303 void __iomem *mregs = musb->mregs;
304 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
305 int err;
306
032ec49f 307 err = musb->int_usb & MUSB_INTR_VBUSERROR;
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308 if (err) {
309 /*
310 * The Mentor core doesn't debounce VBUS as needed
311 * to cope with device connect current spikes. This
312 * means it's not uncommon for bus-powered devices
313 * to get VBUS errors during enumeration.
314 *
315 * This is a workaround, but newer RTL from Mentor
316 * seems to allow a better one: "re"-starting sessions
317 * without waiting for VBUS to stop registering in
318 * devctl.
319 */
320 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
321 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
db4a9320 322 mod_timer(&glue->timer[pdev->id],
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323 jiffies + wrp->poll_seconds * HZ);
324 WARNING("VBUS error workaround (delay coming)\n");
032ec49f 325 } else if (drvvbus) {
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326 musb->is_active = 1;
327 MUSB_HST_MODE(musb);
328 musb->xceiv->otg->default_a = 1;
329 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
db4a9320 330 del_timer(&glue->timer[pdev->id]);
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331 } else {
332 musb->is_active = 0;
333 MUSB_DEV_MODE(musb);
334 musb->xceiv->otg->default_a = 0;
335 musb->xceiv->state = OTG_STATE_B_IDLE;
336 }
337
338 /* NOTE: this must complete power-on within 100 ms. */
339 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
340 drvvbus ? "on" : "off",
341 otg_state_string(musb->xceiv->state),
342 err ? " ERROR" : "",
343 devctl);
344 ret = IRQ_HANDLED;
345 }
346
347 if (musb->int_tx || musb->int_rx || musb->int_usb)
348 ret |= musb_interrupt(musb);
349
350 eoi:
351 /* EOI needs to be written for the IRQ to be re-asserted. */
352 if (ret == IRQ_HANDLED || epintr || usbintr)
353 dsps_writel(reg_base, wrp->eoi, 1);
354
355 /* Poll for ID change */
032ec49f 356 if (musb->xceiv->state == OTG_STATE_B_IDLE)
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357 mod_timer(&glue->timer[pdev->id],
358 jiffies + wrp->poll_seconds * HZ);
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359
360 spin_unlock_irqrestore(&musb->lock, flags);
361
362 return ret;
363}
364
365static int dsps_musb_init(struct musb *musb)
366{
367 struct device *dev = musb->controller;
368 struct musb_hdrc_platform_data *plat = dev->platform_data;
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369 struct platform_device *pdev = to_platform_device(dev);
370 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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371 const struct dsps_musb_wrapper *wrp = glue->wrp;
372 struct omap_musb_board_data *data = plat->board_data;
373 void __iomem *reg_base = musb->ctrl_base;
374 u32 rev, val;
375 int status;
376
377 /* mentor core register starts at offset of 0x400 from musb base */
378 musb->mregs += wrp->musb_core_offset;
379
d8c3ef25 380 /* Get the NOP PHY */
662dca54 381 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
ded017ee 382 if (IS_ERR_OR_NULL(musb->xceiv))
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383 return -ENODEV;
384
385 /* Returns zero if e.g. not clocked */
386 rev = dsps_readl(reg_base, wrp->revision);
387 if (!rev) {
388 status = -ENODEV;
389 goto err0;
390 }
391
db4a9320 392 setup_timer(&glue->timer[pdev->id], otg_timer, (unsigned long) musb);
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393
394 /* Reset the musb */
395 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
396
397 /* Start the on-chip PHY and its PLL. */
398 if (data->set_phy_power)
399 data->set_phy_power(1);
400
401 musb->isr = dsps_interrupt;
402
403 /* reset the otgdisable bit, needed for host mode to work */
404 val = dsps_readl(reg_base, wrp->phy_utmi);
405 val &= ~(1 << wrp->otg_disable);
406 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
407
408 /* clear level interrupt */
409 dsps_writel(reg_base, wrp->eoi, 0);
410
411 return 0;
412err0:
721002ec 413 usb_put_phy(musb->xceiv);
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414 usb_nop_xceiv_unregister();
415 return status;
416}
417
418static int dsps_musb_exit(struct musb *musb)
419{
420 struct device *dev = musb->controller;
421 struct musb_hdrc_platform_data *plat = dev->platform_data;
422 struct omap_musb_board_data *data = plat->board_data;
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423 struct platform_device *pdev = to_platform_device(dev);
424 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
9ecb8875 425
db4a9320 426 del_timer_sync(&glue->timer[pdev->id]);
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427
428 /* Shutdown the on-chip PHY and its PLL. */
429 if (data->set_phy_power)
430 data->set_phy_power(0);
431
432 /* NOP driver needs change if supporting dual instance */
721002ec 433 usb_put_phy(musb->xceiv);
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434 usb_nop_xceiv_unregister();
435
436 return 0;
437}
438
439static struct musb_platform_ops dsps_ops = {
440 .init = dsps_musb_init,
441 .exit = dsps_musb_exit,
442
443 .enable = dsps_musb_enable,
444 .disable = dsps_musb_disable,
445
446 .try_idle = dsps_musb_try_idle,
447};
448
449static u64 musb_dmamask = DMA_BIT_MASK(32);
450
451static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
452{
453 struct device *dev = glue->dev;
454 struct platform_device *pdev = to_platform_device(dev);
455 struct musb_hdrc_platform_data *pdata = dev->platform_data;
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456 struct device_node *np = pdev->dev.of_node;
457 struct musb_hdrc_config *config;
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458 struct platform_device *musb;
459 struct resource *res;
460 struct resource resources[2];
461 char res_name[10];
65b3d52d 462 int ret, musbid;
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463
464 /* get memory resource */
465 sprintf(res_name, "musb%d", id);
466 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
467 if (!res) {
468 dev_err(dev, "%s get mem resource failed\n", res_name);
469 ret = -ENODEV;
470 goto err0;
471 }
472 res->parent = NULL;
473 resources[0] = *res;
474
475 /* get irq resource */
476 sprintf(res_name, "musb%d-irq", id);
477 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
478 if (!res) {
479 dev_err(dev, "%s get irq resource failed\n", res_name);
480 ret = -ENODEV;
481 goto err0;
482 }
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483 res->parent = NULL;
484 resources[1] = *res;
3bb55348 485 resources[1].name = "mc";
9ecb8875 486
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487 /* get the musb id */
488 musbid = musb_get_id(dev, GFP_KERNEL);
489 if (musbid < 0) {
490 dev_err(dev, "failed to allocate musb id\n");
491 ret = -ENOMEM;
492 goto err0;
493 }
9ecb8875 494 /* allocate the child platform device */
65b3d52d 495 musb = platform_device_alloc("musb-hdrc", musbid);
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496 if (!musb) {
497 dev_err(dev, "failed to allocate musb device\n");
498 ret = -ENOMEM;
65b3d52d 499 goto err1;
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500 }
501
65b3d52d 502 musb->id = musbid;
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503 musb->dev.parent = dev;
504 musb->dev.dma_mask = &musb_dmamask;
505 musb->dev.coherent_dma_mask = musb_dmamask;
506
db4a9320 507 glue->musb[id] = musb;
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508
509 ret = platform_device_add_resources(musb, resources, 2);
510 if (ret) {
511 dev_err(dev, "failed to add resources\n");
65b3d52d 512 goto err2;
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513 }
514
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515 if (np) {
516 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
517 if (!pdata) {
518 dev_err(&pdev->dev,
519 "failed to allocate musb platfrom data\n");
520 ret = -ENOMEM;
521 goto err2;
522 }
523
524 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
525 if (!config) {
526 dev_err(&pdev->dev,
527 "failed to allocate musb hdrc config\n");
528 goto err2;
529 }
530
531 of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps);
532 of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits);
533 sprintf(res_name, "port%d-mode", id);
534 of_property_read_u32(np, res_name, (u32 *)&pdata->mode);
535 of_property_read_u32(np, "power", (u32 *)&pdata->power);
536 config->multipoint = of_property_read_bool(np, "multipoint");
537
538 pdata->config = config;
539 }
540
541 pdata->platform_ops = &dsps_ops;
542
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543 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
544 if (ret) {
545 dev_err(dev, "failed to add platform_data\n");
65b3d52d 546 goto err2;
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547 }
548
549 ret = platform_device_add(musb);
550 if (ret) {
551 dev_err(dev, "failed to register musb device\n");
65b3d52d 552 goto err2;
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553 }
554
555 return 0;
556
65b3d52d 557err2:
9ecb8875 558 platform_device_put(musb);
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559err1:
560 musb_put_id(dev, musbid);
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561err0:
562 return ret;
563}
564
db4a9320 565static void dsps_delete_musb_pdev(struct dsps_glue *glue, u8 id)
9ecb8875 566{
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567 musb_put_id(glue->dev, glue->musb[id]->id);
568 platform_device_del(glue->musb[id]);
569 platform_device_put(glue->musb[id]);
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570}
571
572static int __devinit dsps_probe(struct platform_device *pdev)
573{
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574 struct device_node *np = pdev->dev.of_node;
575 const struct of_device_id *match;
576 const struct dsps_musb_wrapper *wrp;
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577 struct dsps_glue *glue;
578 struct resource *iomem;
db4a9320 579 int ret, i;
9ecb8875 580
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581 match = of_match_node(musb_dsps_of_match, np);
582 if (!match) {
583 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
584 ret = -EINVAL;
585 goto err0;
586 }
587 wrp = match->data;
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588
589 /* allocate glue */
590 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
591 if (!glue) {
592 dev_err(&pdev->dev, "unable to allocate glue memory\n");
593 ret = -ENOMEM;
594 goto err0;
595 }
596
597 /* get memory resource */
598 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
599 if (!iomem) {
600 dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
601 ret = -ENODEV;
602 goto err1;
603 }
604
605 glue->dev = &pdev->dev;
606
607 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
608 if (!glue->wrp) {
609 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
610 ret = -ENOMEM;
611 goto err1;
612 }
613 platform_set_drvdata(pdev, glue);
614
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615 /* enable the usbss clocks */
616 pm_runtime_enable(&pdev->dev);
617
618 ret = pm_runtime_get_sync(&pdev->dev);
619 if (ret < 0) {
620 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
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621 goto err2;
622 }
623
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624 /* create the child platform device for all instances of musb */
625 for (i = 0; i < wrp->instances ; i++) {
626 ret = dsps_create_musb_pdev(glue, i);
627 if (ret != 0) {
628 dev_err(&pdev->dev, "failed to create child pdev\n");
629 /* release resources of previously created instances */
630 for (i--; i >= 0 ; i--)
631 dsps_delete_musb_pdev(glue, i);
632 goto err3;
633 }
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634 }
635
636 return 0;
637
638err3:
0e38c4ed 639 pm_runtime_put(&pdev->dev);
9ecb8875 640err2:
0e38c4ed 641 pm_runtime_disable(&pdev->dev);
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642 kfree(glue->wrp);
643err1:
644 kfree(glue);
645err0:
646 return ret;
647}
648static int __devexit dsps_remove(struct platform_device *pdev)
649{
650 struct dsps_glue *glue = platform_get_drvdata(pdev);
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651 const struct dsps_musb_wrapper *wrp = glue->wrp;
652 int i;
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653
654 /* delete the child platform device */
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655 for (i = 0; i < wrp->instances ; i++)
656 dsps_delete_musb_pdev(glue, i);
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657
658 /* disable usbss clocks */
659 pm_runtime_put(&pdev->dev);
660 pm_runtime_disable(&pdev->dev);
661 kfree(glue->wrp);
662 kfree(glue);
663 return 0;
664}
665
666#ifdef CONFIG_PM_SLEEP
667static int dsps_suspend(struct device *dev)
668{
669 struct musb_hdrc_platform_data *plat = dev->platform_data;
670 struct omap_musb_board_data *data = plat->board_data;
671
672 /* Shutdown the on-chip PHY and its PLL. */
673 if (data->set_phy_power)
674 data->set_phy_power(0);
675
676 return 0;
677}
678
679static int dsps_resume(struct device *dev)
680{
681 struct musb_hdrc_platform_data *plat = dev->platform_data;
682 struct omap_musb_board_data *data = plat->board_data;
683
684 /* Start the on-chip PHY and its PLL. */
685 if (data->set_phy_power)
686 data->set_phy_power(1);
687
688 return 0;
689}
690#endif
691
692static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
693
694static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
695 .revision = 0x00,
696 .control = 0x14,
697 .status = 0x18,
698 .eoi = 0x24,
699 .epintr_set = 0x38,
700 .epintr_clear = 0x40,
701 .epintr_status = 0x30,
702 .coreintr_set = 0x3c,
703 .coreintr_clear = 0x44,
704 .coreintr_status = 0x34,
705 .phy_utmi = 0xe0,
706 .mode = 0xe8,
707 .reset = 0,
708 .otg_disable = 21,
709 .iddig = 8,
710 .usb_shift = 0,
711 .usb_mask = 0x1ff,
712 .usb_bitmap = (0x1ff << 0),
713 .drvvbus = 8,
714 .txep_shift = 0,
715 .txep_mask = 0xffff,
716 .txep_bitmap = (0xffff << 0),
717 .rxep_shift = 16,
718 .rxep_mask = 0xfffe,
719 .rxep_bitmap = (0xfffe << 16),
720 .musb_core_offset = 0x400,
721 .poll_seconds = 2,
db4a9320 722 .instances = 2,
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723};
724
725static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
726 {
727 .name = "musb-ti81xx",
728 .driver_data = (kernel_ulong_t) &ti81xx_driver_data,
729 },
730 { }, /* Terminating Entry */
731};
732MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
733
65145677 734#ifdef CONFIG_OF
9ecb8875 735static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
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736 { .compatible = "ti,musb-am33xx",
737 .data = (void *) &ti81xx_driver_data, },
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738 { },
739};
740MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
65145677 741#endif
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742
743static struct platform_driver dsps_usbss_driver = {
744 .probe = dsps_probe,
745 .remove = __devexit_p(dsps_remove),
746 .driver = {
747 .name = "musb-dsps",
748 .pm = &dsps_pm_ops,
65145677 749 .of_match_table = of_match_ptr(musb_dsps_of_match),
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750 },
751 .id_table = musb_dsps_id_table,
752};
753
754MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
755MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
756MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
757MODULE_LICENSE("GPL v2");
758
759static int __init dsps_init(void)
760{
761 return platform_driver_register(&dsps_usbss_driver);
762}
763subsys_initcall(dsps_init);
764
765static void __exit dsps_exit(void)
766{
767 platform_driver_unregister(&dsps_usbss_driver);
768}
769module_exit(dsps_exit);