Merge branch 'topic/hda' into for-linus
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / musb / musb_core.h
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1/*
2 * MUSB OTG driver defines
3 *
4 * Copyright 2005 Mentor Graphics Corporation
5 * Copyright (C) 2005-2006 by Texas Instruments
6 * Copyright (C) 2006-2007 Nokia Corporation
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
34
35#ifndef __MUSB_CORE_H__
36#define __MUSB_CORE_H__
37
38#include <linux/slab.h>
39#include <linux/list.h>
40#include <linux/interrupt.h>
550a7375 41#include <linux/errno.h>
f7f9d63e 42#include <linux/timer.h>
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43#include <linux/clk.h>
44#include <linux/device.h>
45#include <linux/usb/ch9.h>
46#include <linux/usb/gadget.h>
47#include <linux/usb.h>
48#include <linux/usb/otg.h>
49#include <linux/usb/musb.h>
50
51struct musb;
52struct musb_hw_ep;
53struct musb_ep;
54
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55/* Helper defines for struct musb->hwvers */
56#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
57#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
58#define MUSB_HWVERS_RC 0x8000
59#define MUSB_HWVERS_1300 0x52C
60#define MUSB_HWVERS_1400 0x590
61#define MUSB_HWVERS_1800 0x720
62#define MUSB_HWVERS_1900 0x784
63#define MUSB_HWVERS_2000 0x800
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64
65#include "musb_debug.h"
66#include "musb_dma.h"
67
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68#include "musb_io.h"
69#include "musb_regs.h"
70
71#include "musb_gadget.h"
27729aad 72#include <linux/usb/hcd.h>
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73#include "musb_host.h"
74
75
76
77#ifdef CONFIG_USB_MUSB_OTG
78
79#define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
80#define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
81#define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
82
83/* NOTE: otg and peripheral-only state machines start at B_IDLE.
84 * OTG or host-only go to A_IDLE when ID is sensed.
85 */
86#define is_peripheral_active(m) (!(m)->is_host)
87#define is_host_active(m) ((m)->is_host)
88
89#else
90#define is_peripheral_enabled(musb) is_peripheral_capable()
91#define is_host_enabled(musb) is_host_capable()
92#define is_otg_enabled(musb) 0
93
94#define is_peripheral_active(musb) is_peripheral_capable()
95#define is_host_active(musb) is_host_capable()
96#endif
97
98#if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
99/* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
100 * override that choice selection (often USB_GADGET_DUMMY_HCD).
101 */
102#ifndef CONFIG_USB_GADGET_MUSB_HDRC
103#error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
104#endif
105#endif /* need MUSB gadget selection */
106
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107#ifndef CONFIG_HAVE_CLK
108/* Dummy stub for clk framework */
109#define clk_get(dev, id) NULL
110#define clk_put(clock) do {} while (0)
111#define clk_enable(clock) do {} while (0)
112#define clk_disable(clock) do {} while (0)
113#endif
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114
115#ifdef CONFIG_PROC_FS
116#include <linux/fs.h>
117#define MUSB_CONFIG_PROC_FS
118#endif
119
120/****************************** PERIPHERAL ROLE *****************************/
121
122#ifdef CONFIG_USB_GADGET_MUSB_HDRC
123
124#define is_peripheral_capable() (1)
125
126extern irqreturn_t musb_g_ep0_irq(struct musb *);
127extern void musb_g_tx(struct musb *, u8);
128extern void musb_g_rx(struct musb *, u8);
129extern void musb_g_reset(struct musb *);
130extern void musb_g_suspend(struct musb *);
131extern void musb_g_resume(struct musb *);
132extern void musb_g_wakeup(struct musb *);
133extern void musb_g_disconnect(struct musb *);
134
135#else
136
137#define is_peripheral_capable() (0)
138
139static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
140static inline void musb_g_reset(struct musb *m) {}
141static inline void musb_g_suspend(struct musb *m) {}
142static inline void musb_g_resume(struct musb *m) {}
143static inline void musb_g_wakeup(struct musb *m) {}
144static inline void musb_g_disconnect(struct musb *m) {}
145
146#endif
147
148/****************************** HOST ROLE ***********************************/
149
150#ifdef CONFIG_USB_MUSB_HDRC_HCD
151
152#define is_host_capable() (1)
153
154extern irqreturn_t musb_h_ep0_irq(struct musb *);
155extern void musb_host_tx(struct musb *, u8);
156extern void musb_host_rx(struct musb *, u8);
157
158#else
159
160#define is_host_capable() (0)
161
162static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
163static inline void musb_host_tx(struct musb *m, u8 e) {}
164static inline void musb_host_rx(struct musb *m, u8 e) {}
165
166#endif
167
168
169/****************************** CONSTANTS ********************************/
170
171#ifndef MUSB_C_NUM_EPS
172#define MUSB_C_NUM_EPS ((u8)16)
173#endif
174
175#ifndef MUSB_MAX_END0_PACKET
176#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
177#endif
178
179/* host side ep0 states */
180enum musb_h_ep0_state {
181 MUSB_EP0_IDLE,
182 MUSB_EP0_START, /* expect ack of setup */
183 MUSB_EP0_IN, /* expect IN DATA */
184 MUSB_EP0_OUT, /* expect ack of OUT DATA */
185 MUSB_EP0_STATUS, /* expect ack of STATUS */
186} __attribute__ ((packed));
187
188/* peripheral side ep0 states */
189enum musb_g_ep0_state {
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190 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
191 MUSB_EP0_STAGE_SETUP, /* received SETUP */
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192 MUSB_EP0_STAGE_TX, /* IN data */
193 MUSB_EP0_STAGE_RX, /* OUT data */
194 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
195 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
196 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
197} __attribute__ ((packed));
198
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199/*
200 * OTG protocol constants. See USB OTG 1.3 spec,
201 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
202 */
550a7375 203#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
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204#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
205#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
206#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
207
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208
209/*************************** REGISTER ACCESS ********************************/
210
211/* Endpoint registers (other than dynfifo setup) can be accessed either
212 * directly with the "flat" model, or after setting up an index register.
213 */
214
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215#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
216 || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
fb9c58ed 217 || defined(CONFIG_ARCH_OMAP4)
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218/* REVISIT indexed access seemed to
219 * misbehave (on DaVinci) for at least peripheral IN ...
220 */
221#define MUSB_FLAT_REG
222#endif
223
224/* TUSB mapping: "flat" plus ep0 special cases */
7c925546 225#if defined(CONFIG_USB_MUSB_TUSB6010)
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226#define musb_ep_select(_mbase, _epnum) \
227 musb_writeb((_mbase), MUSB_INDEX, (_epnum))
228#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
229
230/* "flat" mapping: each endpoint has its own i/o address */
231#elif defined(MUSB_FLAT_REG)
232#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
233#define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
234
235/* "indexed" mapping: INDEX register controls register bank select */
236#else
237#define musb_ep_select(_mbase, _epnum) \
238 musb_writeb((_mbase), MUSB_INDEX, (_epnum))
239#define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
240#endif
241
242/****************************** FUNCTIONS ********************************/
243
244#define MUSB_HST_MODE(_musb)\
245 { (_musb)->is_host = true; }
246#define MUSB_DEV_MODE(_musb) \
247 { (_musb)->is_host = false; }
248
249#define test_devctl_hst_mode(_x) \
250 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
251
252#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
253
254/******************************** TYPES *************************************/
255
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256/**
257 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
258 * @init: turns on clocks, sets up platform-specific registers, etc
259 * @exit: undoes @init
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260 * @set_mode: forcefully changes operating mode
261 * @try_ilde: tries to idle the IP
262 * @vbus_status: returns vbus status if possible
263 * @set_vbus: forces vbus status
13254307 264 * @channel_program: pre check for standard dma channel_program func
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265 */
266struct musb_platform_ops {
267 int (*init)(struct musb *musb);
268 int (*exit)(struct musb *musb);
269
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270 void (*enable)(struct musb *musb);
271 void (*disable)(struct musb *musb);
272
273 int (*set_mode)(struct musb *musb, u8 mode);
274 void (*try_idle)(struct musb *musb, unsigned long timeout);
275
276 int (*vbus_status)(struct musb *musb);
277 void (*set_vbus)(struct musb *musb, int on);
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278
279 int (*adjust_channel_params)(struct dma_channel *channel,
280 u16 packet_sz, u8 *mode,
281 dma_addr_t *dma_addr, u32 *len);
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282};
283
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284/*
285 * struct musb_hw_ep - endpoint hardware (bidirectional)
286 *
287 * Ordered slightly for better cacheline locality.
288 */
289struct musb_hw_ep {
290 struct musb *musb;
291 void __iomem *fifo;
292 void __iomem *regs;
293
7c925546 294#ifdef CONFIG_USB_MUSB_TUSB6010
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295 void __iomem *conf;
296#endif
297
298 /* index in musb->endpoints[] */
299 u8 epnum;
300
301 /* hardware configuration, possibly dynamic */
302 bool is_shared_fifo;
303 bool tx_double_buffered;
304 bool rx_double_buffered;
305 u16 max_packet_sz_tx;
306 u16 max_packet_sz_rx;
307
308 struct dma_channel *tx_channel;
309 struct dma_channel *rx_channel;
310
7c925546 311#ifdef CONFIG_USB_MUSB_TUSB6010
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312 /* TUSB has "asynchronous" and "synchronous" dma modes */
313 dma_addr_t fifo_async;
314 dma_addr_t fifo_sync;
315 void __iomem *fifo_sync_va;
316#endif
317
318#ifdef CONFIG_USB_MUSB_HDRC_HCD
319 void __iomem *target_regs;
320
321 /* currently scheduled peripheral endpoint */
322 struct musb_qh *in_qh;
323 struct musb_qh *out_qh;
324
325 u8 rx_reinit;
326 u8 tx_reinit;
327#endif
328
329#ifdef CONFIG_USB_GADGET_MUSB_HDRC
330 /* peripheral side */
331 struct musb_ep ep_in; /* TX */
332 struct musb_ep ep_out; /* RX */
333#endif
334};
335
ad1adb89 336static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
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337{
338#ifdef CONFIG_USB_GADGET_MUSB_HDRC
339 return next_request(&hw_ep->ep_in);
340#else
341 return NULL;
342#endif
343}
344
ad1adb89 345static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
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346{
347#ifdef CONFIG_USB_GADGET_MUSB_HDRC
348 return next_request(&hw_ep->ep_out);
349#else
350 return NULL;
351#endif
352}
353
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354struct musb_csr_regs {
355 /* FIFO registers */
356 u16 txmaxp, txcsr, rxmaxp, rxcsr;
357 u16 rxfifoadd, txfifoadd;
358 u8 txtype, txinterval, rxtype, rxinterval;
359 u8 rxfifosz, txfifosz;
360 u8 txfunaddr, txhubaddr, txhubport;
361 u8 rxfunaddr, rxhubaddr, rxhubport;
362};
363
364struct musb_context_registers {
365
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366 u8 power;
367 u16 intrtxe, intrrxe;
368 u8 intrusbe;
369 u16 frame;
370 u8 index, testmode;
371
372 u8 devctl, busctl, misc;
373
374 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
375};
376
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377/*
378 * struct musb - Driver instance data.
379 */
380struct musb {
381 /* device lock */
382 spinlock_t lock;
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383
384 const struct musb_platform_ops *ops;
7421107b 385 struct musb_context_registers context;
743411b3 386
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387 irqreturn_t (*isr)(int, void *);
388 struct work_struct irq_work;
32c3b94e 389 u16 hwvers;
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390
391/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
392#define MUSB_PORT_STAT_RESUME (1 << 31)
393
394 u32 port1_status;
395
396#ifdef CONFIG_USB_MUSB_HDRC_HCD
397 unsigned long rh_timer;
398
399 enum musb_h_ep0_state ep0_stage;
400
401 /* bulk traffic normally dedicates endpoint hardware, and each
402 * direction has its own ring of host side endpoints.
403 * we try to progress the transfer at the head of each endpoint's
404 * queue until it completes or NAKs too much; then we try the next
405 * endpoint.
406 */
407 struct musb_hw_ep *bulk_ep;
408
409 struct list_head control; /* of musb_qh */
410 struct list_head in_bulk; /* of musb_qh */
411 struct list_head out_bulk; /* of musb_qh */
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412
413 struct timer_list otg_timer;
550a7375 414#endif
594632ef 415 struct notifier_block nb;
550a7375 416
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417 struct dma_controller *dma_controller;
418
419 struct device *controller;
420 void __iomem *ctrl_base;
421 void __iomem *mregs;
422
7c925546 423#ifdef CONFIG_USB_MUSB_TUSB6010
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424 dma_addr_t async;
425 dma_addr_t sync;
426 void __iomem *sync_va;
427#endif
428
429 /* passed down from chip/board specific irq handlers */
430 u8 int_usb;
431 u16 int_rx;
432 u16 int_tx;
433
84e250ff 434 struct otg_transceiver *xceiv;
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435
436 int nIrq;
c48a5155 437 unsigned irq_wake:1;
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438
439 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
440#define control_ep endpoints
441
442#define VBUSERR_RETRY_COUNT 3
443 u16 vbuserr_retry;
444 u16 epmask;
445 u8 nr_endpoints;
446
447 u8 board_mode; /* enum musb_mode */
448 int (*board_set_power)(int state);
449
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450 u8 min_power; /* vbus for periph, in mA/2 */
451
452 bool is_host;
453
454 int a_wait_bcon; /* VBUS timeout in msecs */
455 unsigned long idle_timeout; /* Next timeout in jiffies */
456
457 /* active means connected and not suspended */
458 unsigned is_active:1;
459
460 unsigned is_multipoint:1;
461 unsigned ignore_disconnect:1; /* during bus resets */
462
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463 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
464 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
51bf0d0e 465 unsigned dyn_fifo:1; /* dynamic FIFO supported? */
a483d706 466
7ed069c1 467 unsigned bulk_split:1;
550a7375 468#define can_bulk_split(musb,type) \
7ed069c1 469 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
550a7375 470
7ed069c1 471 unsigned bulk_combine:1;
550a7375 472#define can_bulk_combine(musb,type) \
7ed069c1 473 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
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474
475#ifdef CONFIG_USB_GADGET_MUSB_HDRC
476 /* is_suspended means USB B_PERIPHERAL suspend */
477 unsigned is_suspended:1;
478
479 /* may_wakeup means remote wakeup is enabled */
480 unsigned may_wakeup:1;
481
482 /* is_self_powered is reported in device status and the
483 * config descriptor. is_bus_powered means B_PERIPHERAL
484 * draws some VBUS current; both can be true.
485 */
486 unsigned is_self_powered:1;
487 unsigned is_bus_powered:1;
488
489 unsigned set_address:1;
490 unsigned test_mode:1;
491 unsigned softconnect:1;
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492
493 u8 address;
494 u8 test_mode_nr;
495 u16 ackpend; /* ep0 */
496 enum musb_g_ep0_state ep0_state;
497 struct usb_gadget g; /* the gadget */
498 struct usb_gadget_driver *gadget_driver; /* its driver */
499#endif
500
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501 /*
502 * FIXME: Remove this flag.
503 *
504 * This is only added to allow Blackfin to work
505 * with current driver. For some unknown reason
506 * Blackfin doesn't work with double buffering
507 * and that's enabled by default.
508 *
509 * We added this flag to forcefully disable double
510 * buffering until we get it working.
511 */
512 unsigned double_buffer_not_ok:1 __deprecated;
550a7375 513
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514 struct musb_hdrc_config *config;
515
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516#ifdef MUSB_CONFIG_PROC_FS
517 struct proc_dir_entry *proc_entry;
518#endif
519};
520
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521#ifdef CONFIG_USB_GADGET_MUSB_HDRC
522static inline struct musb *gadget_to_musb(struct usb_gadget *g)
523{
524 return container_of(g, struct musb, g);
525}
526#endif
527
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528#ifdef CONFIG_BLACKFIN
529static inline int musb_read_fifosize(struct musb *musb,
530 struct musb_hw_ep *hw_ep, u8 epnum)
531{
532 musb->nr_endpoints++;
533 musb->epmask |= (1 << epnum);
534
535 if (epnum < 5) {
536 hw_ep->max_packet_sz_tx = 128;
537 hw_ep->max_packet_sz_rx = 128;
538 } else {
539 hw_ep->max_packet_sz_tx = 1024;
540 hw_ep->max_packet_sz_rx = 1024;
541 }
542 hw_ep->is_shared_fifo = false;
543
544 return 0;
545}
546
547static inline void musb_configure_ep0(struct musb *musb)
548{
549 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
550 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
551 musb->endpoints[0].is_shared_fifo = true;
552}
553
554#else
555
556static inline int musb_read_fifosize(struct musb *musb,
557 struct musb_hw_ep *hw_ep, u8 epnum)
558{
32233716 559 void *mbase = musb->mregs;
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560 u8 reg = 0;
561
562 /* read from core using indexed model */
32233716 563 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
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564 /* 0's returned when no more endpoints */
565 if (!reg)
566 return -ENODEV;
567
568 musb->nr_endpoints++;
569 musb->epmask |= (1 << epnum);
570
571 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
572
573 /* shared TX/RX FIFO? */
574 if ((reg & 0xf0) == 0xf0) {
575 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
576 hw_ep->is_shared_fifo = true;
577 return 0;
578 } else {
579 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
580 hw_ep->is_shared_fifo = false;
581 }
582
583 return 0;
584}
585
586static inline void musb_configure_ep0(struct musb *musb)
587{
588 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
589 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
32233716 590 musb->endpoints[0].is_shared_fifo = true;
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591}
592#endif /* CONFIG_BLACKFIN */
593
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594
595/***************************** Glue it together *****************************/
596
597extern const char musb_driver_name[];
598
599extern void musb_start(struct musb *musb);
600extern void musb_stop(struct musb *musb);
601
602extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
603extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
604
605extern void musb_load_testpacket(struct musb *);
606
607extern irqreturn_t musb_interrupt(struct musb *);
608
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609extern void musb_hnp_stop(struct musb *musb);
610
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611static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
612{
613 if (musb->ops->set_vbus)
614 musb->ops->set_vbus(musb, is_on);
615}
616
617static inline void musb_platform_enable(struct musb *musb)
618{
619 if (musb->ops->enable)
620 musb->ops->enable(musb);
621}
622
623static inline void musb_platform_disable(struct musb *musb)
624{
625 if (musb->ops->disable)
626 musb->ops->disable(musb);
627}
628
629static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
630{
631 if (!musb->ops->set_mode)
632 return 0;
633
634 return musb->ops->set_mode(musb, mode);
635}
636
637static inline void musb_platform_try_idle(struct musb *musb,
638 unsigned long timeout)
639{
640 if (musb->ops->try_idle)
641 musb->ops->try_idle(musb, timeout);
642}
643
644static inline int musb_platform_get_vbus_status(struct musb *musb)
645{
646 if (!musb->ops->vbus_status)
647 return 0;
648
649 return musb->ops->vbus_status(musb);
650}
651
652static inline int musb_platform_init(struct musb *musb)
653{
654 if (!musb->ops->init)
655 return -EINVAL;
656
657 return musb->ops->init(musb);
658}
659
660static inline int musb_platform_exit(struct musb *musb)
661{
662 if (!musb->ops->exit)
663 return -EINVAL;
664
665 return musb->ops->exit(musb);
666}
667
550a7375 668#endif /* __MUSB_CORE_H__ */