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550a7375 FB |
1 | /* |
2 | * MUSB OTG driver defines | |
3 | * | |
4 | * Copyright 2005 Mentor Graphics Corporation | |
5 | * Copyright (C) 2005-2006 by Texas Instruments | |
6 | * Copyright (C) 2006-2007 Nokia Corporation | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * version 2 as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but | |
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA | |
21 | * | |
22 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED | |
23 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
24 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
25 | * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, | |
26 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
27 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
28 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
29 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
30 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
31 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
32 | * | |
33 | */ | |
34 | ||
35 | #ifndef __MUSB_CORE_H__ | |
36 | #define __MUSB_CORE_H__ | |
37 | ||
38 | #include <linux/slab.h> | |
39 | #include <linux/list.h> | |
40 | #include <linux/interrupt.h> | |
550a7375 | 41 | #include <linux/errno.h> |
f7f9d63e | 42 | #include <linux/timer.h> |
550a7375 FB |
43 | #include <linux/clk.h> |
44 | #include <linux/device.h> | |
45 | #include <linux/usb/ch9.h> | |
46 | #include <linux/usb/gadget.h> | |
47 | #include <linux/usb.h> | |
48 | #include <linux/usb/otg.h> | |
49 | #include <linux/usb/musb.h> | |
50 | ||
51 | struct musb; | |
52 | struct musb_hw_ep; | |
53 | struct musb_ep; | |
54 | ||
0ded2f14 CC |
55 | /* Helper defines for struct musb->hwvers */ |
56 | #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) | |
57 | #define MUSB_HWVERS_MINOR(x) (x & 0x3ff) | |
58 | #define MUSB_HWVERS_RC 0x8000 | |
59 | #define MUSB_HWVERS_1300 0x52C | |
60 | #define MUSB_HWVERS_1400 0x590 | |
61 | #define MUSB_HWVERS_1800 0x720 | |
62 | #define MUSB_HWVERS_1900 0x784 | |
63 | #define MUSB_HWVERS_2000 0x800 | |
550a7375 FB |
64 | |
65 | #include "musb_debug.h" | |
66 | #include "musb_dma.h" | |
67 | ||
550a7375 FB |
68 | #include "musb_io.h" |
69 | #include "musb_regs.h" | |
70 | ||
71 | #include "musb_gadget.h" | |
27729aad | 72 | #include <linux/usb/hcd.h> |
550a7375 FB |
73 | #include "musb_host.h" |
74 | ||
75 | ||
76 | ||
77 | #ifdef CONFIG_USB_MUSB_OTG | |
78 | ||
79 | #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST) | |
80 | #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL) | |
81 | #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG) | |
82 | ||
83 | /* NOTE: otg and peripheral-only state machines start at B_IDLE. | |
84 | * OTG or host-only go to A_IDLE when ID is sensed. | |
85 | */ | |
86 | #define is_peripheral_active(m) (!(m)->is_host) | |
87 | #define is_host_active(m) ((m)->is_host) | |
88 | ||
89 | #else | |
90 | #define is_peripheral_enabled(musb) is_peripheral_capable() | |
91 | #define is_host_enabled(musb) is_host_capable() | |
92 | #define is_otg_enabled(musb) 0 | |
93 | ||
94 | #define is_peripheral_active(musb) is_peripheral_capable() | |
95 | #define is_host_active(musb) is_host_capable() | |
96 | #endif | |
97 | ||
98 | #if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL) | |
99 | /* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always | |
100 | * override that choice selection (often USB_GADGET_DUMMY_HCD). | |
101 | */ | |
102 | #ifndef CONFIG_USB_GADGET_MUSB_HDRC | |
103 | #error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC | |
104 | #endif | |
105 | #endif /* need MUSB gadget selection */ | |
106 | ||
b20cf906 MF |
107 | #ifndef CONFIG_HAVE_CLK |
108 | /* Dummy stub for clk framework */ | |
109 | #define clk_get(dev, id) NULL | |
110 | #define clk_put(clock) do {} while (0) | |
111 | #define clk_enable(clock) do {} while (0) | |
112 | #define clk_disable(clock) do {} while (0) | |
113 | #endif | |
550a7375 FB |
114 | |
115 | #ifdef CONFIG_PROC_FS | |
116 | #include <linux/fs.h> | |
117 | #define MUSB_CONFIG_PROC_FS | |
118 | #endif | |
119 | ||
120 | /****************************** PERIPHERAL ROLE *****************************/ | |
121 | ||
122 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC | |
123 | ||
124 | #define is_peripheral_capable() (1) | |
125 | ||
126 | extern irqreturn_t musb_g_ep0_irq(struct musb *); | |
127 | extern void musb_g_tx(struct musb *, u8); | |
128 | extern void musb_g_rx(struct musb *, u8); | |
129 | extern void musb_g_reset(struct musb *); | |
130 | extern void musb_g_suspend(struct musb *); | |
131 | extern void musb_g_resume(struct musb *); | |
132 | extern void musb_g_wakeup(struct musb *); | |
133 | extern void musb_g_disconnect(struct musb *); | |
134 | ||
135 | #else | |
136 | ||
137 | #define is_peripheral_capable() (0) | |
138 | ||
139 | static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; } | |
140 | static inline void musb_g_reset(struct musb *m) {} | |
141 | static inline void musb_g_suspend(struct musb *m) {} | |
142 | static inline void musb_g_resume(struct musb *m) {} | |
143 | static inline void musb_g_wakeup(struct musb *m) {} | |
144 | static inline void musb_g_disconnect(struct musb *m) {} | |
145 | ||
146 | #endif | |
147 | ||
148 | /****************************** HOST ROLE ***********************************/ | |
149 | ||
150 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | |
151 | ||
152 | #define is_host_capable() (1) | |
153 | ||
154 | extern irqreturn_t musb_h_ep0_irq(struct musb *); | |
155 | extern void musb_host_tx(struct musb *, u8); | |
156 | extern void musb_host_rx(struct musb *, u8); | |
157 | ||
158 | #else | |
159 | ||
160 | #define is_host_capable() (0) | |
161 | ||
162 | static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; } | |
163 | static inline void musb_host_tx(struct musb *m, u8 e) {} | |
164 | static inline void musb_host_rx(struct musb *m, u8 e) {} | |
165 | ||
166 | #endif | |
167 | ||
168 | ||
169 | /****************************** CONSTANTS ********************************/ | |
170 | ||
171 | #ifndef MUSB_C_NUM_EPS | |
172 | #define MUSB_C_NUM_EPS ((u8)16) | |
173 | #endif | |
174 | ||
175 | #ifndef MUSB_MAX_END0_PACKET | |
176 | #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE) | |
177 | #endif | |
178 | ||
179 | /* host side ep0 states */ | |
180 | enum musb_h_ep0_state { | |
181 | MUSB_EP0_IDLE, | |
182 | MUSB_EP0_START, /* expect ack of setup */ | |
183 | MUSB_EP0_IN, /* expect IN DATA */ | |
184 | MUSB_EP0_OUT, /* expect ack of OUT DATA */ | |
185 | MUSB_EP0_STATUS, /* expect ack of STATUS */ | |
186 | } __attribute__ ((packed)); | |
187 | ||
188 | /* peripheral side ep0 states */ | |
189 | enum musb_g_ep0_state { | |
a5073b52 SS |
190 | MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */ |
191 | MUSB_EP0_STAGE_SETUP, /* received SETUP */ | |
550a7375 FB |
192 | MUSB_EP0_STAGE_TX, /* IN data */ |
193 | MUSB_EP0_STAGE_RX, /* OUT data */ | |
194 | MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */ | |
195 | MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */ | |
196 | MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */ | |
197 | } __attribute__ ((packed)); | |
198 | ||
f7f9d63e DB |
199 | /* |
200 | * OTG protocol constants. See USB OTG 1.3 spec, | |
201 | * sections 5.5 "Device Timings" and 6.6.5 "Timers". | |
202 | */ | |
550a7375 | 203 | #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */ |
f7f9d63e DB |
204 | #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */ |
205 | #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ | |
206 | #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ | |
207 | ||
550a7375 FB |
208 | |
209 | /*************************** REGISTER ACCESS ********************************/ | |
210 | ||
211 | /* Endpoint registers (other than dynfifo setup) can be accessed either | |
212 | * directly with the "flat" model, or after setting up an index register. | |
213 | */ | |
214 | ||
215 | #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \ | |
fb9c58ed MM |
216 | || defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN) \ |
217 | || defined(CONFIG_ARCH_OMAP4) | |
550a7375 FB |
218 | /* REVISIT indexed access seemed to |
219 | * misbehave (on DaVinci) for at least peripheral IN ... | |
220 | */ | |
221 | #define MUSB_FLAT_REG | |
222 | #endif | |
223 | ||
224 | /* TUSB mapping: "flat" plus ep0 special cases */ | |
225 | #if defined(CONFIG_USB_TUSB6010) | |
226 | #define musb_ep_select(_mbase, _epnum) \ | |
227 | musb_writeb((_mbase), MUSB_INDEX, (_epnum)) | |
228 | #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET | |
229 | ||
230 | /* "flat" mapping: each endpoint has its own i/o address */ | |
231 | #elif defined(MUSB_FLAT_REG) | |
232 | #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum))) | |
233 | #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET | |
234 | ||
235 | /* "indexed" mapping: INDEX register controls register bank select */ | |
236 | #else | |
237 | #define musb_ep_select(_mbase, _epnum) \ | |
238 | musb_writeb((_mbase), MUSB_INDEX, (_epnum)) | |
239 | #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET | |
240 | #endif | |
241 | ||
242 | /****************************** FUNCTIONS ********************************/ | |
243 | ||
244 | #define MUSB_HST_MODE(_musb)\ | |
245 | { (_musb)->is_host = true; } | |
246 | #define MUSB_DEV_MODE(_musb) \ | |
247 | { (_musb)->is_host = false; } | |
248 | ||
249 | #define test_devctl_hst_mode(_x) \ | |
250 | (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM) | |
251 | ||
252 | #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") | |
253 | ||
254 | /******************************** TYPES *************************************/ | |
255 | ||
3ca8abb8 FB |
256 | /** |
257 | * struct musb_platform_ops - Operations passed to musb_core by HW glue layer | |
258 | * @init: turns on clocks, sets up platform-specific registers, etc | |
259 | * @exit: undoes @init | |
260 | * @suspend: platform-specific suspend, e.g. context save | |
261 | * @resume: platform-specific resume, e.g. context restore | |
262 | * @set_mode: forcefully changes operating mode | |
263 | * @try_ilde: tries to idle the IP | |
264 | * @vbus_status: returns vbus status if possible | |
265 | * @set_vbus: forces vbus status | |
266 | */ | |
267 | struct musb_platform_ops { | |
268 | int (*init)(struct musb *musb); | |
269 | int (*exit)(struct musb *musb); | |
270 | ||
271 | int (*suspend)(struct musb *musb); | |
272 | int (*resume)(struct musb *musb); | |
273 | ||
274 | void (*enable)(struct musb *musb); | |
275 | void (*disable)(struct musb *musb); | |
276 | ||
277 | int (*set_mode)(struct musb *musb, u8 mode); | |
278 | void (*try_idle)(struct musb *musb, unsigned long timeout); | |
279 | ||
280 | int (*vbus_status)(struct musb *musb); | |
281 | void (*set_vbus)(struct musb *musb, int on); | |
282 | }; | |
283 | ||
743411b3 FB |
284 | extern const struct musb_platform_ops musb_ops; |
285 | ||
550a7375 FB |
286 | /* |
287 | * struct musb_hw_ep - endpoint hardware (bidirectional) | |
288 | * | |
289 | * Ordered slightly for better cacheline locality. | |
290 | */ | |
291 | struct musb_hw_ep { | |
292 | struct musb *musb; | |
293 | void __iomem *fifo; | |
294 | void __iomem *regs; | |
295 | ||
296 | #ifdef CONFIG_USB_TUSB6010 | |
297 | void __iomem *conf; | |
298 | #endif | |
299 | ||
300 | /* index in musb->endpoints[] */ | |
301 | u8 epnum; | |
302 | ||
303 | /* hardware configuration, possibly dynamic */ | |
304 | bool is_shared_fifo; | |
305 | bool tx_double_buffered; | |
306 | bool rx_double_buffered; | |
307 | u16 max_packet_sz_tx; | |
308 | u16 max_packet_sz_rx; | |
309 | ||
310 | struct dma_channel *tx_channel; | |
311 | struct dma_channel *rx_channel; | |
312 | ||
313 | #ifdef CONFIG_USB_TUSB6010 | |
314 | /* TUSB has "asynchronous" and "synchronous" dma modes */ | |
315 | dma_addr_t fifo_async; | |
316 | dma_addr_t fifo_sync; | |
317 | void __iomem *fifo_sync_va; | |
318 | #endif | |
319 | ||
320 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | |
321 | void __iomem *target_regs; | |
322 | ||
323 | /* currently scheduled peripheral endpoint */ | |
324 | struct musb_qh *in_qh; | |
325 | struct musb_qh *out_qh; | |
326 | ||
327 | u8 rx_reinit; | |
328 | u8 tx_reinit; | |
329 | #endif | |
330 | ||
331 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC | |
332 | /* peripheral side */ | |
333 | struct musb_ep ep_in; /* TX */ | |
334 | struct musb_ep ep_out; /* RX */ | |
335 | #endif | |
336 | }; | |
337 | ||
338 | static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep) | |
339 | { | |
340 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC | |
341 | return next_request(&hw_ep->ep_in); | |
342 | #else | |
343 | return NULL; | |
344 | #endif | |
345 | } | |
346 | ||
347 | static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep) | |
348 | { | |
349 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC | |
350 | return next_request(&hw_ep->ep_out); | |
351 | #else | |
352 | return NULL; | |
353 | #endif | |
354 | } | |
355 | ||
7421107b FB |
356 | struct musb_csr_regs { |
357 | /* FIFO registers */ | |
358 | u16 txmaxp, txcsr, rxmaxp, rxcsr; | |
359 | u16 rxfifoadd, txfifoadd; | |
360 | u8 txtype, txinterval, rxtype, rxinterval; | |
361 | u8 rxfifosz, txfifosz; | |
362 | u8 txfunaddr, txhubaddr, txhubport; | |
363 | u8 rxfunaddr, rxhubaddr, rxhubport; | |
364 | }; | |
365 | ||
366 | struct musb_context_registers { | |
367 | ||
368 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ | |
369 | defined(CONFIG_ARCH_OMAP4) | |
370 | u32 otg_sysconfig, otg_forcestandby; | |
371 | #endif | |
372 | u8 power; | |
373 | u16 intrtxe, intrrxe; | |
374 | u8 intrusbe; | |
375 | u16 frame; | |
376 | u8 index, testmode; | |
377 | ||
378 | u8 devctl, busctl, misc; | |
379 | ||
380 | struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; | |
381 | }; | |
382 | ||
550a7375 FB |
383 | /* |
384 | * struct musb - Driver instance data. | |
385 | */ | |
386 | struct musb { | |
387 | /* device lock */ | |
388 | spinlock_t lock; | |
389 | struct clk *clock; | |
eb83092c | 390 | struct clk *phy_clock; |
743411b3 FB |
391 | |
392 | const struct musb_platform_ops *ops; | |
7421107b | 393 | struct musb_context_registers context; |
743411b3 | 394 | |
550a7375 FB |
395 | irqreturn_t (*isr)(int, void *); |
396 | struct work_struct irq_work; | |
32c3b94e | 397 | u16 hwvers; |
550a7375 FB |
398 | |
399 | /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ | |
400 | #define MUSB_PORT_STAT_RESUME (1 << 31) | |
401 | ||
402 | u32 port1_status; | |
403 | ||
404 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | |
405 | unsigned long rh_timer; | |
406 | ||
407 | enum musb_h_ep0_state ep0_stage; | |
408 | ||
409 | /* bulk traffic normally dedicates endpoint hardware, and each | |
410 | * direction has its own ring of host side endpoints. | |
411 | * we try to progress the transfer at the head of each endpoint's | |
412 | * queue until it completes or NAKs too much; then we try the next | |
413 | * endpoint. | |
414 | */ | |
415 | struct musb_hw_ep *bulk_ep; | |
416 | ||
417 | struct list_head control; /* of musb_qh */ | |
418 | struct list_head in_bulk; /* of musb_qh */ | |
419 | struct list_head out_bulk; /* of musb_qh */ | |
f7f9d63e DB |
420 | |
421 | struct timer_list otg_timer; | |
550a7375 FB |
422 | #endif |
423 | ||
424 | /* called with IRQs blocked; ON/nonzero implies starting a session, | |
425 | * and waiting at least a_wait_vrise_tmout. | |
426 | */ | |
427 | void (*board_set_vbus)(struct musb *, int is_on); | |
428 | ||
429 | struct dma_controller *dma_controller; | |
430 | ||
431 | struct device *controller; | |
432 | void __iomem *ctrl_base; | |
433 | void __iomem *mregs; | |
434 | ||
435 | #ifdef CONFIG_USB_TUSB6010 | |
436 | dma_addr_t async; | |
437 | dma_addr_t sync; | |
438 | void __iomem *sync_va; | |
439 | #endif | |
440 | ||
441 | /* passed down from chip/board specific irq handlers */ | |
442 | u8 int_usb; | |
443 | u16 int_rx; | |
444 | u16 int_tx; | |
445 | ||
84e250ff | 446 | struct otg_transceiver *xceiv; |
550a7375 FB |
447 | |
448 | int nIrq; | |
c48a5155 | 449 | unsigned irq_wake:1; |
550a7375 FB |
450 | |
451 | struct musb_hw_ep endpoints[MUSB_C_NUM_EPS]; | |
452 | #define control_ep endpoints | |
453 | ||
454 | #define VBUSERR_RETRY_COUNT 3 | |
455 | u16 vbuserr_retry; | |
456 | u16 epmask; | |
457 | u8 nr_endpoints; | |
458 | ||
459 | u8 board_mode; /* enum musb_mode */ | |
460 | int (*board_set_power)(int state); | |
461 | ||
462 | int (*set_clock)(struct clk *clk, int is_active); | |
463 | ||
464 | u8 min_power; /* vbus for periph, in mA/2 */ | |
465 | ||
466 | bool is_host; | |
467 | ||
468 | int a_wait_bcon; /* VBUS timeout in msecs */ | |
469 | unsigned long idle_timeout; /* Next timeout in jiffies */ | |
470 | ||
471 | /* active means connected and not suspended */ | |
472 | unsigned is_active:1; | |
473 | ||
474 | unsigned is_multipoint:1; | |
475 | unsigned ignore_disconnect:1; /* during bus resets */ | |
476 | ||
a483d706 AKG |
477 | unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ |
478 | unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ | |
51bf0d0e | 479 | unsigned dyn_fifo:1; /* dynamic FIFO supported? */ |
a483d706 | 480 | |
7ed069c1 | 481 | unsigned bulk_split:1; |
550a7375 | 482 | #define can_bulk_split(musb,type) \ |
7ed069c1 | 483 | (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) |
550a7375 | 484 | |
7ed069c1 | 485 | unsigned bulk_combine:1; |
550a7375 | 486 | #define can_bulk_combine(musb,type) \ |
7ed069c1 | 487 | (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) |
550a7375 FB |
488 | |
489 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC | |
490 | /* is_suspended means USB B_PERIPHERAL suspend */ | |
491 | unsigned is_suspended:1; | |
492 | ||
493 | /* may_wakeup means remote wakeup is enabled */ | |
494 | unsigned may_wakeup:1; | |
495 | ||
496 | /* is_self_powered is reported in device status and the | |
497 | * config descriptor. is_bus_powered means B_PERIPHERAL | |
498 | * draws some VBUS current; both can be true. | |
499 | */ | |
500 | unsigned is_self_powered:1; | |
501 | unsigned is_bus_powered:1; | |
502 | ||
503 | unsigned set_address:1; | |
504 | unsigned test_mode:1; | |
505 | unsigned softconnect:1; | |
506 | ||
507 | u8 address; | |
508 | u8 test_mode_nr; | |
509 | u16 ackpend; /* ep0 */ | |
510 | enum musb_g_ep0_state ep0_state; | |
511 | struct usb_gadget g; /* the gadget */ | |
512 | struct usb_gadget_driver *gadget_driver; /* its driver */ | |
513 | #endif | |
514 | ||
ca6d1b13 FB |
515 | struct musb_hdrc_config *config; |
516 | ||
550a7375 FB |
517 | #ifdef MUSB_CONFIG_PROC_FS |
518 | struct proc_dir_entry *proc_entry; | |
519 | #endif | |
520 | }; | |
521 | ||
550a7375 FB |
522 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC |
523 | static inline struct musb *gadget_to_musb(struct usb_gadget *g) | |
524 | { | |
525 | return container_of(g, struct musb, g); | |
526 | } | |
527 | #endif | |
528 | ||
c6cf8b00 BW |
529 | #ifdef CONFIG_BLACKFIN |
530 | static inline int musb_read_fifosize(struct musb *musb, | |
531 | struct musb_hw_ep *hw_ep, u8 epnum) | |
532 | { | |
533 | musb->nr_endpoints++; | |
534 | musb->epmask |= (1 << epnum); | |
535 | ||
536 | if (epnum < 5) { | |
537 | hw_ep->max_packet_sz_tx = 128; | |
538 | hw_ep->max_packet_sz_rx = 128; | |
539 | } else { | |
540 | hw_ep->max_packet_sz_tx = 1024; | |
541 | hw_ep->max_packet_sz_rx = 1024; | |
542 | } | |
543 | hw_ep->is_shared_fifo = false; | |
544 | ||
545 | return 0; | |
546 | } | |
547 | ||
548 | static inline void musb_configure_ep0(struct musb *musb) | |
549 | { | |
550 | musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; | |
551 | musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; | |
552 | musb->endpoints[0].is_shared_fifo = true; | |
553 | } | |
554 | ||
555 | #else | |
556 | ||
557 | static inline int musb_read_fifosize(struct musb *musb, | |
558 | struct musb_hw_ep *hw_ep, u8 epnum) | |
559 | { | |
32233716 | 560 | void *mbase = musb->mregs; |
c6cf8b00 BW |
561 | u8 reg = 0; |
562 | ||
563 | /* read from core using indexed model */ | |
32233716 | 564 | reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE)); |
c6cf8b00 BW |
565 | /* 0's returned when no more endpoints */ |
566 | if (!reg) | |
567 | return -ENODEV; | |
568 | ||
569 | musb->nr_endpoints++; | |
570 | musb->epmask |= (1 << epnum); | |
571 | ||
572 | hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f); | |
573 | ||
574 | /* shared TX/RX FIFO? */ | |
575 | if ((reg & 0xf0) == 0xf0) { | |
576 | hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx; | |
577 | hw_ep->is_shared_fifo = true; | |
578 | return 0; | |
579 | } else { | |
580 | hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4); | |
581 | hw_ep->is_shared_fifo = false; | |
582 | } | |
583 | ||
584 | return 0; | |
585 | } | |
586 | ||
587 | static inline void musb_configure_ep0(struct musb *musb) | |
588 | { | |
589 | musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; | |
590 | musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; | |
32233716 | 591 | musb->endpoints[0].is_shared_fifo = true; |
c6cf8b00 BW |
592 | } |
593 | #endif /* CONFIG_BLACKFIN */ | |
594 | ||
550a7375 FB |
595 | |
596 | /***************************** Glue it together *****************************/ | |
597 | ||
598 | extern const char musb_driver_name[]; | |
599 | ||
600 | extern void musb_start(struct musb *musb); | |
601 | extern void musb_stop(struct musb *musb); | |
602 | ||
603 | extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); | |
604 | extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst); | |
605 | ||
606 | extern void musb_load_testpacket(struct musb *); | |
607 | ||
608 | extern irqreturn_t musb_interrupt(struct musb *); | |
609 | ||
550a7375 FB |
610 | extern void musb_hnp_stop(struct musb *musb); |
611 | ||
743411b3 | 612 | #ifdef CONFIG_PM |
743411b3 FB |
613 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ |
614 | defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_BLACKFIN) | |
615 | extern void musb_platform_save_context(struct musb *musb, | |
616 | struct musb_context_registers *musb_context); | |
617 | extern void musb_platform_restore_context(struct musb *musb, | |
618 | struct musb_context_registers *musb_context); | |
550a7375 | 619 | #else |
743411b3 FB |
620 | #define musb_platform_save_context(m, x) do {} while (0) |
621 | #define musb_platform_restore_context(m, x) do {} while (0) | |
550a7375 FB |
622 | #endif |
623 | ||
743411b3 FB |
624 | #endif |
625 | ||
626 | static inline void musb_platform_set_vbus(struct musb *musb, int is_on) | |
627 | { | |
628 | if (musb->ops->set_vbus) | |
629 | musb->ops->set_vbus(musb, is_on); | |
630 | } | |
631 | ||
632 | static inline void musb_platform_enable(struct musb *musb) | |
633 | { | |
634 | if (musb->ops->enable) | |
635 | musb->ops->enable(musb); | |
636 | } | |
637 | ||
638 | static inline void musb_platform_disable(struct musb *musb) | |
639 | { | |
640 | if (musb->ops->disable) | |
641 | musb->ops->disable(musb); | |
642 | } | |
643 | ||
644 | static inline int musb_platform_set_mode(struct musb *musb, u8 mode) | |
645 | { | |
646 | if (!musb->ops->set_mode) | |
647 | return 0; | |
648 | ||
649 | return musb->ops->set_mode(musb, mode); | |
650 | } | |
651 | ||
652 | static inline void musb_platform_try_idle(struct musb *musb, | |
653 | unsigned long timeout) | |
654 | { | |
655 | if (musb->ops->try_idle) | |
656 | musb->ops->try_idle(musb, timeout); | |
657 | } | |
658 | ||
659 | static inline int musb_platform_get_vbus_status(struct musb *musb) | |
660 | { | |
661 | if (!musb->ops->vbus_status) | |
662 | return 0; | |
663 | ||
664 | return musb->ops->vbus_status(musb); | |
665 | } | |
666 | ||
667 | static inline int musb_platform_init(struct musb *musb) | |
668 | { | |
669 | if (!musb->ops->init) | |
670 | return -EINVAL; | |
671 | ||
672 | return musb->ops->init(musb); | |
673 | } | |
674 | ||
675 | static inline int musb_platform_exit(struct musb *musb) | |
676 | { | |
677 | if (!musb->ops->exit) | |
678 | return -EINVAL; | |
679 | ||
680 | return musb->ops->exit(musb); | |
681 | } | |
682 | ||
683 | static inline int musb_platform_suspend(struct musb *musb) | |
684 | { | |
685 | if (!musb->ops->suspend) | |
686 | return 0; | |
687 | ||
688 | return musb->ops->suspend(musb); | |
689 | } | |
690 | ||
691 | static inline int musb_platform_resume(struct musb *musb) | |
692 | { | |
693 | if (!musb->ops->resume) | |
694 | return 0; | |
695 | ||
696 | return musb->ops->resume(musb); | |
697 | } | |
550a7375 | 698 | |
550a7375 | 699 | #endif /* __MUSB_CORE_H__ */ |