[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / musb / musb_core.h

/*
 * MUSB OTG driver defines
 *
 * Copyright 2005 Mentor Graphics Corporation
 * Copyright (C) 2005-2006 by Texas Instruments
 * Copyright (C) 2006-2007 Nokia Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

#ifndef __MUSB_CORE_H__
#define __MUSB_CORE_H__

#include <linux/slab.h>
#include <linux/list.h>
#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/timer.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb.h>
#include <linux/usb/otg.h>
#include <linux/usb/musb.h>

struct musb;
struct musb_hw_ep;
struct musb_ep;


#include "musb_debug.h"
#include "musb_dma.h"

#include "musb_io.h"
#include "musb_regs.h"

#include "musb_gadget.h"
#include "../core/hcd.h"
#include "musb_host.h"


#ifdef CONFIG_USB_MUSB_OTG

#define	is_peripheral_enabled(musb)	((musb)->board_mode != MUSB_HOST)
#define	is_host_enabled(musb)		((musb)->board_mode != MUSB_PERIPHERAL)
#define	is_otg_enabled(musb)		((musb)->board_mode == MUSB_OTG)

/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
 * OTG or host-only go to A_IDLE when ID is sensed.
 */
#define is_peripheral_active(m)		(!(m)->is_host)
#define is_host_active(m)		((m)->is_host)

#else
#define	is_peripheral_enabled(musb)	is_peripheral_capable()
#define	is_host_enabled(musb)		is_host_capable()
#define	is_otg_enabled(musb)		0

#define	is_peripheral_active(musb)	is_peripheral_capable()
#define	is_host_active(musb)		is_host_capable()
#endif

#if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
/* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
 * override that choice selection (often USB_GADGET_DUMMY_HCD).
 */
#ifndef CONFIG_USB_GADGET_MUSB_HDRC
#error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
#endif
#endif	/* need MUSB gadget selection */

#ifndef CONFIG_HAVE_CLK
/* Dummy stub for clk framework */
#define clk_get(dev, id)	NULL
#define clk_put(clock)		do {} while (0)
#define clk_enable(clock)	do {} while (0)
#define clk_disable(clock)	do {} while (0)
#endif

#ifdef CONFIG_PROC_FS
#include <linux/fs.h>
#define MUSB_CONFIG_PROC_FS
#endif

/****************************** PERIPHERAL ROLE *****************************/

#ifdef CONFIG_USB_GADGET_MUSB_HDRC

#define	is_peripheral_capable()	(1)

extern irqreturn_t musb_g_ep0_irq(struct musb *);
extern void musb_g_tx(struct musb *, u8);
extern void musb_g_rx(struct musb *, u8);
extern void musb_g_reset(struct musb *);
extern void musb_g_suspend(struct musb *);
extern void musb_g_resume(struct musb *);
extern void musb_g_wakeup(struct musb *);
extern void musb_g_disconnect(struct musb *);

#else

#define	is_peripheral_capable()	(0)

static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
static inline void musb_g_reset(struct musb *m) {}
static inline void musb_g_suspend(struct musb *m) {}
static inline void musb_g_resume(struct musb *m) {}
static inline void musb_g_wakeup(struct musb *m) {}
static inline void musb_g_disconnect(struct musb *m) {}

#endif

/****************************** HOST ROLE ***********************************/

#ifdef CONFIG_USB_MUSB_HDRC_HCD

#define	is_host_capable()	(1)

extern irqreturn_t musb_h_ep0_irq(struct musb *);
extern void musb_host_tx(struct musb *, u8);
extern void musb_host_rx(struct musb *, u8);

#else

#define	is_host_capable()	(0)

static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
static inline void musb_host_tx(struct musb *m, u8 e) {}
static inline void musb_host_rx(struct musb *m, u8 e) {}

#endif


/****************************** CONSTANTS ********************************/

#ifndef MUSB_C_NUM_EPS
#define MUSB_C_NUM_EPS ((u8)16)
#endif

#ifndef MUSB_MAX_END0_PACKET
#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
#endif

/* host side ep0 states */
enum musb_h_ep0_state {
	MUSB_EP0_IDLE,
	MUSB_EP0_START,			/* expect ack of setup */
	MUSB_EP0_IN,			/* expect IN DATA */
	MUSB_EP0_OUT,			/* expect ack of OUT DATA */
	MUSB_EP0_STATUS,		/* expect ack of STATUS */
} __attribute__ ((packed));

/* peripheral side ep0 states */
enum musb_g_ep0_state {
	MUSB_EP0_STAGE_IDLE,		/* idle, waiting for SETUP */
	MUSB_EP0_STAGE_SETUP,		/* received SETUP */
	MUSB_EP0_STAGE_TX,		/* IN data */
	MUSB_EP0_STAGE_RX,		/* OUT data */
	MUSB_EP0_STAGE_STATUSIN,	/* (after OUT data) */
	MUSB_EP0_STAGE_STATUSOUT,	/* (after IN data) */
	MUSB_EP0_STAGE_ACKWAIT,		/* after zlp, before statusin */
} __attribute__ ((packed));

/*
 * OTG protocol constants.  See USB OTG 1.3 spec,
 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 */
#define OTG_TIME_A_WAIT_VRISE	100		/* msec (max) */
#define OTG_TIME_A_WAIT_BCON	1100		/* min 1 second */
#define OTG_TIME_A_AIDL_BDIS	200		/* min 200 msec */
#define OTG_TIME_B_ASE0_BRST	100		/* min 3.125 ms */


/*************************** REGISTER ACCESS ********************************/

/* Endpoint registers (other than dynfifo setup) can be accessed either
 * directly with the "flat" model, or after setting up an index register.
 */

#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
		|| defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN)
/* REVISIT indexed access seemed to
 * misbehave (on DaVinci) for at least peripheral IN ...
 */
#define	MUSB_FLAT_REG
#endif

/* TUSB mapping: "flat" plus ep0 special cases */
#if	defined(CONFIG_USB_TUSB6010)
#define musb_ep_select(_mbase, _epnum) \
	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define	MUSB_EP_OFFSET			MUSB_TUSB_OFFSET

/* "flat" mapping: each endpoint has its own i/o address */
#elif	defined(MUSB_FLAT_REG)
#define musb_ep_select(_mbase, _epnum)	(((void)(_mbase)), ((void)(_epnum)))
#define	MUSB_EP_OFFSET			MUSB_FLAT_OFFSET

/* "indexed" mapping: INDEX register controls register bank select */
#else
#define musb_ep_select(_mbase, _epnum) \
	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define	MUSB_EP_OFFSET			MUSB_INDEXED_OFFSET
#endif

/****************************** FUNCTIONS ********************************/

#define MUSB_HST_MODE(_musb)\
	{ (_musb)->is_host = true; }
#define MUSB_DEV_MODE(_musb) \
	{ (_musb)->is_host = false; }

#define test_devctl_hst_mode(_x) \
	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)

#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")

/******************************** TYPES *************************************/

/*
 * struct musb_hw_ep - endpoint hardware (bidirectional)
 *
 * Ordered slightly for better cacheline locality.
 */
struct musb_hw_ep {
	struct musb		*musb;
	void __iomem		*fifo;
	void __iomem		*regs;

#ifdef CONFIG_USB_TUSB6010
	void __iomem		*conf;
#endif

	/* index in musb->endpoints[]  */
	u8			epnum;

	/* hardware configuration, possibly dynamic */
	bool			is_shared_fifo;
	bool			tx_double_buffered;
	bool			rx_double_buffered;
	u16			max_packet_sz_tx;
	u16			max_packet_sz_rx;

	struct dma_channel	*tx_channel;
	struct dma_channel	*rx_channel;

#ifdef CONFIG_USB_TUSB6010
	/* TUSB has "asynchronous" and "synchronous" dma modes */
	dma_addr_t		fifo_async;
	dma_addr_t		fifo_sync;
	void __iomem		*fifo_sync_va;
#endif

#ifdef CONFIG_USB_MUSB_HDRC_HCD
	void __iomem		*target_regs;

	/* currently scheduled peripheral endpoint */
	struct musb_qh		*in_qh;
	struct musb_qh		*out_qh;

	u8			rx_reinit;
	u8			tx_reinit;
#endif

#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	/* peripheral side */
	struct musb_ep		ep_in;			/* TX */
	struct musb_ep		ep_out;			/* RX */
#endif
};

static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep)
{
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	return next_request(&hw_ep->ep_in);
#else
	return NULL;
#endif
}

static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep)
{
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	return next_request(&hw_ep->ep_out);
#else
	return NULL;
#endif
}

/*
 * struct musb - Driver instance data.
 */
struct musb {
	/* device lock */
	spinlock_t		lock;
	struct clk		*clock;
	irqreturn_t		(*isr)(int, void *);
	struct work_struct	irq_work;
#define MUSB_HWVERS_MAJOR(x)	((x >> 10) & 0x1f)
#define MUSB_HWVERS_MINOR(x)	(x & 0x3ff)
#define MUSB_HWVERS_RC		0x8000
#define MUSB_HWVERS_1300	0x52C
#define MUSB_HWVERS_1400	0x590
#define MUSB_HWVERS_1800	0x720
#define MUSB_HWVERS_2000	0x800
	u16			hwvers;

/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
#define MUSB_PORT_STAT_RESUME	(1 << 31)

	u32			port1_status;

#ifdef CONFIG_USB_MUSB_HDRC_HCD
	unsigned long		rh_timer;

	enum musb_h_ep0_state	ep0_stage;

	/* bulk traffic normally dedicates endpoint hardware, and each
	 * direction has its own ring of host side endpoints.
	 * we try to progress the transfer at the head of each endpoint's
	 * queue until it completes or NAKs too much; then we try the next
	 * endpoint.
	 */
	struct musb_hw_ep	*bulk_ep;

	struct list_head	control;	/* of musb_qh */
	struct list_head	in_bulk;	/* of musb_qh */
	struct list_head	out_bulk;	/* of musb_qh */

	struct timer_list	otg_timer;
#endif

	/* called with IRQs blocked; ON/nonzero implies starting a session,
	 * and waiting at least a_wait_vrise_tmout.
	 */
	void			(*board_set_vbus)(struct musb *, int is_on);

	struct dma_controller	*dma_controller;

	struct device		*controller;
	void __iomem		*ctrl_base;
	void __iomem		*mregs;

#ifdef CONFIG_USB_TUSB6010
	dma_addr_t		async;
	dma_addr_t		sync;
	void __iomem		*sync_va;
#endif

	/* passed down from chip/board specific irq handlers */
	u8			int_usb;
	u16			int_rx;
	u16			int_tx;

	struct otg_transceiver	*xceiv;

	int nIrq;
	unsigned		irq_wake:1;

	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];
#define control_ep		endpoints

#define VBUSERR_RETRY_COUNT	3
	u16			vbuserr_retry;
	u16 epmask;
	u8 nr_endpoints;

	u8 board_mode;		/* enum musb_mode */
	int			(*board_set_power)(int state);

	int			(*set_clock)(struct clk *clk, int is_active);

	u8			min_power;	/* vbus for periph, in mA/2 */

	bool			is_host;

	int			a_wait_bcon;	/* VBUS timeout in msecs */
	unsigned long		idle_timeout;	/* Next timeout in jiffies */

	/* active means connected and not suspended */
	unsigned		is_active:1;

	unsigned is_multipoint:1;
	unsigned ignore_disconnect:1;	/* during bus resets */

	unsigned		hb_iso_rx:1;	/* high bandwidth iso rx? */
	unsigned		hb_iso_tx:1;	/* high bandwidth iso tx? */
	unsigned		dyn_fifo:1;	/* dynamic FIFO supported? */

	unsigned		bulk_split:1;
#define	can_bulk_split(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)

	unsigned		bulk_combine:1;
#define	can_bulk_combine(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)

#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	/* is_suspended means USB B_PERIPHERAL suspend */
	unsigned		is_suspended:1;

	/* may_wakeup means remote wakeup is enabled */
	unsigned		may_wakeup:1;

	/* is_self_powered is reported in device status and the
	 * config descriptor.  is_bus_powered means B_PERIPHERAL
	 * draws some VBUS current; both can be true.
	 */
	unsigned		is_self_powered:1;
	unsigned		is_bus_powered:1;

	unsigned		set_address:1;
	unsigned		test_mode:1;
	unsigned		softconnect:1;

	u8			address;
	u8			test_mode_nr;
	u16			ackpend;		/* ep0 */
	enum musb_g_ep0_state	ep0_state;
	struct usb_gadget	g;			/* the gadget */
	struct usb_gadget_driver *gadget_driver;	/* its driver */
#endif

	struct musb_hdrc_config	*config;

#ifdef MUSB_CONFIG_PROC_FS
	struct proc_dir_entry *proc_entry;
#endif
};

#ifdef CONFIG_PM
struct musb_csr_regs {
	/* FIFO registers */
	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	u16 rxfifoadd, txfifoadd;
	u8 txtype, txinterval, rxtype, rxinterval;
	u8 rxfifosz, txfifosz;
	u8 txfunaddr, txhubaddr, txhubport;
	u8 rxfunaddr, rxhubaddr, rxhubport;
};

struct musb_context_registers {

#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP2430)
	u32 otg_sysconfig, otg_forcestandby;
#endif
	u8 power;
	u16 intrtxe, intrrxe;
	u8 intrusbe;
	u16 frame;
	u8 index, testmode;

	u8 devctl, misc;

	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
};

#if defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP2430)
extern void musb_platform_save_context(struct musb *musb,
		struct musb_context_registers *musb_context);
extern void musb_platform_restore_context(struct musb *musb,
		struct musb_context_registers *musb_context);
#else
#define musb_platform_save_context(m, x)	do {} while (0)
#define musb_platform_restore_context(m, x)	do {} while (0)
#endif

#endif

static inline void musb_set_vbus(struct musb *musb, int is_on)
{
	musb->board_set_vbus(musb, is_on);
}

#ifdef CONFIG_USB_GADGET_MUSB_HDRC
static inline struct musb *gadget_to_musb(struct usb_gadget *g)
{
	return container_of(g, struct musb, g);
}
#endif

#ifdef CONFIG_BLACKFIN
static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	if (epnum < 5) {
		hw_ep->max_packet_sz_tx = 128;
		hw_ep->max_packet_sz_rx = 128;
	} else {
		hw_ep->max_packet_sz_tx = 1024;
		hw_ep->max_packet_sz_rx = 1024;
	}
	hw_ep->is_shared_fifo = false;

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}

#else

static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	void *mbase = musb->mregs;
	u8 reg = 0;

	/* read from core using indexed model */
	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
	/* 0's returned when no more endpoints */
	if (!reg)
		return -ENODEV;

	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);

	/* shared TX/RX FIFO? */
	if ((reg & 0xf0) == 0xf0) {
		hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
		hw_ep->is_shared_fifo = true;
		return 0;
	} else {
		hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
		hw_ep->is_shared_fifo = false;
	}

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}
#endif /* CONFIG_BLACKFIN */


/***************************** Glue it together *****************************/

extern const char musb_driver_name[];

extern void musb_start(struct musb *musb);
extern void musb_stop(struct musb *musb);

extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);

extern void musb_load_testpacket(struct musb *);

extern irqreturn_t musb_interrupt(struct musb *);

extern void musb_platform_enable(struct musb *musb);
extern void musb_platform_disable(struct musb *musb);

extern void musb_hnp_stop(struct musb *musb);

extern int musb_platform_set_mode(struct musb *musb, u8 musb_mode);

#if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN) || \
	defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
extern void musb_platform_try_idle(struct musb *musb, unsigned long timeout);
#else
#define musb_platform_try_idle(x, y)		do {} while (0)
#endif

#if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN)
extern int musb_platform_get_vbus_status(struct musb *musb);
#else
#define musb_platform_get_vbus_status(x)	0
#endif

extern int __init musb_platform_init(struct musb *musb);
extern int musb_platform_exit(struct musb *musb);

#endif	/* __MUSB_CORE_H__ */
Commit	Line	Data
550a7375 FB	1	/*
	2	* MUSB OTG driver defines
	3	*
	4	* Copyright 2005 Mentor Graphics Corporation
	5	* Copyright (C) 2005-2006 by Texas Instruments
	6	* Copyright (C) 2006-2007 Nokia Corporation
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*
	22	* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
	23	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	24	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	25	* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
	26	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	27	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	28	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	29	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	30	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	31	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	*/
	34
	35	#ifndef __MUSB_CORE_H__
	36	#define __MUSB_CORE_H__
	37
	38	#include <linux/slab.h>
	39	#include <linux/list.h>
	40	#include <linux/interrupt.h>
550a7375	41	#include <linux/errno.h>
f7f9d63e	42	#include <linux/timer.h>
550a7375 FB	43	#include <linux/clk.h>
	44	#include <linux/device.h>
	45	#include <linux/usb/ch9.h>
	46	#include <linux/usb/gadget.h>
	47	#include <linux/usb.h>
	48	#include <linux/usb/otg.h>
	49	#include <linux/usb/musb.h>
	50
	51	struct musb;
	52	struct musb_hw_ep;
	53	struct musb_ep;
	54
	55
	56	#include "musb_debug.h"
	57	#include "musb_dma.h"
	58
550a7375 FB	59	#include "musb_io.h"
	60	#include "musb_regs.h"
	61
	62	#include "musb_gadget.h"
	63	#include "../core/hcd.h"
	64	#include "musb_host.h"
	65
	66
	67
	68	#ifdef CONFIG_USB_MUSB_OTG
	69
	70	#define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
	71	#define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
	72	#define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
	73
	74	/* NOTE: otg and peripheral-only state machines start at B_IDLE.
	75	* OTG or host-only go to A_IDLE when ID is sensed.
	76	*/
	77	#define is_peripheral_active(m) (!(m)->is_host)
	78	#define is_host_active(m) ((m)->is_host)
	79
	80	#else
	81	#define is_peripheral_enabled(musb) is_peripheral_capable()
	82	#define is_host_enabled(musb) is_host_capable()
	83	#define is_otg_enabled(musb) 0
	84
	85	#define is_peripheral_active(musb) is_peripheral_capable()
	86	#define is_host_active(musb) is_host_capable()
	87	#endif
	88
	89	#if defined(CONFIG_USB_MUSB_OTG) \|\| defined(CONFIG_USB_MUSB_PERIPHERAL)
	90	/* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
	91	* override that choice selection (often USB_GADGET_DUMMY_HCD).
	92	*/
	93	#ifndef CONFIG_USB_GADGET_MUSB_HDRC
	94	#error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
	95	#endif
	96	#endif /* need MUSB gadget selection */
	97
b20cf906 MF	98	#ifndef CONFIG_HAVE_CLK
	99	/* Dummy stub for clk framework */
	100	#define clk_get(dev, id) NULL
	101	#define clk_put(clock) do {} while (0)
	102	#define clk_enable(clock) do {} while (0)
	103	#define clk_disable(clock) do {} while (0)
	104	#endif
550a7375 FB	105
	106	#ifdef CONFIG_PROC_FS
	107	#include <linux/fs.h>
	108	#define MUSB_CONFIG_PROC_FS
	109	#endif
	110
	111	/**************************** PERIPHERAL ROLE ***************************/
	112
	113	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	114
	115	#define is_peripheral_capable() (1)
	116
	117	extern irqreturn_t musb_g_ep0_irq(struct musb *);
	118	extern void musb_g_tx(struct musb *, u8);
	119	extern void musb_g_rx(struct musb *, u8);
	120	extern void musb_g_reset(struct musb *);
	121	extern void musb_g_suspend(struct musb *);
	122	extern void musb_g_resume(struct musb *);
	123	extern void musb_g_wakeup(struct musb *);
	124	extern void musb_g_disconnect(struct musb *);
	125
	126	#else
	127
	128	#define is_peripheral_capable() (0)
	129
	130	static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
	131	static inline void musb_g_reset(struct musb *m) {}
	132	static inline void musb_g_suspend(struct musb *m) {}
	133	static inline void musb_g_resume(struct musb *m) {}
	134	static inline void musb_g_wakeup(struct musb *m) {}
	135	static inline void musb_g_disconnect(struct musb *m) {}
	136
	137	#endif
	138
	139	/**************************** HOST ROLE *********************************/
	140
	141	#ifdef CONFIG_USB_MUSB_HDRC_HCD
	142
	143	#define is_host_capable() (1)
	144
	145	extern irqreturn_t musb_h_ep0_irq(struct musb *);
	146	extern void musb_host_tx(struct musb *, u8);
	147	extern void musb_host_rx(struct musb *, u8);
	148
	149	#else
	150
	151	#define is_host_capable() (0)
	152
	153	static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
	154	static inline void musb_host_tx(struct musb *m, u8 e) {}
	155	static inline void musb_host_rx(struct musb *m, u8 e) {}
	156
	157	#endif
	158
	159
	160	/**************************** CONSTANTS ******************************/
	161
	162	#ifndef MUSB_C_NUM_EPS
	163	#define MUSB_C_NUM_EPS ((u8)16)
	164	#endif
	165
	166	#ifndef MUSB_MAX_END0_PACKET
	167	#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
	168	#endif
169
170	/* host side ep0 states */
171	enum musb_h_ep0_state {
172	MUSB_EP0_IDLE,
173	MUSB_EP0_START, /* expect ack of setup */
174	MUSB_EP0_IN, /* expect IN DATA */
175	MUSB_EP0_OUT, /* expect ack of OUT DATA */
176	MUSB_EP0_STATUS, /* expect ack of STATUS */
177	} __attribute__ ((packed));
178
179	/* peripheral side ep0 states */
180	enum musb_g_ep0_state {
a5073b52 SS	181	MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
a5073b52 SS	182	MUSB_EP0_STAGE_SETUP, /* received SETUP */
550a7375 FB	183	MUSB_EP0_STAGE_TX, /* IN data */
	184	MUSB_EP0_STAGE_RX, /* OUT data */
	185	MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
	186	MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
	187	MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
	188	} __attribute__ ((packed));
	189
f7f9d63e DB	190	/*
	191	* OTG protocol constants. See USB OTG 1.3 spec,
	192	* sections 5.5 "Device Timings" and 6.6.5 "Timers".
	193	*/
550a7375	194	#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
f7f9d63e DB	195	#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
	196	#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
	197	#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
	198
550a7375 FB	199
	200	/************************* REGISTER ACCESS ******************************/
	201
	202	/* Endpoint registers (other than dynfifo setup) can be accessed either
	203	* directly with the "flat" model, or after setting up an index register.
	204	*/
	205
	206	#if defined(CONFIG_ARCH_DAVINCI) \|\| defined(CONFIG_ARCH_OMAP2430) \
c6cf8b00	207	\|\| defined(CONFIG_ARCH_OMAP3430) \|\| defined(CONFIG_BLACKFIN)
550a7375 FB	208	/* REVISIT indexed access seemed to
	209	* misbehave (on DaVinci) for at least peripheral IN ...
	210	*/
	211	#define MUSB_FLAT_REG
	212	#endif
	213
	214	/* TUSB mapping: "flat" plus ep0 special cases */
	215	#if defined(CONFIG_USB_TUSB6010)
	216	#define musb_ep_select(_mbase, _epnum) \
	217	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
	218	#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
	219
	220	/* "flat" mapping: each endpoint has its own i/o address */
	221	#elif defined(MUSB_FLAT_REG)
	222	#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
	223	#define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
	224
	225	/* "indexed" mapping: INDEX register controls register bank select */
	226	#else
	227	#define musb_ep_select(_mbase, _epnum) \
	228	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
	229	#define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
	230	#endif
	231
	232	/**************************** FUNCTIONS ******************************/
	233
	234	#define MUSB_HST_MODE(_musb)\
	235	{ (_musb)->is_host = true; }
	236	#define MUSB_DEV_MODE(_musb) \
	237	{ (_musb)->is_host = false; }
	238
	239	#define test_devctl_hst_mode(_x) \
	240	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
	241
	242	#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
	243
	244	/****************************** TYPES ***********************************/
	245
	246	/*
	247	* struct musb_hw_ep - endpoint hardware (bidirectional)
	248	*
	249	* Ordered slightly for better cacheline locality.
	250	*/
	251	struct musb_hw_ep {
	252	struct musb *musb;
	253	void __iomem *fifo;
	254	void __iomem *regs;
	255
	256	#ifdef CONFIG_USB_TUSB6010
	257	void __iomem *conf;
	258	#endif
	259
	260	/* index in musb->endpoints[] */
	261	u8 epnum;
	262
	263	/* hardware configuration, possibly dynamic */
	264	bool is_shared_fifo;
	265	bool tx_double_buffered;
	266	bool rx_double_buffered;
	267	u16 max_packet_sz_tx;
	268	u16 max_packet_sz_rx;
	269
	270	struct dma_channel *tx_channel;
	271	struct dma_channel *rx_channel;
272
273	#ifdef CONFIG_USB_TUSB6010
274	/* TUSB has "asynchronous" and "synchronous" dma modes */
275	dma_addr_t fifo_async;
276	dma_addr_t fifo_sync;
277	void __iomem *fifo_sync_va;
278	#endif
279
280	#ifdef CONFIG_USB_MUSB_HDRC_HCD
281	void __iomem *target_regs;
282
283	/* currently scheduled peripheral endpoint */
284	struct musb_qh *in_qh;
285	struct musb_qh *out_qh;
286
287	u8 rx_reinit;
288	u8 tx_reinit;
289	#endif
290
291	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
292	/* peripheral side */
293	struct musb_ep ep_in; /* TX */
294	struct musb_ep ep_out; /* RX */
295	#endif
296	};
297
298	static inline struct usb_request next_in_request(struct musb_hw_ep hw_ep)
299	{
300	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
301	return next_request(&hw_ep->ep_in);
302	#else
303	return NULL;
304	#endif
305	}
306
307	static inline struct usb_request next_out_request(struct musb_hw_ep hw_ep)
308	{
309	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
310	return next_request(&hw_ep->ep_out);
311	#else
312	return NULL;
313	#endif
314	}
315
316	/*
317	* struct musb - Driver instance data.
318	*/
319	struct musb {
320	/* device lock */
321	spinlock_t lock;
322	struct clk *clock;
323	irqreturn_t (isr)(int, void );
324	struct work_struct irq_work;
32c3b94e AG	325	#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
	326	#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
	327	#define MUSB_HWVERS_RC 0x8000
	328	#define MUSB_HWVERS_1300 0x52C
	329	#define MUSB_HWVERS_1400 0x590
	330	#define MUSB_HWVERS_1800 0x720
	331	#define MUSB_HWVERS_2000 0x800
	332	u16 hwvers;
550a7375 FB	333
	334	/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
	335	#define MUSB_PORT_STAT_RESUME (1 << 31)
	336
	337	u32 port1_status;
	338
	339	#ifdef CONFIG_USB_MUSB_HDRC_HCD
	340	unsigned long rh_timer;
	341
	342	enum musb_h_ep0_state ep0_stage;
	343
	344	/* bulk traffic normally dedicates endpoint hardware, and each
	345	* direction has its own ring of host side endpoints.
	346	* we try to progress the transfer at the head of each endpoint's
	347	* queue until it completes or NAKs too much; then we try the next
	348	* endpoint.
	349	*/
	350	struct musb_hw_ep *bulk_ep;
	351
	352	struct list_head control; /* of musb_qh */
	353	struct list_head in_bulk; /* of musb_qh */
	354	struct list_head out_bulk; /* of musb_qh */
f7f9d63e DB	355
f7f9d63e DB	356	struct timer_list otg_timer;
550a7375 FB	357	#endif
	358
	359	/* called with IRQs blocked; ON/nonzero implies starting a session,
	360	* and waiting at least a_wait_vrise_tmout.
	361	*/
	362	void (board_set_vbus)(struct musb , int is_on);
	363
	364	struct dma_controller *dma_controller;
	365
	366	struct device *controller;
	367	void __iomem *ctrl_base;
	368	void __iomem *mregs;
	369
	370	#ifdef CONFIG_USB_TUSB6010
	371	dma_addr_t async;
	372	dma_addr_t sync;
	373	void __iomem *sync_va;
	374	#endif
	375
	376	/* passed down from chip/board specific irq handlers */
	377	u8 int_usb;
	378	u16 int_rx;
	379	u16 int_tx;
	380
84e250ff	381	struct otg_transceiver *xceiv;
550a7375 FB	382
550a7375 FB	383	int nIrq;
c48a5155	384	unsigned irq_wake:1;
550a7375 FB	385
	386	struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
	387	#define control_ep endpoints
	388
	389	#define VBUSERR_RETRY_COUNT 3
	390	u16 vbuserr_retry;
	391	u16 epmask;
	392	u8 nr_endpoints;
	393
	394	u8 board_mode; /* enum musb_mode */
	395	int (*board_set_power)(int state);
	396
	397	int (set_clock)(struct clk clk, int is_active);
	398
	399	u8 min_power; /* vbus for periph, in mA/2 */
	400
	401	bool is_host;
	402
	403	int a_wait_bcon; /* VBUS timeout in msecs */
	404	unsigned long idle_timeout; /* Next timeout in jiffies */
	405
	406	/* active means connected and not suspended */
	407	unsigned is_active:1;
	408
	409	unsigned is_multipoint:1;
	410	unsigned ignore_disconnect:1; /* during bus resets */
	411
a483d706 AKG	412	unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
a483d706 AKG	413	unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
51bf0d0e	414	unsigned dyn_fifo:1; /* dynamic FIFO supported? */
a483d706	415
7ed069c1	416	unsigned bulk_split:1;
550a7375	417	#define can_bulk_split(musb,type) \
7ed069c1	418	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
550a7375	419
7ed069c1	420	unsigned bulk_combine:1;
550a7375	421	#define can_bulk_combine(musb,type) \
7ed069c1	422	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
550a7375 FB	423
	424	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	425	/* is_suspended means USB B_PERIPHERAL suspend */
	426	unsigned is_suspended:1;
	427
	428	/* may_wakeup means remote wakeup is enabled */
	429	unsigned may_wakeup:1;
	430
	431	/* is_self_powered is reported in device status and the
	432	* config descriptor. is_bus_powered means B_PERIPHERAL
	433	* draws some VBUS current; both can be true.
	434	*/
	435	unsigned is_self_powered:1;
	436	unsigned is_bus_powered:1;
	437
	438	unsigned set_address:1;
	439	unsigned test_mode:1;
	440	unsigned softconnect:1;
	441
	442	u8 address;
	443	u8 test_mode_nr;
	444	u16 ackpend; /* ep0 */
	445	enum musb_g_ep0_state ep0_state;
	446	struct usb_gadget g; /* the gadget */
	447	struct usb_gadget_driver gadget_driver; / its driver */
	448	#endif
	449
ca6d1b13 FB	450	struct musb_hdrc_config *config;
ca6d1b13 FB	451
550a7375 FB	452	#ifdef MUSB_CONFIG_PROC_FS
	453	struct proc_dir_entry *proc_entry;
	454	#endif
	455	};
	456
4f712e01 AKG	457	#ifdef CONFIG_PM
	458	struct musb_csr_regs {
	459	/* FIFO registers */
	460	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	461	u16 rxfifoadd, txfifoadd;
	462	u8 txtype, txinterval, rxtype, rxinterval;
	463	u8 rxfifosz, txfifosz;
	464	u8 txfunaddr, txhubaddr, txhubport;
	465	u8 rxfunaddr, rxhubaddr, rxhubport;
	466	};
	467
	468	struct musb_context_registers {
	469
	470	#if defined(CONFIG_ARCH_OMAP34XX) \|\| defined(CONFIG_ARCH_OMAP2430)
	471	u32 otg_sysconfig, otg_forcestandby;
	472	#endif
	473	u8 power;
	474	u16 intrtxe, intrrxe;
	475	u8 intrusbe;
	476	u16 frame;
	477	u8 index, testmode;
	478
	479	u8 devctl, misc;
	480
	481	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
	482	};
	483
	484	#if defined(CONFIG_ARCH_OMAP34XX) \|\| defined(CONFIG_ARCH_OMAP2430)
8573e6a6 FB	485	extern void musb_platform_save_context(struct musb *musb,
	486	struct musb_context_registers *musb_context);
	487	extern void musb_platform_restore_context(struct musb *musb,
	488	struct musb_context_registers *musb_context);
4f712e01	489	#else
8573e6a6 FB	490	#define musb_platform_save_context(m, x) do {} while (0)
8573e6a6 FB	491	#define musb_platform_restore_context(m, x) do {} while (0)
4f712e01 AKG	492	#endif
	493
	494	#endif
	495
550a7375 FB	496	static inline void musb_set_vbus(struct musb *musb, int is_on)
	497	{
	498	musb->board_set_vbus(musb, is_on);
	499	}
	500
	501	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	502	static inline struct musb gadget_to_musb(struct usb_gadget g)
	503	{
	504	return container_of(g, struct musb, g);
	505	}
	506	#endif
	507
c6cf8b00 BW	508	#ifdef CONFIG_BLACKFIN
	509	static inline int musb_read_fifosize(struct musb *musb,
	510	struct musb_hw_ep *hw_ep, u8 epnum)
	511	{
	512	musb->nr_endpoints++;
	513	musb->epmask \|= (1 << epnum);
	514
	515	if (epnum < 5) {
	516	hw_ep->max_packet_sz_tx = 128;
	517	hw_ep->max_packet_sz_rx = 128;
	518	} else {
	519	hw_ep->max_packet_sz_tx = 1024;
	520	hw_ep->max_packet_sz_rx = 1024;
	521	}
	522	hw_ep->is_shared_fifo = false;
	523
	524	return 0;
	525	}
	526
	527	static inline void musb_configure_ep0(struct musb *musb)
	528	{
	529	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	530	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	531	musb->endpoints[0].is_shared_fifo = true;
	532	}
	533
	534	#else
	535
	536	static inline int musb_read_fifosize(struct musb *musb,
	537	struct musb_hw_ep *hw_ep, u8 epnum)
	538	{
32233716	539	void *mbase = musb->mregs;
c6cf8b00 BW	540	u8 reg = 0;
	541
	542	/* read from core using indexed model */
32233716	543	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
c6cf8b00 BW	544	/* 0's returned when no more endpoints */
	545	if (!reg)
	546	return -ENODEV;
	547
	548	musb->nr_endpoints++;
	549	musb->epmask \|= (1 << epnum);
	550
	551	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
	552
	553	/* shared TX/RX FIFO? */
	554	if ((reg & 0xf0) == 0xf0) {
	555	hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
	556	hw_ep->is_shared_fifo = true;
	557	return 0;
	558	} else {
	559	hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
	560	hw_ep->is_shared_fifo = false;
	561	}
	562
	563	return 0;
	564	}
	565
	566	static inline void musb_configure_ep0(struct musb *musb)
	567	{
	568	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	569	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
32233716	570	musb->endpoints[0].is_shared_fifo = true;
c6cf8b00 BW	571	}
	572	#endif /* CONFIG_BLACKFIN */
	573
550a7375 FB	574
	575	/*************************** Glue it together ***************************/
	576
	577	extern const char musb_driver_name[];
	578
	579	extern void musb_start(struct musb *musb);
	580	extern void musb_stop(struct musb *musb);
	581
	582	extern void musb_write_fifo(struct musb_hw_ep ep, u16 len, const u8 src);
	583	extern void musb_read_fifo(struct musb_hw_ep ep, u16 len, u8 dst);
	584
	585	extern void musb_load_testpacket(struct musb *);
	586
	587	extern irqreturn_t musb_interrupt(struct musb *);
	588
	589	extern void musb_platform_enable(struct musb *musb);
	590	extern void musb_platform_disable(struct musb *musb);
	591
	592	extern void musb_hnp_stop(struct musb *musb);
	593
96a274d1	594	extern int musb_platform_set_mode(struct musb *musb, u8 musb_mode);
550a7375	595
c6cf8b00	596	#if defined(CONFIG_USB_TUSB6010) \|\| defined(CONFIG_BLACKFIN) \|\| \
550a7375 FB	597	defined(CONFIG_ARCH_OMAP2430) \|\| defined(CONFIG_ARCH_OMAP34XX)
	598	extern void musb_platform_try_idle(struct musb *musb, unsigned long timeout);
	599	#else
	600	#define musb_platform_try_idle(x, y) do {} while (0)
	601	#endif
	602
c6cf8b00	603	#if defined(CONFIG_USB_TUSB6010) \|\| defined(CONFIG_BLACKFIN)
550a7375 FB	604	extern int musb_platform_get_vbus_status(struct musb *musb);
	605	#else
	606	#define musb_platform_get_vbus_status(x) 0
	607	#endif
	608
	609	extern int __init musb_platform_init(struct musb *musb);
	610	extern int musb_platform_exit(struct musb *musb);
	611
550a7375	612	#endif /* __MUSB_CORE_H__ */