[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / musb / musb_core.h

/*
 * MUSB OTG driver defines
 *
 * Copyright 2005 Mentor Graphics Corporation
 * Copyright (C) 2005-2006 by Texas Instruments
 * Copyright (C) 2006-2007 Nokia Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

#ifndef __MUSB_CORE_H__
#define __MUSB_CORE_H__

#include <linux/slab.h>
#include <linux/list.h>
#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/timer.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb.h>
#include <linux/usb/otg.h>
#include <linux/usb/musb.h>

struct musb;
struct musb_hw_ep;
struct musb_ep;

/* Helper defines for struct musb->hwvers */
#define MUSB_HWVERS_MAJOR(x)	((x >> 10) & 0x1f)
#define MUSB_HWVERS_MINOR(x)	(x & 0x3ff)
#define MUSB_HWVERS_RC		0x8000
#define MUSB_HWVERS_1300	0x52C
#define MUSB_HWVERS_1400	0x590
#define MUSB_HWVERS_1800	0x720
#define MUSB_HWVERS_1900	0x784
#define MUSB_HWVERS_2000	0x800

#include "musb_debug.h"
#include "musb_dma.h"

#include "musb_io.h"
#include "musb_regs.h"

#include "musb_gadget.h"
#include <linux/usb/hcd.h>
#include "musb_host.h"


#ifdef CONFIG_USB_MUSB_OTG

#define	is_peripheral_enabled(musb)	((musb)->board_mode != MUSB_HOST)
#define	is_host_enabled(musb)		((musb)->board_mode != MUSB_PERIPHERAL)
#define	is_otg_enabled(musb)		((musb)->board_mode == MUSB_OTG)

/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
 * OTG or host-only go to A_IDLE when ID is sensed.
 */
#define is_peripheral_active(m)		(!(m)->is_host)
#define is_host_active(m)		((m)->is_host)

#else
#define	is_peripheral_enabled(musb)	is_peripheral_capable()
#define	is_host_enabled(musb)		is_host_capable()
#define	is_otg_enabled(musb)		0

#define	is_peripheral_active(musb)	is_peripheral_capable()
#define	is_host_active(musb)		is_host_capable()
#endif

#if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
/* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
 * override that choice selection (often USB_GADGET_DUMMY_HCD).
 */
#ifndef CONFIG_USB_GADGET_MUSB_HDRC
#error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
#endif
#endif	/* need MUSB gadget selection */

#ifndef CONFIG_HAVE_CLK
/* Dummy stub for clk framework */
#define clk_get(dev, id)	NULL
#define clk_put(clock)		do {} while (0)
#define clk_enable(clock)	do {} while (0)
#define clk_disable(clock)	do {} while (0)
#endif

#ifdef CONFIG_PROC_FS
#include <linux/fs.h>
#define MUSB_CONFIG_PROC_FS
#endif

/****************************** PERIPHERAL ROLE *****************************/

#ifdef CONFIG_USB_GADGET_MUSB_HDRC

#define	is_peripheral_capable()	(1)

extern irqreturn_t musb_g_ep0_irq(struct musb *);
extern void musb_g_tx(struct musb *, u8);
extern void musb_g_rx(struct musb *, u8);
extern void musb_g_reset(struct musb *);
extern void musb_g_suspend(struct musb *);
extern void musb_g_resume(struct musb *);
extern void musb_g_wakeup(struct musb *);
extern void musb_g_disconnect(struct musb *);

#else

#define	is_peripheral_capable()	(0)

static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
static inline void musb_g_reset(struct musb *m) {}
static inline void musb_g_suspend(struct musb *m) {}
static inline void musb_g_resume(struct musb *m) {}
static inline void musb_g_wakeup(struct musb *m) {}
static inline void musb_g_disconnect(struct musb *m) {}

#endif

/****************************** HOST ROLE ***********************************/

#ifdef CONFIG_USB_MUSB_HDRC_HCD

#define	is_host_capable()	(1)

extern irqreturn_t musb_h_ep0_irq(struct musb *);
extern void musb_host_tx(struct musb *, u8);
extern void musb_host_rx(struct musb *, u8);

#else

#define	is_host_capable()	(0)

static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
static inline void musb_host_tx(struct musb *m, u8 e) {}
static inline void musb_host_rx(struct musb *m, u8 e) {}

#endif


/****************************** CONSTANTS ********************************/

#ifndef MUSB_C_NUM_EPS
#define MUSB_C_NUM_EPS ((u8)16)
#endif

#ifndef MUSB_MAX_END0_PACKET
#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
#endif

/* host side ep0 states */
enum musb_h_ep0_state {
	MUSB_EP0_IDLE,
	MUSB_EP0_START,			/* expect ack of setup */
	MUSB_EP0_IN,			/* expect IN DATA */
	MUSB_EP0_OUT,			/* expect ack of OUT DATA */
	MUSB_EP0_STATUS,		/* expect ack of STATUS */
} __attribute__ ((packed));

/* peripheral side ep0 states */
enum musb_g_ep0_state {
	MUSB_EP0_STAGE_IDLE,		/* idle, waiting for SETUP */
	MUSB_EP0_STAGE_SETUP,		/* received SETUP */
	MUSB_EP0_STAGE_TX,		/* IN data */
	MUSB_EP0_STAGE_RX,		/* OUT data */
	MUSB_EP0_STAGE_STATUSIN,	/* (after OUT data) */
	MUSB_EP0_STAGE_STATUSOUT,	/* (after IN data) */
	MUSB_EP0_STAGE_ACKWAIT,		/* after zlp, before statusin */
} __attribute__ ((packed));

/*
 * OTG protocol constants.  See USB OTG 1.3 spec,
 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 */
#define OTG_TIME_A_WAIT_VRISE	100		/* msec (max) */
#define OTG_TIME_A_WAIT_BCON	1100		/* min 1 second */
#define OTG_TIME_A_AIDL_BDIS	200		/* min 200 msec */
#define OTG_TIME_B_ASE0_BRST	100		/* min 3.125 ms */


/*************************** REGISTER ACCESS ********************************/

/* Endpoint registers (other than dynfifo setup) can be accessed either
 * directly with the "flat" model, or after setting up an index register.
 */

#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
		|| defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN) \
		|| defined(CONFIG_ARCH_OMAP4)
/* REVISIT indexed access seemed to
 * misbehave (on DaVinci) for at least peripheral IN ...
 */
#define	MUSB_FLAT_REG
#endif

/* TUSB mapping: "flat" plus ep0 special cases */
#if	defined(CONFIG_USB_MUSB_TUSB6010)
#define musb_ep_select(_mbase, _epnum) \
	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define	MUSB_EP_OFFSET			MUSB_TUSB_OFFSET

/* "flat" mapping: each endpoint has its own i/o address */
#elif	defined(MUSB_FLAT_REG)
#define musb_ep_select(_mbase, _epnum)	(((void)(_mbase)), ((void)(_epnum)))
#define	MUSB_EP_OFFSET			MUSB_FLAT_OFFSET

/* "indexed" mapping: INDEX register controls register bank select */
#else
#define musb_ep_select(_mbase, _epnum) \
	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define	MUSB_EP_OFFSET			MUSB_INDEXED_OFFSET
#endif

/****************************** FUNCTIONS ********************************/

#define MUSB_HST_MODE(_musb)\
	{ (_musb)->is_host = true; }
#define MUSB_DEV_MODE(_musb) \
	{ (_musb)->is_host = false; }

#define test_devctl_hst_mode(_x) \
	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)

#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")

/******************************** TYPES *************************************/

/**
 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 * @init:	turns on clocks, sets up platform-specific registers, etc
 * @exit:	undoes @init
 * @set_mode:	forcefully changes operating mode
 * @try_ilde:	tries to idle the IP
 * @vbus_status: returns vbus status if possible
 * @set_vbus:	forces vbus status
 */
struct musb_platform_ops {
	int	(*init)(struct musb *musb);
	int	(*exit)(struct musb *musb);

	void	(*enable)(struct musb *musb);
	void	(*disable)(struct musb *musb);

	int	(*set_mode)(struct musb *musb, u8 mode);
	void	(*try_idle)(struct musb *musb, unsigned long timeout);

	int	(*vbus_status)(struct musb *musb);
	void	(*set_vbus)(struct musb *musb, int on);
};

/*
 * struct musb_hw_ep - endpoint hardware (bidirectional)
 *
 * Ordered slightly for better cacheline locality.
 */
struct musb_hw_ep {
	struct musb		*musb;
	void __iomem		*fifo;
	void __iomem		*regs;

#ifdef CONFIG_USB_MUSB_TUSB6010
	void __iomem		*conf;
#endif

	/* index in musb->endpoints[]  */
	u8			epnum;

	/* hardware configuration, possibly dynamic */
	bool			is_shared_fifo;
	bool			tx_double_buffered;
	bool			rx_double_buffered;
	u16			max_packet_sz_tx;
	u16			max_packet_sz_rx;

	struct dma_channel	*tx_channel;
	struct dma_channel	*rx_channel;

#ifdef CONFIG_USB_MUSB_TUSB6010
	/* TUSB has "asynchronous" and "synchronous" dma modes */
	dma_addr_t		fifo_async;
	dma_addr_t		fifo_sync;
	void __iomem		*fifo_sync_va;
#endif

#ifdef CONFIG_USB_MUSB_HDRC_HCD
	void __iomem		*target_regs;

	/* currently scheduled peripheral endpoint */
	struct musb_qh		*in_qh;
	struct musb_qh		*out_qh;

	u8			rx_reinit;
	u8			tx_reinit;
#endif

#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	/* peripheral side */
	struct musb_ep		ep_in;			/* TX */
	struct musb_ep		ep_out;			/* RX */
#endif
};

static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep)
{
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	return next_request(&hw_ep->ep_in);
#else
	return NULL;
#endif
}

static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep)
{
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	return next_request(&hw_ep->ep_out);
#else
	return NULL;
#endif
}

struct musb_csr_regs {
	/* FIFO registers */
	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	u16 rxfifoadd, txfifoadd;
	u8 txtype, txinterval, rxtype, rxinterval;
	u8 rxfifosz, txfifosz;
	u8 txfunaddr, txhubaddr, txhubport;
	u8 rxfunaddr, rxhubaddr, rxhubport;
};

struct musb_context_registers {

#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
    defined(CONFIG_ARCH_OMAP4)
	u32 otg_sysconfig, otg_forcestandby;
#endif
	u8 power;
	u16 intrtxe, intrrxe;
	u8 intrusbe;
	u16 frame;
	u8 index, testmode;

	u8 devctl, busctl, misc;

	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
};

/*
 * struct musb - Driver instance data.
 */
struct musb {
	/* device lock */
	spinlock_t		lock;

	const struct musb_platform_ops *ops;
	struct musb_context_registers context;

	irqreturn_t		(*isr)(int, void *);
	struct work_struct	irq_work;
	u16			hwvers;

/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
#define MUSB_PORT_STAT_RESUME	(1 << 31)

	u32			port1_status;

#ifdef CONFIG_USB_MUSB_HDRC_HCD
	unsigned long		rh_timer;

	enum musb_h_ep0_state	ep0_stage;

	/* bulk traffic normally dedicates endpoint hardware, and each
	 * direction has its own ring of host side endpoints.
	 * we try to progress the transfer at the head of each endpoint's
	 * queue until it completes or NAKs too much; then we try the next
	 * endpoint.
	 */
	struct musb_hw_ep	*bulk_ep;

	struct list_head	control;	/* of musb_qh */
	struct list_head	in_bulk;	/* of musb_qh */
	struct list_head	out_bulk;	/* of musb_qh */

	struct timer_list	otg_timer;
#endif
	struct notifier_block	nb;

	struct dma_controller	*dma_controller;

	struct device		*controller;
	void __iomem		*ctrl_base;
	void __iomem		*mregs;

#ifdef CONFIG_USB_MUSB_TUSB6010
	dma_addr_t		async;
	dma_addr_t		sync;
	void __iomem		*sync_va;
#endif

	/* passed down from chip/board specific irq handlers */
	u8			int_usb;
	u16			int_rx;
	u16			int_tx;

	struct otg_transceiver	*xceiv;

	int nIrq;
	unsigned		irq_wake:1;

	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];
#define control_ep		endpoints

#define VBUSERR_RETRY_COUNT	3
	u16			vbuserr_retry;
	u16 epmask;
	u8 nr_endpoints;

	u8 board_mode;		/* enum musb_mode */
	int			(*board_set_power)(int state);

	u8			min_power;	/* vbus for periph, in mA/2 */

	bool			is_host;

	int			a_wait_bcon;	/* VBUS timeout in msecs */
	unsigned long		idle_timeout;	/* Next timeout in jiffies */

	/* active means connected and not suspended */
	unsigned		is_active:1;

	unsigned is_multipoint:1;
	unsigned ignore_disconnect:1;	/* during bus resets */

	unsigned		hb_iso_rx:1;	/* high bandwidth iso rx? */
	unsigned		hb_iso_tx:1;	/* high bandwidth iso tx? */
	unsigned		dyn_fifo:1;	/* dynamic FIFO supported? */

	unsigned		bulk_split:1;
#define	can_bulk_split(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)

	unsigned		bulk_combine:1;
#define	can_bulk_combine(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)

#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	/* is_suspended means USB B_PERIPHERAL suspend */
	unsigned		is_suspended:1;

	/* may_wakeup means remote wakeup is enabled */
	unsigned		may_wakeup:1;

	/* is_self_powered is reported in device status and the
	 * config descriptor.  is_bus_powered means B_PERIPHERAL
	 * draws some VBUS current; both can be true.
	 */
	unsigned		is_self_powered:1;
	unsigned		is_bus_powered:1;

	unsigned		set_address:1;
	unsigned		test_mode:1;
	unsigned		softconnect:1;

	u8			address;
	u8			test_mode_nr;
	u16			ackpend;		/* ep0 */
	enum musb_g_ep0_state	ep0_state;
	struct usb_gadget	g;			/* the gadget */
	struct usb_gadget_driver *gadget_driver;	/* its driver */
#endif

	struct musb_hdrc_config	*config;

#ifdef MUSB_CONFIG_PROC_FS
	struct proc_dir_entry *proc_entry;
#endif
};

#ifdef CONFIG_USB_GADGET_MUSB_HDRC
static inline struct musb *gadget_to_musb(struct usb_gadget *g)
{
	return container_of(g, struct musb, g);
}
#endif

#ifdef CONFIG_BLACKFIN
static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	if (epnum < 5) {
		hw_ep->max_packet_sz_tx = 128;
		hw_ep->max_packet_sz_rx = 128;
	} else {
		hw_ep->max_packet_sz_tx = 1024;
		hw_ep->max_packet_sz_rx = 1024;
	}
	hw_ep->is_shared_fifo = false;

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}

#else

static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	void *mbase = musb->mregs;
	u8 reg = 0;

	/* read from core using indexed model */
	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
	/* 0's returned when no more endpoints */
	if (!reg)
		return -ENODEV;

	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);

	/* shared TX/RX FIFO? */
	if ((reg & 0xf0) == 0xf0) {
		hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
		hw_ep->is_shared_fifo = true;
		return 0;
	} else {
		hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
		hw_ep->is_shared_fifo = false;
	}

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}
#endif /* CONFIG_BLACKFIN */


/***************************** Glue it together *****************************/

extern const char musb_driver_name[];

extern void musb_start(struct musb *musb);
extern void musb_stop(struct musb *musb);

extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);

extern void musb_load_testpacket(struct musb *);

extern irqreturn_t musb_interrupt(struct musb *);

extern void musb_hnp_stop(struct musb *musb);

static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
{
	if (musb->ops->set_vbus)
		musb->ops->set_vbus(musb, is_on);
}

static inline void musb_platform_enable(struct musb *musb)
{
	if (musb->ops->enable)
		musb->ops->enable(musb);
}

static inline void musb_platform_disable(struct musb *musb)
{
	if (musb->ops->disable)
		musb->ops->disable(musb);
}

static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
{
	if (!musb->ops->set_mode)
		return 0;

	return musb->ops->set_mode(musb, mode);
}

static inline void musb_platform_try_idle(struct musb *musb,
		unsigned long timeout)
{
	if (musb->ops->try_idle)
		musb->ops->try_idle(musb, timeout);
}

static inline int musb_platform_get_vbus_status(struct musb *musb)
{
	if (!musb->ops->vbus_status)
		return 0;

	return musb->ops->vbus_status(musb);
}

static inline int musb_platform_init(struct musb *musb)
{
	if (!musb->ops->init)
		return -EINVAL;

	return musb->ops->init(musb);
}

static inline int musb_platform_exit(struct musb *musb)
{
	if (!musb->ops->exit)
		return -EINVAL;

	return musb->ops->exit(musb);
}

#endif	/* __MUSB_CORE_H__ */
Commit	Line	Data
550a7375 FB	1	/*
	2	* MUSB OTG driver defines
	3	*
	4	* Copyright 2005 Mentor Graphics Corporation
	5	* Copyright (C) 2005-2006 by Texas Instruments
	6	* Copyright (C) 2006-2007 Nokia Corporation
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*
	22	* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
	23	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	24	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	25	* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
	26	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	27	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	28	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	29	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	30	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	31	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	*/
	34
	35	#ifndef __MUSB_CORE_H__
	36	#define __MUSB_CORE_H__
	37
	38	#include <linux/slab.h>
	39	#include <linux/list.h>
	40	#include <linux/interrupt.h>
550a7375	41	#include <linux/errno.h>
f7f9d63e	42	#include <linux/timer.h>
550a7375 FB	43	#include <linux/clk.h>
	44	#include <linux/device.h>
	45	#include <linux/usb/ch9.h>
	46	#include <linux/usb/gadget.h>
	47	#include <linux/usb.h>
	48	#include <linux/usb/otg.h>
	49	#include <linux/usb/musb.h>
	50
	51	struct musb;
	52	struct musb_hw_ep;
	53	struct musb_ep;
	54
0ded2f14 CC	55	/* Helper defines for struct musb->hwvers */
	56	#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
	57	#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
	58	#define MUSB_HWVERS_RC 0x8000
	59	#define MUSB_HWVERS_1300 0x52C
	60	#define MUSB_HWVERS_1400 0x590
	61	#define MUSB_HWVERS_1800 0x720
	62	#define MUSB_HWVERS_1900 0x784
	63	#define MUSB_HWVERS_2000 0x800
550a7375 FB	64
	65	#include "musb_debug.h"
	66	#include "musb_dma.h"
	67
550a7375 FB	68	#include "musb_io.h"
	69	#include "musb_regs.h"
	70
	71	#include "musb_gadget.h"
27729aad	72	#include <linux/usb/hcd.h>
550a7375 FB	73	#include "musb_host.h"
	74
	75
	76
	77	#ifdef CONFIG_USB_MUSB_OTG
	78
	79	#define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
	80	#define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
	81	#define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
	82
	83	/* NOTE: otg and peripheral-only state machines start at B_IDLE.
	84	* OTG or host-only go to A_IDLE when ID is sensed.
	85	*/
	86	#define is_peripheral_active(m) (!(m)->is_host)
	87	#define is_host_active(m) ((m)->is_host)
	88
	89	#else
	90	#define is_peripheral_enabled(musb) is_peripheral_capable()
	91	#define is_host_enabled(musb) is_host_capable()
	92	#define is_otg_enabled(musb) 0
	93
	94	#define is_peripheral_active(musb) is_peripheral_capable()
	95	#define is_host_active(musb) is_host_capable()
	96	#endif
	97
	98	#if defined(CONFIG_USB_MUSB_OTG) \|\| defined(CONFIG_USB_MUSB_PERIPHERAL)
	99	/* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
	100	* override that choice selection (often USB_GADGET_DUMMY_HCD).
	101	*/
	102	#ifndef CONFIG_USB_GADGET_MUSB_HDRC
	103	#error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
	104	#endif
	105	#endif /* need MUSB gadget selection */
	106
b20cf906 MF	107	#ifndef CONFIG_HAVE_CLK
	108	/* Dummy stub for clk framework */
	109	#define clk_get(dev, id) NULL
	110	#define clk_put(clock) do {} while (0)
	111	#define clk_enable(clock) do {} while (0)
	112	#define clk_disable(clock) do {} while (0)
	113	#endif
550a7375 FB	114
	115	#ifdef CONFIG_PROC_FS
	116	#include <linux/fs.h>
	117	#define MUSB_CONFIG_PROC_FS
	118	#endif
	119
	120	/**************************** PERIPHERAL ROLE ***************************/
	121
	122	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	123
	124	#define is_peripheral_capable() (1)
	125
	126	extern irqreturn_t musb_g_ep0_irq(struct musb *);
	127	extern void musb_g_tx(struct musb *, u8);
	128	extern void musb_g_rx(struct musb *, u8);
	129	extern void musb_g_reset(struct musb *);
	130	extern void musb_g_suspend(struct musb *);
	131	extern void musb_g_resume(struct musb *);
	132	extern void musb_g_wakeup(struct musb *);
	133	extern void musb_g_disconnect(struct musb *);
	134
	135	#else
	136
	137	#define is_peripheral_capable() (0)
	138
	139	static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
	140	static inline void musb_g_reset(struct musb *m) {}
	141	static inline void musb_g_suspend(struct musb *m) {}
	142	static inline void musb_g_resume(struct musb *m) {}
	143	static inline void musb_g_wakeup(struct musb *m) {}
	144	static inline void musb_g_disconnect(struct musb *m) {}
	145
	146	#endif
	147
	148	/**************************** HOST ROLE *********************************/
	149
	150	#ifdef CONFIG_USB_MUSB_HDRC_HCD
	151
	152	#define is_host_capable() (1)
	153
	154	extern irqreturn_t musb_h_ep0_irq(struct musb *);
	155	extern void musb_host_tx(struct musb *, u8);
	156	extern void musb_host_rx(struct musb *, u8);
	157
	158	#else
	159
	160	#define is_host_capable() (0)
	161
	162	static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
	163	static inline void musb_host_tx(struct musb *m, u8 e) {}
	164	static inline void musb_host_rx(struct musb *m, u8 e) {}
	165
	166	#endif
	167
	168
	169	/**************************** CONSTANTS ******************************/
	170
	171	#ifndef MUSB_C_NUM_EPS
	172	#define MUSB_C_NUM_EPS ((u8)16)
	173	#endif
	174
	175	#ifndef MUSB_MAX_END0_PACKET
	176	#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
	177	#endif
178
179	/* host side ep0 states */
180	enum musb_h_ep0_state {
181	MUSB_EP0_IDLE,
182	MUSB_EP0_START, /* expect ack of setup */
183	MUSB_EP0_IN, /* expect IN DATA */
184	MUSB_EP0_OUT, /* expect ack of OUT DATA */
185	MUSB_EP0_STATUS, /* expect ack of STATUS */
186	} __attribute__ ((packed));
187
188	/* peripheral side ep0 states */
189	enum musb_g_ep0_state {
a5073b52 SS	190	MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
a5073b52 SS	191	MUSB_EP0_STAGE_SETUP, /* received SETUP */
550a7375 FB	192	MUSB_EP0_STAGE_TX, /* IN data */
	193	MUSB_EP0_STAGE_RX, /* OUT data */
	194	MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
	195	MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
	196	MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
	197	} __attribute__ ((packed));
	198
f7f9d63e DB	199	/*
	200	* OTG protocol constants. See USB OTG 1.3 spec,
	201	* sections 5.5 "Device Timings" and 6.6.5 "Timers".
	202	*/
550a7375	203	#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
f7f9d63e DB	204	#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
	205	#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
	206	#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
	207
550a7375 FB	208
	209	/************************* REGISTER ACCESS ******************************/
	210
	211	/* Endpoint registers (other than dynfifo setup) can be accessed either
	212	* directly with the "flat" model, or after setting up an index register.
	213	*/
	214
	215	#if defined(CONFIG_ARCH_DAVINCI) \|\| defined(CONFIG_ARCH_OMAP2430) \
fb9c58ed MM	216	\|\| defined(CONFIG_ARCH_OMAP3430) \|\| defined(CONFIG_BLACKFIN) \
fb9c58ed MM	217	\|\| defined(CONFIG_ARCH_OMAP4)
550a7375 FB	218	/* REVISIT indexed access seemed to
	219	* misbehave (on DaVinci) for at least peripheral IN ...
	220	*/
	221	#define MUSB_FLAT_REG
	222	#endif
	223
	224	/* TUSB mapping: "flat" plus ep0 special cases */
7c925546	225	#if defined(CONFIG_USB_MUSB_TUSB6010)
550a7375 FB	226	#define musb_ep_select(_mbase, _epnum) \
	227	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
	228	#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
	229
	230	/* "flat" mapping: each endpoint has its own i/o address */
	231	#elif defined(MUSB_FLAT_REG)
	232	#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
	233	#define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
	234
	235	/* "indexed" mapping: INDEX register controls register bank select */
	236	#else
	237	#define musb_ep_select(_mbase, _epnum) \
	238	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
	239	#define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
	240	#endif
	241
	242	/**************************** FUNCTIONS ******************************/
	243
	244	#define MUSB_HST_MODE(_musb)\
	245	{ (_musb)->is_host = true; }
	246	#define MUSB_DEV_MODE(_musb) \
	247	{ (_musb)->is_host = false; }
	248
	249	#define test_devctl_hst_mode(_x) \
	250	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
	251
	252	#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
	253
	254	/****************************** TYPES ***********************************/
	255
3ca8abb8 FB	256	/**
	257	* struct musb_platform_ops - Operations passed to musb_core by HW glue layer
	258	* @init: turns on clocks, sets up platform-specific registers, etc
	259	* @exit: undoes @init
3ca8abb8 FB	260	* @set_mode: forcefully changes operating mode
	261	* @try_ilde: tries to idle the IP
	262	* @vbus_status: returns vbus status if possible
	263	* @set_vbus: forces vbus status
	264	*/
	265	struct musb_platform_ops {
	266	int (init)(struct musb musb);
	267	int (exit)(struct musb musb);
	268
3ca8abb8 FB	269	void (enable)(struct musb musb);
	270	void (disable)(struct musb musb);
	271
	272	int (set_mode)(struct musb musb, u8 mode);
	273	void (try_idle)(struct musb musb, unsigned long timeout);
	274
	275	int (vbus_status)(struct musb musb);
	276	void (set_vbus)(struct musb musb, int on);
	277	};
	278
550a7375 FB	279	/*
	280	* struct musb_hw_ep - endpoint hardware (bidirectional)
	281	*
	282	* Ordered slightly for better cacheline locality.
	283	*/
	284	struct musb_hw_ep {
	285	struct musb *musb;
	286	void __iomem *fifo;
	287	void __iomem *regs;
	288
7c925546	289	#ifdef CONFIG_USB_MUSB_TUSB6010
550a7375 FB	290	void __iomem *conf;
	291	#endif
	292
	293	/* index in musb->endpoints[] */
	294	u8 epnum;
	295
	296	/* hardware configuration, possibly dynamic */
	297	bool is_shared_fifo;
	298	bool tx_double_buffered;
	299	bool rx_double_buffered;
	300	u16 max_packet_sz_tx;
	301	u16 max_packet_sz_rx;
	302
	303	struct dma_channel *tx_channel;
	304	struct dma_channel *rx_channel;
	305
7c925546	306	#ifdef CONFIG_USB_MUSB_TUSB6010
550a7375 FB	307	/* TUSB has "asynchronous" and "synchronous" dma modes */
	308	dma_addr_t fifo_async;
	309	dma_addr_t fifo_sync;
	310	void __iomem *fifo_sync_va;
	311	#endif
	312
	313	#ifdef CONFIG_USB_MUSB_HDRC_HCD
	314	void __iomem *target_regs;
	315
	316	/* currently scheduled peripheral endpoint */
	317	struct musb_qh *in_qh;
	318	struct musb_qh *out_qh;
	319
	320	u8 rx_reinit;
	321	u8 tx_reinit;
	322	#endif
	323
	324	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	325	/* peripheral side */
	326	struct musb_ep ep_in; /* TX */
	327	struct musb_ep ep_out; /* RX */
	328	#endif
	329	};
	330
	331	static inline struct usb_request next_in_request(struct musb_hw_ep hw_ep)
	332	{
	333	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	334	return next_request(&hw_ep->ep_in);
	335	#else
	336	return NULL;
	337	#endif
	338	}
	339
	340	static inline struct usb_request next_out_request(struct musb_hw_ep hw_ep)
	341	{
	342	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	343	return next_request(&hw_ep->ep_out);
	344	#else
	345	return NULL;
	346	#endif
	347	}
	348
7421107b FB	349	struct musb_csr_regs {
	350	/* FIFO registers */
	351	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	352	u16 rxfifoadd, txfifoadd;
	353	u8 txtype, txinterval, rxtype, rxinterval;
	354	u8 rxfifosz, txfifosz;
	355	u8 txfunaddr, txhubaddr, txhubport;
	356	u8 rxfunaddr, rxhubaddr, rxhubport;
	357	};
	358
	359	struct musb_context_registers {
	360
	361	#if defined(CONFIG_ARCH_OMAP2430) \|\| defined(CONFIG_ARCH_OMAP3) \|\| \
	362	defined(CONFIG_ARCH_OMAP4)
	363	u32 otg_sysconfig, otg_forcestandby;
	364	#endif
	365	u8 power;
	366	u16 intrtxe, intrrxe;
	367	u8 intrusbe;
	368	u16 frame;
	369	u8 index, testmode;
	370
	371	u8 devctl, busctl, misc;
	372
	373	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
	374	};
	375
550a7375 FB	376	/*
	377	* struct musb - Driver instance data.
	378	*/
	379	struct musb {
	380	/* device lock */
	381	spinlock_t lock;
743411b3 FB	382
743411b3 FB	383	const struct musb_platform_ops *ops;
7421107b	384	struct musb_context_registers context;
743411b3	385
550a7375 FB	386	irqreturn_t (isr)(int, void );
550a7375 FB	387	struct work_struct irq_work;
32c3b94e	388	u16 hwvers;
550a7375 FB	389
	390	/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
	391	#define MUSB_PORT_STAT_RESUME (1 << 31)
	392
	393	u32 port1_status;
	394
	395	#ifdef CONFIG_USB_MUSB_HDRC_HCD
	396	unsigned long rh_timer;
	397
	398	enum musb_h_ep0_state ep0_stage;
	399
	400	/* bulk traffic normally dedicates endpoint hardware, and each
	401	* direction has its own ring of host side endpoints.
	402	* we try to progress the transfer at the head of each endpoint's
	403	* queue until it completes or NAKs too much; then we try the next
	404	* endpoint.
	405	*/
	406	struct musb_hw_ep *bulk_ep;
	407
	408	struct list_head control; /* of musb_qh */
	409	struct list_head in_bulk; /* of musb_qh */
	410	struct list_head out_bulk; /* of musb_qh */
f7f9d63e DB	411
f7f9d63e DB	412	struct timer_list otg_timer;
550a7375	413	#endif
594632ef	414	struct notifier_block nb;
550a7375	415
550a7375 FB	416	struct dma_controller *dma_controller;
	417
	418	struct device *controller;
	419	void __iomem *ctrl_base;
	420	void __iomem *mregs;
	421
7c925546	422	#ifdef CONFIG_USB_MUSB_TUSB6010
550a7375 FB	423	dma_addr_t async;
	424	dma_addr_t sync;
	425	void __iomem *sync_va;
	426	#endif
	427
	428	/* passed down from chip/board specific irq handlers */
	429	u8 int_usb;
	430	u16 int_rx;
	431	u16 int_tx;
	432
84e250ff	433	struct otg_transceiver *xceiv;
550a7375 FB	434
550a7375 FB	435	int nIrq;
c48a5155	436	unsigned irq_wake:1;
550a7375 FB	437
	438	struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
	439	#define control_ep endpoints
	440
	441	#define VBUSERR_RETRY_COUNT 3
	442	u16 vbuserr_retry;
	443	u16 epmask;
	444	u8 nr_endpoints;
	445
	446	u8 board_mode; /* enum musb_mode */
	447	int (*board_set_power)(int state);
	448
550a7375 FB	449	u8 min_power; /* vbus for periph, in mA/2 */
	450
	451	bool is_host;
	452
	453	int a_wait_bcon; /* VBUS timeout in msecs */
	454	unsigned long idle_timeout; /* Next timeout in jiffies */
	455
	456	/* active means connected and not suspended */
	457	unsigned is_active:1;
	458
	459	unsigned is_multipoint:1;
	460	unsigned ignore_disconnect:1; /* during bus resets */
	461
a483d706 AKG	462	unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
a483d706 AKG	463	unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
51bf0d0e	464	unsigned dyn_fifo:1; /* dynamic FIFO supported? */
a483d706	465
7ed069c1	466	unsigned bulk_split:1;
550a7375	467	#define can_bulk_split(musb,type) \
7ed069c1	468	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
550a7375	469
7ed069c1	470	unsigned bulk_combine:1;
550a7375	471	#define can_bulk_combine(musb,type) \
7ed069c1	472	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
550a7375 FB	473
	474	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	475	/* is_suspended means USB B_PERIPHERAL suspend */
	476	unsigned is_suspended:1;
	477
	478	/* may_wakeup means remote wakeup is enabled */
	479	unsigned may_wakeup:1;
	480
	481	/* is_self_powered is reported in device status and the
	482	* config descriptor. is_bus_powered means B_PERIPHERAL
	483	* draws some VBUS current; both can be true.
	484	*/
	485	unsigned is_self_powered:1;
	486	unsigned is_bus_powered:1;
	487
	488	unsigned set_address:1;
	489	unsigned test_mode:1;
	490	unsigned softconnect:1;
	491
	492	u8 address;
	493	u8 test_mode_nr;
	494	u16 ackpend; /* ep0 */
	495	enum musb_g_ep0_state ep0_state;
	496	struct usb_gadget g; /* the gadget */
	497	struct usb_gadget_driver gadget_driver; / its driver */
	498	#endif
	499
ca6d1b13 FB	500	struct musb_hdrc_config *config;
ca6d1b13 FB	501
550a7375 FB	502	#ifdef MUSB_CONFIG_PROC_FS
	503	struct proc_dir_entry *proc_entry;
	504	#endif
	505	};
	506
550a7375 FB	507	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	508	static inline struct musb gadget_to_musb(struct usb_gadget g)
	509	{
	510	return container_of(g, struct musb, g);
	511	}
	512	#endif
	513
c6cf8b00 BW	514	#ifdef CONFIG_BLACKFIN
	515	static inline int musb_read_fifosize(struct musb *musb,
	516	struct musb_hw_ep *hw_ep, u8 epnum)
	517	{
	518	musb->nr_endpoints++;
	519	musb->epmask \|= (1 << epnum);
	520
	521	if (epnum < 5) {
	522	hw_ep->max_packet_sz_tx = 128;
	523	hw_ep->max_packet_sz_rx = 128;
	524	} else {
	525	hw_ep->max_packet_sz_tx = 1024;
	526	hw_ep->max_packet_sz_rx = 1024;
	527	}
	528	hw_ep->is_shared_fifo = false;
	529
	530	return 0;
	531	}
	532
	533	static inline void musb_configure_ep0(struct musb *musb)
	534	{
	535	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	536	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	537	musb->endpoints[0].is_shared_fifo = true;
	538	}
	539
	540	#else
	541
	542	static inline int musb_read_fifosize(struct musb *musb,
	543	struct musb_hw_ep *hw_ep, u8 epnum)
	544	{
32233716	545	void *mbase = musb->mregs;
c6cf8b00 BW	546	u8 reg = 0;
	547
	548	/* read from core using indexed model */
32233716	549	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
c6cf8b00 BW	550	/* 0's returned when no more endpoints */
	551	if (!reg)
	552	return -ENODEV;
	553
	554	musb->nr_endpoints++;
	555	musb->epmask \|= (1 << epnum);
	556
	557	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
	558
	559	/* shared TX/RX FIFO? */
	560	if ((reg & 0xf0) == 0xf0) {
	561	hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
	562	hw_ep->is_shared_fifo = true;
	563	return 0;
	564	} else {
	565	hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
	566	hw_ep->is_shared_fifo = false;
	567	}
	568
	569	return 0;
	570	}
	571
	572	static inline void musb_configure_ep0(struct musb *musb)
	573	{
	574	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	575	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
32233716	576	musb->endpoints[0].is_shared_fifo = true;
c6cf8b00 BW	577	}
	578	#endif /* CONFIG_BLACKFIN */
	579
550a7375 FB	580
	581	/*************************** Glue it together ***************************/
	582
	583	extern const char musb_driver_name[];
	584
	585	extern void musb_start(struct musb *musb);
	586	extern void musb_stop(struct musb *musb);
	587
	588	extern void musb_write_fifo(struct musb_hw_ep ep, u16 len, const u8 src);
	589	extern void musb_read_fifo(struct musb_hw_ep ep, u16 len, u8 dst);
	590
	591	extern void musb_load_testpacket(struct musb *);
	592
	593	extern irqreturn_t musb_interrupt(struct musb *);
	594
550a7375 FB	595	extern void musb_hnp_stop(struct musb *musb);
550a7375 FB	596
743411b3 FB	597	static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
	598	{
	599	if (musb->ops->set_vbus)
	600	musb->ops->set_vbus(musb, is_on);
	601	}
	602
	603	static inline void musb_platform_enable(struct musb *musb)
	604	{
	605	if (musb->ops->enable)
	606	musb->ops->enable(musb);
	607	}
	608
	609	static inline void musb_platform_disable(struct musb *musb)
	610	{
	611	if (musb->ops->disable)
	612	musb->ops->disable(musb);
	613	}
	614
	615	static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
	616	{
	617	if (!musb->ops->set_mode)
	618	return 0;
	619
	620	return musb->ops->set_mode(musb, mode);
	621	}
	622
	623	static inline void musb_platform_try_idle(struct musb *musb,
	624	unsigned long timeout)
	625	{
	626	if (musb->ops->try_idle)
	627	musb->ops->try_idle(musb, timeout);
	628	}
	629
	630	static inline int musb_platform_get_vbus_status(struct musb *musb)
	631	{
	632	if (!musb->ops->vbus_status)
	633	return 0;
	634
	635	return musb->ops->vbus_status(musb);
	636	}
	637
	638	static inline int musb_platform_init(struct musb *musb)
	639	{
	640	if (!musb->ops->init)
	641	return -EINVAL;
	642
	643	return musb->ops->init(musb);
	644	}
	645
	646	static inline int musb_platform_exit(struct musb *musb)
	647	{
	648	if (!musb->ops->exit)
	649	return -EINVAL;
	650
	651	return musb->ops->exit(musb);
	652	}
	653
550a7375	654	#endif /* __MUSB_CORE_H__ */