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Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / drivers / usb / misc / sisusbvga / sisusb_init.c
CommitLineData
1bbb4f20
TW		 1/*
2 * sisusb - usb kernel driver for SiS315(E) based USB2VGA dongles
3 *
4 * Display mode initializing code
5 *
6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 *
8 * If distributed as part of the Linux kernel, this code is licensed under the
9 * terms of the GPL v2.
10 *
11 * Otherwise, the following license terms apply:
12 *
13 * * Redistribution and use in source and binary forms, with or without
14 * * modification, are permitted provided that the following conditions
15 * * are met:
16 * * 1) Redistributions of source code must retain the above copyright
17 * * notice, this list of conditions and the following disclaimer.
18 * * 2) Redistributions in binary form must reproduce the above copyright
19 * * notice, this list of conditions and the following disclaimer in the
20 * * documentation and/or other materials provided with the distribution.
21 * * 3) The name of the author may not be used to endorse or promote products
22 * * derived from this software without specific prior written permission.
23 * *
24 * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25 * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26 * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33 * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
ed86d970 35 * Author: Thomas Winischhofer <thomas@winischhofer.net>
1bbb4f20
TW		 36 *
37 */
38
1bbb4f20
TW		 39#include <linux/module.h>
40#include <linux/kernel.h>
41#include <linux/errno.h>
42#include <linux/poll.h>
43#include <linux/init.h>
44#include <linux/slab.h>
45#include <linux/spinlock.h>
1bbb4f20
TW		 46
47#include "sisusb.h"
48
49#ifdef INCL_SISUSB_CON
50
51#include "sisusb_init.h"
52
53/*********************************************/
54/* POINTER INITIALIZATION */
55/*********************************************/
56
22b2c526 57static void SiSUSB_InitPtr(struct SiS_Private *SiS_Pr)
1bbb4f20 58{
22b2c526
FB		 59 SiS_Pr->SiS_ModeResInfo = SiSUSB_ModeResInfo;
60 SiS_Pr->SiS_StandTable = SiSUSB_StandTable;
1bbb4f20 61
22b2c526
FB		 62 SiS_Pr->SiS_SModeIDTable = SiSUSB_SModeIDTable;
63 SiS_Pr->SiS_EModeIDTable = SiSUSB_EModeIDTable;
64 SiS_Pr->SiS_RefIndex = SiSUSB_RefIndex;
65 SiS_Pr->SiS_CRT1Table = SiSUSB_CRT1Table;
1bbb4f20 66
22b2c526 67 SiS_Pr->SiS_VCLKData = SiSUSB_VCLKData;
1bbb4f20
TW		 68}
69
1bbb4f20
TW		 70/*********************************************/
71/* HELPER: SetReg, GetReg */
72/*********************************************/
73
74static void
75SiS_SetReg(struct SiS_Private *SiS_Pr, unsigned long port,
22b2c526 76 unsigned short index, unsigned short data)
1bbb4f20
TW		 77{
78 sisusb_setidxreg(SiS_Pr->sisusb, port, index, data);
79}
80
81static void
82SiS_SetRegByte(struct SiS_Private *SiS_Pr, unsigned long port,
22b2c526 83 unsigned short data)
1bbb4f20
TW		 84{
85 sisusb_setreg(SiS_Pr->sisusb, port, data);
86}
87
88static unsigned char
22b2c526 89SiS_GetReg(struct SiS_Private *SiS_Pr, unsigned long port, unsigned short index)
1bbb4f20
TW		 90{
91 u8 data;
92
93 sisusb_getidxreg(SiS_Pr->sisusb, port, index, &data);
94
95 return data;
96}
97
98static unsigned char
99SiS_GetRegByte(struct SiS_Private *SiS_Pr, unsigned long port)
100{
101 u8 data;
102
103 sisusb_getreg(SiS_Pr->sisusb, port, &data);
104
105 return data;
106}
107
108static void
109SiS_SetRegANDOR(struct SiS_Private *SiS_Pr, unsigned long port,
22b2c526
FB		 110 unsigned short index, unsigned short DataAND,
111 unsigned short DataOR)
1bbb4f20
TW		 112{
113 sisusb_setidxregandor(SiS_Pr->sisusb, port, index, DataAND, DataOR);
114}
115
116static void
117SiS_SetRegAND(struct SiS_Private *SiS_Pr, unsigned long port,
22b2c526 118 unsigned short index, unsigned short DataAND)
1bbb4f20
TW		 119{
120 sisusb_setidxregand(SiS_Pr->sisusb, port, index, DataAND);
121}
122
123static void
22b2c526
FB		 124SiS_SetRegOR(struct SiS_Private *SiS_Pr, unsigned long port,
125 unsigned short index, unsigned short DataOR)
1bbb4f20
TW		 126{
127 sisusb_setidxregor(SiS_Pr->sisusb, port, index, DataOR);
128}
129
130/*********************************************/
131/* HELPER: DisplayOn, DisplayOff */
132/*********************************************/
133
22b2c526 134static void SiS_DisplayOn(struct SiS_Private *SiS_Pr)
1bbb4f20
TW		 135{
136 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x01, 0xDF);
137}
138
139/*********************************************/
140/* HELPER: Init Port Addresses */
141/*********************************************/
142
22b2c526 143static void SiSUSBRegInit(struct SiS_Private *SiS_Pr, unsigned long BaseAddr)
1bbb4f20
TW		 144{
145 SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
146 SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
147 SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
148 SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
149 SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
150 SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
151 SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
152 SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
153 SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
154 SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
155 SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
156 SiS_Pr->SiS_P3cc = BaseAddr + 0x1c;
157 SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
158 SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
159 SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
160}
161
162/*********************************************/
163/* HELPER: GetSysFlags */
164/*********************************************/
165
22b2c526 166static void SiS_GetSysFlags(struct SiS_Private *SiS_Pr)
1bbb4f20
TW		 167{
168 SiS_Pr->SiS_MyCR63 = 0x63;
169}
170
171/*********************************************/
172/* HELPER: Init PCI & Engines */
173/*********************************************/
174
22b2c526 175static void SiSInitPCIetc(struct SiS_Private *SiS_Pr)
1bbb4f20
TW		 176{
177 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x20, 0xa1);
178 /* - Enable 2D (0x40)
179 * - Enable 3D (0x02)
180 * - Enable 3D vertex command fetch (0x10)
181 * - Enable 3D command parser (0x08)
182 * - Enable 3D G/L transformation engine (0x80)
183 */
184 SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1E, 0xDA);
185}
186
187/*********************************************/
188/* HELPER: SET SEGMENT REGISTERS */
189/*********************************************/
190
22b2c526 191static void SiS_SetSegRegLower(struct SiS_Private *SiS_Pr, unsigned short value)
1bbb4f20
TW		 192{
193 unsigned short temp;
194
195 value &= 0x00ff;
196 temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb) & 0xf0;
197 temp |= (value >> 4);
198 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb, temp);
199 temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd) & 0xf0;
200 temp |= (value & 0x0f);
201 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd, temp);
202}
203
22b2c526 204static void SiS_SetSegRegUpper(struct SiS_Private *SiS_Pr, unsigned short value)
1bbb4f20
TW		 205{
206 unsigned short temp;
207
208 value &= 0x00ff;
209 temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb) & 0x0f;
210 temp |= (value & 0xf0);
211 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb, temp);
212 temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd) & 0x0f;
213 temp |= (value << 4);
214 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd, temp);
215}
216
22b2c526 217static void SiS_SetSegmentReg(struct SiS_Private *SiS_Pr, unsigned short value)
1bbb4f20
TW		 218{
219 SiS_SetSegRegLower(SiS_Pr, value);
220 SiS_SetSegRegUpper(SiS_Pr, value);
221}
222
22b2c526 223static void SiS_ResetSegmentReg(struct SiS_Private *SiS_Pr)
1bbb4f20
TW		 224{
225 SiS_SetSegmentReg(SiS_Pr, 0);
226}
227
228static void
229SiS_SetSegmentRegOver(struct SiS_Private *SiS_Pr, unsigned short value)
230{
231 unsigned short temp = value >> 8;
232
233 temp &= 0x07;
234 temp |= (temp << 4);
235 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1d, temp);
236 SiS_SetSegmentReg(SiS_Pr, value);
237}
238
22b2c526 239static void SiS_ResetSegmentRegOver(struct SiS_Private *SiS_Pr)
1bbb4f20
TW		 240{
241 SiS_SetSegmentRegOver(SiS_Pr, 0);
242}
243
22b2c526 244static void SiS_ResetSegmentRegisters(struct SiS_Private *SiS_Pr)
1bbb4f20
TW		 245{
246 SiS_ResetSegmentReg(SiS_Pr);
247 SiS_ResetSegmentRegOver(SiS_Pr);
248}
249
250/*********************************************/
251/* HELPER: SearchModeID */
252/*********************************************/
253
254static int
255SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
22b2c526 256 unsigned short *ModeIdIndex)
1bbb4f20
TW		 257{
258 if ((*ModeNo) <= 0x13) {
259
260 if ((*ModeNo) != 0x03)
261 return 0;
262
263 (*ModeIdIndex) = 0;
264
265 } else {
266
22b2c526 267 for (*ModeIdIndex = 0;; (*ModeIdIndex)++) {
1bbb4f20 268
22b2c526
FB		 269 if (SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID ==
270 (*ModeNo))
1bbb4f20
TW		 271 break;
272
22b2c526
FB		 273 if (SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID ==
274 0xFF)
1bbb4f20
TW		 275 return 0;
276 }
277
278 }
279
280 return 1;
281}
282
283/*********************************************/
284/* HELPER: ENABLE CRT1 */
285/*********************************************/
286
22b2c526 287static void SiS_HandleCRT1(struct SiS_Private *SiS_Pr)
1bbb4f20
TW		 288{
289 /* Enable CRT1 gating */
290 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3d4, SiS_Pr->SiS_MyCR63, 0xbf);
291}
292
293/*********************************************/
294/* HELPER: GetColorDepth */
295/*********************************************/
296
297static unsigned short
298SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
22b2c526 299 unsigned short ModeIdIndex)
1bbb4f20 300{
22b2c526 301 static const unsigned short ColorDepth[6] = { 1, 2, 4, 4, 6, 8 };
1bbb4f20
TW		 302 unsigned short modeflag;
303 short index;
304
305 if (ModeNo <= 0x13) {
306 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
307 } else {
308 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
309 }
310
311 index = (modeflag & ModeTypeMask) - ModeEGA;
22b2c526
FB		 312 if (index < 0)
313 index = 0;
1bbb4f20
TW		 314 return ColorDepth[index];
315}
316
317/*********************************************/
318/* HELPER: GetOffset */
319/*********************************************/
320
321static unsigned short
322SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
22b2c526 323 unsigned short ModeIdIndex, unsigned short rrti)
1bbb4f20
TW		 324{
325 unsigned short xres, temp, colordepth, infoflag;
326
327 infoflag = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag;
328 xres = SiS_Pr->SiS_RefIndex[rrti].XRes;
329
330 colordepth = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex);
331
332 temp = xres / 16;
333
334 if (infoflag & InterlaceMode)
335 temp <<= 1;
336
337 temp *= colordepth;
338
339 if (xres % 16)
340 temp += (colordepth >> 1);
341
342 return temp;
343}
344
345/*********************************************/
346/* SEQ */
347/*********************************************/
348
349static void
350SiS_SetSeqRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
351{
352 unsigned char SRdata;
353 int i;
354
355 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x00, 0x03);
356
357 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20;
358 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x01, SRdata);
359
22b2c526
FB		 360 for (i = 2; i <= 4; i++) {
361 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1];
1bbb4f20
TW		 362 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, i, SRdata);
363 }
364}
365
366/*********************************************/
367/* MISC */
368/*********************************************/
369
370static void
371SiS_SetMiscRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
372{
373 unsigned char Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
374
375 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c2, Miscdata);
376}
377
378/*********************************************/
379/* CRTC */
380/*********************************************/
381
382static void
383SiS_SetCRTCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
384{
385 unsigned char CRTCdata;
386 unsigned short i;
387
388 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3d4, 0x11, 0x7f);
389
22b2c526 390 for (i = 0; i <= 0x18; i++) {
1bbb4f20
TW		 391 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
392 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, i, CRTCdata);
393 }
394}
395
396/*********************************************/
397/* ATT */
398/*********************************************/
399
400static void
401SiS_SetATTRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
402{
403 unsigned char ARdata;
404 unsigned short i;
405
22b2c526 406 for (i = 0; i <= 0x13; i++) {
1bbb4f20
TW		 407 ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
408 SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
409 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, i);
410 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, ARdata);
411 }
412 SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
413 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, 0x14);
414 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, 0x00);
415
416 SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
417 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, 0x20);
418 SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
419}
420
421/*********************************************/
422/* GRC */
423/*********************************************/
424
425static void
426SiS_SetGRCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
427{
428 unsigned char GRdata;
429 unsigned short i;
430
22b2c526 431 for (i = 0; i <= 0x08; i++) {
1bbb4f20
TW		 432 GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
433 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3ce, i, GRdata);
434 }
435
436 if (SiS_Pr->SiS_ModeType > ModeVGA) {
437 /* 256 color disable */
438 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3ce, 0x05, 0xBF);
439 }
440}
441
442/*********************************************/
443/* CLEAR EXTENDED REGISTERS */
444/*********************************************/
445
22b2c526 446static void SiS_ClearExt1Regs(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1bbb4f20
TW		 447{
448 int i;
449
22b2c526 450 for (i = 0x0A; i <= 0x0E; i++) {
1bbb4f20
TW		 451 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, i, 0x00);
452 }
453
454 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x37, 0xFE);
455}
456
457/*********************************************/
458/* Get rate index */
459/*********************************************/
460
461static unsigned short
462SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
22b2c526 463 unsigned short ModeIdIndex)
1bbb4f20
TW		 464{
465 unsigned short rrti, i, index, temp;
466
467 if (ModeNo <= 0x13)
468 return 0xFFFF;
469
22b2c526
FB		 470 index = SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x33) & 0x0F;
471 if (index > 0)
472 index--;
1bbb4f20
TW		 473
474 rrti = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
475 ModeNo = SiS_Pr->SiS_RefIndex[rrti].ModeID;
476
477 i = 0;
478 do {
479 if (SiS_Pr->SiS_RefIndex[rrti + i].ModeID != ModeNo)
480 break;
481
22b2c526
FB		 482 temp =
483 SiS_Pr->SiS_RefIndex[rrti + i].Ext_InfoFlag & ModeTypeMask;
1bbb4f20
TW		 484 if (temp < SiS_Pr->SiS_ModeType)
485 break;
486
487 i++;
488 index--;
22b2c526 489 } while (index != 0xFFFF);
1bbb4f20
TW		 490
491 i--;
492
493 return (rrti + i);
494}
495
496/*********************************************/
497/* SYNC */
498/*********************************************/
499
22b2c526 500static void SiS_SetCRT1Sync(struct SiS_Private *SiS_Pr, unsigned short rrti)
1bbb4f20
TW		 501{
502 unsigned short sync = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag >> 8;
503 sync &= 0xC0;
504 sync |= 0x2f;
505 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c2, sync);
506}
507
508/*********************************************/
509/* CRTC/2 */
510/*********************************************/
511
512static void
513SiS_SetCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
22b2c526 514 unsigned short ModeIdIndex, unsigned short rrti)
1bbb4f20 515{
22b2c526 516 unsigned char index;
1bbb4f20
TW		 517 unsigned short temp, i, j, modeflag;
518
22b2c526 519 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3d4, 0x11, 0x7f);
1bbb4f20
TW		 520
521 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
522
523 index = SiS_Pr->SiS_RefIndex[rrti].Ext_CRT1CRTC;
524
22b2c526 525 for (i = 0, j = 0; i <= 7; i++, j++) {
1bbb4f20 526 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, j,
22b2c526 527 SiS_Pr->SiS_CRT1Table[index].CR[i]);
1bbb4f20 528 }
22b2c526 529 for (j = 0x10; i <= 10; i++, j++) {
1bbb4f20 530 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, j,
22b2c526 531 SiS_Pr->SiS_CRT1Table[index].CR[i]);
1bbb4f20 532 }
22b2c526 533 for (j = 0x15; i <= 12; i++, j++) {
1bbb4f20 534 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, j,
22b2c526 535 SiS_Pr->SiS_CRT1Table[index].CR[i]);
1bbb4f20 536 }
22b2c526 537 for (j = 0x0A; i <= 15; i++, j++) {
1bbb4f20 538 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, j,
22b2c526 539 SiS_Pr->SiS_CRT1Table[index].CR[i]);
1bbb4f20
TW		 540 }
541
542 temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0;
22b2c526 543 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0E, temp);
1bbb4f20
TW		 544
545 temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5;
22b2c526
FB		 546 if (modeflag & DoubleScanMode)
547 temp |= 0x80;
1bbb4f20
TW		 548 SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3d4, 0x09, 0x5F, temp);
549
550 if (SiS_Pr->SiS_ModeType > ModeVGA)
551 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x14, 0x4F);
552}
553
554/*********************************************/
555/* OFFSET & PITCH */
556/*********************************************/
557/* (partly overruled by SetPitch() in XF86) */
558/*********************************************/
559
560static void
561SiS_SetCRT1Offset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
22b2c526 562 unsigned short ModeIdIndex, unsigned short rrti)
1bbb4f20
TW		 563{
564 unsigned short du = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, rrti);
22b2c526 565 unsigned short infoflag = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag;
1bbb4f20
TW		 566 unsigned short temp;
567
568 temp = (du >> 8) & 0x0f;
569 SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0E, 0xF0, temp);
570
571 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x13, (du & 0xFF));
572
22b2c526
FB		 573 if (infoflag & InterlaceMode)
574 du >>= 1;
1bbb4f20
TW		 575
576 du <<= 5;
577 temp = (du >> 8) & 0xff;
22b2c526
FB		 578 if (du & 0xff)
579 temp++;
1bbb4f20
TW		 580 temp++;
581 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x10, temp);
582}
583
584/*********************************************/
585/* VCLK */
586/*********************************************/
587
588static void
589SiS_SetCRT1VCLK(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
22b2c526 590 unsigned short rrti)
1bbb4f20
TW		 591{
592 unsigned short index = SiS_Pr->SiS_RefIndex[rrti].Ext_CRTVCLK;
593 unsigned short clka = SiS_Pr->SiS_VCLKData[index].SR2B;
594 unsigned short clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
595
22b2c526 596 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x31, 0xCF);
1bbb4f20 597
22b2c526
FB		 598 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x2B, clka);
599 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x2C, clkb);
600 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x2D, 0x01);
1bbb4f20
TW		 601}
602
603/*********************************************/
604/* FIFO */
605/*********************************************/
606
607static void
608SiS_SetCRT1FIFO_310(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
22b2c526 609 unsigned short mi)
1bbb4f20
TW		 610{
611 unsigned short modeflag = SiS_Pr->SiS_EModeIDTable[mi].Ext_ModeFlag;
612
613 /* disable auto-threshold */
614 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x3D, 0xFE);
615
616 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x08, 0xAE);
617 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x09, 0xF0);
618
619 if (ModeNo <= 0x13)
620 return;
621
622 if ((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
623 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x08, 0x34);
624 SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x3D, 0x01);
625 }
626}
627
628/*********************************************/
629/* MODE REGISTERS */
630/*********************************************/
631
632static void
633SiS_SetVCLKState(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
22b2c526 634 unsigned short rrti)
1bbb4f20
TW		 635{
636 unsigned short data = 0, VCLK = 0, index = 0;
637
638 if (ModeNo > 0x13) {
639 index = SiS_Pr->SiS_RefIndex[rrti].Ext_CRTVCLK;
640 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
641 }
642
22b2c526
FB		 643 if (VCLK >= 166)
644 data |= 0x0c;
1bbb4f20
TW		 645 SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x32, 0xf3, data);
646
647 if (VCLK >= 166)
648 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1f, 0xe7);
649
650 /* DAC speed */
651 data = 0x03;
652 if (VCLK >= 260)
653 data = 0x00;
654 else if (VCLK >= 160)
655 data = 0x01;
656 else if (VCLK >= 135)
657 data = 0x02;
658
659 SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x07, 0xF8, data);
660}
661
662static void
663SiS_SetCRT1ModeRegs(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
22b2c526 664 unsigned short ModeIdIndex, unsigned short rrti)
1bbb4f20
TW		 665{
666 unsigned short data, infoflag = 0, modeflag;
667
668 if (ModeNo <= 0x13)
669 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
670 else {
671 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
672 infoflag = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag;
673 }
674
675 /* Disable DPMS */
676 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1F, 0x3F);
677
678 data = 0;
679 if (ModeNo > 0x13) {
680 if (SiS_Pr->SiS_ModeType > ModeEGA) {
681 data |= 0x02;
682 data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
683 }
22b2c526
FB		 684 if (infoflag & InterlaceMode)
685 data |= 0x20;
1bbb4f20
TW		 686 }
687 SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x06, 0xC0, data);
688
689 data = 0;
690 if (infoflag & InterlaceMode) {
691 /* data = (Hsync / 8) - ((Htotal / 8) / 2) + 3 */
22b2c526
FB		 692 unsigned short hrs =
693 (SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x04) |
694 ((SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0b) & 0xc0) << 2))
695 - 3;
696 unsigned short hto =
697 (SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x00) |
698 ((SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0b) & 0x03) << 8))
699 + 5;
1bbb4f20
TW		 700 data = hrs - (hto >> 1) + 3;
701 }
702 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x19, (data & 0xFF));
703 SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3d4, 0x1a, 0xFC, (data >> 8));
704
705 if (modeflag & HalfDCLK)
706 SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x01, 0x08);
707
708 data = 0;
709 if (modeflag & LineCompareOff)
710 data = 0x08;
711 SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0F, 0xB7, data);
712
713 if ((SiS_Pr->SiS_ModeType == ModeEGA) && (ModeNo > 0x13))
714 SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0F, 0x40);
715
716 SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x31, 0xfb);
717
718 data = 0x60;
719 if (SiS_Pr->SiS_ModeType != ModeText) {
720 data ^= 0x60;
721 if (SiS_Pr->SiS_ModeType != ModeEGA)
722 data ^= 0xA0;
723 }
724 SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x21, 0x1F, data);
725
726 SiS_SetVCLKState(SiS_Pr, ModeNo, rrti);
727
728 if (SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x31) & 0x40)
729 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x52, 0x2c);
730 else
731 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x52, 0x6c);
732}
733
734/*********************************************/
735/* LOAD DAC */
736/*********************************************/
737
738static void
739SiS_WriteDAC(struct SiS_Private *SiS_Pr, unsigned long DACData,
22b2c526
FB		 740 unsigned short shiftflag, unsigned short dl, unsigned short ah,
741 unsigned short al, unsigned short dh)
1bbb4f20
TW		 742{
743 unsigned short d1, d2, d3;
744
745 switch (dl) {
22b2c526
FB		 746 case 0:
747 d1 = dh;
748 d2 = ah;
749 d3 = al;
750 break;
751 case 1:
752 d1 = ah;
753 d2 = al;
754 d3 = dh;
755 break;
756 default:
757 d1 = al;
758 d2 = dh;
759 d3 = ah;
1bbb4f20
TW		 760 }
761 SiS_SetRegByte(SiS_Pr, DACData, (d1 << shiftflag));
762 SiS_SetRegByte(SiS_Pr, DACData, (d2 << shiftflag));
763 SiS_SetRegByte(SiS_Pr, DACData, (d3 << shiftflag));
764}
765
766static void
22b2c526
FB		 767SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
768 unsigned short mi)
1bbb4f20
TW		 769{
770 unsigned short data, data2, time, i, j, k, m, n, o;
771 unsigned short si, di, bx, sf;
772 unsigned long DACAddr, DACData;
773 const unsigned char *table = NULL;
774
775 if (ModeNo < 0x13)
776 data = SiS_Pr->SiS_SModeIDTable[mi].St_ModeFlag;
777 else
778 data = SiS_Pr->SiS_EModeIDTable[mi].Ext_ModeFlag;
779
780 data &= DACInfoFlag;
781
782 j = time = 64;
783 if (data == 0x00)
784 table = SiS_MDA_DAC;
785 else if (data == 0x08)
786 table = SiS_CGA_DAC;
787 else if (data == 0x10)
788 table = SiS_EGA_DAC;
789 else {
790 j = 16;
791 time = 256;
792 table = SiS_VGA_DAC;
793 }
794
795 DACAddr = SiS_Pr->SiS_P3c8;
796 DACData = SiS_Pr->SiS_P3c9;
797 sf = 0;
798 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c6, 0xFF);
799
800 SiS_SetRegByte(SiS_Pr, DACAddr, 0x00);
801
22b2c526 802 for (i = 0; i < j; i++) {
1bbb4f20 803 data = table[i];
22b2c526 804 for (k = 0; k < 3; k++) {
1bbb4f20 805 data2 = 0;
22b2c526
FB		 806 if (data & 0x01)
807 data2 += 0x2A;
808 if (data & 0x02)
809 data2 += 0x15;
1bbb4f20
TW		 810 SiS_SetRegByte(SiS_Pr, DACData, (data2 << sf));
811 data >>= 2;
812 }
813 }
814
815 if (time == 256) {
22b2c526 816 for (i = 16; i < 32; i++) {
1bbb4f20 817 data = table[i] << sf;
22b2c526 818 for (k = 0; k < 3; k++)
1bbb4f20
TW		 819 SiS_SetRegByte(SiS_Pr, DACData, data);
820 }
821 si = 32;
22b2c526 822 for (m = 0; m < 9; m++) {
1bbb4f20
TW		 823 di = si;
824 bx = si + 4;
22b2c526
FB		 825 for (n = 0; n < 3; n++) {
826 for (o = 0; o < 5; o++) {
1bbb4f20 827 SiS_WriteDAC(SiS_Pr, DACData, sf, n,
22b2c526
FB		 828 table[di], table[bx],
829 table[si]);
1bbb4f20
TW		 830 si++;
831 }
832 si -= 2;
22b2c526 833 for (o = 0; o < 3; o++) {
1bbb4f20 834 SiS_WriteDAC(SiS_Pr, DACData, sf, n,
22b2c526
FB		 835 table[di], table[si],
836 table[bx]);
1bbb4f20
TW		 837 si--;
838 }
839 }
22b2c526 840 si += 5;
1bbb4f20
TW		 841 }
842 }
843}
844
845/*********************************************/
846/* SET CRT1 REGISTER GROUP */
847/*********************************************/
848
849static void
850SiS_SetCRT1Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
22b2c526 851 unsigned short ModeIdIndex)
1bbb4f20
TW		 852{
853 unsigned short StandTableIndex, rrti;
854
855 SiS_Pr->SiS_CRT1Mode = ModeNo;
856
857 if (ModeNo <= 0x13)
858 StandTableIndex = 0;
859 else
860 StandTableIndex = 1;
861
862 SiS_ResetSegmentRegisters(SiS_Pr);
863 SiS_SetSeqRegs(SiS_Pr, StandTableIndex);
864 SiS_SetMiscRegs(SiS_Pr, StandTableIndex);
865 SiS_SetCRTCRegs(SiS_Pr, StandTableIndex);
866 SiS_SetATTRegs(SiS_Pr, StandTableIndex);
867 SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
868 SiS_ClearExt1Regs(SiS_Pr, ModeNo);
869
870 rrti = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
871
872 if (rrti != 0xFFFF) {
873 SiS_SetCRT1Sync(SiS_Pr, rrti);
874 SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, rrti);
875 SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, rrti);
876 SiS_SetCRT1VCLK(SiS_Pr, ModeNo, rrti);
877 }
878
879 SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex);
880
881 SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, rrti);
882
883 SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex);
884
885 SiS_DisplayOn(SiS_Pr);
886}
887
888/*********************************************/
889/* SiSSetMode() */
890/*********************************************/
891
22b2c526 892int SiSUSBSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1bbb4f20
TW		 893{
894 unsigned short ModeIdIndex;
22b2c526 895 unsigned long BaseAddr = SiS_Pr->IOAddress;
1bbb4f20
TW		 896
897 SiSUSB_InitPtr(SiS_Pr);
898 SiSUSBRegInit(SiS_Pr, BaseAddr);
899 SiS_GetSysFlags(SiS_Pr);
900
901 if (!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex)))
902 return 0;
903
904 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x05, 0x86);
905
906 SiSInitPCIetc(SiS_Pr);
907
908 ModeNo &= 0x7f;
909
910 SiS_Pr->SiS_ModeType =
22b2c526 911 SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag & ModeTypeMask;
1bbb4f20
TW		 912
913 SiS_Pr->SiS_SetFlag = LowModeTests;
914
915 /* Set mode on CRT1 */
916 SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
917
918 SiS_HandleCRT1(SiS_Pr);
919
920 SiS_DisplayOn(SiS_Pr);
921 SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c6, 0xFF);
922
923 /* Store mode number */
924 SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x34, ModeNo);
925
926 return 1;
927}
928
22b2c526 929int SiSUSBSetVESAMode(struct SiS_Private *SiS_Pr, unsigned short VModeNo)
1bbb4f20
TW		 930{
931 unsigned short ModeNo = 0;
932 int i;
933
934 SiSUSB_InitPtr(SiS_Pr);
935
936 if (VModeNo == 0x03) {
937
938 ModeNo = 0x03;
939
940 } else {
941
942 i = 0;
943 do {
944
945 if (SiS_Pr->SiS_EModeIDTable[i].Ext_VESAID == VModeNo) {
946 ModeNo = SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID;
947 break;
948 }
949
950 } while (SiS_Pr->SiS_EModeIDTable[i++].Ext_ModeID != 0xff);
951
952 }
953
954 if (!ModeNo)
955 return 0;
956
957 return SiSUSBSetMode(SiS_Pr, ModeNo);
958}
959
960#endif /* INCL_SISUSB_CON */