Commit | Line | Data |
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66d4eadd SS |
1 | /* |
2 | * xHCI host controller driver | |
3 | * | |
4 | * Copyright (C) 2008 Intel Corp. | |
5 | * | |
6 | * Author: Sarah Sharp | |
7 | * Some code borrowed from the Linux EHCI driver. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | * for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software Foundation, | |
20 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/irq.h> | |
24 | #include <linux/module.h> | |
25 | ||
26 | #include "xhci.h" | |
27 | ||
28 | #define DRIVER_AUTHOR "Sarah Sharp" | |
29 | #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver" | |
30 | ||
31 | /* TODO: copied from ehci-hcd.c - can this be refactored? */ | |
32 | /* | |
33 | * handshake - spin reading hc until handshake completes or fails | |
34 | * @ptr: address of hc register to be read | |
35 | * @mask: bits to look at in result of read | |
36 | * @done: value of those bits when handshake succeeds | |
37 | * @usec: timeout in microseconds | |
38 | * | |
39 | * Returns negative errno, or zero on success | |
40 | * | |
41 | * Success happens when the "mask" bits have the specified value (hardware | |
42 | * handshake done). There are two failure modes: "usec" have passed (major | |
43 | * hardware flakeout), or the register reads as all-ones (hardware removed). | |
44 | */ | |
45 | static int handshake(struct xhci_hcd *xhci, void __iomem *ptr, | |
46 | u32 mask, u32 done, int usec) | |
47 | { | |
48 | u32 result; | |
49 | ||
50 | do { | |
51 | result = xhci_readl(xhci, ptr); | |
52 | if (result == ~(u32)0) /* card removed */ | |
53 | return -ENODEV; | |
54 | result &= mask; | |
55 | if (result == done) | |
56 | return 0; | |
57 | udelay(1); | |
58 | usec--; | |
59 | } while (usec > 0); | |
60 | return -ETIMEDOUT; | |
61 | } | |
62 | ||
63 | /* | |
64 | * Force HC into halt state. | |
65 | * | |
66 | * Disable any IRQs and clear the run/stop bit. | |
67 | * HC will complete any current and actively pipelined transactions, and | |
68 | * should halt within 16 microframes of the run/stop bit being cleared. | |
69 | * Read HC Halted bit in the status register to see when the HC is finished. | |
70 | * XXX: shouldn't we set HC_STATE_HALT here somewhere? | |
71 | */ | |
72 | int xhci_halt(struct xhci_hcd *xhci) | |
73 | { | |
74 | u32 halted; | |
75 | u32 cmd; | |
76 | u32 mask; | |
77 | ||
78 | xhci_dbg(xhci, "// Halt the HC\n"); | |
79 | /* Disable all interrupts from the host controller */ | |
80 | mask = ~(XHCI_IRQS); | |
81 | halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT; | |
82 | if (!halted) | |
83 | mask &= ~CMD_RUN; | |
84 | ||
85 | cmd = xhci_readl(xhci, &xhci->op_regs->command); | |
86 | cmd &= mask; | |
87 | xhci_writel(xhci, cmd, &xhci->op_regs->command); | |
88 | ||
89 | return handshake(xhci, &xhci->op_regs->status, | |
90 | STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC); | |
91 | } | |
92 | ||
93 | /* | |
94 | * Reset a halted HC, and set the internal HC state to HC_STATE_HALT. | |
95 | * | |
96 | * This resets pipelines, timers, counters, state machines, etc. | |
97 | * Transactions will be terminated immediately, and operational registers | |
98 | * will be set to their defaults. | |
99 | */ | |
100 | int xhci_reset(struct xhci_hcd *xhci) | |
101 | { | |
102 | u32 command; | |
103 | u32 state; | |
104 | ||
105 | state = xhci_readl(xhci, &xhci->op_regs->status); | |
106 | BUG_ON((state & STS_HALT) == 0); | |
107 | ||
108 | xhci_dbg(xhci, "// Reset the HC\n"); | |
109 | command = xhci_readl(xhci, &xhci->op_regs->command); | |
110 | command |= CMD_RESET; | |
111 | xhci_writel(xhci, command, &xhci->op_regs->command); | |
112 | /* XXX: Why does EHCI set this here? Shouldn't other code do this? */ | |
113 | xhci_to_hcd(xhci)->state = HC_STATE_HALT; | |
114 | ||
115 | return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000); | |
116 | } | |
117 | ||
118 | /* | |
119 | * Stop the HC from processing the endpoint queues. | |
120 | */ | |
121 | static void xhci_quiesce(struct xhci_hcd *xhci) | |
122 | { | |
123 | /* | |
124 | * Queues are per endpoint, so we need to disable an endpoint or slot. | |
125 | * | |
126 | * To disable a slot, we need to insert a disable slot command on the | |
127 | * command ring and ring the doorbell. This will also free any internal | |
128 | * resources associated with the slot (which might not be what we want). | |
129 | * | |
130 | * A Release Endpoint command sounds better - doesn't free internal HC | |
131 | * memory, but removes the endpoints from the schedule and releases the | |
132 | * bandwidth, disables the doorbells, and clears the endpoint enable | |
133 | * flag. Usually used prior to a set interface command. | |
134 | * | |
135 | * TODO: Implement after command ring code is done. | |
136 | */ | |
137 | BUG_ON(!HC_IS_RUNNING(xhci_to_hcd(xhci)->state)); | |
138 | xhci_dbg(xhci, "Finished quiescing -- code not written yet\n"); | |
139 | } | |
140 | ||
141 | #if 0 | |
142 | /* Set up MSI-X table for entry 0 (may claim other entries later) */ | |
143 | static int xhci_setup_msix(struct xhci_hcd *xhci) | |
144 | { | |
145 | int ret; | |
146 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); | |
147 | ||
148 | xhci->msix_count = 0; | |
149 | /* XXX: did I do this right? ixgbe does kcalloc for more than one */ | |
150 | xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL); | |
151 | if (!xhci->msix_entries) { | |
152 | xhci_err(xhci, "Failed to allocate MSI-X entries\n"); | |
153 | return -ENOMEM; | |
154 | } | |
155 | xhci->msix_entries[0].entry = 0; | |
156 | ||
157 | ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count); | |
158 | if (ret) { | |
159 | xhci_err(xhci, "Failed to enable MSI-X\n"); | |
160 | goto free_entries; | |
161 | } | |
162 | ||
163 | /* | |
164 | * Pass the xhci pointer value as the request_irq "cookie". | |
165 | * If more irqs are added, this will need to be unique for each one. | |
166 | */ | |
167 | ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0, | |
168 | "xHCI", xhci_to_hcd(xhci)); | |
169 | if (ret) { | |
170 | xhci_err(xhci, "Failed to allocate MSI-X interrupt\n"); | |
171 | goto disable_msix; | |
172 | } | |
173 | xhci_dbg(xhci, "Finished setting up MSI-X\n"); | |
174 | return 0; | |
175 | ||
176 | disable_msix: | |
177 | pci_disable_msix(pdev); | |
178 | free_entries: | |
179 | kfree(xhci->msix_entries); | |
180 | xhci->msix_entries = NULL; | |
181 | return ret; | |
182 | } | |
183 | ||
184 | /* XXX: code duplication; can xhci_setup_msix call this? */ | |
185 | /* Free any IRQs and disable MSI-X */ | |
186 | static void xhci_cleanup_msix(struct xhci_hcd *xhci) | |
187 | { | |
188 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); | |
189 | if (!xhci->msix_entries) | |
190 | return; | |
191 | ||
192 | free_irq(xhci->msix_entries[0].vector, xhci); | |
193 | pci_disable_msix(pdev); | |
194 | kfree(xhci->msix_entries); | |
195 | xhci->msix_entries = NULL; | |
196 | xhci_dbg(xhci, "Finished cleaning up MSI-X\n"); | |
197 | } | |
198 | #endif | |
199 | ||
200 | /* | |
201 | * Initialize memory for HCD and xHC (one-time init). | |
202 | * | |
203 | * Program the PAGESIZE register, initialize the device context array, create | |
204 | * device contexts (?), set up a command ring segment (or two?), create event | |
205 | * ring (one for now). | |
206 | */ | |
207 | int xhci_init(struct usb_hcd *hcd) | |
208 | { | |
209 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
210 | int retval = 0; | |
211 | ||
212 | xhci_dbg(xhci, "xhci_init\n"); | |
213 | spin_lock_init(&xhci->lock); | |
214 | retval = xhci_mem_init(xhci, GFP_KERNEL); | |
215 | xhci_dbg(xhci, "Finished xhci_init\n"); | |
216 | ||
217 | return retval; | |
218 | } | |
219 | ||
7f84eef0 SS |
220 | /* |
221 | * Called in interrupt context when there might be work | |
222 | * queued on the event ring | |
223 | * | |
224 | * xhci->lock must be held by caller. | |
225 | */ | |
226 | static void xhci_work(struct xhci_hcd *xhci) | |
227 | { | |
228 | u32 temp; | |
229 | ||
230 | /* | |
231 | * Clear the op reg interrupt status first, | |
232 | * so we can receive interrupts from other MSI-X interrupters. | |
233 | * Write 1 to clear the interrupt status. | |
234 | */ | |
235 | temp = xhci_readl(xhci, &xhci->op_regs->status); | |
236 | temp |= STS_EINT; | |
237 | xhci_writel(xhci, temp, &xhci->op_regs->status); | |
238 | /* FIXME when MSI-X is supported and there are multiple vectors */ | |
239 | /* Clear the MSI-X event interrupt status */ | |
240 | ||
241 | /* Acknowledge the interrupt */ | |
242 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
243 | temp |= 0x3; | |
244 | xhci_writel(xhci, temp, &xhci->ir_set->irq_pending); | |
245 | /* Flush posted writes */ | |
246 | xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
247 | ||
248 | /* FIXME this should be a delayed service routine that clears the EHB */ | |
b7258a4a | 249 | xhci_handle_event(xhci); |
7f84eef0 SS |
250 | |
251 | /* Clear the event handler busy flag; the event ring should be empty. */ | |
252 | temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]); | |
253 | xhci_writel(xhci, temp & ~ERST_EHB, &xhci->ir_set->erst_dequeue[0]); | |
254 | /* Flush posted writes -- FIXME is this necessary? */ | |
255 | xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
256 | } | |
257 | ||
258 | /*-------------------------------------------------------------------------*/ | |
259 | ||
260 | /* | |
261 | * xHCI spec says we can get an interrupt, and if the HC has an error condition, | |
262 | * we might get bad data out of the event ring. Section 4.10.2.7 has a list of | |
263 | * indicators of an event TRB error, but we check the status *first* to be safe. | |
264 | */ | |
265 | irqreturn_t xhci_irq(struct usb_hcd *hcd) | |
266 | { | |
267 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
268 | u32 temp, temp2; | |
269 | ||
270 | spin_lock(&xhci->lock); | |
271 | /* Check if the xHC generated the interrupt, or the irq is shared */ | |
272 | temp = xhci_readl(xhci, &xhci->op_regs->status); | |
273 | temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
274 | if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) { | |
275 | spin_unlock(&xhci->lock); | |
276 | return IRQ_NONE; | |
277 | } | |
278 | ||
7f84eef0 SS |
279 | if (temp & STS_FATAL) { |
280 | xhci_warn(xhci, "WARNING: Host System Error\n"); | |
281 | xhci_halt(xhci); | |
282 | xhci_to_hcd(xhci)->state = HC_STATE_HALT; | |
c96a2b81 | 283 | spin_unlock(&xhci->lock); |
7f84eef0 SS |
284 | return -ESHUTDOWN; |
285 | } | |
286 | ||
287 | xhci_work(xhci); | |
288 | spin_unlock(&xhci->lock); | |
289 | ||
290 | return IRQ_HANDLED; | |
291 | } | |
292 | ||
293 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING | |
23e3be11 | 294 | void xhci_event_ring_work(unsigned long arg) |
7f84eef0 SS |
295 | { |
296 | unsigned long flags; | |
297 | int temp; | |
298 | struct xhci_hcd *xhci = (struct xhci_hcd *) arg; | |
299 | int i, j; | |
300 | ||
301 | xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies); | |
302 | ||
303 | spin_lock_irqsave(&xhci->lock, flags); | |
304 | temp = xhci_readl(xhci, &xhci->op_regs->status); | |
305 | xhci_dbg(xhci, "op reg status = 0x%x\n", temp); | |
306 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
307 | xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp); | |
308 | xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled); | |
309 | xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask); | |
310 | xhci->error_bitmask = 0; | |
311 | xhci_dbg(xhci, "Event ring:\n"); | |
312 | xhci_debug_segment(xhci, xhci->event_ring->deq_seg); | |
313 | xhci_dbg_ring_ptrs(xhci, xhci->event_ring); | |
314 | temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]); | |
315 | temp &= ERST_PTR_MASK; | |
316 | xhci_dbg(xhci, "ERST deq = 0x%x\n", temp); | |
317 | xhci_dbg(xhci, "Command ring:\n"); | |
318 | xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg); | |
319 | xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring); | |
320 | xhci_dbg_cmd_ptrs(xhci); | |
3ffbba95 SS |
321 | for (i = 0; i < MAX_HC_SLOTS; ++i) { |
322 | if (xhci->devs[i]) { | |
323 | for (j = 0; j < 31; ++j) { | |
324 | if (xhci->devs[i]->ep_rings[j]) { | |
325 | xhci_dbg(xhci, "Dev %d endpoint ring %d:\n", i, j); | |
326 | xhci_debug_segment(xhci, xhci->devs[i]->ep_rings[j]->deq_seg); | |
327 | } | |
328 | } | |
329 | } | |
330 | } | |
7f84eef0 SS |
331 | |
332 | if (xhci->noops_submitted != NUM_TEST_NOOPS) | |
23e3be11 SS |
333 | if (xhci_setup_one_noop(xhci)) |
334 | xhci_ring_cmd_db(xhci); | |
7f84eef0 SS |
335 | spin_unlock_irqrestore(&xhci->lock, flags); |
336 | ||
337 | if (!xhci->zombie) | |
338 | mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ); | |
339 | else | |
340 | xhci_dbg(xhci, "Quit polling the event ring.\n"); | |
341 | } | |
342 | #endif | |
343 | ||
66d4eadd SS |
344 | /* |
345 | * Start the HC after it was halted. | |
346 | * | |
347 | * This function is called by the USB core when the HC driver is added. | |
348 | * Its opposite is xhci_stop(). | |
349 | * | |
350 | * xhci_init() must be called once before this function can be called. | |
351 | * Reset the HC, enable device slot contexts, program DCBAAP, and | |
352 | * set command ring pointer and event ring pointer. | |
353 | * | |
354 | * Setup MSI-X vectors and enable interrupts. | |
355 | */ | |
356 | int xhci_run(struct usb_hcd *hcd) | |
357 | { | |
358 | u32 temp; | |
359 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
7f84eef0 | 360 | void (*doorbell)(struct xhci_hcd *) = NULL; |
66d4eadd | 361 | |
0f2a7930 SS |
362 | hcd->uses_new_polling = 1; |
363 | hcd->poll_rh = 0; | |
364 | ||
7f84eef0 | 365 | xhci_dbg(xhci, "xhci_run\n"); |
66d4eadd SS |
366 | #if 0 /* FIXME: MSI not setup yet */ |
367 | /* Do this at the very last minute */ | |
368 | ret = xhci_setup_msix(xhci); | |
369 | if (!ret) | |
370 | return ret; | |
371 | ||
372 | return -ENOSYS; | |
373 | #endif | |
7f84eef0 SS |
374 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
375 | init_timer(&xhci->event_ring_timer); | |
376 | xhci->event_ring_timer.data = (unsigned long) xhci; | |
23e3be11 | 377 | xhci->event_ring_timer.function = xhci_event_ring_work; |
7f84eef0 SS |
378 | /* Poll the event ring */ |
379 | xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ; | |
380 | xhci->zombie = 0; | |
381 | xhci_dbg(xhci, "Setting event ring polling timer\n"); | |
382 | add_timer(&xhci->event_ring_timer); | |
383 | #endif | |
384 | ||
66d4eadd SS |
385 | xhci_dbg(xhci, "// Set the interrupt modulation register\n"); |
386 | temp = xhci_readl(xhci, &xhci->ir_set->irq_control); | |
a4d88302 | 387 | temp &= ~ER_IRQ_INTERVAL_MASK; |
66d4eadd SS |
388 | temp |= (u32) 160; |
389 | xhci_writel(xhci, temp, &xhci->ir_set->irq_control); | |
390 | ||
391 | /* Set the HCD state before we enable the irqs */ | |
392 | hcd->state = HC_STATE_RUNNING; | |
393 | temp = xhci_readl(xhci, &xhci->op_regs->command); | |
394 | temp |= (CMD_EIE); | |
395 | xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n", | |
396 | temp); | |
397 | xhci_writel(xhci, temp, &xhci->op_regs->command); | |
398 | ||
399 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
700e2052 GKH |
400 | xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n", |
401 | xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp)); | |
66d4eadd SS |
402 | xhci_writel(xhci, ER_IRQ_ENABLE(temp), |
403 | &xhci->ir_set->irq_pending); | |
404 | xhci_print_ir_set(xhci, xhci->ir_set, 0); | |
405 | ||
7f84eef0 | 406 | if (NUM_TEST_NOOPS > 0) |
23e3be11 | 407 | doorbell = xhci_setup_one_noop(xhci); |
7f84eef0 | 408 | |
0ebbab37 SS |
409 | xhci_dbg(xhci, "Command ring memory map follows:\n"); |
410 | xhci_debug_ring(xhci, xhci->cmd_ring); | |
7f84eef0 SS |
411 | xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring); |
412 | xhci_dbg_cmd_ptrs(xhci); | |
413 | ||
0ebbab37 SS |
414 | xhci_dbg(xhci, "ERST memory map follows:\n"); |
415 | xhci_dbg_erst(xhci, &xhci->erst); | |
7f84eef0 SS |
416 | xhci_dbg(xhci, "Event ring:\n"); |
417 | xhci_debug_ring(xhci, xhci->event_ring); | |
418 | xhci_dbg_ring_ptrs(xhci, xhci->event_ring); | |
7f84eef0 SS |
419 | temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]); |
420 | temp &= ERST_PTR_MASK; | |
421 | xhci_dbg(xhci, "ERST deq = 0x%x\n", temp); | |
3841d56e SS |
422 | temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[1]); |
423 | xhci_dbg(xhci, "ERST deq upper = 0x%x\n", temp); | |
0ebbab37 | 424 | |
66d4eadd SS |
425 | temp = xhci_readl(xhci, &xhci->op_regs->command); |
426 | temp |= (CMD_RUN); | |
427 | xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n", | |
428 | temp); | |
429 | xhci_writel(xhci, temp, &xhci->op_regs->command); | |
430 | /* Flush PCI posted writes */ | |
431 | temp = xhci_readl(xhci, &xhci->op_regs->command); | |
700e2052 | 432 | xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp); |
7f84eef0 SS |
433 | if (doorbell) |
434 | (*doorbell)(xhci); | |
66d4eadd SS |
435 | |
436 | xhci_dbg(xhci, "Finished xhci_run\n"); | |
437 | return 0; | |
438 | } | |
439 | ||
440 | /* | |
441 | * Stop xHCI driver. | |
442 | * | |
443 | * This function is called by the USB core when the HC driver is removed. | |
444 | * Its opposite is xhci_run(). | |
445 | * | |
446 | * Disable device contexts, disable IRQs, and quiesce the HC. | |
447 | * Reset the HC, finish any completed transactions, and cleanup memory. | |
448 | */ | |
449 | void xhci_stop(struct usb_hcd *hcd) | |
450 | { | |
451 | u32 temp; | |
452 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
453 | ||
454 | spin_lock_irq(&xhci->lock); | |
455 | if (HC_IS_RUNNING(hcd->state)) | |
456 | xhci_quiesce(xhci); | |
457 | xhci_halt(xhci); | |
458 | xhci_reset(xhci); | |
459 | spin_unlock_irq(&xhci->lock); | |
460 | ||
461 | #if 0 /* No MSI yet */ | |
462 | xhci_cleanup_msix(xhci); | |
463 | #endif | |
7f84eef0 SS |
464 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
465 | /* Tell the event ring poll function not to reschedule */ | |
466 | xhci->zombie = 1; | |
467 | del_timer_sync(&xhci->event_ring_timer); | |
468 | #endif | |
469 | ||
66d4eadd SS |
470 | xhci_dbg(xhci, "// Disabling event ring interrupts\n"); |
471 | temp = xhci_readl(xhci, &xhci->op_regs->status); | |
472 | xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status); | |
473 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); | |
474 | xhci_writel(xhci, ER_IRQ_DISABLE(temp), | |
475 | &xhci->ir_set->irq_pending); | |
476 | xhci_print_ir_set(xhci, xhci->ir_set, 0); | |
477 | ||
478 | xhci_dbg(xhci, "cleaning up memory\n"); | |
479 | xhci_mem_cleanup(xhci); | |
480 | xhci_dbg(xhci, "xhci_stop completed - status = %x\n", | |
481 | xhci_readl(xhci, &xhci->op_regs->status)); | |
482 | } | |
483 | ||
484 | /* | |
485 | * Shutdown HC (not bus-specific) | |
486 | * | |
487 | * This is called when the machine is rebooting or halting. We assume that the | |
488 | * machine will be powered off, and the HC's internal state will be reset. | |
489 | * Don't bother to free memory. | |
490 | */ | |
491 | void xhci_shutdown(struct usb_hcd *hcd) | |
492 | { | |
493 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
494 | ||
495 | spin_lock_irq(&xhci->lock); | |
496 | xhci_halt(xhci); | |
497 | spin_unlock_irq(&xhci->lock); | |
498 | ||
499 | #if 0 | |
500 | xhci_cleanup_msix(xhci); | |
501 | #endif | |
502 | ||
503 | xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n", | |
504 | xhci_readl(xhci, &xhci->op_regs->status)); | |
505 | } | |
506 | ||
7f84eef0 SS |
507 | /*-------------------------------------------------------------------------*/ |
508 | ||
d0e96f5a SS |
509 | /** |
510 | * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and | |
511 | * HCDs. Find the index for an endpoint given its descriptor. Use the return | |
512 | * value to right shift 1 for the bitmask. | |
513 | * | |
514 | * Index = (epnum * 2) + direction - 1, | |
515 | * where direction = 0 for OUT, 1 for IN. | |
516 | * For control endpoints, the IN index is used (OUT index is unused), so | |
517 | * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2) | |
518 | */ | |
519 | unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc) | |
520 | { | |
521 | unsigned int index; | |
522 | if (usb_endpoint_xfer_control(desc)) | |
523 | index = (unsigned int) (usb_endpoint_num(desc)*2); | |
524 | else | |
525 | index = (unsigned int) (usb_endpoint_num(desc)*2) + | |
526 | (usb_endpoint_dir_in(desc) ? 1 : 0) - 1; | |
527 | return index; | |
528 | } | |
529 | ||
f94e0186 SS |
530 | /* Find the flag for this endpoint (for use in the control context). Use the |
531 | * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is | |
532 | * bit 1, etc. | |
533 | */ | |
534 | unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc) | |
535 | { | |
536 | return 1 << (xhci_get_endpoint_index(desc) + 1); | |
537 | } | |
538 | ||
539 | /* Compute the last valid endpoint context index. Basically, this is the | |
540 | * endpoint index plus one. For slot contexts with more than valid endpoint, | |
541 | * we find the most significant bit set in the added contexts flags. | |
542 | * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000 | |
543 | * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one. | |
544 | */ | |
545 | static inline unsigned int xhci_last_valid_endpoint(u32 added_ctxs) | |
546 | { | |
547 | return fls(added_ctxs) - 1; | |
548 | } | |
549 | ||
d0e96f5a SS |
550 | /* Returns 1 if the arguments are OK; |
551 | * returns 0 this is a root hub; returns -EINVAL for NULL pointers. | |
552 | */ | |
553 | int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev, | |
554 | struct usb_host_endpoint *ep, int check_ep, const char *func) { | |
555 | if (!hcd || (check_ep && !ep) || !udev) { | |
556 | printk(KERN_DEBUG "xHCI %s called with invalid args\n", | |
557 | func); | |
558 | return -EINVAL; | |
559 | } | |
560 | if (!udev->parent) { | |
561 | printk(KERN_DEBUG "xHCI %s called for root hub\n", | |
562 | func); | |
563 | return 0; | |
564 | } | |
565 | if (!udev->slot_id) { | |
566 | printk(KERN_DEBUG "xHCI %s called with unaddressed device\n", | |
567 | func); | |
568 | return -EINVAL; | |
569 | } | |
570 | return 1; | |
571 | } | |
572 | ||
573 | /* | |
574 | * non-error returns are a promise to giveback() the urb later | |
575 | * we drop ownership so next owner (or urb unlink) can get it | |
576 | */ | |
577 | int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) | |
578 | { | |
579 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
580 | unsigned long flags; | |
581 | int ret = 0; | |
582 | unsigned int slot_id, ep_index; | |
583 | ||
584 | if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, true, __func__) <= 0) | |
585 | return -EINVAL; | |
586 | ||
587 | slot_id = urb->dev->slot_id; | |
588 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); | |
d0e96f5a SS |
589 | |
590 | spin_lock_irqsave(&xhci->lock, flags); | |
591 | if (!xhci->devs || !xhci->devs[slot_id]) { | |
592 | if (!in_interrupt()) | |
593 | dev_warn(&urb->dev->dev, "WARN: urb submitted for dev with no Slot ID\n"); | |
c7959fb2 SS |
594 | ret = -EINVAL; |
595 | goto exit; | |
d0e96f5a SS |
596 | } |
597 | if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) { | |
598 | if (!in_interrupt()) | |
599 | xhci_dbg(xhci, "urb submitted during PCI suspend\n"); | |
600 | ret = -ESHUTDOWN; | |
601 | goto exit; | |
602 | } | |
b10de142 | 603 | if (usb_endpoint_xfer_control(&urb->ep->desc)) |
23e3be11 SS |
604 | ret = xhci_queue_ctrl_tx(xhci, mem_flags, urb, |
605 | slot_id, ep_index); | |
b10de142 | 606 | else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) |
23e3be11 SS |
607 | ret = xhci_queue_bulk_tx(xhci, mem_flags, urb, |
608 | slot_id, ep_index); | |
b10de142 SS |
609 | else |
610 | ret = -EINVAL; | |
d0e96f5a SS |
611 | exit: |
612 | spin_unlock_irqrestore(&xhci->lock, flags); | |
613 | return ret; | |
614 | } | |
615 | ||
ae636747 SS |
616 | /* |
617 | * Remove the URB's TD from the endpoint ring. This may cause the HC to stop | |
618 | * USB transfers, potentially stopping in the middle of a TRB buffer. The HC | |
619 | * should pick up where it left off in the TD, unless a Set Transfer Ring | |
620 | * Dequeue Pointer is issued. | |
621 | * | |
622 | * The TRBs that make up the buffers for the canceled URB will be "removed" from | |
623 | * the ring. Since the ring is a contiguous structure, they can't be physically | |
624 | * removed. Instead, there are two options: | |
625 | * | |
626 | * 1) If the HC is in the middle of processing the URB to be canceled, we | |
627 | * simply move the ring's dequeue pointer past those TRBs using the Set | |
628 | * Transfer Ring Dequeue Pointer command. This will be the common case, | |
629 | * when drivers timeout on the last submitted URB and attempt to cancel. | |
630 | * | |
631 | * 2) If the HC is in the middle of a different TD, we turn the TRBs into a | |
632 | * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The | |
633 | * HC will need to invalidate the any TRBs it has cached after the stop | |
634 | * endpoint command, as noted in the xHCI 0.95 errata. | |
635 | * | |
636 | * 3) The TD may have completed by the time the Stop Endpoint Command | |
637 | * completes, so software needs to handle that case too. | |
638 | * | |
639 | * This function should protect against the TD enqueueing code ringing the | |
640 | * doorbell while this code is waiting for a Stop Endpoint command to complete. | |
641 | * It also needs to account for multiple cancellations on happening at the same | |
642 | * time for the same endpoint. | |
643 | * | |
644 | * Note that this function can be called in any context, or so says | |
645 | * usb_hcd_unlink_urb() | |
d0e96f5a SS |
646 | */ |
647 | int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) | |
648 | { | |
ae636747 SS |
649 | unsigned long flags; |
650 | int ret; | |
651 | struct xhci_hcd *xhci; | |
652 | struct xhci_td *td; | |
653 | unsigned int ep_index; | |
654 | struct xhci_ring *ep_ring; | |
655 | ||
656 | xhci = hcd_to_xhci(hcd); | |
657 | spin_lock_irqsave(&xhci->lock, flags); | |
658 | /* Make sure the URB hasn't completed or been unlinked already */ | |
659 | ret = usb_hcd_check_unlink_urb(hcd, urb, status); | |
660 | if (ret || !urb->hcpriv) | |
661 | goto done; | |
662 | ||
700e2052 | 663 | xhci_dbg(xhci, "Cancel URB %p\n", urb); |
ae636747 SS |
664 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); |
665 | ep_ring = xhci->devs[urb->dev->slot_id]->ep_rings[ep_index]; | |
666 | td = (struct xhci_td *) urb->hcpriv; | |
667 | ||
668 | ep_ring->cancels_pending++; | |
669 | list_add_tail(&td->cancelled_td_list, &ep_ring->cancelled_td_list); | |
670 | /* Queue a stop endpoint command, but only if this is | |
671 | * the first cancellation to be handled. | |
672 | */ | |
673 | if (ep_ring->cancels_pending == 1) { | |
23e3be11 SS |
674 | xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index); |
675 | xhci_ring_cmd_db(xhci); | |
ae636747 SS |
676 | } |
677 | done: | |
678 | spin_unlock_irqrestore(&xhci->lock, flags); | |
679 | return ret; | |
d0e96f5a SS |
680 | } |
681 | ||
f94e0186 SS |
682 | /* Drop an endpoint from a new bandwidth configuration for this device. |
683 | * Only one call to this function is allowed per endpoint before | |
684 | * check_bandwidth() or reset_bandwidth() must be called. | |
685 | * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will | |
686 | * add the endpoint to the schedule with possibly new parameters denoted by a | |
687 | * different endpoint descriptor in usb_host_endpoint. | |
688 | * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is | |
689 | * not allowed. | |
f88ba78d SS |
690 | * |
691 | * The USB core will not allow URBs to be queued to an endpoint that is being | |
692 | * disabled, so there's no need for mutual exclusion to protect | |
693 | * the xhci->devs[slot_id] structure. | |
f94e0186 SS |
694 | */ |
695 | int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, | |
696 | struct usb_host_endpoint *ep) | |
697 | { | |
f94e0186 SS |
698 | struct xhci_hcd *xhci; |
699 | struct xhci_device_control *in_ctx; | |
700 | unsigned int last_ctx; | |
701 | unsigned int ep_index; | |
702 | struct xhci_ep_ctx *ep_ctx; | |
703 | u32 drop_flag; | |
704 | u32 new_add_flags, new_drop_flags, new_slot_info; | |
705 | int ret; | |
706 | ||
707 | ret = xhci_check_args(hcd, udev, ep, 1, __func__); | |
f94e0186 SS |
708 | if (ret <= 0) |
709 | return ret; | |
710 | xhci = hcd_to_xhci(hcd); | |
700e2052 | 711 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
f94e0186 SS |
712 | |
713 | drop_flag = xhci_get_endpoint_flag(&ep->desc); | |
714 | if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) { | |
715 | xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n", | |
716 | __func__, drop_flag); | |
717 | return 0; | |
718 | } | |
719 | ||
f94e0186 SS |
720 | if (!xhci->devs || !xhci->devs[udev->slot_id]) { |
721 | xhci_warn(xhci, "xHCI %s called with unaddressed device\n", | |
722 | __func__); | |
f94e0186 SS |
723 | return -EINVAL; |
724 | } | |
725 | ||
726 | in_ctx = xhci->devs[udev->slot_id]->in_ctx; | |
727 | ep_index = xhci_get_endpoint_index(&ep->desc); | |
728 | ep_ctx = &xhci->devs[udev->slot_id]->out_ctx->ep[ep_index]; | |
729 | /* If the HC already knows the endpoint is disabled, | |
730 | * or the HCD has noted it is disabled, ignore this request | |
731 | */ | |
732 | if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED || | |
733 | in_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) { | |
700e2052 GKH |
734 | xhci_warn(xhci, "xHCI %s called with disabled ep %p\n", |
735 | __func__, ep); | |
f94e0186 SS |
736 | return 0; |
737 | } | |
738 | ||
739 | in_ctx->drop_flags |= drop_flag; | |
740 | new_drop_flags = in_ctx->drop_flags; | |
741 | ||
742 | in_ctx->add_flags = ~drop_flag; | |
743 | new_add_flags = in_ctx->add_flags; | |
744 | ||
745 | last_ctx = xhci_last_valid_endpoint(in_ctx->add_flags); | |
746 | /* Update the last valid endpoint context, if we deleted the last one */ | |
747 | if ((in_ctx->slot.dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) { | |
748 | in_ctx->slot.dev_info &= ~LAST_CTX_MASK; | |
749 | in_ctx->slot.dev_info |= LAST_CTX(last_ctx); | |
750 | } | |
751 | new_slot_info = in_ctx->slot.dev_info; | |
752 | ||
753 | xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); | |
754 | ||
f94e0186 SS |
755 | xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n", |
756 | (unsigned int) ep->desc.bEndpointAddress, | |
757 | udev->slot_id, | |
758 | (unsigned int) new_drop_flags, | |
759 | (unsigned int) new_add_flags, | |
760 | (unsigned int) new_slot_info); | |
761 | return 0; | |
762 | } | |
763 | ||
764 | /* Add an endpoint to a new possible bandwidth configuration for this device. | |
765 | * Only one call to this function is allowed per endpoint before | |
766 | * check_bandwidth() or reset_bandwidth() must be called. | |
767 | * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will | |
768 | * add the endpoint to the schedule with possibly new parameters denoted by a | |
769 | * different endpoint descriptor in usb_host_endpoint. | |
770 | * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is | |
771 | * not allowed. | |
f88ba78d SS |
772 | * |
773 | * The USB core will not allow URBs to be queued to an endpoint until the | |
774 | * configuration or alt setting is installed in the device, so there's no need | |
775 | * for mutual exclusion to protect the xhci->devs[slot_id] structure. | |
f94e0186 SS |
776 | */ |
777 | int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev, | |
778 | struct usb_host_endpoint *ep) | |
779 | { | |
f94e0186 SS |
780 | struct xhci_hcd *xhci; |
781 | struct xhci_device_control *in_ctx; | |
782 | unsigned int ep_index; | |
783 | struct xhci_ep_ctx *ep_ctx; | |
784 | u32 added_ctxs; | |
785 | unsigned int last_ctx; | |
786 | u32 new_add_flags, new_drop_flags, new_slot_info; | |
787 | int ret = 0; | |
788 | ||
789 | ret = xhci_check_args(hcd, udev, ep, 1, __func__); | |
790 | if (ret <= 0) | |
791 | return ret; | |
792 | xhci = hcd_to_xhci(hcd); | |
793 | ||
794 | added_ctxs = xhci_get_endpoint_flag(&ep->desc); | |
795 | last_ctx = xhci_last_valid_endpoint(added_ctxs); | |
796 | if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) { | |
797 | /* FIXME when we have to issue an evaluate endpoint command to | |
798 | * deal with ep0 max packet size changing once we get the | |
799 | * descriptors | |
800 | */ | |
801 | xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n", | |
802 | __func__, added_ctxs); | |
803 | return 0; | |
804 | } | |
805 | ||
f94e0186 SS |
806 | if (!xhci->devs || !xhci->devs[udev->slot_id]) { |
807 | xhci_warn(xhci, "xHCI %s called with unaddressed device\n", | |
808 | __func__); | |
f94e0186 SS |
809 | return -EINVAL; |
810 | } | |
811 | ||
812 | in_ctx = xhci->devs[udev->slot_id]->in_ctx; | |
813 | ep_index = xhci_get_endpoint_index(&ep->desc); | |
814 | ep_ctx = &xhci->devs[udev->slot_id]->out_ctx->ep[ep_index]; | |
815 | /* If the HCD has already noted the endpoint is enabled, | |
816 | * ignore this request. | |
817 | */ | |
818 | if (in_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) { | |
700e2052 GKH |
819 | xhci_warn(xhci, "xHCI %s called with enabled ep %p\n", |
820 | __func__, ep); | |
f94e0186 SS |
821 | return 0; |
822 | } | |
823 | ||
f88ba78d SS |
824 | /* |
825 | * Configuration and alternate setting changes must be done in | |
826 | * process context, not interrupt context (or so documenation | |
827 | * for usb_set_interface() and usb_set_configuration() claim). | |
828 | */ | |
829 | if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id], | |
830 | udev, ep, GFP_KERNEL) < 0) { | |
f94e0186 SS |
831 | dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n", |
832 | __func__, ep->desc.bEndpointAddress); | |
f94e0186 SS |
833 | return -ENOMEM; |
834 | } | |
835 | ||
836 | in_ctx->add_flags |= added_ctxs; | |
837 | new_add_flags = in_ctx->add_flags; | |
838 | ||
839 | /* If xhci_endpoint_disable() was called for this endpoint, but the | |
840 | * xHC hasn't been notified yet through the check_bandwidth() call, | |
841 | * this re-adds a new state for the endpoint from the new endpoint | |
842 | * descriptors. We must drop and re-add this endpoint, so we leave the | |
843 | * drop flags alone. | |
844 | */ | |
845 | new_drop_flags = in_ctx->drop_flags; | |
846 | ||
847 | /* Update the last valid endpoint context, if we just added one past */ | |
848 | if ((in_ctx->slot.dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) { | |
849 | in_ctx->slot.dev_info &= ~LAST_CTX_MASK; | |
850 | in_ctx->slot.dev_info |= LAST_CTX(last_ctx); | |
851 | } | |
852 | new_slot_info = in_ctx->slot.dev_info; | |
f94e0186 SS |
853 | |
854 | xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n", | |
855 | (unsigned int) ep->desc.bEndpointAddress, | |
856 | udev->slot_id, | |
857 | (unsigned int) new_drop_flags, | |
858 | (unsigned int) new_add_flags, | |
859 | (unsigned int) new_slot_info); | |
860 | return 0; | |
861 | } | |
862 | ||
863 | static void xhci_zero_in_ctx(struct xhci_virt_device *virt_dev) | |
864 | { | |
865 | struct xhci_ep_ctx *ep_ctx; | |
866 | int i; | |
867 | ||
868 | /* When a device's add flag and drop flag are zero, any subsequent | |
869 | * configure endpoint command will leave that endpoint's state | |
870 | * untouched. Make sure we don't leave any old state in the input | |
871 | * endpoint contexts. | |
872 | */ | |
873 | virt_dev->in_ctx->drop_flags = 0; | |
874 | virt_dev->in_ctx->add_flags = 0; | |
875 | virt_dev->in_ctx->slot.dev_info &= ~LAST_CTX_MASK; | |
876 | /* Endpoint 0 is always valid */ | |
877 | virt_dev->in_ctx->slot.dev_info |= LAST_CTX(1); | |
878 | for (i = 1; i < 31; ++i) { | |
879 | ep_ctx = &virt_dev->in_ctx->ep[i]; | |
880 | ep_ctx->ep_info = 0; | |
881 | ep_ctx->ep_info2 = 0; | |
882 | ep_ctx->deq[0] = 0; | |
883 | ep_ctx->deq[1] = 0; | |
884 | ep_ctx->tx_info = 0; | |
885 | } | |
886 | } | |
887 | ||
f88ba78d SS |
888 | /* Called after one or more calls to xhci_add_endpoint() or |
889 | * xhci_drop_endpoint(). If this call fails, the USB core is expected | |
890 | * to call xhci_reset_bandwidth(). | |
891 | * | |
892 | * Since we are in the middle of changing either configuration or | |
893 | * installing a new alt setting, the USB core won't allow URBs to be | |
894 | * enqueued for any endpoint on the old config or interface. Nothing | |
895 | * else should be touching the xhci->devs[slot_id] structure, so we | |
896 | * don't need to take the xhci->lock for manipulating that. | |
897 | */ | |
f94e0186 SS |
898 | int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) |
899 | { | |
900 | int i; | |
901 | int ret = 0; | |
902 | int timeleft; | |
903 | unsigned long flags; | |
904 | struct xhci_hcd *xhci; | |
905 | struct xhci_virt_device *virt_dev; | |
906 | ||
907 | ret = xhci_check_args(hcd, udev, NULL, 0, __func__); | |
908 | if (ret <= 0) | |
909 | return ret; | |
910 | xhci = hcd_to_xhci(hcd); | |
911 | ||
f94e0186 SS |
912 | if (!udev->slot_id || !xhci->devs || !xhci->devs[udev->slot_id]) { |
913 | xhci_warn(xhci, "xHCI %s called with unaddressed device\n", | |
914 | __func__); | |
f94e0186 SS |
915 | return -EINVAL; |
916 | } | |
700e2052 | 917 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
f94e0186 SS |
918 | virt_dev = xhci->devs[udev->slot_id]; |
919 | ||
920 | /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ | |
921 | virt_dev->in_ctx->add_flags |= SLOT_FLAG; | |
922 | virt_dev->in_ctx->add_flags &= ~EP0_FLAG; | |
923 | virt_dev->in_ctx->drop_flags &= ~SLOT_FLAG; | |
924 | virt_dev->in_ctx->drop_flags &= ~EP0_FLAG; | |
925 | xhci_dbg(xhci, "New Input Control Context:\n"); | |
926 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma, | |
927 | LAST_CTX_TO_EP_NUM(virt_dev->in_ctx->slot.dev_info)); | |
928 | ||
f88ba78d | 929 | spin_lock_irqsave(&xhci->lock, flags); |
23e3be11 SS |
930 | ret = xhci_queue_configure_endpoint(xhci, virt_dev->in_ctx_dma, |
931 | udev->slot_id); | |
f94e0186 | 932 | if (ret < 0) { |
f94e0186 | 933 | spin_unlock_irqrestore(&xhci->lock, flags); |
f88ba78d | 934 | xhci_dbg(xhci, "FIXME allocate a new ring segment\n"); |
f94e0186 SS |
935 | return -ENOMEM; |
936 | } | |
23e3be11 | 937 | xhci_ring_cmd_db(xhci); |
f94e0186 SS |
938 | spin_unlock_irqrestore(&xhci->lock, flags); |
939 | ||
940 | /* Wait for the configure endpoint command to complete */ | |
941 | timeleft = wait_for_completion_interruptible_timeout( | |
942 | &virt_dev->cmd_completion, | |
943 | USB_CTRL_SET_TIMEOUT); | |
944 | if (timeleft <= 0) { | |
945 | xhci_warn(xhci, "%s while waiting for configure endpoint command\n", | |
946 | timeleft == 0 ? "Timeout" : "Signal"); | |
947 | /* FIXME cancel the configure endpoint command */ | |
948 | return -ETIME; | |
949 | } | |
950 | ||
f94e0186 SS |
951 | switch (virt_dev->cmd_status) { |
952 | case COMP_ENOMEM: | |
953 | dev_warn(&udev->dev, "Not enough host controller resources " | |
954 | "for new device state.\n"); | |
955 | ret = -ENOMEM; | |
956 | /* FIXME: can we allocate more resources for the HC? */ | |
957 | break; | |
958 | case COMP_BW_ERR: | |
959 | dev_warn(&udev->dev, "Not enough bandwidth " | |
960 | "for new device state.\n"); | |
961 | ret = -ENOSPC; | |
962 | /* FIXME: can we go back to the old state? */ | |
963 | break; | |
964 | case COMP_TRB_ERR: | |
965 | /* the HCD set up something wrong */ | |
966 | dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, add flag = 1, " | |
967 | "and endpoint is not disabled.\n"); | |
968 | ret = -EINVAL; | |
969 | break; | |
970 | case COMP_SUCCESS: | |
971 | dev_dbg(&udev->dev, "Successful Endpoint Configure command\n"); | |
972 | break; | |
973 | default: | |
974 | xhci_err(xhci, "ERROR: unexpected command completion " | |
975 | "code 0x%x.\n", virt_dev->cmd_status); | |
976 | ret = -EINVAL; | |
977 | break; | |
978 | } | |
979 | if (ret) { | |
980 | /* Callee should call reset_bandwidth() */ | |
f94e0186 SS |
981 | return ret; |
982 | } | |
983 | ||
984 | xhci_dbg(xhci, "Output context after successful config ep cmd:\n"); | |
985 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, virt_dev->out_ctx_dma, | |
986 | LAST_CTX_TO_EP_NUM(virt_dev->in_ctx->slot.dev_info)); | |
987 | ||
988 | xhci_zero_in_ctx(virt_dev); | |
989 | /* Free any old rings */ | |
990 | for (i = 1; i < 31; ++i) { | |
991 | if (virt_dev->new_ep_rings[i]) { | |
992 | xhci_ring_free(xhci, virt_dev->ep_rings[i]); | |
993 | virt_dev->ep_rings[i] = virt_dev->new_ep_rings[i]; | |
994 | virt_dev->new_ep_rings[i] = NULL; | |
995 | } | |
996 | } | |
997 | ||
f94e0186 SS |
998 | return ret; |
999 | } | |
1000 | ||
1001 | void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) | |
1002 | { | |
f94e0186 SS |
1003 | struct xhci_hcd *xhci; |
1004 | struct xhci_virt_device *virt_dev; | |
1005 | int i, ret; | |
1006 | ||
1007 | ret = xhci_check_args(hcd, udev, NULL, 0, __func__); | |
1008 | if (ret <= 0) | |
1009 | return; | |
1010 | xhci = hcd_to_xhci(hcd); | |
1011 | ||
f94e0186 SS |
1012 | if (!xhci->devs || !xhci->devs[udev->slot_id]) { |
1013 | xhci_warn(xhci, "xHCI %s called with unaddressed device\n", | |
1014 | __func__); | |
f94e0186 SS |
1015 | return; |
1016 | } | |
700e2052 | 1017 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
f94e0186 SS |
1018 | virt_dev = xhci->devs[udev->slot_id]; |
1019 | /* Free any rings allocated for added endpoints */ | |
1020 | for (i = 0; i < 31; ++i) { | |
1021 | if (virt_dev->new_ep_rings[i]) { | |
1022 | xhci_ring_free(xhci, virt_dev->new_ep_rings[i]); | |
1023 | virt_dev->new_ep_rings[i] = NULL; | |
1024 | } | |
1025 | } | |
1026 | xhci_zero_in_ctx(virt_dev); | |
f94e0186 SS |
1027 | } |
1028 | ||
3ffbba95 SS |
1029 | /* |
1030 | * At this point, the struct usb_device is about to go away, the device has | |
1031 | * disconnected, and all traffic has been stopped and the endpoints have been | |
1032 | * disabled. Free any HC data structures associated with that device. | |
1033 | */ | |
1034 | void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev) | |
1035 | { | |
1036 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
1037 | unsigned long flags; | |
1038 | ||
1039 | if (udev->slot_id == 0) | |
1040 | return; | |
1041 | ||
1042 | spin_lock_irqsave(&xhci->lock, flags); | |
23e3be11 | 1043 | if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) { |
3ffbba95 SS |
1044 | spin_unlock_irqrestore(&xhci->lock, flags); |
1045 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); | |
1046 | return; | |
1047 | } | |
23e3be11 | 1048 | xhci_ring_cmd_db(xhci); |
3ffbba95 SS |
1049 | spin_unlock_irqrestore(&xhci->lock, flags); |
1050 | /* | |
1051 | * Event command completion handler will free any data structures | |
f88ba78d | 1052 | * associated with the slot. XXX Can free sleep? |
3ffbba95 SS |
1053 | */ |
1054 | } | |
1055 | ||
1056 | /* | |
1057 | * Returns 0 if the xHC ran out of device slots, the Enable Slot command | |
1058 | * timed out, or allocating memory failed. Returns 1 on success. | |
1059 | */ | |
1060 | int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev) | |
1061 | { | |
1062 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
1063 | unsigned long flags; | |
1064 | int timeleft; | |
1065 | int ret; | |
1066 | ||
1067 | spin_lock_irqsave(&xhci->lock, flags); | |
23e3be11 | 1068 | ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0); |
3ffbba95 SS |
1069 | if (ret) { |
1070 | spin_unlock_irqrestore(&xhci->lock, flags); | |
1071 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); | |
1072 | return 0; | |
1073 | } | |
23e3be11 | 1074 | xhci_ring_cmd_db(xhci); |
3ffbba95 SS |
1075 | spin_unlock_irqrestore(&xhci->lock, flags); |
1076 | ||
1077 | /* XXX: how much time for xHC slot assignment? */ | |
1078 | timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev, | |
1079 | USB_CTRL_SET_TIMEOUT); | |
1080 | if (timeleft <= 0) { | |
1081 | xhci_warn(xhci, "%s while waiting for a slot\n", | |
1082 | timeleft == 0 ? "Timeout" : "Signal"); | |
1083 | /* FIXME cancel the enable slot request */ | |
1084 | return 0; | |
1085 | } | |
1086 | ||
3ffbba95 SS |
1087 | if (!xhci->slot_id) { |
1088 | xhci_err(xhci, "Error while assigning device slot ID\n"); | |
3ffbba95 SS |
1089 | return 0; |
1090 | } | |
f88ba78d | 1091 | /* xhci_alloc_virt_device() does not touch rings; no need to lock */ |
3ffbba95 SS |
1092 | if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) { |
1093 | /* Disable slot, if we can do it without mem alloc */ | |
1094 | xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n"); | |
f88ba78d | 1095 | spin_lock_irqsave(&xhci->lock, flags); |
23e3be11 SS |
1096 | if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) |
1097 | xhci_ring_cmd_db(xhci); | |
3ffbba95 SS |
1098 | spin_unlock_irqrestore(&xhci->lock, flags); |
1099 | return 0; | |
1100 | } | |
1101 | udev->slot_id = xhci->slot_id; | |
1102 | /* Is this a LS or FS device under a HS hub? */ | |
1103 | /* Hub or peripherial? */ | |
3ffbba95 SS |
1104 | return 1; |
1105 | } | |
1106 | ||
1107 | /* | |
1108 | * Issue an Address Device command (which will issue a SetAddress request to | |
1109 | * the device). | |
1110 | * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so | |
1111 | * we should only issue and wait on one address command at the same time. | |
1112 | * | |
1113 | * We add one to the device address issued by the hardware because the USB core | |
1114 | * uses address 1 for the root hubs (even though they're not really devices). | |
1115 | */ | |
1116 | int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev) | |
1117 | { | |
1118 | unsigned long flags; | |
1119 | int timeleft; | |
1120 | struct xhci_virt_device *virt_dev; | |
1121 | int ret = 0; | |
1122 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
1123 | u32 temp; | |
1124 | ||
1125 | if (!udev->slot_id) { | |
1126 | xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id); | |
1127 | return -EINVAL; | |
1128 | } | |
1129 | ||
3ffbba95 SS |
1130 | virt_dev = xhci->devs[udev->slot_id]; |
1131 | ||
1132 | /* If this is a Set Address to an unconfigured device, setup ep 0 */ | |
1133 | if (!udev->config) | |
1134 | xhci_setup_addressable_virt_dev(xhci, udev); | |
1135 | /* Otherwise, assume the core has the device configured how it wants */ | |
1136 | ||
f88ba78d | 1137 | spin_lock_irqsave(&xhci->lock, flags); |
23e3be11 SS |
1138 | ret = xhci_queue_address_device(xhci, virt_dev->in_ctx_dma, |
1139 | udev->slot_id); | |
3ffbba95 SS |
1140 | if (ret) { |
1141 | spin_unlock_irqrestore(&xhci->lock, flags); | |
1142 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); | |
1143 | return ret; | |
1144 | } | |
23e3be11 | 1145 | xhci_ring_cmd_db(xhci); |
3ffbba95 SS |
1146 | spin_unlock_irqrestore(&xhci->lock, flags); |
1147 | ||
1148 | /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */ | |
1149 | timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev, | |
1150 | USB_CTRL_SET_TIMEOUT); | |
1151 | /* FIXME: From section 4.3.4: "Software shall be responsible for timing | |
1152 | * the SetAddress() "recovery interval" required by USB and aborting the | |
1153 | * command on a timeout. | |
1154 | */ | |
1155 | if (timeleft <= 0) { | |
1156 | xhci_warn(xhci, "%s while waiting for a slot\n", | |
1157 | timeleft == 0 ? "Timeout" : "Signal"); | |
1158 | /* FIXME cancel the address device command */ | |
1159 | return -ETIME; | |
1160 | } | |
1161 | ||
3ffbba95 SS |
1162 | switch (virt_dev->cmd_status) { |
1163 | case COMP_CTX_STATE: | |
1164 | case COMP_EBADSLT: | |
1165 | xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n", | |
1166 | udev->slot_id); | |
1167 | ret = -EINVAL; | |
1168 | break; | |
1169 | case COMP_TX_ERR: | |
1170 | dev_warn(&udev->dev, "Device not responding to set address.\n"); | |
1171 | ret = -EPROTO; | |
1172 | break; | |
1173 | case COMP_SUCCESS: | |
1174 | xhci_dbg(xhci, "Successful Address Device command\n"); | |
1175 | break; | |
1176 | default: | |
1177 | xhci_err(xhci, "ERROR: unexpected command completion " | |
1178 | "code 0x%x.\n", virt_dev->cmd_status); | |
1179 | ret = -EINVAL; | |
1180 | break; | |
1181 | } | |
1182 | if (ret) { | |
3ffbba95 SS |
1183 | return ret; |
1184 | } | |
1185 | temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[0]); | |
1186 | xhci_dbg(xhci, "Op regs DCBAA ptr[0] = %#08x\n", temp); | |
1187 | temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[1]); | |
1188 | xhci_dbg(xhci, "Op regs DCBAA ptr[1] = %#08x\n", temp); | |
700e2052 | 1189 | xhci_dbg(xhci, "Slot ID %d dcbaa entry[0] @%p = %#08x\n", |
3ffbba95 | 1190 | udev->slot_id, |
700e2052 | 1191 | &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id], |
3ffbba95 | 1192 | xhci->dcbaa->dev_context_ptrs[2*udev->slot_id]); |
700e2052 | 1193 | xhci_dbg(xhci, "Slot ID %d dcbaa entry[1] @%p = %#08x\n", |
3ffbba95 | 1194 | udev->slot_id, |
700e2052 | 1195 | &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1], |
3ffbba95 | 1196 | xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1]); |
700e2052 GKH |
1197 | xhci_dbg(xhci, "Output Context DMA address = %#08llx\n", |
1198 | (unsigned long long)virt_dev->out_ctx_dma); | |
3ffbba95 SS |
1199 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); |
1200 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma, 2); | |
1201 | xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id); | |
1202 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, virt_dev->out_ctx_dma, 2); | |
1203 | /* | |
1204 | * USB core uses address 1 for the roothubs, so we add one to the | |
1205 | * address given back to us by the HC. | |
1206 | */ | |
1207 | udev->devnum = (virt_dev->out_ctx->slot.dev_state & DEV_ADDR_MASK) + 1; | |
f94e0186 SS |
1208 | /* Zero the input context control for later use */ |
1209 | virt_dev->in_ctx->add_flags = 0; | |
1210 | virt_dev->in_ctx->drop_flags = 0; | |
1211 | /* Mirror flags in the output context for future ep enable/disable */ | |
1212 | virt_dev->out_ctx->add_flags = SLOT_FLAG | EP0_FLAG; | |
1213 | virt_dev->out_ctx->drop_flags = 0; | |
3ffbba95 SS |
1214 | |
1215 | xhci_dbg(xhci, "Device address = %d\n", udev->devnum); | |
1216 | /* XXX Meh, not sure if anyone else but choose_address uses this. */ | |
1217 | set_bit(udev->devnum, udev->bus->devmap.devicemap); | |
1218 | ||
1219 | return 0; | |
1220 | } | |
1221 | ||
66d4eadd SS |
1222 | int xhci_get_frame(struct usb_hcd *hcd) |
1223 | { | |
1224 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
1225 | /* EHCI mods by the periodic size. Why? */ | |
1226 | return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3; | |
1227 | } | |
1228 | ||
1229 | MODULE_DESCRIPTION(DRIVER_DESC); | |
1230 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
1231 | MODULE_LICENSE("GPL"); | |
1232 | ||
1233 | static int __init xhci_hcd_init(void) | |
1234 | { | |
1235 | #ifdef CONFIG_PCI | |
1236 | int retval = 0; | |
1237 | ||
1238 | retval = xhci_register_pci(); | |
1239 | ||
1240 | if (retval < 0) { | |
1241 | printk(KERN_DEBUG "Problem registering PCI driver."); | |
1242 | return retval; | |
1243 | } | |
1244 | #endif | |
98441973 SS |
1245 | /* |
1246 | * Check the compiler generated sizes of structures that must be laid | |
1247 | * out in specific ways for hardware access. | |
1248 | */ | |
1249 | BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8); | |
1250 | BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8); | |
1251 | BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8); | |
1252 | /* xhci_device_control has eight fields, and also | |
1253 | * embeds one xhci_slot_ctx and 31 xhci_ep_ctx | |
1254 | */ | |
1255 | BUILD_BUG_ON(sizeof(struct xhci_device_control) != (8+8+8*31)*32/8); | |
1256 | BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8); | |
1257 | BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8); | |
1258 | BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8); | |
1259 | BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8); | |
1260 | BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8); | |
1261 | /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */ | |
1262 | BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8); | |
1263 | BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8); | |
66d4eadd SS |
1264 | return 0; |
1265 | } | |
1266 | module_init(xhci_hcd_init); | |
1267 | ||
1268 | static void __exit xhci_hcd_cleanup(void) | |
1269 | { | |
1270 | #ifdef CONFIG_PCI | |
1271 | xhci_unregister_pci(); | |
1272 | #endif | |
1273 | } | |
1274 | module_exit(xhci_hcd_cleanup); |