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1da177e4 LT |
1 | /* |
2 | * Universal Host Controller Interface driver for USB. | |
3 | * | |
4 | * Maintainer: Alan Stern <stern@rowland.harvard.edu> | |
5 | * | |
6 | * (C) Copyright 1999 Linus Torvalds | |
7 | * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com | |
8 | * (C) Copyright 1999 Randy Dunlap | |
9 | * (C) Copyright 1999 Georg Acher, acher@in.tum.de | |
10 | * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de | |
11 | * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch | |
12 | * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at | |
13 | * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface | |
14 | * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). | |
15 | * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) | |
17230acd | 16 | * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu |
1da177e4 LT |
17 | * |
18 | * Intel documents this fairly well, and as far as I know there | |
19 | * are no royalties or anything like that, but even so there are | |
20 | * people who decided that they want to do the same thing in a | |
21 | * completely different way. | |
22 | * | |
1da177e4 LT |
23 | */ |
24 | ||
1da177e4 LT |
25 | #include <linux/module.h> |
26 | #include <linux/pci.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/ioport.h> | |
1da177e4 | 31 | #include <linux/slab.h> |
1da177e4 LT |
32 | #include <linux/errno.h> |
33 | #include <linux/unistd.h> | |
34 | #include <linux/interrupt.h> | |
35 | #include <linux/spinlock.h> | |
36 | #include <linux/debugfs.h> | |
37 | #include <linux/pm.h> | |
38 | #include <linux/dmapool.h> | |
39 | #include <linux/dma-mapping.h> | |
40 | #include <linux/usb.h> | |
41 | #include <linux/bitops.h> | |
b62df451 | 42 | #include <linux/dmi.h> |
1da177e4 LT |
43 | |
44 | #include <asm/uaccess.h> | |
45 | #include <asm/io.h> | |
46 | #include <asm/irq.h> | |
47 | #include <asm/system.h> | |
48 | ||
49 | #include "../core/hcd.h" | |
50 | #include "uhci-hcd.h" | |
75e2df60 | 51 | #include "pci-quirks.h" |
1da177e4 LT |
52 | |
53 | /* | |
54 | * Version Information | |
55 | */ | |
1da177e4 LT |
56 | #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ |
57 | Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ | |
58 | Alan Stern" | |
59 | #define DRIVER_DESC "USB Universal Host Controller Interface driver" | |
60 | ||
5f8364b7 AS |
61 | /* for flakey hardware, ignore overcurrent indicators */ |
62 | static int ignore_oc; | |
63 | module_param(ignore_oc, bool, S_IRUGO); | |
64 | MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications"); | |
65 | ||
1da177e4 LT |
66 | /* |
67 | * debug = 0, no debugging messages | |
687f5f34 AS |
68 | * debug = 1, dump failed URBs except for stalls |
69 | * debug = 2, dump all failed URBs (including stalls) | |
837cbb07 | 70 | * show all queues in /sys/kernel/debug/uhci/[pci_addr] |
687f5f34 | 71 | * debug = 3, show all TDs in URBs when dumping |
1da177e4 LT |
72 | */ |
73 | #ifdef DEBUG | |
8d402e1a | 74 | #define DEBUG_CONFIGURED 1 |
1da177e4 | 75 | static int debug = 1; |
1da177e4 LT |
76 | module_param(debug, int, S_IRUGO | S_IWUSR); |
77 | MODULE_PARM_DESC(debug, "Debug level"); | |
8d402e1a AS |
78 | |
79 | #else | |
80 | #define DEBUG_CONFIGURED 0 | |
81 | #define debug 0 | |
82 | #endif | |
83 | ||
1da177e4 LT |
84 | static char *errbuf; |
85 | #define ERRBUF_LEN (32 * 1024) | |
86 | ||
e18b890b | 87 | static struct kmem_cache *uhci_up_cachep; /* urb_priv */ |
1da177e4 | 88 | |
6c1b445c AS |
89 | static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state); |
90 | static void wakeup_rh(struct uhci_hcd *uhci); | |
1da177e4 | 91 | static void uhci_get_current_frame_number(struct uhci_hcd *uhci); |
1da177e4 | 92 | |
f3fe239b AS |
93 | /* |
94 | * Calculate the link pointer DMA value for the first Skeleton QH in a frame. | |
95 | */ | |
96 | static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame) | |
97 | { | |
98 | int skelnum; | |
99 | ||
100 | /* | |
101 | * The interrupt queues will be interleaved as evenly as possible. | |
102 | * There's not much to be done about period-1 interrupts; they have | |
103 | * to occur in every frame. But we can schedule period-2 interrupts | |
104 | * in odd-numbered frames, period-4 interrupts in frames congruent | |
105 | * to 2 (mod 4), and so on. This way each frame only has two | |
106 | * interrupt QHs, which will help spread out bandwidth utilization. | |
107 | * | |
108 | * ffs (Find First bit Set) does exactly what we need: | |
17230acd AS |
109 | * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8], |
110 | * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc. | |
f3fe239b | 111 | * ffs >= 7 => not on any high-period queue, so use |
17230acd | 112 | * period-1 QH = skelqh[9]. |
f3fe239b AS |
113 | * Add in UHCI_NUMFRAMES to insure at least one bit is set. |
114 | */ | |
115 | skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES); | |
116 | if (skelnum <= 1) | |
117 | skelnum = 9; | |
28b9325e | 118 | return LINK_TO_QH(uhci->skelqh[skelnum]); |
f3fe239b AS |
119 | } |
120 | ||
1da177e4 LT |
121 | #include "uhci-debug.c" |
122 | #include "uhci-q.c" | |
1f09df8b | 123 | #include "uhci-hub.c" |
1da177e4 | 124 | |
a8bed8b6 | 125 | /* |
bb200f6e | 126 | * Finish up a host controller reset and update the recorded state. |
a8bed8b6 | 127 | */ |
bb200f6e | 128 | static void finish_reset(struct uhci_hcd *uhci) |
1da177e4 | 129 | { |
c074b416 AS |
130 | int port; |
131 | ||
c074b416 AS |
132 | /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect |
133 | * bits in the port status and control registers. | |
134 | * We have to clear them by hand. | |
135 | */ | |
136 | for (port = 0; port < uhci->rh_numports; ++port) | |
137 | outw(0, uhci->io_addr + USBPORTSC1 + (port * 2)); | |
138 | ||
8e326406 | 139 | uhci->port_c_suspend = uhci->resuming_ports = 0; |
c8f4fe43 | 140 | uhci->rh_state = UHCI_RH_RESET; |
a8bed8b6 AS |
141 | uhci->is_stopped = UHCI_IS_STOPPED; |
142 | uhci_to_hcd(uhci)->state = HC_STATE_HALT; | |
6c1b445c | 143 | uhci_to_hcd(uhci)->poll_rh = 0; |
e323de46 AS |
144 | |
145 | uhci->dead = 0; /* Full reset resurrects the controller */ | |
1da177e4 LT |
146 | } |
147 | ||
4daaa87c AS |
148 | /* |
149 | * Last rites for a defunct/nonfunctional controller | |
02597d2d | 150 | * or one we don't want to use any more. |
4daaa87c | 151 | */ |
e323de46 | 152 | static void uhci_hc_died(struct uhci_hcd *uhci) |
4daaa87c | 153 | { |
e323de46 | 154 | uhci_get_current_frame_number(uhci); |
bb200f6e AS |
155 | uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr); |
156 | finish_reset(uhci); | |
e323de46 AS |
157 | uhci->dead = 1; |
158 | ||
159 | /* The current frame may already be partway finished */ | |
160 | ++uhci->frame_number; | |
4daaa87c AS |
161 | } |
162 | ||
a8bed8b6 | 163 | /* |
be3cbc5f DB |
164 | * Initialize a controller that was newly discovered or has lost power |
165 | * or otherwise been reset while it was suspended. In none of these cases | |
166 | * can we be sure of its previous state. | |
a8bed8b6 AS |
167 | */ |
168 | static void check_and_reset_hc(struct uhci_hcd *uhci) | |
169 | { | |
bb200f6e AS |
170 | if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr)) |
171 | finish_reset(uhci); | |
a8bed8b6 AS |
172 | } |
173 | ||
174 | /* | |
175 | * Store the basic register settings needed by the controller. | |
176 | */ | |
177 | static void configure_hc(struct uhci_hcd *uhci) | |
178 | { | |
179 | /* Set the frame length to the default: 1 ms exactly */ | |
180 | outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); | |
181 | ||
182 | /* Store the frame list base address */ | |
a1d59ce8 | 183 | outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD); |
a8bed8b6 AS |
184 | |
185 | /* Set the current frame number */ | |
c4334726 AS |
186 | outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER, |
187 | uhci->io_addr + USBFRNUM); | |
a8bed8b6 | 188 | |
f37be9b9 AS |
189 | /* Mark controller as not halted before we enable interrupts */ |
190 | uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED; | |
a8bed8b6 AS |
191 | mb(); |
192 | ||
193 | /* Enable PIRQ */ | |
194 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, | |
195 | USBLEGSUP_DEFAULT); | |
196 | } | |
197 | ||
198 | ||
c8f4fe43 | 199 | static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) |
1da177e4 | 200 | { |
c8f4fe43 | 201 | int port; |
1da177e4 | 202 | |
5f8364b7 AS |
203 | /* If we have to ignore overcurrent events then almost by definition |
204 | * we can't depend on resume-detect interrupts. */ | |
205 | if (ignore_oc) | |
206 | return 1; | |
207 | ||
c8f4fe43 AS |
208 | switch (to_pci_dev(uhci_dev(uhci))->vendor) { |
209 | default: | |
210 | break; | |
211 | ||
212 | case PCI_VENDOR_ID_GENESYS: | |
213 | /* Genesys Logic's GL880S controllers don't generate | |
214 | * resume-detect interrupts. | |
215 | */ | |
216 | return 1; | |
217 | ||
218 | case PCI_VENDOR_ID_INTEL: | |
219 | /* Some of Intel's USB controllers have a bug that causes | |
220 | * resume-detect interrupts if any port has an over-current | |
221 | * condition. To make matters worse, some motherboards | |
222 | * hardwire unused USB ports' over-current inputs active! | |
223 | * To prevent problems, we will not enable resume-detect | |
224 | * interrupts if any ports are OC. | |
225 | */ | |
226 | for (port = 0; port < uhci->rh_numports; ++port) { | |
227 | if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & | |
228 | USBPORTSC_OC) | |
229 | return 1; | |
230 | } | |
231 | break; | |
232 | } | |
233 | return 0; | |
234 | } | |
235 | ||
d8f12ab5 | 236 | static int global_suspend_mode_is_broken(struct uhci_hcd *uhci) |
b62df451 | 237 | { |
b62df451 | 238 | int port; |
1855256c | 239 | const char *sys_info; |
c80a70d5 | 240 | static char bad_Asus_board[] = "A7V8X"; |
b62df451 AS |
241 | |
242 | /* One of Asus's motherboards has a bug which causes it to | |
243 | * wake up immediately from suspend-to-RAM if any of the ports | |
244 | * are connected. In such cases we will not set EGSM. | |
245 | */ | |
c80a70d5 AS |
246 | sys_info = dmi_get_system_info(DMI_BOARD_NAME); |
247 | if (sys_info && !strcmp(sys_info, bad_Asus_board)) { | |
b62df451 AS |
248 | for (port = 0; port < uhci->rh_numports; ++port) { |
249 | if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & | |
250 | USBPORTSC_CCS) | |
251 | return 1; | |
252 | } | |
253 | } | |
254 | ||
255 | return 0; | |
256 | } | |
257 | ||
a8bed8b6 | 258 | static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state) |
c8f4fe43 AS |
259 | __releases(uhci->lock) |
260 | __acquires(uhci->lock) | |
261 | { | |
262 | int auto_stop; | |
d8f12ab5 | 263 | int int_enable, egsm_enable, wakeup_enable; |
58a97ffe | 264 | struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub; |
c8f4fe43 AS |
265 | |
266 | auto_stop = (new_state == UHCI_RH_AUTO_STOPPED); | |
58a97ffe | 267 | dev_dbg(&rhdev->dev, "%s%s\n", __func__, |
c8f4fe43 AS |
268 | (auto_stop ? " (auto-stop)" : "")); |
269 | ||
d8f12ab5 AS |
270 | /* Start off by assuming Resume-Detect interrupts and EGSM work |
271 | * and that remote wakeups should be enabled. | |
c8f4fe43 | 272 | */ |
b62df451 | 273 | egsm_enable = USBCMD_EGSM; |
d8f12ab5 | 274 | uhci->RD_enable = 1; |
1f09df8b | 275 | int_enable = USBINTR_RESUME; |
d8f12ab5 AS |
276 | wakeup_enable = 1; |
277 | ||
278 | /* In auto-stop mode wakeups must always be detected, but | |
279 | * Resume-Detect interrupts may be prohibited. (In the absence | |
280 | * of CONFIG_PM, they are always disallowed.) | |
281 | */ | |
282 | if (auto_stop) { | |
283 | if (!device_may_wakeup(&rhdev->dev)) | |
284 | int_enable = 0; | |
285 | ||
286 | /* In bus-suspend mode wakeups may be disabled, but if they are | |
287 | * allowed then so are Resume-Detect interrupts. | |
288 | */ | |
289 | } else { | |
58a97ffe | 290 | #ifdef CONFIG_PM |
d8f12ab5 AS |
291 | if (!rhdev->do_remote_wakeup) |
292 | wakeup_enable = 0; | |
58a97ffe | 293 | #endif |
d8f12ab5 AS |
294 | } |
295 | ||
296 | /* EGSM causes the root hub to echo a 'K' signal (resume) out any | |
297 | * port which requests a remote wakeup. According to the USB spec, | |
298 | * every hub is supposed to do this. But if we are ignoring | |
299 | * remote-wakeup requests anyway then there's no point to it. | |
300 | * We also shouldn't enable EGSM if it's broken. | |
301 | */ | |
302 | if (!wakeup_enable || global_suspend_mode_is_broken(uhci)) | |
303 | egsm_enable = 0; | |
304 | ||
305 | /* If we're ignoring wakeup events then there's no reason to | |
306 | * enable Resume-Detect interrupts. We also shouldn't enable | |
307 | * them if they are broken or disallowed. | |
308 | * | |
309 | * This logic may lead us to enabling RD but not EGSM. The UHCI | |
310 | * spec foolishly says that RD works only when EGSM is on, but | |
311 | * there's no harm in enabling it anyway -- perhaps some chips | |
312 | * will implement it! | |
313 | */ | |
314 | if (!wakeup_enable || resume_detect_interrupts_are_broken(uhci) || | |
315 | !int_enable) | |
316 | uhci->RD_enable = int_enable = 0; | |
b62df451 | 317 | |
c8f4fe43 | 318 | outw(int_enable, uhci->io_addr + USBINTR); |
b62df451 | 319 | outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD); |
a8bed8b6 | 320 | mb(); |
c8f4fe43 AS |
321 | udelay(5); |
322 | ||
323 | /* If we're auto-stopping then no devices have been attached | |
324 | * for a while, so there shouldn't be any active URBs and the | |
325 | * controller should stop after a few microseconds. Otherwise | |
326 | * we will give the controller one frame to stop. | |
327 | */ | |
328 | if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) { | |
329 | uhci->rh_state = UHCI_RH_SUSPENDING; | |
330 | spin_unlock_irq(&uhci->lock); | |
331 | msleep(1); | |
332 | spin_lock_irq(&uhci->lock); | |
e323de46 | 333 | if (uhci->dead) |
4daaa87c | 334 | return; |
c8f4fe43 AS |
335 | } |
336 | if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) | |
58a97ffe | 337 | dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n"); |
1da177e4 | 338 | |
1da177e4 | 339 | uhci_get_current_frame_number(uhci); |
c8f4fe43 AS |
340 | |
341 | uhci->rh_state = new_state; | |
1da177e4 | 342 | uhci->is_stopped = UHCI_IS_STOPPED; |
d8f12ab5 AS |
343 | |
344 | /* If interrupts don't work and remote wakeup is enabled then | |
345 | * the suspended root hub needs to be polled. | |
346 | */ | |
347 | uhci_to_hcd(uhci)->poll_rh = (!int_enable && wakeup_enable); | |
1da177e4 | 348 | |
7d12e780 | 349 | uhci_scan_schedule(uhci); |
84afddd7 | 350 | uhci_fsbr_off(uhci); |
1da177e4 LT |
351 | } |
352 | ||
a8bed8b6 AS |
353 | static void start_rh(struct uhci_hcd *uhci) |
354 | { | |
f37be9b9 | 355 | uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; |
a8bed8b6 | 356 | uhci->is_stopped = 0; |
a8bed8b6 AS |
357 | |
358 | /* Mark it configured and running with a 64-byte max packet. | |
359 | * All interrupts are enabled, even though RESUME won't do anything. | |
360 | */ | |
361 | outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD); | |
362 | outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, | |
363 | uhci->io_addr + USBINTR); | |
364 | mb(); | |
6c1b445c AS |
365 | uhci->rh_state = UHCI_RH_RUNNING; |
366 | uhci_to_hcd(uhci)->poll_rh = 1; | |
a8bed8b6 AS |
367 | } |
368 | ||
369 | static void wakeup_rh(struct uhci_hcd *uhci) | |
c8f4fe43 AS |
370 | __releases(uhci->lock) |
371 | __acquires(uhci->lock) | |
1da177e4 | 372 | { |
be3cbc5f | 373 | dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev, |
441b62c1 | 374 | "%s%s\n", __func__, |
c8f4fe43 AS |
375 | uhci->rh_state == UHCI_RH_AUTO_STOPPED ? |
376 | " (auto-start)" : ""); | |
1da177e4 | 377 | |
c8f4fe43 AS |
378 | /* If we are auto-stopped then no devices are attached so there's |
379 | * no need for wakeup signals. Otherwise we send Global Resume | |
380 | * for 20 ms. | |
381 | */ | |
382 | if (uhci->rh_state == UHCI_RH_SUSPENDED) { | |
d8f12ab5 AS |
383 | unsigned egsm; |
384 | ||
385 | /* Keep EGSM on if it was set before */ | |
386 | egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM; | |
c8f4fe43 | 387 | uhci->rh_state = UHCI_RH_RESUMING; |
d8f12ab5 | 388 | outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD); |
c8f4fe43 AS |
389 | spin_unlock_irq(&uhci->lock); |
390 | msleep(20); | |
391 | spin_lock_irq(&uhci->lock); | |
e323de46 | 392 | if (uhci->dead) |
4daaa87c | 393 | return; |
1da177e4 | 394 | |
c8f4fe43 AS |
395 | /* End Global Resume and wait for EOP to be sent */ |
396 | outw(USBCMD_CF, uhci->io_addr + USBCMD); | |
a8bed8b6 | 397 | mb(); |
c8f4fe43 AS |
398 | udelay(4); |
399 | if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR) | |
400 | dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); | |
401 | } | |
1da177e4 | 402 | |
a8bed8b6 | 403 | start_rh(uhci); |
c8f4fe43 | 404 | |
6c1b445c AS |
405 | /* Restart root hub polling */ |
406 | mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); | |
1da177e4 LT |
407 | } |
408 | ||
7d12e780 | 409 | static irqreturn_t uhci_irq(struct usb_hcd *hcd) |
014e73c9 AS |
410 | { |
411 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
014e73c9 | 412 | unsigned short status; |
1da177e4 LT |
413 | |
414 | /* | |
014e73c9 AS |
415 | * Read the interrupt status, and write it back to clear the |
416 | * interrupt cause. Contrary to the UHCI specification, the | |
417 | * "HC Halted" status bit is persistent: it is RO, not R/WC. | |
1da177e4 | 418 | */ |
a8bed8b6 | 419 | status = inw(uhci->io_addr + USBSTS); |
014e73c9 AS |
420 | if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ |
421 | return IRQ_NONE; | |
a8bed8b6 | 422 | outw(status, uhci->io_addr + USBSTS); /* Clear it */ |
014e73c9 AS |
423 | |
424 | if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { | |
425 | if (status & USBSTS_HSE) | |
426 | dev_err(uhci_dev(uhci), "host system error, " | |
427 | "PCI problems?\n"); | |
428 | if (status & USBSTS_HCPE) | |
429 | dev_err(uhci_dev(uhci), "host controller process " | |
430 | "error, something bad happened!\n"); | |
4daaa87c | 431 | if (status & USBSTS_HCH) { |
442258e2 | 432 | spin_lock(&uhci->lock); |
4daaa87c AS |
433 | if (uhci->rh_state >= UHCI_RH_RUNNING) { |
434 | dev_err(uhci_dev(uhci), | |
435 | "host controller halted, " | |
014e73c9 | 436 | "very bad!\n"); |
8d402e1a AS |
437 | if (debug > 1 && errbuf) { |
438 | /* Print the schedule for debugging */ | |
439 | uhci_sprint_schedule(uhci, | |
440 | errbuf, ERRBUF_LEN); | |
441 | lprintk(errbuf); | |
442 | } | |
e323de46 | 443 | uhci_hc_died(uhci); |
1f09df8b AS |
444 | |
445 | /* Force a callback in case there are | |
446 | * pending unlinks */ | |
447 | mod_timer(&hcd->rh_timer, jiffies); | |
4daaa87c | 448 | } |
442258e2 | 449 | spin_unlock(&uhci->lock); |
1da177e4 | 450 | } |
1da177e4 LT |
451 | } |
452 | ||
014e73c9 | 453 | if (status & USBSTS_RD) |
6c1b445c | 454 | usb_hcd_poll_rh_status(hcd); |
1f09df8b | 455 | else { |
442258e2 | 456 | spin_lock(&uhci->lock); |
7d12e780 | 457 | uhci_scan_schedule(uhci); |
442258e2 | 458 | spin_unlock(&uhci->lock); |
1f09df8b | 459 | } |
1da177e4 | 460 | |
014e73c9 AS |
461 | return IRQ_HANDLED; |
462 | } | |
1da177e4 | 463 | |
014e73c9 AS |
464 | /* |
465 | * Store the current frame number in uhci->frame_number if the controller | |
c4334726 AS |
466 | * is runnning. Expand from 11 bits (of which we use only 10) to a |
467 | * full-sized integer. | |
468 | * | |
469 | * Like many other parts of the driver, this code relies on being polled | |
470 | * more than once per second as long as the controller is running. | |
014e73c9 AS |
471 | */ |
472 | static void uhci_get_current_frame_number(struct uhci_hcd *uhci) | |
473 | { | |
c4334726 AS |
474 | if (!uhci->is_stopped) { |
475 | unsigned delta; | |
476 | ||
477 | delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) & | |
478 | (UHCI_NUMFRAMES - 1); | |
479 | uhci->frame_number += delta; | |
480 | } | |
1da177e4 LT |
481 | } |
482 | ||
483 | /* | |
484 | * De-allocate all resources | |
485 | */ | |
486 | static void release_uhci(struct uhci_hcd *uhci) | |
487 | { | |
488 | int i; | |
489 | ||
8d402e1a AS |
490 | if (DEBUG_CONFIGURED) { |
491 | spin_lock_irq(&uhci->lock); | |
492 | uhci->is_initialized = 0; | |
493 | spin_unlock_irq(&uhci->lock); | |
494 | ||
495 | debugfs_remove(uhci->dentry); | |
496 | } | |
497 | ||
1da177e4 | 498 | for (i = 0; i < UHCI_NUM_SKELQH; i++) |
8b4cd421 | 499 | uhci_free_qh(uhci, uhci->skelqh[i]); |
1da177e4 | 500 | |
8b4cd421 | 501 | uhci_free_td(uhci, uhci->term_td); |
1da177e4 | 502 | |
8b4cd421 | 503 | dma_pool_destroy(uhci->qh_pool); |
1da177e4 | 504 | |
8b4cd421 | 505 | dma_pool_destroy(uhci->td_pool); |
1da177e4 | 506 | |
a1d59ce8 AS |
507 | kfree(uhci->frame_cpu); |
508 | ||
509 | dma_free_coherent(uhci_dev(uhci), | |
510 | UHCI_NUMFRAMES * sizeof(*uhci->frame), | |
511 | uhci->frame, uhci->frame_dma_handle); | |
1da177e4 LT |
512 | } |
513 | ||
be3cbc5f | 514 | static int uhci_init(struct usb_hcd *hcd) |
1da177e4 LT |
515 | { |
516 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
c074b416 AS |
517 | unsigned io_size = (unsigned) hcd->rsrc_len; |
518 | int port; | |
1da177e4 LT |
519 | |
520 | uhci->io_addr = (unsigned long) hcd->rsrc_start; | |
521 | ||
c074b416 AS |
522 | /* The UHCI spec says devices must have 2 ports, and goes on to say |
523 | * they may have more but gives no way to determine how many there | |
e07fefa6 | 524 | * are. However according to the UHCI spec, Bit 7 of the port |
c074b416 | 525 | * status and control register is always set to 1. So we try to |
e07fefa6 AS |
526 | * use this to our advantage. Another common failure mode when |
527 | * a nonexistent register is addressed is to return all ones, so | |
528 | * we test for that also. | |
c074b416 AS |
529 | */ |
530 | for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) { | |
531 | unsigned int portstatus; | |
532 | ||
533 | portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2)); | |
e07fefa6 | 534 | if (!(portstatus & 0x0080) || portstatus == 0xffff) |
c074b416 AS |
535 | break; |
536 | } | |
537 | if (debug) | |
538 | dev_info(uhci_dev(uhci), "detected %d ports\n", port); | |
539 | ||
e07fefa6 AS |
540 | /* Anything greater than 7 is weird so we'll ignore it. */ |
541 | if (port > UHCI_RH_MAXCHILD) { | |
c074b416 AS |
542 | dev_info(uhci_dev(uhci), "port count misdetected? " |
543 | "forcing to 2 ports\n"); | |
544 | port = 2; | |
545 | } | |
546 | uhci->rh_numports = port; | |
547 | ||
a8bed8b6 AS |
548 | /* Kick BIOS off this hardware and reset if the controller |
549 | * isn't already safely quiescent. | |
1da177e4 | 550 | */ |
a8bed8b6 | 551 | check_and_reset_hc(uhci); |
1da177e4 LT |
552 | return 0; |
553 | } | |
554 | ||
02597d2d AS |
555 | /* Make sure the controller is quiescent and that we're not using it |
556 | * any more. This is mainly for the benefit of programs which, like kexec, | |
557 | * expect the hardware to be idle: not doing DMA or generating IRQs. | |
558 | * | |
559 | * This routine may be called in a damaged or failing kernel. Hence we | |
560 | * do not acquire the spinlock before shutting down the controller. | |
561 | */ | |
562 | static void uhci_shutdown(struct pci_dev *pdev) | |
563 | { | |
564 | struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev); | |
565 | ||
e323de46 | 566 | uhci_hc_died(hcd_to_uhci(hcd)); |
02597d2d AS |
567 | } |
568 | ||
1da177e4 LT |
569 | /* |
570 | * Allocate a frame list, and then setup the skeleton | |
571 | * | |
572 | * The hardware doesn't really know any difference | |
573 | * in the queues, but the order does matter for the | |
17230acd AS |
574 | * protocols higher up. The order in which the queues |
575 | * are encountered by the hardware is: | |
1da177e4 | 576 | * |
17230acd | 577 | * - All isochronous events are handled before any |
1da177e4 LT |
578 | * of the queues. We don't do that here, because |
579 | * we'll create the actual TD entries on demand. | |
17230acd AS |
580 | * - The first queue is the high-period interrupt queue. |
581 | * - The second queue is the period-1 interrupt and async | |
582 | * (low-speed control, full-speed control, then bulk) queue. | |
583 | * - The third queue is the terminating bandwidth reclamation queue, | |
584 | * which contains no members, loops back to itself, and is present | |
585 | * only when FSBR is on and there are no full-speed control or bulk QHs. | |
1da177e4 LT |
586 | */ |
587 | static int uhci_start(struct usb_hcd *hcd) | |
588 | { | |
589 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
590 | int retval = -EBUSY; | |
c074b416 | 591 | int i; |
1da177e4 LT |
592 | struct dentry *dentry; |
593 | ||
6c1b445c | 594 | hcd->uses_new_polling = 1; |
1da177e4 | 595 | |
1da177e4 | 596 | spin_lock_init(&uhci->lock); |
c5e3b741 AS |
597 | setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout, |
598 | (unsigned long) uhci); | |
dccf4a48 | 599 | INIT_LIST_HEAD(&uhci->idle_qh_list); |
1da177e4 LT |
600 | init_waitqueue_head(&uhci->waitqh); |
601 | ||
8d402e1a AS |
602 | if (DEBUG_CONFIGURED) { |
603 | dentry = debugfs_create_file(hcd->self.bus_name, | |
604 | S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, | |
605 | uhci, &uhci_debug_operations); | |
606 | if (!dentry) { | |
607 | dev_err(uhci_dev(uhci), "couldn't create uhci " | |
608 | "debugfs entry\n"); | |
609 | retval = -ENOMEM; | |
610 | goto err_create_debug_entry; | |
611 | } | |
612 | uhci->dentry = dentry; | |
613 | } | |
614 | ||
a1d59ce8 AS |
615 | uhci->frame = dma_alloc_coherent(uhci_dev(uhci), |
616 | UHCI_NUMFRAMES * sizeof(*uhci->frame), | |
617 | &uhci->frame_dma_handle, 0); | |
618 | if (!uhci->frame) { | |
1da177e4 LT |
619 | dev_err(uhci_dev(uhci), "unable to allocate " |
620 | "consistent memory for frame list\n"); | |
a1d59ce8 | 621 | goto err_alloc_frame; |
1da177e4 | 622 | } |
a1d59ce8 | 623 | memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame)); |
1da177e4 | 624 | |
a1d59ce8 AS |
625 | uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu), |
626 | GFP_KERNEL); | |
627 | if (!uhci->frame_cpu) { | |
628 | dev_err(uhci_dev(uhci), "unable to allocate " | |
629 | "memory for frame pointers\n"); | |
630 | goto err_alloc_frame_cpu; | |
631 | } | |
1da177e4 LT |
632 | |
633 | uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci), | |
634 | sizeof(struct uhci_td), 16, 0); | |
635 | if (!uhci->td_pool) { | |
636 | dev_err(uhci_dev(uhci), "unable to create td dma_pool\n"); | |
637 | goto err_create_td_pool; | |
638 | } | |
639 | ||
640 | uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci), | |
641 | sizeof(struct uhci_qh), 16, 0); | |
642 | if (!uhci->qh_pool) { | |
643 | dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n"); | |
644 | goto err_create_qh_pool; | |
645 | } | |
646 | ||
2532178a | 647 | uhci->term_td = uhci_alloc_td(uhci); |
1da177e4 LT |
648 | if (!uhci->term_td) { |
649 | dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n"); | |
650 | goto err_alloc_term_td; | |
651 | } | |
652 | ||
653 | for (i = 0; i < UHCI_NUM_SKELQH; i++) { | |
dccf4a48 | 654 | uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL); |
1da177e4 LT |
655 | if (!uhci->skelqh[i]) { |
656 | dev_err(uhci_dev(uhci), "unable to allocate QH\n"); | |
657 | goto err_alloc_skelqh; | |
658 | } | |
659 | } | |
660 | ||
661 | /* | |
17230acd | 662 | * 8 Interrupt queues; link all higher int queues to int1 = async |
1da177e4 | 663 | */ |
17230acd AS |
664 | for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i) |
665 | uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh); | |
e009f1b2 AS |
666 | uhci->skel_async_qh->link = UHCI_PTR_TERM; |
667 | uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh); | |
1da177e4 LT |
668 | |
669 | /* This dummy TD is to work around a bug in Intel PIIX controllers */ | |
fa346568 | 670 | uhci_fill_td(uhci->term_td, 0, uhci_explen(0) | |
17230acd AS |
671 | (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0); |
672 | uhci->term_td->link = UHCI_PTR_TERM; | |
673 | uhci->skel_async_qh->element = uhci->skel_term_qh->element = | |
674 | LINK_TO_TD(uhci->term_td); | |
1da177e4 LT |
675 | |
676 | /* | |
677 | * Fill the frame list: make all entries point to the proper | |
678 | * interrupt queue. | |
1da177e4 LT |
679 | */ |
680 | for (i = 0; i < UHCI_NUMFRAMES; i++) { | |
1da177e4 LT |
681 | |
682 | /* Only place we don't use the frame list routines */ | |
f3fe239b | 683 | uhci->frame[i] = uhci_frame_skel_link(uhci, i); |
1da177e4 LT |
684 | } |
685 | ||
686 | /* | |
687 | * Some architectures require a full mb() to enforce completion of | |
a8bed8b6 | 688 | * the memory writes above before the I/O transfers in configure_hc(). |
1da177e4 LT |
689 | */ |
690 | mb(); | |
a8bed8b6 AS |
691 | |
692 | configure_hc(uhci); | |
8d402e1a | 693 | uhci->is_initialized = 1; |
a8bed8b6 | 694 | start_rh(uhci); |
1da177e4 LT |
695 | return 0; |
696 | ||
697 | /* | |
698 | * error exits: | |
699 | */ | |
1da177e4 | 700 | err_alloc_skelqh: |
8b4cd421 AS |
701 | for (i = 0; i < UHCI_NUM_SKELQH; i++) { |
702 | if (uhci->skelqh[i]) | |
1da177e4 | 703 | uhci_free_qh(uhci, uhci->skelqh[i]); |
8b4cd421 | 704 | } |
1da177e4 LT |
705 | |
706 | uhci_free_td(uhci, uhci->term_td); | |
1da177e4 LT |
707 | |
708 | err_alloc_term_td: | |
1da177e4 | 709 | dma_pool_destroy(uhci->qh_pool); |
1da177e4 LT |
710 | |
711 | err_create_qh_pool: | |
712 | dma_pool_destroy(uhci->td_pool); | |
1da177e4 LT |
713 | |
714 | err_create_td_pool: | |
a1d59ce8 AS |
715 | kfree(uhci->frame_cpu); |
716 | ||
717 | err_alloc_frame_cpu: | |
718 | dma_free_coherent(uhci_dev(uhci), | |
719 | UHCI_NUMFRAMES * sizeof(*uhci->frame), | |
720 | uhci->frame, uhci->frame_dma_handle); | |
1da177e4 | 721 | |
a1d59ce8 | 722 | err_alloc_frame: |
1da177e4 | 723 | debugfs_remove(uhci->dentry); |
1da177e4 LT |
724 | |
725 | err_create_debug_entry: | |
726 | return retval; | |
727 | } | |
728 | ||
729 | static void uhci_stop(struct usb_hcd *hcd) | |
730 | { | |
731 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
732 | ||
1da177e4 | 733 | spin_lock_irq(&uhci->lock); |
e323de46 AS |
734 | if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead) |
735 | uhci_hc_died(uhci); | |
7d12e780 | 736 | uhci_scan_schedule(uhci); |
1da177e4 | 737 | spin_unlock_irq(&uhci->lock); |
d23356da | 738 | synchronize_irq(hcd->irq); |
6c1b445c | 739 | |
c5e3b741 | 740 | del_timer_sync(&uhci->fsbr_timer); |
1da177e4 LT |
741 | release_uhci(uhci); |
742 | } | |
743 | ||
744 | #ifdef CONFIG_PM | |
a8bed8b6 AS |
745 | static int uhci_rh_suspend(struct usb_hcd *hcd) |
746 | { | |
747 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
be3cbc5f | 748 | int rc = 0; |
a8bed8b6 AS |
749 | |
750 | spin_lock_irq(&uhci->lock); | |
be3cbc5f DB |
751 | if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) |
752 | rc = -ESHUTDOWN; | |
cec3a53c AS |
753 | else if (uhci->dead) |
754 | ; /* Dead controllers tell no tales */ | |
755 | ||
756 | /* Once the controller is stopped, port resumes that are already | |
757 | * in progress won't complete. Hence if remote wakeup is enabled | |
758 | * for the root hub and any ports are in the middle of a resume or | |
759 | * remote wakeup, we must fail the suspend. | |
760 | */ | |
761 | else if (hcd->self.root_hub->do_remote_wakeup && | |
762 | uhci->resuming_ports) { | |
763 | dev_dbg(uhci_dev(uhci), "suspend failed because a port " | |
764 | "is resuming\n"); | |
765 | rc = -EBUSY; | |
766 | } else | |
4daaa87c | 767 | suspend_rh(uhci, UHCI_RH_SUSPENDED); |
a8bed8b6 | 768 | spin_unlock_irq(&uhci->lock); |
be3cbc5f | 769 | return rc; |
a8bed8b6 AS |
770 | } |
771 | ||
772 | static int uhci_rh_resume(struct usb_hcd *hcd) | |
773 | { | |
774 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
4daaa87c | 775 | int rc = 0; |
a8bed8b6 AS |
776 | |
777 | spin_lock_irq(&uhci->lock); | |
cfa59dab | 778 | if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) |
be3cbc5f | 779 | rc = -ESHUTDOWN; |
cfa59dab | 780 | else if (!uhci->dead) |
4daaa87c | 781 | wakeup_rh(uhci); |
a8bed8b6 | 782 | spin_unlock_irq(&uhci->lock); |
4daaa87c | 783 | return rc; |
a8bed8b6 AS |
784 | } |
785 | ||
6ec4beb5 | 786 | static int uhci_pci_suspend(struct usb_hcd *hcd) |
1da177e4 LT |
787 | { |
788 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
4daaa87c | 789 | int rc = 0; |
1da177e4 | 790 | |
441b62c1 | 791 | dev_dbg(uhci_dev(uhci), "%s\n", __func__); |
a8bed8b6 | 792 | |
1da177e4 | 793 | spin_lock_irq(&uhci->lock); |
e323de46 AS |
794 | if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead) |
795 | goto done_okay; /* Already suspended or dead */ | |
a8bed8b6 | 796 | |
4daaa87c AS |
797 | if (uhci->rh_state > UHCI_RH_SUSPENDED) { |
798 | dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n"); | |
4daaa87c AS |
799 | rc = -EBUSY; |
800 | goto done; | |
801 | }; | |
802 | ||
a8bed8b6 AS |
803 | /* All PCI host controllers are required to disable IRQ generation |
804 | * at the source, so we must turn off PIRQ. | |
805 | */ | |
806 | pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0); | |
42245e65 | 807 | mb(); |
1f09df8b | 808 | hcd->poll_rh = 0; |
a8bed8b6 AS |
809 | |
810 | /* FIXME: Enable non-PME# remote wakeup? */ | |
811 | ||
e323de46 AS |
812 | done_okay: |
813 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | |
4daaa87c | 814 | done: |
1da177e4 | 815 | spin_unlock_irq(&uhci->lock); |
4daaa87c | 816 | return rc; |
1da177e4 LT |
817 | } |
818 | ||
6ec4beb5 | 819 | static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated) |
1da177e4 LT |
820 | { |
821 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
1da177e4 | 822 | |
441b62c1 | 823 | dev_dbg(uhci_dev(uhci), "%s\n", __func__); |
a8bed8b6 | 824 | |
687f5f34 | 825 | /* Since we aren't in D3 any more, it's safe to set this flag |
e323de46 | 826 | * even if the controller was dead. |
8de98402 BH |
827 | */ |
828 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | |
42245e65 | 829 | mb(); |
8de98402 | 830 | |
1da177e4 | 831 | spin_lock_irq(&uhci->lock); |
1da177e4 | 832 | |
6ec4beb5 AS |
833 | /* Make sure resume from hibernation re-enumerates everything */ |
834 | if (hibernated) | |
835 | uhci_hc_died(uhci); | |
836 | ||
a8bed8b6 AS |
837 | /* FIXME: Disable non-PME# remote wakeup? */ |
838 | ||
e323de46 AS |
839 | /* The firmware or a boot kernel may have changed the controller |
840 | * settings during a system wakeup. Check it and reconfigure | |
841 | * to avoid problems. | |
a8bed8b6 AS |
842 | */ |
843 | check_and_reset_hc(uhci); | |
e323de46 AS |
844 | |
845 | /* If the controller was dead before, it's back alive now */ | |
a8bed8b6 AS |
846 | configure_hc(uhci); |
847 | ||
1c50c317 AS |
848 | if (uhci->rh_state == UHCI_RH_RESET) { |
849 | ||
850 | /* The controller had to be reset */ | |
851 | usb_root_hub_lost_power(hcd->self.root_hub); | |
a8bed8b6 | 852 | suspend_rh(uhci, UHCI_RH_SUSPENDED); |
1c50c317 | 853 | } |
c8f4fe43 | 854 | |
a8bed8b6 | 855 | spin_unlock_irq(&uhci->lock); |
6c1b445c | 856 | |
d8f12ab5 AS |
857 | /* If interrupts don't work and remote wakeup is enabled then |
858 | * the suspended root hub needs to be polled. | |
859 | */ | |
860 | if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup) { | |
1f09df8b | 861 | hcd->poll_rh = 1; |
6c1b445c | 862 | usb_hcd_poll_rh_status(hcd); |
1f09df8b | 863 | } |
1da177e4 LT |
864 | return 0; |
865 | } | |
866 | #endif | |
867 | ||
dccf4a48 | 868 | /* Wait until a particular device/endpoint's QH is idle, and free it */ |
1da177e4 | 869 | static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, |
dccf4a48 | 870 | struct usb_host_endpoint *hep) |
1da177e4 LT |
871 | { |
872 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
dccf4a48 AS |
873 | struct uhci_qh *qh; |
874 | ||
875 | spin_lock_irq(&uhci->lock); | |
876 | qh = (struct uhci_qh *) hep->hcpriv; | |
877 | if (qh == NULL) | |
878 | goto done; | |
1da177e4 | 879 | |
dccf4a48 AS |
880 | while (qh->state != QH_STATE_IDLE) { |
881 | ++uhci->num_waiting; | |
882 | spin_unlock_irq(&uhci->lock); | |
883 | wait_event_interruptible(uhci->waitqh, | |
884 | qh->state == QH_STATE_IDLE); | |
885 | spin_lock_irq(&uhci->lock); | |
886 | --uhci->num_waiting; | |
887 | } | |
888 | ||
889 | uhci_free_qh(uhci, qh); | |
890 | done: | |
891 | spin_unlock_irq(&uhci->lock); | |
1da177e4 LT |
892 | } |
893 | ||
894 | static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) | |
895 | { | |
896 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
c4334726 AS |
897 | unsigned frame_number; |
898 | unsigned delta; | |
1da177e4 LT |
899 | |
900 | /* Minimize latency by avoiding the spinlock */ | |
c4334726 AS |
901 | frame_number = uhci->frame_number; |
902 | barrier(); | |
903 | delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) & | |
904 | (UHCI_NUMFRAMES - 1); | |
905 | return frame_number + delta; | |
1da177e4 LT |
906 | } |
907 | ||
908 | static const char hcd_name[] = "uhci_hcd"; | |
909 | ||
910 | static const struct hc_driver uhci_driver = { | |
911 | .description = hcd_name, | |
912 | .product_desc = "UHCI Host Controller", | |
913 | .hcd_priv_size = sizeof(struct uhci_hcd), | |
914 | ||
915 | /* Generic hardware linkage */ | |
916 | .irq = uhci_irq, | |
917 | .flags = HCD_USB11, | |
918 | ||
919 | /* Basic lifecycle operations */ | |
be3cbc5f | 920 | .reset = uhci_init, |
1da177e4 LT |
921 | .start = uhci_start, |
922 | #ifdef CONFIG_PM | |
7be7d741 AS |
923 | .pci_suspend = uhci_pci_suspend, |
924 | .pci_resume = uhci_pci_resume, | |
0c0382e3 AS |
925 | .bus_suspend = uhci_rh_suspend, |
926 | .bus_resume = uhci_rh_resume, | |
1da177e4 LT |
927 | #endif |
928 | .stop = uhci_stop, | |
929 | ||
930 | .urb_enqueue = uhci_urb_enqueue, | |
931 | .urb_dequeue = uhci_urb_dequeue, | |
932 | ||
933 | .endpoint_disable = uhci_hcd_endpoint_disable, | |
934 | .get_frame_number = uhci_hcd_get_frame_number, | |
935 | ||
936 | .hub_status_data = uhci_hub_status_data, | |
937 | .hub_control = uhci_hub_control, | |
938 | }; | |
939 | ||
940 | static const struct pci_device_id uhci_pci_ids[] = { { | |
941 | /* handle any USB UHCI controller */ | |
c67808ee | 942 | PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0), |
1da177e4 LT |
943 | .driver_data = (unsigned long) &uhci_driver, |
944 | }, { /* end: all zeroes */ } | |
945 | }; | |
946 | ||
947 | MODULE_DEVICE_TABLE(pci, uhci_pci_ids); | |
948 | ||
949 | static struct pci_driver uhci_pci_driver = { | |
950 | .name = (char *)hcd_name, | |
951 | .id_table = uhci_pci_ids, | |
952 | ||
953 | .probe = usb_hcd_pci_probe, | |
954 | .remove = usb_hcd_pci_remove, | |
02597d2d | 955 | .shutdown = uhci_shutdown, |
1da177e4 | 956 | |
abb30641 AS |
957 | #ifdef CONFIG_PM_SLEEP |
958 | .driver = { | |
959 | .pm = &usb_hcd_pci_pm_ops | |
960 | }, | |
961 | #endif | |
1da177e4 LT |
962 | }; |
963 | ||
964 | static int __init uhci_hcd_init(void) | |
965 | { | |
966 | int retval = -ENOMEM; | |
967 | ||
1da177e4 LT |
968 | if (usb_disabled()) |
969 | return -ENODEV; | |
970 | ||
2b70f073 AS |
971 | printk(KERN_INFO "uhci_hcd: " DRIVER_DESC "%s\n", |
972 | ignore_oc ? ", overcurrent ignored" : ""); | |
9beeee65 | 973 | set_bit(USB_UHCI_LOADED, &usb_hcds_loaded); |
2b70f073 | 974 | |
8d402e1a | 975 | if (DEBUG_CONFIGURED) { |
1da177e4 LT |
976 | errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL); |
977 | if (!errbuf) | |
978 | goto errbuf_failed; | |
ec20df2e | 979 | uhci_debugfs_root = debugfs_create_dir("uhci", usb_debug_root); |
8d402e1a AS |
980 | if (!uhci_debugfs_root) |
981 | goto debug_failed; | |
1da177e4 LT |
982 | } |
983 | ||
1da177e4 | 984 | uhci_up_cachep = kmem_cache_create("uhci_urb_priv", |
20c2df83 | 985 | sizeof(struct urb_priv), 0, 0, NULL); |
1da177e4 LT |
986 | if (!uhci_up_cachep) |
987 | goto up_failed; | |
988 | ||
989 | retval = pci_register_driver(&uhci_pci_driver); | |
990 | if (retval) | |
991 | goto init_failed; | |
992 | ||
993 | return 0; | |
994 | ||
995 | init_failed: | |
1a1d92c1 | 996 | kmem_cache_destroy(uhci_up_cachep); |
1da177e4 LT |
997 | |
998 | up_failed: | |
999 | debugfs_remove(uhci_debugfs_root); | |
1000 | ||
1001 | debug_failed: | |
1bc3c9e1 | 1002 | kfree(errbuf); |
1da177e4 LT |
1003 | |
1004 | errbuf_failed: | |
1005 | ||
9beeee65 | 1006 | clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded); |
1da177e4 LT |
1007 | return retval; |
1008 | } | |
1009 | ||
1010 | static void __exit uhci_hcd_cleanup(void) | |
1011 | { | |
1012 | pci_unregister_driver(&uhci_pci_driver); | |
1a1d92c1 | 1013 | kmem_cache_destroy(uhci_up_cachep); |
1da177e4 | 1014 | debugfs_remove(uhci_debugfs_root); |
1bc3c9e1 | 1015 | kfree(errbuf); |
9beeee65 | 1016 | clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded); |
1da177e4 LT |
1017 | } |
1018 | ||
1019 | module_init(uhci_hcd_init); | |
1020 | module_exit(uhci_hcd_cleanup); | |
1021 | ||
1022 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
1023 | MODULE_DESCRIPTION(DRIVER_DESC); | |
1024 | MODULE_LICENSE("GPL"); |