projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
USB: make usb_release_interface static
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / host / sl811-hcd.c
CommitLineData
1da177e4
LT		 1/*
2 * SL811HS HCD (Host Controller Driver) for USB.
3 *
4 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
1e9a47b6
DB		 5 * Copyright (C) 2004-2005 David Brownell
6 *
1da177e4
LT		 7 * Periodic scheduling is based on Roman's OHCI code
8 * Copyright (C) 1999 Roman Weissgaerber
9 *
10 * The SL811HS controller handles host side USB (like the SL11H, but with
11 * another register set and SOF generation) as well as peripheral side USB
12 * (like the SL811S). This driver version doesn't implement the Gadget API
13 * for the peripheral role; or OTG (that'd need much external circuitry).
14 *
15 * For documentation, see the SL811HS spec and the "SL811HS Embedded Host"
16 * document (providing significant pieces missing from that spec); plus
17 * the SL811S spec if you want peripheral side info.
1e9a47b6 18 */
1da177e4
LT		 19
20/*
21 * Status: Passed basic stress testing, works with hubs, mice, keyboards,
22 * and usb-storage.
23 *
24 * TODO:
25 * - usb suspend/resume triggered by sl811 (with USB_SUSPEND)
26 * - various issues noted in the code
27 * - performance work; use both register banks; ...
28 * - use urb->iso_frame_desc[] with ISO transfers
29 */
30
31#undef VERBOSE
32#undef PACKET_TRACE
33
1da177e4
LT		 34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/kernel.h>
37#include <linux/delay.h>
38#include <linux/ioport.h>
39#include <linux/sched.h>
40#include <linux/slab.h>
1da177e4
LT		 41#include <linux/errno.h>
42#include <linux/init.h>
43#include <linux/timer.h>
44#include <linux/list.h>
45#include <linux/interrupt.h>
46#include <linux/usb.h>
325a4af6 47#include <linux/usb/sl811.h>
d052d1be 48#include <linux/platform_device.h>
1da177e4
LT		 49
50#include <asm/io.h>
51#include <asm/irq.h>
52#include <asm/system.h>
53#include <asm/byteorder.h>
54
55#include "../core/hcd.h"
56#include "sl811.h"
57
58
59MODULE_DESCRIPTION("SL811HS USB Host Controller Driver");
60MODULE_LICENSE("GPL");
61
1e9a47b6 62#define DRIVER_VERSION "19 May 2005"
1da177e4
LT		 63
64
65#ifndef DEBUG
66# define STUB_DEBUG_FILE
67#endif
68
69/* for now, use only one transfer register bank */
70#undef USE_B
71
72/* this doesn't understand urb->iso_frame_desc[], but if you had a driver
73 * that just queued one ISO frame per URB then iso transfers "should" work
74 * using the normal urb status fields.
75 */
76#define DISABLE_ISO
77
78// #define QUIRK2
79#define QUIRK3
80
81static const char hcd_name[] = "sl811-hcd";
82
83/*-------------------------------------------------------------------------*/
84
85static void port_power(struct sl811 *sl811, int is_on)
86{
87 struct usb_hcd *hcd = sl811_to_hcd(sl811);
88
89 /* hub is inactive unless the port is powered */
90 if (is_on) {
91 if (sl811->port1 & (1 << USB_PORT_FEAT_POWER))
92 return;
93
94 sl811->port1 = (1 << USB_PORT_FEAT_POWER);
95 sl811->irq_enable = SL11H_INTMASK_INSRMV;
96 hcd->self.controller->power.power_state = PMSG_ON;
97 } else {
98 sl811->port1 = 0;
99 sl811->irq_enable = 0;
100 hcd->state = HC_STATE_HALT;
101 hcd->self.controller->power.power_state = PMSG_SUSPEND;
102 }
103 sl811->ctrl1 = 0;
104 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
105 sl811_write(sl811, SL11H_IRQ_STATUS, ~0);
106
107 if (sl811->board && sl811->board->port_power) {
108 /* switch VBUS, at 500mA unless hub power budget gets set */
109 DBG("power %s\n", is_on ? "on" : "off");
110 sl811->board->port_power(hcd->self.controller, is_on);
111 }
112
113 /* reset as thoroughly as we can */
114 if (sl811->board && sl811->board->reset)
115 sl811->board->reset(hcd->self.controller);
1e9a47b6
DB		 116 else {
117 sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0);
118 mdelay(20);
119 }
1da177e4
LT		 120
121 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
122 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
123 sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT);
124 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
125
126 // if !is_on, put into lowpower mode now
127}
128
129/*-------------------------------------------------------------------------*/
130
131/* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue,
132 * and may start I/O. Endpoint queues are scanned during completion irq
093cf723 133 * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation.
1da177e4
LT		 134 *
135 * Using an external DMA engine to copy a packet at a time could work,
136 * though setup/teardown costs may be too big to make it worthwhile.
137 */
138
139/* SETUP starts a new control request. Devices are not allowed to
140 * STALL or NAK these; they must cancel any pending control requests.
141 */
142static void setup_packet(
143 struct sl811 *sl811,
144 struct sl811h_ep *ep,
145 struct urb *urb,
146 u8 bank,
147 u8 control
148)
149{
150 u8 addr;
151 u8 len;
152 void __iomem *data_reg;
153
154 addr = SL811HS_PACKET_BUF(bank == 0);
155 len = sizeof(struct usb_ctrlrequest);
156 data_reg = sl811->data_reg;
157 sl811_write_buf(sl811, addr, urb->setup_packet, len);
158
159 /* autoincrementing */
160 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
161 writeb(len, data_reg);
162 writeb(SL_SETUP /* | ep->epnum */, data_reg);
163 writeb(usb_pipedevice(urb->pipe), data_reg);
164
165 /* always OUT/data0 */ ;
166 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
167 control | SL11H_HCTLMASK_OUT);
168 ep->length = 0;
169 PACKET("SETUP qh%p\n", ep);
170}
171
172/* STATUS finishes control requests, often after IN or OUT data packets */
173static void status_packet(
174 struct sl811 *sl811,
175 struct sl811h_ep *ep,
176 struct urb *urb,
177 u8 bank,
178 u8 control
179)
180{
181 int do_out;
182 void __iomem *data_reg;
183
184 do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe);
185 data_reg = sl811->data_reg;
186
187 /* autoincrementing */
188 sl811_write(sl811, bank + SL11H_BUFADDRREG, 0);
189 writeb(0, data_reg);
190 writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg);
191 writeb(usb_pipedevice(urb->pipe), data_reg);
192
193 /* always data1; sometimes IN */
194 control |= SL11H_HCTLMASK_TOGGLE;
195 if (do_out)
196 control |= SL11H_HCTLMASK_OUT;
197 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
198 ep->length = 0;
199 PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "",
200 do_out ? "out" : "in", ep);
201}
202
203/* IN packets can be used with any type of endpoint. here we just
204 * start the transfer, data from the peripheral may arrive later.
205 * urb->iso_frame_desc is currently ignored here...
206 */
207static void in_packet(
208 struct sl811 *sl811,
209 struct sl811h_ep *ep,
210 struct urb *urb,
211 u8 bank,
212 u8 control
213)
214{
215 u8 addr;
216 u8 len;
217 void __iomem *data_reg;
218
219 /* avoid losing data on overflow */
220 len = ep->maxpacket;
221 addr = SL811HS_PACKET_BUF(bank == 0);
222 if (!(control & SL11H_HCTLMASK_ISOCH)
223 && usb_gettoggle(urb->dev, ep->epnum, 0))
224 control |= SL11H_HCTLMASK_TOGGLE;
225 data_reg = sl811->data_reg;
226
227 /* autoincrementing */
228 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
229 writeb(len, data_reg);
230 writeb(SL_IN | ep->epnum, data_reg);
231 writeb(usb_pipedevice(urb->pipe), data_reg);
232
233 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
234 ep->length = min((int)len,
235 urb->transfer_buffer_length - urb->actual_length);
236 PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
237 !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len);
238}
239
240/* OUT packets can be used with any type of endpoint.
241 * urb->iso_frame_desc is currently ignored here...
242 */
243static void out_packet(
244 struct sl811 *sl811,
245 struct sl811h_ep *ep,
246 struct urb *urb,
247 u8 bank,
248 u8 control
249)
250{
251 void *buf;
252 u8 addr;
253 u8 len;
254 void __iomem *data_reg;
255
256 buf = urb->transfer_buffer + urb->actual_length;
257 prefetch(buf);
258
259 len = min((int)ep->maxpacket,
260 urb->transfer_buffer_length - urb->actual_length);
261
262 if (!(control & SL11H_HCTLMASK_ISOCH)
263 && usb_gettoggle(urb->dev, ep->epnum, 1))
264 control |= SL11H_HCTLMASK_TOGGLE;
265 addr = SL811HS_PACKET_BUF(bank == 0);
266 data_reg = sl811->data_reg;
267
268 sl811_write_buf(sl811, addr, buf, len);
269
270 /* autoincrementing */
271 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
272 writeb(len, data_reg);
273 writeb(SL_OUT | ep->epnum, data_reg);
274 writeb(usb_pipedevice(urb->pipe), data_reg);
275
276 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
277 control | SL11H_HCTLMASK_OUT);
278 ep->length = len;
279 PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
280 !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len);
281}
282
283/*-------------------------------------------------------------------------*/
284
285/* caller updates on-chip enables later */
286
287static inline void sofirq_on(struct sl811 *sl811)
288{
289 if (sl811->irq_enable & SL11H_INTMASK_SOFINTR)
290 return;
291 VDBG("sof irq on\n");
292 sl811->irq_enable |= SL11H_INTMASK_SOFINTR;
293}
294
295static inline void sofirq_off(struct sl811 *sl811)
296{
297 if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR))
298 return;
299 VDBG("sof irq off\n");
300 sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR;
301}
302
303/*-------------------------------------------------------------------------*/
304
305/* pick the next endpoint for a transaction, and issue it.
306 * frames start with periodic transfers (after whatever is pending
307 * from the previous frame), and the rest of the time is async
308 * transfers, scheduled round-robin.
309 */
310static struct sl811h_ep *start(struct sl811 *sl811, u8 bank)
311{
312 struct sl811h_ep *ep;
313 struct urb *urb;
314 int fclock;
315 u8 control;
316
317 /* use endpoint at schedule head */
318 if (sl811->next_periodic) {
319 ep = sl811->next_periodic;
320 sl811->next_periodic = ep->next;
321 } else {
322 if (sl811->next_async)
323 ep = sl811->next_async;
324 else if (!list_empty(&sl811->async))
325 ep = container_of(sl811->async.next,
326 struct sl811h_ep, schedule);
327 else {
328 /* could set up the first fullspeed periodic
329 * transfer for the next frame ...
330 */
331 return NULL;
332 }
333
334#ifdef USE_B
335 if ((bank && sl811->active_b == ep) || sl811->active_a == ep)
336 return NULL;
337#endif
338
339 if (ep->schedule.next == &sl811->async)
340 sl811->next_async = NULL;
341 else
342 sl811->next_async = container_of(ep->schedule.next,
343 struct sl811h_ep, schedule);
344 }
345
346 if (unlikely(list_empty(&ep->hep->urb_list))) {
347 DBG("empty %p queue?\n", ep);
348 return NULL;
349 }
350
351 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
352 control = ep->defctrl;
353
354 /* if this frame doesn't have enough time left to transfer this
355 * packet, wait till the next frame. too-simple algorithm...
356 */
357 fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6;
358 fclock -= 100; /* setup takes not much time */
359 if (urb->dev->speed == USB_SPEED_LOW) {
360 if (control & SL11H_HCTLMASK_PREAMBLE) {
361 /* also note erratum 1: some hubs won't work */
362 fclock -= 800;
363 }
364 fclock -= ep->maxpacket << 8;
365
366 /* erratum 2: AFTERSOF only works for fullspeed */
367 if (fclock < 0) {
368 if (ep->period)
369 sl811->stat_overrun++;
370 sofirq_on(sl811);
371 return NULL;
372 }
373 } else {
374 fclock -= 12000 / 19; /* 19 64byte packets/msec */
375 if (fclock < 0) {
376 if (ep->period)
377 sl811->stat_overrun++;
378 control |= SL11H_HCTLMASK_AFTERSOF;
379
380 /* throttle bulk/control irq noise */
381 } else if (ep->nak_count)
382 control |= SL11H_HCTLMASK_AFTERSOF;
383 }
384
385
386 switch (ep->nextpid) {
387 case USB_PID_IN:
388 in_packet(sl811, ep, urb, bank, control);
389 break;
390 case USB_PID_OUT:
391 out_packet(sl811, ep, urb, bank, control);
392 break;
393 case USB_PID_SETUP:
394 setup_packet(sl811, ep, urb, bank, control);
395 break;
396 case USB_PID_ACK: /* for control status */
397 status_packet(sl811, ep, urb, bank, control);
398 break;
399 default:
400 DBG("bad ep%p pid %02x\n", ep, ep->nextpid);
401 ep = NULL;
402 }
403 return ep;
404}
405
406#define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2)
407
408static inline void start_transfer(struct sl811 *sl811)
409{
410 if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))
411 return;
412 if (sl811->active_a == NULL) {
413 sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF));
414 if (sl811->active_a != NULL)
415 sl811->jiffies_a = jiffies + MIN_JIFFIES;
416 }
417#ifdef USE_B
418 if (sl811->active_b == NULL) {
419 sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF));
420 if (sl811->active_b != NULL)
421 sl811->jiffies_b = jiffies + MIN_JIFFIES;
422 }
423#endif
424}
425
426static void finish_request(
427 struct sl811 *sl811,
428 struct sl811h_ep *ep,
429 struct urb *urb,
1da177e4
LT		 430 int status
431) __releases(sl811->lock) __acquires(sl811->lock)
432{
433 unsigned i;
434
435 if (usb_pipecontrol(urb->pipe))
436 ep->nextpid = USB_PID_SETUP;
437
438 spin_lock(&urb->lock);
439 if (urb->status == -EINPROGRESS)
440 urb->status = status;
1e9a47b6 441 urb->hcpriv = NULL;
1da177e4
LT		 442 spin_unlock(&urb->lock);
443
444 spin_unlock(&sl811->lock);
7d12e780 445 usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb);
1da177e4
LT		 446 spin_lock(&sl811->lock);
447
448 /* leave active endpoints in the schedule */
449 if (!list_empty(&ep->hep->urb_list))
450 return;
451
452 /* async deschedule? */
453 if (!list_empty(&ep->schedule)) {
454 list_del_init(&ep->schedule);
455 if (ep == sl811->next_async)
456 sl811->next_async = NULL;
457 return;
458 }
459
460 /* periodic deschedule */
461 DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
462 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
463 struct sl811h_ep *temp;
464 struct sl811h_ep **prev = &sl811->periodic[i];
465
466 while (*prev && ((temp = *prev) != ep))
467 prev = &temp->next;
468 if (*prev)
469 *prev = ep->next;
470 sl811->load[i] -= ep->load;
1e9a47b6 471 }
1da177e4
LT		 472 ep->branch = PERIODIC_SIZE;
473 sl811->periodic_count--;
474 sl811_to_hcd(sl811)->self.bandwidth_allocated
475 -= ep->load / ep->period;
476 if (ep == sl811->next_periodic)
477 sl811->next_periodic = ep->next;
478
479 /* we might turn SOFs back on again for the async schedule */
480 if (sl811->periodic_count == 0)
481 sofirq_off(sl811);
482}
483
484static void
7d12e780 485done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank)
1da177e4
LT		 486{
487 u8 status;
488 struct urb *urb;
489 int urbstat = -EINPROGRESS;
490
491 if (unlikely(!ep))
492 return;
493
494 status = sl811_read(sl811, bank + SL11H_PKTSTATREG);
495
496 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
497
498 /* we can safely ignore NAKs */
499 if (status & SL11H_STATMASK_NAK) {
500 // PACKET("...NAK_%02x qh%p\n", bank, ep);
501 if (!ep->period)
502 ep->nak_count++;
503 ep->error_count = 0;
504
505 /* ACK advances transfer, toggle, and maybe queue */
506 } else if (status & SL11H_STATMASK_ACK) {
507 struct usb_device *udev = urb->dev;
508 int len;
509 unsigned char *buf;
510
511 /* urb->iso_frame_desc is currently ignored here... */
512
513 ep->nak_count = ep->error_count = 0;
514 switch (ep->nextpid) {
515 case USB_PID_OUT:
516 // PACKET("...ACK/out_%02x qh%p\n", bank, ep);
517 urb->actual_length += ep->length;
518 usb_dotoggle(udev, ep->epnum, 1);
519 if (urb->actual_length
520 == urb->transfer_buffer_length) {
521 if (usb_pipecontrol(urb->pipe))
522 ep->nextpid = USB_PID_ACK;
523
524 /* some bulk protocols terminate OUT transfers
525 * by a short packet, using ZLPs not padding.
526 */
527 else if (ep->length < ep->maxpacket
528 || !(urb->transfer_flags
529 & URB_ZERO_PACKET))
530 urbstat = 0;
531 }
532 break;
533 case USB_PID_IN:
534 // PACKET("...ACK/in_%02x qh%p\n", bank, ep);
535 buf = urb->transfer_buffer + urb->actual_length;
536 prefetchw(buf);
537 len = ep->maxpacket - sl811_read(sl811,
538 bank + SL11H_XFERCNTREG);
539 if (len > ep->length) {
540 len = ep->length;
541 urb->status = -EOVERFLOW;
542 }
543 urb->actual_length += len;
544 sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0),
545 buf, len);
546 usb_dotoggle(udev, ep->epnum, 0);
547 if (urb->actual_length == urb->transfer_buffer_length)
548 urbstat = 0;
549 else if (len < ep->maxpacket) {
550 if (urb->transfer_flags & URB_SHORT_NOT_OK)
551 urbstat = -EREMOTEIO;
552 else
553 urbstat = 0;
554 }
555 if (usb_pipecontrol(urb->pipe)
556 && (urbstat == -EREMOTEIO
557 || urbstat == 0)) {
558
559 /* NOTE if the status stage STALLs (why?),
560 * this reports the wrong urb status.
561 */
562 spin_lock(&urb->lock);
563 if (urb->status == -EINPROGRESS)
564 urb->status = urbstat;
565 spin_unlock(&urb->lock);
566
567 urb = NULL;
568 ep->nextpid = USB_PID_ACK;
569 }
570 break;
571 case USB_PID_SETUP:
572 // PACKET("...ACK/setup_%02x qh%p\n", bank, ep);
573 if (urb->transfer_buffer_length == urb->actual_length)
574 ep->nextpid = USB_PID_ACK;
575 else if (usb_pipeout(urb->pipe)) {
576 usb_settoggle(udev, 0, 1, 1);
577 ep->nextpid = USB_PID_OUT;
578 } else {
579 usb_settoggle(udev, 0, 0, 1);
580 ep->nextpid = USB_PID_IN;
581 }
582 break;
583 case USB_PID_ACK:
584 // PACKET("...ACK/status_%02x qh%p\n", bank, ep);
585 urbstat = 0;
586 break;
587 }
588
589 /* STALL stops all transfers */
590 } else if (status & SL11H_STATMASK_STALL) {
591 PACKET("...STALL_%02x qh%p\n", bank, ep);
592 ep->nak_count = ep->error_count = 0;
593 urbstat = -EPIPE;
594
595 /* error? retry, until "3 strikes" */
596 } else if (++ep->error_count >= 3) {
597 if (status & SL11H_STATMASK_TMOUT)
38e2bfc9 598 urbstat = -ETIME;
1da177e4
LT		 599 else if (status & SL11H_STATMASK_OVF)
600 urbstat = -EOVERFLOW;
601 else
602 urbstat = -EPROTO;
603 ep->error_count = 0;
604 PACKET("...3STRIKES_%02x %02x qh%p stat %d\n",
605 bank, status, ep, urbstat);
606 }
607
608 if (urb && (urbstat != -EINPROGRESS || urb->status != -EINPROGRESS))
7d12e780 609 finish_request(sl811, ep, urb, urbstat);
1da177e4
LT		 610}
611
612static inline u8 checkdone(struct sl811 *sl811)
613{
614 u8 ctl;
615 u8 irqstat = 0;
616
617 if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) {
618 ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG));
619 if (ctl & SL11H_HCTLMASK_ARM)
620 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
621 DBG("%s DONE_A: ctrl %02x sts %02x\n",
622 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
623 ctl,
624 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
625 irqstat |= SL11H_INTMASK_DONE_A;
626 }
627#ifdef USE_B
628 if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) {
629 ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG));
630 if (ctl & SL11H_HCTLMASK_ARM)
631 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
632 DBG("%s DONE_B: ctrl %02x sts %02x\n",
633 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
634 ctl,
635 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
636 irqstat |= SL11H_INTMASK_DONE_A;
637 }
638#endif
639 return irqstat;
640}
641
7d12e780 642static irqreturn_t sl811h_irq(struct usb_hcd *hcd)
1da177e4
LT		 643{
644 struct sl811 *sl811 = hcd_to_sl811(hcd);
645 u8 irqstat;
646 irqreturn_t ret = IRQ_NONE;
647 unsigned retries = 5;
648
649 spin_lock(&sl811->lock);
650
651retry:
652 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP;
653 if (irqstat) {
654 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
655 irqstat &= sl811->irq_enable;
656 }
657
658#ifdef QUIRK2
659 /* this may no longer be necessary ... */
1e9a47b6 660 if (irqstat == 0) {
1da177e4 661 irqstat = checkdone(sl811);
1e9a47b6 662 if (irqstat)
1da177e4
LT		 663 sl811->stat_lost++;
664 }
665#endif
666
667 /* USB packets, not necessarily handled in the order they're
668 * issued ... that's fine if they're different endpoints.
669 */
670 if (irqstat & SL11H_INTMASK_DONE_A) {
7d12e780 671 done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF));
1da177e4
LT		 672 sl811->active_a = NULL;
673 sl811->stat_a++;
674 }
675#ifdef USE_B
676 if (irqstat & SL11H_INTMASK_DONE_B) {
7d12e780 677 done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF));
1da177e4
LT		 678 sl811->active_b = NULL;
679 sl811->stat_b++;
680 }
681#endif
682 if (irqstat & SL11H_INTMASK_SOFINTR) {
683 unsigned index;
684
685 index = sl811->frame++ % (PERIODIC_SIZE - 1);
686 sl811->stat_sof++;
687
688 /* be graceful about almost-inevitable periodic schedule
689 * overruns: continue the previous frame's transfers iff
690 * this one has nothing scheduled.
691 */
692 if (sl811->next_periodic) {
693 // ERR("overrun to slot %d\n", index);
694 sl811->stat_overrun++;
695 }
696 if (sl811->periodic[index])
697 sl811->next_periodic = sl811->periodic[index];
698 }
699
700 /* khubd manages debouncing and wakeup */
701 if (irqstat & SL11H_INTMASK_INSRMV) {
702 sl811->stat_insrmv++;
703
704 /* most stats are reset for each VBUS session */
705 sl811->stat_wake = 0;
706 sl811->stat_sof = 0;
707 sl811->stat_a = 0;
708 sl811->stat_b = 0;
709 sl811->stat_lost = 0;
710
711 sl811->ctrl1 = 0;
712 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
713
714 sl811->irq_enable = SL11H_INTMASK_INSRMV;
715 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
716
717 /* usbcore nukes other pending transactions on disconnect */
718 if (sl811->active_a) {
719 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
720 finish_request(sl811, sl811->active_a,
1e9a47b6
DB		 721 container_of(sl811->active_a
722 ->hep->urb_list.next,
1da177e4 723 struct urb, urb_list),
7d12e780 724 -ESHUTDOWN);
1da177e4
LT		 725 sl811->active_a = NULL;
726 }
727#ifdef USE_B
728 if (sl811->active_b) {
729 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
730 finish_request(sl811, sl811->active_b,
1e9a47b6
DB		 731 container_of(sl811->active_b
732 ->hep->urb_list.next,
1da177e4
LT		 733 struct urb, urb_list),
734 NULL, -ESHUTDOWN);
735 sl811->active_b = NULL;
736 }
737#endif
738
093cf723 739 /* port status seems weird until after reset, so
1da177e4
LT		 740 * force the reset and make khubd clean up later.
741 */
742 sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION)
743 | (1 << USB_PORT_FEAT_CONNECTION);
744
745 } else if (irqstat & SL11H_INTMASK_RD) {
746 if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) {
747 DBG("wakeup\n");
748 sl811->port1 |= 1 << USB_PORT_FEAT_C_SUSPEND;
749 sl811->stat_wake++;
750 } else
751 irqstat &= ~SL11H_INTMASK_RD;
752 }
753
754 if (irqstat) {
755 if (sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))
756 start_transfer(sl811);
757 ret = IRQ_HANDLED;
758 if (retries--)
759 goto retry;
760 }
761
1e9a47b6 762 if (sl811->periodic_count == 0 && list_empty(&sl811->async))
1da177e4
LT		 763 sofirq_off(sl811);
764 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
765
766 spin_unlock(&sl811->lock);
767
768 return ret;
769}
770
771/*-------------------------------------------------------------------------*/
772
773/* usb 1.1 says max 90% of a frame is available for periodic transfers.
774 * this driver doesn't promise that much since it's got to handle an
775 * IRQ per packet; irq handling latencies also use up that time.
4b2e790a
DB		 776 *
777 * NOTE: the periodic schedule is a sparse tree, with the load for
778 * each branch minimized. see fig 3.5 in the OHCI spec for example.
1da177e4
LT		 779 */
780#define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */
781
782static int balance(struct sl811 *sl811, u16 period, u16 load)
783{
784 int i, branch = -ENOSPC;
785
786 /* search for the least loaded schedule branch of that period
787 * which has enough bandwidth left unreserved.
788 */
789 for (i = 0; i < period ; i++) {
790 if (branch < 0 || sl811->load[branch] > sl811->load[i]) {
791 int j;
792
793 for (j = i; j < PERIODIC_SIZE; j += period) {
794 if ((sl811->load[j] + load)
795 > MAX_PERIODIC_LOAD)
796 break;
797 }
798 if (j < PERIODIC_SIZE)
799 continue;
1e9a47b6 800 branch = i;
1da177e4
LT		 801 }
802 }
803 return branch;
804}
805
806/*-------------------------------------------------------------------------*/
807
808static int sl811h_urb_enqueue(
809 struct usb_hcd *hcd,
810 struct usb_host_endpoint *hep,
811 struct urb *urb,
55016f10 812 gfp_t mem_flags
1da177e4
LT		 813) {
814 struct sl811 *sl811 = hcd_to_sl811(hcd);
815 struct usb_device *udev = urb->dev;
816 unsigned int pipe = urb->pipe;
817 int is_out = !usb_pipein(pipe);
818 int type = usb_pipetype(pipe);
819 int epnum = usb_pipeendpoint(pipe);
820 struct sl811h_ep *ep = NULL;
821 unsigned long flags;
822 int i;
823 int retval = 0;
824
825#ifdef DISABLE_ISO
826 if (type == PIPE_ISOCHRONOUS)
827 return -ENOSPC;
828#endif
829
830 /* avoid all allocations within spinlocks */
831 if (!hep->hcpriv)
7b842b6e 832 ep = kzalloc(sizeof *ep, mem_flags);
1da177e4
LT		 833
834 spin_lock_irqsave(&sl811->lock, flags);
835
836 /* don't submit to a dead or disabled port */
837 if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))
838 || !HC_IS_RUNNING(hcd->state)) {
839 retval = -ENODEV;
4b2e790a 840 kfree(ep);
1da177e4
LT		 841 goto fail;
842 }
843
844 if (hep->hcpriv) {
845 kfree(ep);
846 ep = hep->hcpriv;
847 } else if (!ep) {
848 retval = -ENOMEM;
849 goto fail;
850
851 } else {
852 INIT_LIST_HEAD(&ep->schedule);
6a8e87b2 853 ep->udev = udev;
1da177e4
LT		 854 ep->epnum = epnum;
855 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
856 ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE;
857 usb_settoggle(udev, epnum, is_out, 0);
858
859 if (type == PIPE_CONTROL)
860 ep->nextpid = USB_PID_SETUP;
861 else if (is_out)
862 ep->nextpid = USB_PID_OUT;
863 else
864 ep->nextpid = USB_PID_IN;
865
866 if (ep->maxpacket > H_MAXPACKET) {
867 /* iso packets up to 240 bytes could work... */
868 DBG("dev %d ep%d maxpacket %d\n",
869 udev->devnum, epnum, ep->maxpacket);
870 retval = -EINVAL;
871 goto fail;
872 }
873
874 if (udev->speed == USB_SPEED_LOW) {
875 /* send preamble for external hub? */
876 if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD))
877 ep->defctrl |= SL11H_HCTLMASK_PREAMBLE;
878 }
879 switch (type) {
880 case PIPE_ISOCHRONOUS:
881 case PIPE_INTERRUPT:
882 if (urb->interval > PERIODIC_SIZE)
883 urb->interval = PERIODIC_SIZE;
884 ep->period = urb->interval;
885 ep->branch = PERIODIC_SIZE;
886 if (type == PIPE_ISOCHRONOUS)
887 ep->defctrl |= SL11H_HCTLMASK_ISOCH;
888 ep->load = usb_calc_bus_time(udev->speed, !is_out,
889 (type == PIPE_ISOCHRONOUS),
890 usb_maxpacket(udev, pipe, is_out))
891 / 1000;
892 break;
893 }
894
1e9a47b6 895 ep->hep = hep;
1da177e4
LT		 896 hep->hcpriv = ep;
897 }
898
899 /* maybe put endpoint into schedule */
900 switch (type) {
901 case PIPE_CONTROL:
902 case PIPE_BULK:
903 if (list_empty(&ep->schedule))
904 list_add_tail(&ep->schedule, &sl811->async);
905 break;
906 case PIPE_ISOCHRONOUS:
907 case PIPE_INTERRUPT:
908 urb->interval = ep->period;
4b2e790a
DB		 909 if (ep->branch < PERIODIC_SIZE) {
910 /* NOTE: the phase is correct here, but the value
911 * needs offsetting by the transfer queue depth.
912 * All current drivers ignore start_frame, so this
913 * is unlikely to ever matter...
914 */
915 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
916 + ep->branch;
1da177e4 917 break;
4b2e790a 918 }
1da177e4
LT		 919
920 retval = balance(sl811, ep->period, ep->load);
921 if (retval < 0)
922 goto fail;
923 ep->branch = retval;
924 retval = 0;
925 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
926 + ep->branch;
927
928 /* sort each schedule branch by period (slow before fast)
929 * to share the faster parts of the tree without needing
930 * dummy/placeholder nodes
931 */
932 DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
933 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
934 struct sl811h_ep **prev = &sl811->periodic[i];
935 struct sl811h_ep *here = *prev;
936
937 while (here && ep != here) {
938 if (ep->period > here->period)
939 break;
940 prev = &here->next;
941 here = *prev;
942 }
943 if (ep != here) {
944 ep->next = here;
945 *prev = ep;
946 }
947 sl811->load[i] += ep->load;
948 }
949 sl811->periodic_count++;
950 hcd->self.bandwidth_allocated += ep->load / ep->period;
951 sofirq_on(sl811);
952 }
953
954 /* in case of unlink-during-submit */
955 spin_lock(&urb->lock);
956 if (urb->status != -EINPROGRESS) {
957 spin_unlock(&urb->lock);
7d12e780 958 finish_request(sl811, ep, urb, 0);
1da177e4
LT		 959 retval = 0;
960 goto fail;
961 }
962 urb->hcpriv = hep;
963 spin_unlock(&urb->lock);
964
965 start_transfer(sl811);
966 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
967fail:
968 spin_unlock_irqrestore(&sl811->lock, flags);
969 return retval;
970}
971
972static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
973{
974 struct sl811 *sl811 = hcd_to_sl811(hcd);
1e9a47b6 975 struct usb_host_endpoint *hep;
1da177e4
LT		 976 unsigned long flags;
977 struct sl811h_ep *ep;
978 int retval = 0;
979
1e9a47b6
DB		 980 spin_lock_irqsave(&sl811->lock, flags);
981 hep = urb->hcpriv;
1da177e4 982 if (!hep)
1e9a47b6 983 goto fail;
1da177e4 984
1da177e4
LT		 985 ep = hep->hcpriv;
986 if (ep) {
987 /* finish right away if this urb can't be active ...
988 * note that some drivers wrongly expect delays
989 */
990 if (ep->hep->urb_list.next != &urb->urb_list) {
991 /* not front of queue? never active */
992
993 /* for active transfers, we expect an IRQ */
994 } else if (sl811->active_a == ep) {
995 if (time_before_eq(sl811->jiffies_a, jiffies)) {
996 /* happens a lot with lowspeed?? */
997 DBG("giveup on DONE_A: ctrl %02x sts %02x\n",
998 sl811_read(sl811,
999 SL811_EP_A(SL11H_HOSTCTLREG)),
1000 sl811_read(sl811,
1001 SL811_EP_A(SL11H_PKTSTATREG)));
1002 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1003 0);
1004 sl811->active_a = NULL;
1005 } else
1006 urb = NULL;
1007#ifdef USE_B
1008 } else if (sl811->active_b == ep) {
1009 if (time_before_eq(sl811->jiffies_a, jiffies)) {
1010 /* happens a lot with lowspeed?? */
1011 DBG("giveup on DONE_B: ctrl %02x sts %02x\n",
1012 sl811_read(sl811,
1013 SL811_EP_B(SL11H_HOSTCTLREG)),
1014 sl811_read(sl811,
1015 SL811_EP_B(SL11H_PKTSTATREG)));
1016 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG),
1017 0);
1018 sl811->active_b = NULL;
1019 } else
1020 urb = NULL;
1021#endif
1022 } else {
1023 /* front of queue for inactive endpoint */
1024 }
1025
1026 if (urb)
7d12e780 1027 finish_request(sl811, ep, urb, 0);
1da177e4
LT		 1028 else
1029 VDBG("dequeue, urb %p active %s; wait4irq\n", urb,
1030 (sl811->active_a == ep) ? "A" : "B");
1031 } else
1e9a47b6 1032fail:
1da177e4
LT		 1033 retval = -EINVAL;
1034 spin_unlock_irqrestore(&sl811->lock, flags);
1035 return retval;
1036}
1037
1038static void
1039sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
1040{
1041 struct sl811h_ep *ep = hep->hcpriv;
1042
1043 if (!ep)
1044 return;
1045
1046 /* assume we'd just wait for the irq */
1047 if (!list_empty(&hep->urb_list))
1048 msleep(3);
1049 if (!list_empty(&hep->urb_list))
1050 WARN("ep %p not empty?\n", ep);
1051
1da177e4
LT		 1052 kfree(ep);
1053 hep->hcpriv = NULL;
1054}
1055
1056static int
1057sl811h_get_frame(struct usb_hcd *hcd)
1058{
1059 struct sl811 *sl811 = hcd_to_sl811(hcd);
1060
1061 /* wrong except while periodic transfers are scheduled;
1062 * never matches the on-the-wire frame;
1063 * subject to overruns.
1064 */
1065 return sl811->frame;
1066}
1067
1068
1069/*-------------------------------------------------------------------------*/
1070
1071/* the virtual root hub timer IRQ checks for hub status */
1072static int
1073sl811h_hub_status_data(struct usb_hcd *hcd, char *buf)
1074{
1075 struct sl811 *sl811 = hcd_to_sl811(hcd);
1076#ifdef QUIRK3
1077 unsigned long flags;
1078
1079 /* non-SMP HACK: use root hub timer as i/o watchdog
1080 * this seems essential when SOF IRQs aren't in use...
1081 */
1082 local_irq_save(flags);
1083 if (!timer_pending(&sl811->timer)) {
7d12e780 1084 if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE)
1da177e4
LT		 1085 sl811->stat_lost++;
1086 }
1087 local_irq_restore(flags);
1088#endif
1089
1090 if (!(sl811->port1 & (0xffff << 16)))
1091 return 0;
1092
1093 /* tell khubd port 1 changed */
1094 *buf = (1 << 1);
1095 return 1;
1096}
1097
1098static void
1099sl811h_hub_descriptor (
1100 struct sl811 *sl811,
1101 struct usb_hub_descriptor *desc
1102) {
1103 u16 temp = 0;
1104
1105 desc->bDescriptorType = 0x29;
1106 desc->bHubContrCurrent = 0;
1107
1108 desc->bNbrPorts = 1;
1109 desc->bDescLength = 9;
1110
1111 /* per-port power switching (gang of one!), or none */
1112 desc->bPwrOn2PwrGood = 0;
1113 if (sl811->board && sl811->board->port_power) {
1114 desc->bPwrOn2PwrGood = sl811->board->potpg;
1115 if (!desc->bPwrOn2PwrGood)
1116 desc->bPwrOn2PwrGood = 10;
1117 temp = 0x0001;
1118 } else
1119 temp = 0x0002;
1120
1121 /* no overcurrent errors detection/handling */
1122 temp |= 0x0010;
1123
1124 desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
1125
1126 /* two bitmaps: ports removable, and legacy PortPwrCtrlMask */
4b2e790a 1127 desc->bitmap[0] = 0 << 1;
1da177e4
LT		 1128 desc->bitmap[1] = ~0;
1129}
1130
1131static void
1132sl811h_timer(unsigned long _sl811)
1133{
1134 struct sl811 *sl811 = (void *) _sl811;
1135 unsigned long flags;
1136 u8 irqstat;
1137 u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE;
1138 const u32 mask = (1 << USB_PORT_FEAT_CONNECTION)
1139 | (1 << USB_PORT_FEAT_ENABLE)
1140 | (1 << USB_PORT_FEAT_LOWSPEED);
1141
1142 spin_lock_irqsave(&sl811->lock, flags);
1143
1144 /* stop special signaling */
1145 sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE;
1146 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1147 udelay(3);
1148
1149 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS);
1150
1151 switch (signaling) {
1152 case SL11H_CTL1MASK_SE0:
1153 DBG("end reset\n");
1154 sl811->port1 = (1 << USB_PORT_FEAT_C_RESET)
1155 | (1 << USB_PORT_FEAT_POWER);
1156 sl811->ctrl1 = 0;
1157 /* don't wrongly ack RD */
1158 if (irqstat & SL11H_INTMASK_INSRMV)
1159 irqstat &= ~SL11H_INTMASK_RD;
1160 break;
1161 case SL11H_CTL1MASK_K:
1162 DBG("end resume\n");
1163 sl811->port1 &= ~(1 << USB_PORT_FEAT_SUSPEND);
1164 break;
1165 default:
1166 DBG("odd timer signaling: %02x\n", signaling);
1167 break;
1168 }
1169 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
1170
1171 if (irqstat & SL11H_INTMASK_RD) {
1172 /* usbcore nukes all pending transactions on disconnect */
1173 if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION))
1174 sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION)
1175 | (1 << USB_PORT_FEAT_C_ENABLE);
1176 sl811->port1 &= ~mask;
1177 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1178 } else {
1179 sl811->port1 |= mask;
1180 if (irqstat & SL11H_INTMASK_DP)
1181 sl811->port1 &= ~(1 << USB_PORT_FEAT_LOWSPEED);
1182 sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD;
1183 }
1184
1185 if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION)) {
1186 u8 ctrl2 = SL811HS_CTL2_INIT;
1187
1188 sl811->irq_enable |= SL11H_INTMASK_DONE_A;
1189#ifdef USE_B
1190 sl811->irq_enable |= SL11H_INTMASK_DONE_B;
1191#endif
1192 if (sl811->port1 & (1 << USB_PORT_FEAT_LOWSPEED)) {
1193 sl811->ctrl1 |= SL11H_CTL1MASK_LSPD;
1194 ctrl2 |= SL811HS_CTL2MASK_DSWAP;
1195 }
1196
1197 /* start SOFs flowing, kickstarting with A registers */
1198 sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA;
1199 sl811_write(sl811, SL11H_SOFLOWREG, 0xe0);
1200 sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
1201
1202 /* autoincrementing */
1203 sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0);
1204 writeb(SL_SOF, sl811->data_reg);
1205 writeb(0, sl811->data_reg);
1206 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1207 SL11H_HCTLMASK_ARM);
1208
1209 /* khubd provides debounce delay */
1210 } else {
1211 sl811->ctrl1 = 0;
1212 }
1213 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1214
1215 /* reenable irqs */
1216 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
1217 spin_unlock_irqrestore(&sl811->lock, flags);
1218}
1219
1220static int
1221sl811h_hub_control(
1222 struct usb_hcd *hcd,
1223 u16 typeReq,
1224 u16 wValue,
1225 u16 wIndex,
1226 char *buf,
1227 u16 wLength
1228) {
1229 struct sl811 *sl811 = hcd_to_sl811(hcd);
1230 int retval = 0;
1231 unsigned long flags;
1232
1233 spin_lock_irqsave(&sl811->lock, flags);
1234
1235 switch (typeReq) {
1236 case ClearHubFeature:
1237 case SetHubFeature:
1238 switch (wValue) {
1239 case C_HUB_OVER_CURRENT:
1240 case C_HUB_LOCAL_POWER:
1241 break;
1242 default:
1243 goto error;
1244 }
1245 break;
1246 case ClearPortFeature:
1247 if (wIndex != 1 || wLength != 0)
1248 goto error;
1249
1250 switch (wValue) {
1251 case USB_PORT_FEAT_ENABLE:
1252 sl811->port1 &= (1 << USB_PORT_FEAT_POWER);
1253 sl811->ctrl1 = 0;
1254 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1255 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1256 sl811_write(sl811, SL11H_IRQ_ENABLE,
1257 sl811->irq_enable);
1258 break;
1259 case USB_PORT_FEAT_SUSPEND:
1260 if (!(sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)))
1261 break;
1262
1263 /* 20 msec of resume/K signaling, other irqs blocked */
1264 DBG("start resume...\n");
1265 sl811->irq_enable = 0;
1266 sl811_write(sl811, SL11H_IRQ_ENABLE,
1267 sl811->irq_enable);
1268 sl811->ctrl1 |= SL11H_CTL1MASK_K;
1269 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1270
1271 mod_timer(&sl811->timer, jiffies
1272 + msecs_to_jiffies(20));
1273 break;
1274 case USB_PORT_FEAT_POWER:
1275 port_power(sl811, 0);
1276 break;
1277 case USB_PORT_FEAT_C_ENABLE:
1278 case USB_PORT_FEAT_C_SUSPEND:
1279 case USB_PORT_FEAT_C_CONNECTION:
1280 case USB_PORT_FEAT_C_OVER_CURRENT:
1281 case USB_PORT_FEAT_C_RESET:
1282 break;
1283 default:
1284 goto error;
1285 }
1286 sl811->port1 &= ~(1 << wValue);
1287 break;
1288 case GetHubDescriptor:
1289 sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf);
1290 break;
1291 case GetHubStatus:
1292 *(__le32 *) buf = cpu_to_le32(0);
1293 break;
1294 case GetPortStatus:
1295 if (wIndex != 1)
1296 goto error;
1297 *(__le32 *) buf = cpu_to_le32(sl811->port1);
1298
1299#ifndef VERBOSE
1300 if (*(u16*)(buf+2)) /* only if wPortChange is interesting */
1301#endif
1302 DBG("GetPortStatus %08x\n", sl811->port1);
1303 break;
1304 case SetPortFeature:
1305 if (wIndex != 1 || wLength != 0)
1306 goto error;
1307 switch (wValue) {
1308 case USB_PORT_FEAT_SUSPEND:
1309 if (sl811->port1 & (1 << USB_PORT_FEAT_RESET))
1310 goto error;
1311 if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE)))
1312 goto error;
1313
1314 DBG("suspend...\n");
1315 sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA;
1316 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1317 break;
1318 case USB_PORT_FEAT_POWER:
1319 port_power(sl811, 1);
1320 break;
1321 case USB_PORT_FEAT_RESET:
1322 if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))
1323 goto error;
1324 if (!(sl811->port1 & (1 << USB_PORT_FEAT_POWER)))
1325 break;
1326
1327 /* 50 msec of reset/SE0 signaling, irqs blocked */
1328 sl811->irq_enable = 0;
1329 sl811_write(sl811, SL11H_IRQ_ENABLE,
1330 sl811->irq_enable);
1331 sl811->ctrl1 = SL11H_CTL1MASK_SE0;
1332 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1333 sl811->port1 |= (1 << USB_PORT_FEAT_RESET);
1334 mod_timer(&sl811->timer, jiffies
1335 + msecs_to_jiffies(50));
1336 break;
1337 default:
1338 goto error;
1339 }
1340 sl811->port1 |= 1 << wValue;
1341 break;
1342
1343 default:
1344error:
1345 /* "protocol stall" on error */
1346 retval = -EPIPE;
1347 }
1348
1349 spin_unlock_irqrestore(&sl811->lock, flags);
1350 return retval;
1351}
1352
1353#ifdef CONFIG_PM
1354
1355static int
0c0382e3 1356sl811h_bus_suspend(struct usb_hcd *hcd)
1da177e4
LT		 1357{
1358 // SOFs off
1359 DBG("%s\n", __FUNCTION__);
1360 return 0;
1361}
1362
1363static int
0c0382e3 1364sl811h_bus_resume(struct usb_hcd *hcd)
1da177e4
LT		 1365{
1366 // SOFs on
1367 DBG("%s\n", __FUNCTION__);
1368 return 0;
1369}
1370
1371#else
1372
0c0382e3
AS		 1373#define sl811h_bus_suspend NULL
1374#define sl811h_bus_resume NULL
1da177e4
LT		 1375
1376#endif
1377
1378
1379/*-------------------------------------------------------------------------*/
1380
1381#ifdef STUB_DEBUG_FILE
1382
1383static inline void create_debug_file(struct sl811 *sl811) { }
1384static inline void remove_debug_file(struct sl811 *sl811) { }
1385
1386#else
1387
1388#include <linux/proc_fs.h>
1389#include <linux/seq_file.h>
1390
1391static void dump_irq(struct seq_file *s, char *label, u8 mask)
1392{
1393 seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask,
1394 (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "",
1395 (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "",
1396 (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "",
1397 (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "",
1398 (mask & SL11H_INTMASK_RD) ? " rd" : "",
1399 (mask & SL11H_INTMASK_DP) ? " dp" : "");
1400}
1401
1402static int proc_sl811h_show(struct seq_file *s, void *unused)
1403{
1404 struct sl811 *sl811 = s->private;
1405 struct sl811h_ep *ep;
1406 unsigned i;
1407
1408 seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n",
1409 sl811_to_hcd(sl811)->product_desc,
1410 hcd_name, DRIVER_VERSION,
1411 sl811->port1);
1412
1413 seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv);
1414 seq_printf(s, "current session: done_a %ld done_b %ld "
1415 "wake %ld sof %ld overrun %ld lost %ld\n\n",
1416 sl811->stat_a, sl811->stat_b,
1417 sl811->stat_wake, sl811->stat_sof,
1418 sl811->stat_overrun, sl811->stat_lost);
1419
1420 spin_lock_irq(&sl811->lock);
1421
1422 if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND)
1423 seq_printf(s, "(suspended)\n\n");
1424 else {
1425 u8 t = sl811_read(sl811, SL11H_CTLREG1);
1426
1427 seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t,
1428 (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "",
1429 ({char *s; switch (t & SL11H_CTL1MASK_FORCE) {
1430 case SL11H_CTL1MASK_NORMAL: s = ""; break;
1431 case SL11H_CTL1MASK_SE0: s = " se0/reset"; break;
1432 case SL11H_CTL1MASK_K: s = " k/resume"; break;
1433 default: s = "j"; break;
1434 }; s; }),
1435 (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "",
1436 (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : "");
1437
1438 dump_irq(s, "irq_enable",
1439 sl811_read(sl811, SL11H_IRQ_ENABLE));
1440 dump_irq(s, "irq_status",
1441 sl811_read(sl811, SL11H_IRQ_STATUS));
1442 seq_printf(s, "frame clocks remaining: %d\n",
1443 sl811_read(sl811, SL11H_SOFTMRREG) << 6);
1444 }
1445
1446 seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a,
1447 sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)),
1448 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
1449 seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b,
1450 sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)),
1451 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
1452 seq_printf(s, "\n");
1453 list_for_each_entry (ep, &sl811->async, schedule) {
1454 struct urb *urb;
1455
1456 seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d"
1457 " nak %d err %d\n",
1458 (ep == sl811->active_a) ? "(A) " : "",
1459 (ep == sl811->active_b) ? "(B) " : "",
1460 ep, ep->epnum,
1461 ({ char *s; switch (ep->nextpid) {
1462 case USB_PID_IN: s = "in"; break;
1463 case USB_PID_OUT: s = "out"; break;
1464 case USB_PID_SETUP: s = "setup"; break;
1465 case USB_PID_ACK: s = "status"; break;
1466 default: s = "?"; break;
1467 }; s;}),
1468 ep->maxpacket,
1469 ep->nak_count, ep->error_count);
1470 list_for_each_entry (urb, &ep->hep->urb_list, urb_list) {
1471 seq_printf(s, " urb%p, %d/%d\n", urb,
1472 urb->actual_length,
1473 urb->transfer_buffer_length);
1474 }
1475 }
1476 if (!list_empty(&sl811->async))
1477 seq_printf(s, "\n");
1478
1479 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
1480
1481 for (i = 0; i < PERIODIC_SIZE; i++) {
1482 ep = sl811->periodic[i];
1483 if (!ep)
1484 continue;
1485 seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]);
1486
1487 /* DUMB: prints shared entries multiple times */
1488 do {
1489 seq_printf(s,
1490 " %s%sqh%d/%p (%sdev%d ep%d%s max %d) "
1491 "err %d\n",
1492 (ep == sl811->active_a) ? "(A) " : "",
1493 (ep == sl811->active_b) ? "(B) " : "",
1494 ep->period, ep,
1495 (ep->udev->speed == USB_SPEED_FULL)
1496 ? "" : "ls ",
1497 ep->udev->devnum, ep->epnum,
1498 (ep->epnum == 0) ? ""
1499 : ((ep->nextpid == USB_PID_IN)
1500 ? "in"
1501 : "out"),
1502 ep->maxpacket, ep->error_count);
1503 ep = ep->next;
1504 } while (ep);
1505 }
1506
1507 spin_unlock_irq(&sl811->lock);
1508 seq_printf(s, "\n");
1509
1510 return 0;
1511}
1512
1513static int proc_sl811h_open(struct inode *inode, struct file *file)
1514{
1515 return single_open(file, proc_sl811h_show, PDE(inode)->data);
1516}
1517
066202dd 1518static const struct file_operations proc_ops = {
1da177e4
LT		 1519 .open = proc_sl811h_open,
1520 .read = seq_read,
1521 .llseek = seq_lseek,
1522 .release = single_release,
1523};
1524
1525/* expect just one sl811 per system */
1526static const char proc_filename[] = "driver/sl811h";
1527
1528static void create_debug_file(struct sl811 *sl811)
1529{
1530 struct proc_dir_entry *pde;
1531
1532 pde = create_proc_entry(proc_filename, 0, NULL);
1533 if (pde == NULL)
1534 return;
1535
1536 pde->proc_fops = &proc_ops;
1537 pde->data = sl811;
1538 sl811->pde = pde;
1539}
1540
1541static void remove_debug_file(struct sl811 *sl811)
1542{
1543 if (sl811->pde)
1544 remove_proc_entry(proc_filename, NULL);
1545}
1546
1547#endif
1548
1549/*-------------------------------------------------------------------------*/
1550
1551static void
1552sl811h_stop(struct usb_hcd *hcd)
1553{
1554 struct sl811 *sl811 = hcd_to_sl811(hcd);
1555 unsigned long flags;
1556
1557 del_timer_sync(&hcd->rh_timer);
1558
1559 spin_lock_irqsave(&sl811->lock, flags);
1560 port_power(sl811, 0);
1561 spin_unlock_irqrestore(&sl811->lock, flags);
1562}
1563
1564static int
1565sl811h_start(struct usb_hcd *hcd)
1566{
1567 struct sl811 *sl811 = hcd_to_sl811(hcd);
1da177e4
LT		 1568
1569 /* chip has been reset, VBUS power is off */
1da177e4
LT		 1570 hcd->state = HC_STATE_RUNNING;
1571
bc96c0ad 1572 if (sl811->board) {
0c8624f9
DB		 1573 if (!device_can_wakeup(hcd->self.controller))
1574 device_init_wakeup(hcd->self.controller,
1575 sl811->board->can_wakeup);
bc96c0ad
AS		 1576 hcd->power_budget = sl811->board->power * 2;
1577 }
1da177e4 1578
1e9a47b6
DB		 1579 /* enable power and interupts */
1580 port_power(sl811, 1);
1581
1da177e4
LT		 1582 return 0;
1583}
1584
1585/*-------------------------------------------------------------------------*/
1586
1587static struct hc_driver sl811h_hc_driver = {
1588 .description = hcd_name,
1589 .hcd_priv_size = sizeof(struct sl811),
1590
1591 /*
1592 * generic hardware linkage
1593 */
1594 .irq = sl811h_irq,
1595 .flags = HCD_USB11 | HCD_MEMORY,
1596
1597 /* Basic lifecycle operations */
1598 .start = sl811h_start,
1599 .stop = sl811h_stop,
1600
1601 /*
1602 * managing i/o requests and associated device resources
1603 */
1604 .urb_enqueue = sl811h_urb_enqueue,
1605 .urb_dequeue = sl811h_urb_dequeue,
1606 .endpoint_disable = sl811h_endpoint_disable,
1607
1608 /*
1609 * periodic schedule support
1610 */
1611 .get_frame_number = sl811h_get_frame,
1612
1613 /*
1614 * root hub support
1615 */
1616 .hub_status_data = sl811h_hub_status_data,
1617 .hub_control = sl811h_hub_control,
0c0382e3
AS		 1618 .bus_suspend = sl811h_bus_suspend,
1619 .bus_resume = sl811h_bus_resume,
1da177e4
LT		 1620};
1621
1622/*-------------------------------------------------------------------------*/
1623
1e9a47b6 1624static int __devexit
3ae5eaec 1625sl811h_remove(struct platform_device *dev)
1da177e4 1626{
3ae5eaec 1627 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4 1628 struct sl811 *sl811 = hcd_to_sl811(hcd);
1da177e4
LT		 1629 struct resource *res;
1630
1da177e4
LT		 1631 remove_debug_file(sl811);
1632 usb_remove_hcd(hcd);
1633
1e9a47b6 1634 /* some platforms may use IORESOURCE_IO */
3ae5eaec 1635 res = platform_get_resource(dev, IORESOURCE_MEM, 1);
1e9a47b6
DB		 1636 if (res)
1637 iounmap(sl811->data_reg);
1da177e4 1638
3ae5eaec 1639 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1e9a47b6
DB		 1640 if (res)
1641 iounmap(sl811->addr_reg);
1da177e4
LT		 1642
1643 usb_put_hcd(hcd);
1644 return 0;
1645}
1646
1e9a47b6 1647static int __devinit
3ae5eaec 1648sl811h_probe(struct platform_device *dev)
1da177e4
LT		 1649{
1650 struct usb_hcd *hcd;
1651 struct sl811 *sl811;
1da177e4
LT		 1652 struct resource *addr, *data;
1653 int irq;
1654 void __iomem *addr_reg;
1655 void __iomem *data_reg;
1656 int retval;
1e9a47b6 1657 u8 tmp, ioaddr = 0;
1da177e4
LT		 1658
1659 /* basic sanity checks first. board-specific init logic should
1660 * have initialized these three resources and probably board
1661 * specific platform_data. we don't probe for IRQs, and do only
1662 * minimal sanity checking.
1663 */
3ae5eaec
RK		 1664 irq = platform_get_irq(dev, 0);
1665 if (dev->num_resources < 3 || irq < 0)
1da177e4
LT		 1666 return -ENODEV;
1667
1668 /* refuse to confuse usbcore */
3ae5eaec 1669 if (dev->dev.dma_mask) {
1da177e4
LT		 1670 DBG("no we won't dma\n");
1671 return -EINVAL;
1672 }
1673
1e9a47b6 1674 /* the chip may be wired for either kind of addressing */
3ae5eaec
RK		 1675 addr = platform_get_resource(dev, IORESOURCE_MEM, 0);
1676 data = platform_get_resource(dev, IORESOURCE_MEM, 1);
1e9a47b6
DB		 1677 retval = -EBUSY;
1678 if (!addr || !data) {
3ae5eaec
RK		 1679 addr = platform_get_resource(dev, IORESOURCE_IO, 0);
1680 data = platform_get_resource(dev, IORESOURCE_IO, 1);
1e9a47b6
DB		 1681 if (!addr || !data)
1682 return -ENODEV;
1683 ioaddr = 1;
2427ddd8
GKH		 1684 /*
1685 * NOTE: 64-bit resource->start is getting truncated
1686 * to avoid compiler warning, assuming that ->start
1687 * is always 32-bit for this case
1688 */
1689 addr_reg = (void __iomem *) (unsigned long) addr->start;
1690 data_reg = (void __iomem *) (unsigned long) data->start;
1e9a47b6
DB		 1691 } else {
1692 addr_reg = ioremap(addr->start, 1);
1693 if (addr_reg == NULL) {
1694 retval = -ENOMEM;
1695 goto err2;
1696 }
1da177e4 1697
1e9a47b6
DB		 1698 data_reg = ioremap(data->start, 1);
1699 if (data_reg == NULL) {
1700 retval = -ENOMEM;
1701 goto err4;
1702 }
1da177e4
LT		 1703 }
1704
1705 /* allocate and initialize hcd */
3ae5eaec 1706 hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev->dev.bus_id);
1da177e4
LT		 1707 if (!hcd) {
1708 retval = -ENOMEM;
1709 goto err5;
1710 }
1711 hcd->rsrc_start = addr->start;
1712 sl811 = hcd_to_sl811(hcd);
1713
1714 spin_lock_init(&sl811->lock);
1715 INIT_LIST_HEAD(&sl811->async);
3ae5eaec 1716 sl811->board = dev->dev.platform_data;
1da177e4
LT		 1717 init_timer(&sl811->timer);
1718 sl811->timer.function = sl811h_timer;
1719 sl811->timer.data = (unsigned long) sl811;
1720 sl811->addr_reg = addr_reg;
1721 sl811->data_reg = data_reg;
1722
1723 spin_lock_irq(&sl811->lock);
1724 port_power(sl811, 0);
1725 spin_unlock_irq(&sl811->lock);
1726 msleep(200);
1727
1728 tmp = sl811_read(sl811, SL11H_HWREVREG);
1729 switch (tmp >> 4) {
1730 case 1:
1731 hcd->product_desc = "SL811HS v1.2";
1732 break;
1733 case 2:
1734 hcd->product_desc = "SL811HS v1.5";
1735 break;
1736 default:
1737 /* reject case 0, SL11S is less functional */
1738 DBG("chiprev %02x\n", tmp);
1739 retval = -ENXIO;
1740 goto err6;
1741 }
1742
1e9a47b6
DB		 1743 /* The chip's IRQ is level triggered, active high. A requirement
1744 * for platform device setup is to cope with things like signal
1745 * inverters (e.g. CF is active low) or working only with edge
1746 * triggers (e.g. most ARM CPUs). Initial driver stress testing
1747 * was on a system with single edge triggering, so most sorts of
1748 * triggering arrangement should work.
1749 */
d54b5caa 1750 retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
1da177e4
LT		 1751 if (retval != 0)
1752 goto err6;
1753
1754 create_debug_file(sl811);
1755 return retval;
1756
1757 err6:
1758 usb_put_hcd(hcd);
1759 err5:
1e9a47b6
DB		 1760 if (!ioaddr)
1761 iounmap(data_reg);
1da177e4 1762 err4:
1e9a47b6
DB		 1763 if (!ioaddr)
1764 iounmap(addr_reg);
1da177e4 1765 err2:
1da177e4
LT		 1766 DBG("init error, %d\n", retval);
1767 return retval;
1768}
1769
1770#ifdef CONFIG_PM
1771
1772/* for this device there's no useful distinction between the controller
1e9a47b6 1773 * and its root hub, except that the root hub only gets direct PM calls
1da177e4
LT		 1774 * when CONFIG_USB_SUSPEND is enabled.
1775 */
1776
1777static int
3ae5eaec 1778sl811h_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 1779{
3ae5eaec 1780 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT		 1781 struct sl811 *sl811 = hcd_to_sl811(hcd);
1782 int retval = 0;
1783
18584999
DB		 1784 switch (state.event) {
1785 case PM_EVENT_FREEZE:
0c0382e3 1786 retval = sl811h_bus_suspend(hcd);
18584999
DB		 1787 break;
1788 case PM_EVENT_SUSPEND:
1789 case PM_EVENT_PRETHAW: /* explicitly discard hw state */
1da177e4 1790 port_power(sl811, 0);
18584999
DB		 1791 break;
1792 }
1da177e4 1793 if (retval == 0)
3ae5eaec 1794 dev->dev.power.power_state = state;
1da177e4
LT		 1795 return retval;
1796}
1797
1798static int
3ae5eaec 1799sl811h_resume(struct platform_device *dev)
1da177e4 1800{
3ae5eaec 1801 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT		 1802 struct sl811 *sl811 = hcd_to_sl811(hcd);
1803
1da177e4
LT		 1804 /* with no "check to see if VBUS is still powered" board hook,
1805 * let's assume it'd only be powered to enable remote wakeup.
1806 */
3ae5eaec 1807 if (dev->dev.power.power_state.event == PM_EVENT_SUSPEND
0c8624f9 1808 || !device_can_wakeup(&hcd->self.root_hub->dev)) {
1da177e4
LT		 1809 sl811->port1 = 0;
1810 port_power(sl811, 1);
1c50c317 1811 usb_root_hub_lost_power(hcd->self.root_hub);
1da177e4
LT		 1812 return 0;
1813 }
1814
3ae5eaec 1815 dev->dev.power.power_state = PMSG_ON;
0c0382e3 1816 return sl811h_bus_resume(hcd);
1da177e4
LT		 1817}
1818
1819#else
1820
1821#define sl811h_suspend NULL
1822#define sl811h_resume NULL
1823
1824#endif
1825
1826
1e9a47b6 1827/* this driver is exported so sl811_cs can depend on it */
3ae5eaec 1828struct platform_driver sl811h_driver = {
1da177e4 1829 .probe = sl811h_probe,
1e9a47b6 1830 .remove = __devexit_p(sl811h_remove),
1da177e4
LT		 1831
1832 .suspend = sl811h_suspend,
1833 .resume = sl811h_resume,
3ae5eaec
RK		 1834 .driver = {
1835 .name = (char *) hcd_name,
1836 .owner = THIS_MODULE,
1837 },
1da177e4 1838};
1e9a47b6 1839EXPORT_SYMBOL(sl811h_driver);
1da177e4
LT		 1840
1841/*-------------------------------------------------------------------------*/
1e9a47b6
DB		 1842
1843static int __init sl811h_init(void)
1da177e4
LT		 1844{
1845 if (usb_disabled())
1846 return -ENODEV;
1847
1848 INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION);
3ae5eaec 1849 return platform_driver_register(&sl811h_driver);
1da177e4
LT		 1850}
1851module_init(sl811h_init);
1852
1e9a47b6
DB		 1853static void __exit sl811h_cleanup(void)
1854{
3ae5eaec 1855 platform_driver_unregister(&sl811h_driver);
1da177e4
LT		 1856}
1857module_exit(sl811h_cleanup);
kernel source for telekom puls (alcatel/mediatek)