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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / host / sl811-hcd.c
CommitLineData
1da177e4
LT		 1/*
2 * SL811HS HCD (Host Controller Driver) for USB.
3 *
4 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
1e9a47b6
DB		 5 * Copyright (C) 2004-2005 David Brownell
6 *
1da177e4
LT		 7 * Periodic scheduling is based on Roman's OHCI code
8 * Copyright (C) 1999 Roman Weissgaerber
9 *
10 * The SL811HS controller handles host side USB (like the SL11H, but with
11 * another register set and SOF generation) as well as peripheral side USB
12 * (like the SL811S). This driver version doesn't implement the Gadget API
13 * for the peripheral role; or OTG (that'd need much external circuitry).
14 *
15 * For documentation, see the SL811HS spec and the "SL811HS Embedded Host"
16 * document (providing significant pieces missing from that spec); plus
17 * the SL811S spec if you want peripheral side info.
1e9a47b6 18 */
1da177e4
LT		 19
20/*
21 * Status: Passed basic stress testing, works with hubs, mice, keyboards,
22 * and usb-storage.
23 *
24 * TODO:
25 * - usb suspend/resume triggered by sl811 (with USB_SUSPEND)
26 * - various issues noted in the code
27 * - performance work; use both register banks; ...
28 * - use urb->iso_frame_desc[] with ISO transfers
29 */
30
31#undef VERBOSE
32#undef PACKET_TRACE
33
1da177e4
LT		 34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/kernel.h>
37#include <linux/delay.h>
38#include <linux/ioport.h>
39#include <linux/sched.h>
40#include <linux/slab.h>
41#include <linux/smp_lock.h>
42#include <linux/errno.h>
43#include <linux/init.h>
44#include <linux/timer.h>
45#include <linux/list.h>
46#include <linux/interrupt.h>
47#include <linux/usb.h>
325a4af6 48#include <linux/usb/sl811.h>
d052d1be 49#include <linux/platform_device.h>
1da177e4
LT		 50
51#include <asm/io.h>
52#include <asm/irq.h>
53#include <asm/system.h>
54#include <asm/byteorder.h>
55
56#include "../core/hcd.h"
57#include "sl811.h"
58
59
60MODULE_DESCRIPTION("SL811HS USB Host Controller Driver");
61MODULE_LICENSE("GPL");
62
1e9a47b6 63#define DRIVER_VERSION "19 May 2005"
1da177e4
LT		 64
65
66#ifndef DEBUG
67# define STUB_DEBUG_FILE
68#endif
69
70/* for now, use only one transfer register bank */
71#undef USE_B
72
73/* this doesn't understand urb->iso_frame_desc[], but if you had a driver
74 * that just queued one ISO frame per URB then iso transfers "should" work
75 * using the normal urb status fields.
76 */
77#define DISABLE_ISO
78
79// #define QUIRK2
80#define QUIRK3
81
82static const char hcd_name[] = "sl811-hcd";
83
84/*-------------------------------------------------------------------------*/
85
86static void port_power(struct sl811 *sl811, int is_on)
87{
88 struct usb_hcd *hcd = sl811_to_hcd(sl811);
89
90 /* hub is inactive unless the port is powered */
91 if (is_on) {
92 if (sl811->port1 & (1 << USB_PORT_FEAT_POWER))
93 return;
94
95 sl811->port1 = (1 << USB_PORT_FEAT_POWER);
96 sl811->irq_enable = SL11H_INTMASK_INSRMV;
97 hcd->self.controller->power.power_state = PMSG_ON;
98 } else {
99 sl811->port1 = 0;
100 sl811->irq_enable = 0;
101 hcd->state = HC_STATE_HALT;
102 hcd->self.controller->power.power_state = PMSG_SUSPEND;
103 }
104 sl811->ctrl1 = 0;
105 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
106 sl811_write(sl811, SL11H_IRQ_STATUS, ~0);
107
108 if (sl811->board && sl811->board->port_power) {
109 /* switch VBUS, at 500mA unless hub power budget gets set */
110 DBG("power %s\n", is_on ? "on" : "off");
111 sl811->board->port_power(hcd->self.controller, is_on);
112 }
113
114 /* reset as thoroughly as we can */
115 if (sl811->board && sl811->board->reset)
116 sl811->board->reset(hcd->self.controller);
1e9a47b6
DB		 117 else {
118 sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0);
119 mdelay(20);
120 }
1da177e4
LT		 121
122 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
123 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
124 sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT);
125 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
126
127 // if !is_on, put into lowpower mode now
128}
129
130/*-------------------------------------------------------------------------*/
131
132/* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue,
133 * and may start I/O. Endpoint queues are scanned during completion irq
093cf723 134 * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation.
1da177e4
LT		 135 *
136 * Using an external DMA engine to copy a packet at a time could work,
137 * though setup/teardown costs may be too big to make it worthwhile.
138 */
139
140/* SETUP starts a new control request. Devices are not allowed to
141 * STALL or NAK these; they must cancel any pending control requests.
142 */
143static void setup_packet(
144 struct sl811 *sl811,
145 struct sl811h_ep *ep,
146 struct urb *urb,
147 u8 bank,
148 u8 control
149)
150{
151 u8 addr;
152 u8 len;
153 void __iomem *data_reg;
154
155 addr = SL811HS_PACKET_BUF(bank == 0);
156 len = sizeof(struct usb_ctrlrequest);
157 data_reg = sl811->data_reg;
158 sl811_write_buf(sl811, addr, urb->setup_packet, len);
159
160 /* autoincrementing */
161 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
162 writeb(len, data_reg);
163 writeb(SL_SETUP /* | ep->epnum */, data_reg);
164 writeb(usb_pipedevice(urb->pipe), data_reg);
165
166 /* always OUT/data0 */ ;
167 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
168 control | SL11H_HCTLMASK_OUT);
169 ep->length = 0;
170 PACKET("SETUP qh%p\n", ep);
171}
172
173/* STATUS finishes control requests, often after IN or OUT data packets */
174static void status_packet(
175 struct sl811 *sl811,
176 struct sl811h_ep *ep,
177 struct urb *urb,
178 u8 bank,
179 u8 control
180)
181{
182 int do_out;
183 void __iomem *data_reg;
184
185 do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe);
186 data_reg = sl811->data_reg;
187
188 /* autoincrementing */
189 sl811_write(sl811, bank + SL11H_BUFADDRREG, 0);
190 writeb(0, data_reg);
191 writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg);
192 writeb(usb_pipedevice(urb->pipe), data_reg);
193
194 /* always data1; sometimes IN */
195 control |= SL11H_HCTLMASK_TOGGLE;
196 if (do_out)
197 control |= SL11H_HCTLMASK_OUT;
198 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
199 ep->length = 0;
200 PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "",
201 do_out ? "out" : "in", ep);
202}
203
204/* IN packets can be used with any type of endpoint. here we just
205 * start the transfer, data from the peripheral may arrive later.
206 * urb->iso_frame_desc is currently ignored here...
207 */
208static void in_packet(
209 struct sl811 *sl811,
210 struct sl811h_ep *ep,
211 struct urb *urb,
212 u8 bank,
213 u8 control
214)
215{
216 u8 addr;
217 u8 len;
218 void __iomem *data_reg;
219
220 /* avoid losing data on overflow */
221 len = ep->maxpacket;
222 addr = SL811HS_PACKET_BUF(bank == 0);
223 if (!(control & SL11H_HCTLMASK_ISOCH)
224 && usb_gettoggle(urb->dev, ep->epnum, 0))
225 control |= SL11H_HCTLMASK_TOGGLE;
226 data_reg = sl811->data_reg;
227
228 /* autoincrementing */
229 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
230 writeb(len, data_reg);
231 writeb(SL_IN | ep->epnum, data_reg);
232 writeb(usb_pipedevice(urb->pipe), data_reg);
233
234 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
235 ep->length = min((int)len,
236 urb->transfer_buffer_length - urb->actual_length);
237 PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
238 !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len);
239}
240
241/* OUT packets can be used with any type of endpoint.
242 * urb->iso_frame_desc is currently ignored here...
243 */
244static void out_packet(
245 struct sl811 *sl811,
246 struct sl811h_ep *ep,
247 struct urb *urb,
248 u8 bank,
249 u8 control
250)
251{
252 void *buf;
253 u8 addr;
254 u8 len;
255 void __iomem *data_reg;
256
257 buf = urb->transfer_buffer + urb->actual_length;
258 prefetch(buf);
259
260 len = min((int)ep->maxpacket,
261 urb->transfer_buffer_length - urb->actual_length);
262
263 if (!(control & SL11H_HCTLMASK_ISOCH)
264 && usb_gettoggle(urb->dev, ep->epnum, 1))
265 control |= SL11H_HCTLMASK_TOGGLE;
266 addr = SL811HS_PACKET_BUF(bank == 0);
267 data_reg = sl811->data_reg;
268
269 sl811_write_buf(sl811, addr, buf, len);
270
271 /* autoincrementing */
272 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
273 writeb(len, data_reg);
274 writeb(SL_OUT | ep->epnum, data_reg);
275 writeb(usb_pipedevice(urb->pipe), data_reg);
276
277 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
278 control | SL11H_HCTLMASK_OUT);
279 ep->length = len;
280 PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
281 !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len);
282}
283
284/*-------------------------------------------------------------------------*/
285
286/* caller updates on-chip enables later */
287
288static inline void sofirq_on(struct sl811 *sl811)
289{
290 if (sl811->irq_enable & SL11H_INTMASK_SOFINTR)
291 return;
292 VDBG("sof irq on\n");
293 sl811->irq_enable |= SL11H_INTMASK_SOFINTR;
294}
295
296static inline void sofirq_off(struct sl811 *sl811)
297{
298 if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR))
299 return;
300 VDBG("sof irq off\n");
301 sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR;
302}
303
304/*-------------------------------------------------------------------------*/
305
306/* pick the next endpoint for a transaction, and issue it.
307 * frames start with periodic transfers (after whatever is pending
308 * from the previous frame), and the rest of the time is async
309 * transfers, scheduled round-robin.
310 */
311static struct sl811h_ep *start(struct sl811 *sl811, u8 bank)
312{
313 struct sl811h_ep *ep;
314 struct urb *urb;
315 int fclock;
316 u8 control;
317
318 /* use endpoint at schedule head */
319 if (sl811->next_periodic) {
320 ep = sl811->next_periodic;
321 sl811->next_periodic = ep->next;
322 } else {
323 if (sl811->next_async)
324 ep = sl811->next_async;
325 else if (!list_empty(&sl811->async))
326 ep = container_of(sl811->async.next,
327 struct sl811h_ep, schedule);
328 else {
329 /* could set up the first fullspeed periodic
330 * transfer for the next frame ...
331 */
332 return NULL;
333 }
334
335#ifdef USE_B
336 if ((bank && sl811->active_b == ep) || sl811->active_a == ep)
337 return NULL;
338#endif
339
340 if (ep->schedule.next == &sl811->async)
341 sl811->next_async = NULL;
342 else
343 sl811->next_async = container_of(ep->schedule.next,
344 struct sl811h_ep, schedule);
345 }
346
347 if (unlikely(list_empty(&ep->hep->urb_list))) {
348 DBG("empty %p queue?\n", ep);
349 return NULL;
350 }
351
352 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
353 control = ep->defctrl;
354
355 /* if this frame doesn't have enough time left to transfer this
356 * packet, wait till the next frame. too-simple algorithm...
357 */
358 fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6;
359 fclock -= 100; /* setup takes not much time */
360 if (urb->dev->speed == USB_SPEED_LOW) {
361 if (control & SL11H_HCTLMASK_PREAMBLE) {
362 /* also note erratum 1: some hubs won't work */
363 fclock -= 800;
364 }
365 fclock -= ep->maxpacket << 8;
366
367 /* erratum 2: AFTERSOF only works for fullspeed */
368 if (fclock < 0) {
369 if (ep->period)
370 sl811->stat_overrun++;
371 sofirq_on(sl811);
372 return NULL;
373 }
374 } else {
375 fclock -= 12000 / 19; /* 19 64byte packets/msec */
376 if (fclock < 0) {
377 if (ep->period)
378 sl811->stat_overrun++;
379 control |= SL11H_HCTLMASK_AFTERSOF;
380
381 /* throttle bulk/control irq noise */
382 } else if (ep->nak_count)
383 control |= SL11H_HCTLMASK_AFTERSOF;
384 }
385
386
387 switch (ep->nextpid) {
388 case USB_PID_IN:
389 in_packet(sl811, ep, urb, bank, control);
390 break;
391 case USB_PID_OUT:
392 out_packet(sl811, ep, urb, bank, control);
393 break;
394 case USB_PID_SETUP:
395 setup_packet(sl811, ep, urb, bank, control);
396 break;
397 case USB_PID_ACK: /* for control status */
398 status_packet(sl811, ep, urb, bank, control);
399 break;
400 default:
401 DBG("bad ep%p pid %02x\n", ep, ep->nextpid);
402 ep = NULL;
403 }
404 return ep;
405}
406
407#define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2)
408
409static inline void start_transfer(struct sl811 *sl811)
410{
411 if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))
412 return;
413 if (sl811->active_a == NULL) {
414 sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF));
415 if (sl811->active_a != NULL)
416 sl811->jiffies_a = jiffies + MIN_JIFFIES;
417 }
418#ifdef USE_B
419 if (sl811->active_b == NULL) {
420 sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF));
421 if (sl811->active_b != NULL)
422 sl811->jiffies_b = jiffies + MIN_JIFFIES;
423 }
424#endif
425}
426
427static void finish_request(
428 struct sl811 *sl811,
429 struct sl811h_ep *ep,
430 struct urb *urb,
1da177e4
LT		 431 int status
432) __releases(sl811->lock) __acquires(sl811->lock)
433{
434 unsigned i;
435
436 if (usb_pipecontrol(urb->pipe))
437 ep->nextpid = USB_PID_SETUP;
438
439 spin_lock(&urb->lock);
440 if (urb->status == -EINPROGRESS)
441 urb->status = status;
1e9a47b6 442 urb->hcpriv = NULL;
1da177e4
LT		 443 spin_unlock(&urb->lock);
444
445 spin_unlock(&sl811->lock);
7d12e780 446 usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb);
1da177e4
LT		 447 spin_lock(&sl811->lock);
448
449 /* leave active endpoints in the schedule */
450 if (!list_empty(&ep->hep->urb_list))
451 return;
452
453 /* async deschedule? */
454 if (!list_empty(&ep->schedule)) {
455 list_del_init(&ep->schedule);
456 if (ep == sl811->next_async)
457 sl811->next_async = NULL;
458 return;
459 }
460
461 /* periodic deschedule */
462 DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
463 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
464 struct sl811h_ep *temp;
465 struct sl811h_ep **prev = &sl811->periodic[i];
466
467 while (*prev && ((temp = *prev) != ep))
468 prev = &temp->next;
469 if (*prev)
470 *prev = ep->next;
471 sl811->load[i] -= ep->load;
1e9a47b6 472 }
1da177e4
LT		 473 ep->branch = PERIODIC_SIZE;
474 sl811->periodic_count--;
475 sl811_to_hcd(sl811)->self.bandwidth_allocated
476 -= ep->load / ep->period;
477 if (ep == sl811->next_periodic)
478 sl811->next_periodic = ep->next;
479
480 /* we might turn SOFs back on again for the async schedule */
481 if (sl811->periodic_count == 0)
482 sofirq_off(sl811);
483}
484
485static void
7d12e780 486done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank)
1da177e4
LT		 487{
488 u8 status;
489 struct urb *urb;
490 int urbstat = -EINPROGRESS;
491
492 if (unlikely(!ep))
493 return;
494
495 status = sl811_read(sl811, bank + SL11H_PKTSTATREG);
496
497 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
498
499 /* we can safely ignore NAKs */
500 if (status & SL11H_STATMASK_NAK) {
501 // PACKET("...NAK_%02x qh%p\n", bank, ep);
502 if (!ep->period)
503 ep->nak_count++;
504 ep->error_count = 0;
505
506 /* ACK advances transfer, toggle, and maybe queue */
507 } else if (status & SL11H_STATMASK_ACK) {
508 struct usb_device *udev = urb->dev;
509 int len;
510 unsigned char *buf;
511
512 /* urb->iso_frame_desc is currently ignored here... */
513
514 ep->nak_count = ep->error_count = 0;
515 switch (ep->nextpid) {
516 case USB_PID_OUT:
517 // PACKET("...ACK/out_%02x qh%p\n", bank, ep);
518 urb->actual_length += ep->length;
519 usb_dotoggle(udev, ep->epnum, 1);
520 if (urb->actual_length
521 == urb->transfer_buffer_length) {
522 if (usb_pipecontrol(urb->pipe))
523 ep->nextpid = USB_PID_ACK;
524
525 /* some bulk protocols terminate OUT transfers
526 * by a short packet, using ZLPs not padding.
527 */
528 else if (ep->length < ep->maxpacket
529 || !(urb->transfer_flags
530 & URB_ZERO_PACKET))
531 urbstat = 0;
532 }
533 break;
534 case USB_PID_IN:
535 // PACKET("...ACK/in_%02x qh%p\n", bank, ep);
536 buf = urb->transfer_buffer + urb->actual_length;
537 prefetchw(buf);
538 len = ep->maxpacket - sl811_read(sl811,
539 bank + SL11H_XFERCNTREG);
540 if (len > ep->length) {
541 len = ep->length;
542 urb->status = -EOVERFLOW;
543 }
544 urb->actual_length += len;
545 sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0),
546 buf, len);
547 usb_dotoggle(udev, ep->epnum, 0);
548 if (urb->actual_length == urb->transfer_buffer_length)
549 urbstat = 0;
550 else if (len < ep->maxpacket) {
551 if (urb->transfer_flags & URB_SHORT_NOT_OK)
552 urbstat = -EREMOTEIO;
553 else
554 urbstat = 0;
555 }
556 if (usb_pipecontrol(urb->pipe)
557 && (urbstat == -EREMOTEIO
558 || urbstat == 0)) {
559
560 /* NOTE if the status stage STALLs (why?),
561 * this reports the wrong urb status.
562 */
563 spin_lock(&urb->lock);
564 if (urb->status == -EINPROGRESS)
565 urb->status = urbstat;
566 spin_unlock(&urb->lock);
567
568 urb = NULL;
569 ep->nextpid = USB_PID_ACK;
570 }
571 break;
572 case USB_PID_SETUP:
573 // PACKET("...ACK/setup_%02x qh%p\n", bank, ep);
574 if (urb->transfer_buffer_length == urb->actual_length)
575 ep->nextpid = USB_PID_ACK;
576 else if (usb_pipeout(urb->pipe)) {
577 usb_settoggle(udev, 0, 1, 1);
578 ep->nextpid = USB_PID_OUT;
579 } else {
580 usb_settoggle(udev, 0, 0, 1);
581 ep->nextpid = USB_PID_IN;
582 }
583 break;
584 case USB_PID_ACK:
585 // PACKET("...ACK/status_%02x qh%p\n", bank, ep);
586 urbstat = 0;
587 break;
588 }
589
590 /* STALL stops all transfers */
591 } else if (status & SL11H_STATMASK_STALL) {
592 PACKET("...STALL_%02x qh%p\n", bank, ep);
593 ep->nak_count = ep->error_count = 0;
594 urbstat = -EPIPE;
595
596 /* error? retry, until "3 strikes" */
597 } else if (++ep->error_count >= 3) {
598 if (status & SL11H_STATMASK_TMOUT)
38e2bfc9 599 urbstat = -ETIME;
1da177e4
LT		 600 else if (status & SL11H_STATMASK_OVF)
601 urbstat = -EOVERFLOW;
602 else
603 urbstat = -EPROTO;
604 ep->error_count = 0;
605 PACKET("...3STRIKES_%02x %02x qh%p stat %d\n",
606 bank, status, ep, urbstat);
607 }
608
609 if (urb && (urbstat != -EINPROGRESS || urb->status != -EINPROGRESS))
7d12e780 610 finish_request(sl811, ep, urb, urbstat);
1da177e4
LT		 611}
612
613static inline u8 checkdone(struct sl811 *sl811)
614{
615 u8 ctl;
616 u8 irqstat = 0;
617
618 if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) {
619 ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG));
620 if (ctl & SL11H_HCTLMASK_ARM)
621 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
622 DBG("%s DONE_A: ctrl %02x sts %02x\n",
623 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
624 ctl,
625 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
626 irqstat |= SL11H_INTMASK_DONE_A;
627 }
628#ifdef USE_B
629 if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) {
630 ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG));
631 if (ctl & SL11H_HCTLMASK_ARM)
632 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
633 DBG("%s DONE_B: ctrl %02x sts %02x\n",
634 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
635 ctl,
636 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
637 irqstat |= SL11H_INTMASK_DONE_A;
638 }
639#endif
640 return irqstat;
641}
642
7d12e780 643static irqreturn_t sl811h_irq(struct usb_hcd *hcd)
1da177e4
LT		 644{
645 struct sl811 *sl811 = hcd_to_sl811(hcd);
646 u8 irqstat;
647 irqreturn_t ret = IRQ_NONE;
648 unsigned retries = 5;
649
650 spin_lock(&sl811->lock);
651
652retry:
653 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP;
654 if (irqstat) {
655 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
656 irqstat &= sl811->irq_enable;
657 }
658
659#ifdef QUIRK2
660 /* this may no longer be necessary ... */
1e9a47b6 661 if (irqstat == 0) {
1da177e4 662 irqstat = checkdone(sl811);
1e9a47b6 663 if (irqstat)
1da177e4
LT		 664 sl811->stat_lost++;
665 }
666#endif
667
668 /* USB packets, not necessarily handled in the order they're
669 * issued ... that's fine if they're different endpoints.
670 */
671 if (irqstat & SL11H_INTMASK_DONE_A) {
7d12e780 672 done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF));
1da177e4
LT		 673 sl811->active_a = NULL;
674 sl811->stat_a++;
675 }
676#ifdef USE_B
677 if (irqstat & SL11H_INTMASK_DONE_B) {
7d12e780 678 done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF));
1da177e4
LT		 679 sl811->active_b = NULL;
680 sl811->stat_b++;
681 }
682#endif
683 if (irqstat & SL11H_INTMASK_SOFINTR) {
684 unsigned index;
685
686 index = sl811->frame++ % (PERIODIC_SIZE - 1);
687 sl811->stat_sof++;
688
689 /* be graceful about almost-inevitable periodic schedule
690 * overruns: continue the previous frame's transfers iff
691 * this one has nothing scheduled.
692 */
693 if (sl811->next_periodic) {
694 // ERR("overrun to slot %d\n", index);
695 sl811->stat_overrun++;
696 }
697 if (sl811->periodic[index])
698 sl811->next_periodic = sl811->periodic[index];
699 }
700
701 /* khubd manages debouncing and wakeup */
702 if (irqstat & SL11H_INTMASK_INSRMV) {
703 sl811->stat_insrmv++;
704
705 /* most stats are reset for each VBUS session */
706 sl811->stat_wake = 0;
707 sl811->stat_sof = 0;
708 sl811->stat_a = 0;
709 sl811->stat_b = 0;
710 sl811->stat_lost = 0;
711
712 sl811->ctrl1 = 0;
713 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
714
715 sl811->irq_enable = SL11H_INTMASK_INSRMV;
716 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
717
718 /* usbcore nukes other pending transactions on disconnect */
719 if (sl811->active_a) {
720 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
721 finish_request(sl811, sl811->active_a,
1e9a47b6
DB		 722 container_of(sl811->active_a
723 ->hep->urb_list.next,
1da177e4 724 struct urb, urb_list),
7d12e780 725 -ESHUTDOWN);
1da177e4
LT		 726 sl811->active_a = NULL;
727 }
728#ifdef USE_B
729 if (sl811->active_b) {
730 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
731 finish_request(sl811, sl811->active_b,
1e9a47b6
DB		 732 container_of(sl811->active_b
733 ->hep->urb_list.next,
1da177e4
LT		 734 struct urb, urb_list),
735 NULL, -ESHUTDOWN);
736 sl811->active_b = NULL;
737 }
738#endif
739
093cf723 740 /* port status seems weird until after reset, so
1da177e4
LT		 741 * force the reset and make khubd clean up later.
742 */
743 sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION)
744 | (1 << USB_PORT_FEAT_CONNECTION);
745
746 } else if (irqstat & SL11H_INTMASK_RD) {
747 if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) {
748 DBG("wakeup\n");
749 sl811->port1 |= 1 << USB_PORT_FEAT_C_SUSPEND;
750 sl811->stat_wake++;
751 } else
752 irqstat &= ~SL11H_INTMASK_RD;
753 }
754
755 if (irqstat) {
756 if (sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))
757 start_transfer(sl811);
758 ret = IRQ_HANDLED;
759 if (retries--)
760 goto retry;
761 }
762
1e9a47b6 763 if (sl811->periodic_count == 0 && list_empty(&sl811->async))
1da177e4
LT		 764 sofirq_off(sl811);
765 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
766
767 spin_unlock(&sl811->lock);
768
769 return ret;
770}
771
772/*-------------------------------------------------------------------------*/
773
774/* usb 1.1 says max 90% of a frame is available for periodic transfers.
775 * this driver doesn't promise that much since it's got to handle an
776 * IRQ per packet; irq handling latencies also use up that time.
4b2e790a
DB		 777 *
778 * NOTE: the periodic schedule is a sparse tree, with the load for
779 * each branch minimized. see fig 3.5 in the OHCI spec for example.
1da177e4
LT		 780 */
781#define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */
782
783static int balance(struct sl811 *sl811, u16 period, u16 load)
784{
785 int i, branch = -ENOSPC;
786
787 /* search for the least loaded schedule branch of that period
788 * which has enough bandwidth left unreserved.
789 */
790 for (i = 0; i < period ; i++) {
791 if (branch < 0 || sl811->load[branch] > sl811->load[i]) {
792 int j;
793
794 for (j = i; j < PERIODIC_SIZE; j += period) {
795 if ((sl811->load[j] + load)
796 > MAX_PERIODIC_LOAD)
797 break;
798 }
799 if (j < PERIODIC_SIZE)
800 continue;
1e9a47b6 801 branch = i;
1da177e4
LT		 802 }
803 }
804 return branch;
805}
806
807/*-------------------------------------------------------------------------*/
808
809static int sl811h_urb_enqueue(
810 struct usb_hcd *hcd,
811 struct usb_host_endpoint *hep,
812 struct urb *urb,
55016f10 813 gfp_t mem_flags
1da177e4
LT		 814) {
815 struct sl811 *sl811 = hcd_to_sl811(hcd);
816 struct usb_device *udev = urb->dev;
817 unsigned int pipe = urb->pipe;
818 int is_out = !usb_pipein(pipe);
819 int type = usb_pipetype(pipe);
820 int epnum = usb_pipeendpoint(pipe);
821 struct sl811h_ep *ep = NULL;
822 unsigned long flags;
823 int i;
824 int retval = 0;
825
826#ifdef DISABLE_ISO
827 if (type == PIPE_ISOCHRONOUS)
828 return -ENOSPC;
829#endif
830
831 /* avoid all allocations within spinlocks */
832 if (!hep->hcpriv)
7b842b6e 833 ep = kzalloc(sizeof *ep, mem_flags);
1da177e4
LT		 834
835 spin_lock_irqsave(&sl811->lock, flags);
836
837 /* don't submit to a dead or disabled port */
838 if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))
839 || !HC_IS_RUNNING(hcd->state)) {
840 retval = -ENODEV;
4b2e790a 841 kfree(ep);
1da177e4
LT		 842 goto fail;
843 }
844
845 if (hep->hcpriv) {
846 kfree(ep);
847 ep = hep->hcpriv;
848 } else if (!ep) {
849 retval = -ENOMEM;
850 goto fail;
851
852 } else {
853 INIT_LIST_HEAD(&ep->schedule);
6a8e87b2 854 ep->udev = udev;
1da177e4
LT		 855 ep->epnum = epnum;
856 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
857 ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE;
858 usb_settoggle(udev, epnum, is_out, 0);
859
860 if (type == PIPE_CONTROL)
861 ep->nextpid = USB_PID_SETUP;
862 else if (is_out)
863 ep->nextpid = USB_PID_OUT;
864 else
865 ep->nextpid = USB_PID_IN;
866
867 if (ep->maxpacket > H_MAXPACKET) {
868 /* iso packets up to 240 bytes could work... */
869 DBG("dev %d ep%d maxpacket %d\n",
870 udev->devnum, epnum, ep->maxpacket);
871 retval = -EINVAL;
872 goto fail;
873 }
874
875 if (udev->speed == USB_SPEED_LOW) {
876 /* send preamble for external hub? */
877 if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD))
878 ep->defctrl |= SL11H_HCTLMASK_PREAMBLE;
879 }
880 switch (type) {
881 case PIPE_ISOCHRONOUS:
882 case PIPE_INTERRUPT:
883 if (urb->interval > PERIODIC_SIZE)
884 urb->interval = PERIODIC_SIZE;
885 ep->period = urb->interval;
886 ep->branch = PERIODIC_SIZE;
887 if (type == PIPE_ISOCHRONOUS)
888 ep->defctrl |= SL11H_HCTLMASK_ISOCH;
889 ep->load = usb_calc_bus_time(udev->speed, !is_out,
890 (type == PIPE_ISOCHRONOUS),
891 usb_maxpacket(udev, pipe, is_out))
892 / 1000;
893 break;
894 }
895
1e9a47b6 896 ep->hep = hep;
1da177e4
LT		 897 hep->hcpriv = ep;
898 }
899
900 /* maybe put endpoint into schedule */
901 switch (type) {
902 case PIPE_CONTROL:
903 case PIPE_BULK:
904 if (list_empty(&ep->schedule))
905 list_add_tail(&ep->schedule, &sl811->async);
906 break;
907 case PIPE_ISOCHRONOUS:
908 case PIPE_INTERRUPT:
909 urb->interval = ep->period;
4b2e790a
DB		 910 if (ep->branch < PERIODIC_SIZE) {
911 /* NOTE: the phase is correct here, but the value
912 * needs offsetting by the transfer queue depth.
913 * All current drivers ignore start_frame, so this
914 * is unlikely to ever matter...
915 */
916 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
917 + ep->branch;
1da177e4 918 break;
4b2e790a 919 }
1da177e4
LT		 920
921 retval = balance(sl811, ep->period, ep->load);
922 if (retval < 0)
923 goto fail;
924 ep->branch = retval;
925 retval = 0;
926 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
927 + ep->branch;
928
929 /* sort each schedule branch by period (slow before fast)
930 * to share the faster parts of the tree without needing
931 * dummy/placeholder nodes
932 */
933 DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
934 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
935 struct sl811h_ep **prev = &sl811->periodic[i];
936 struct sl811h_ep *here = *prev;
937
938 while (here && ep != here) {
939 if (ep->period > here->period)
940 break;
941 prev = &here->next;
942 here = *prev;
943 }
944 if (ep != here) {
945 ep->next = here;
946 *prev = ep;
947 }
948 sl811->load[i] += ep->load;
949 }
950 sl811->periodic_count++;
951 hcd->self.bandwidth_allocated += ep->load / ep->period;
952 sofirq_on(sl811);
953 }
954
955 /* in case of unlink-during-submit */
956 spin_lock(&urb->lock);
957 if (urb->status != -EINPROGRESS) {
958 spin_unlock(&urb->lock);
7d12e780 959 finish_request(sl811, ep, urb, 0);
1da177e4
LT		 960 retval = 0;
961 goto fail;
962 }
963 urb->hcpriv = hep;
964 spin_unlock(&urb->lock);
965
966 start_transfer(sl811);
967 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
968fail:
969 spin_unlock_irqrestore(&sl811->lock, flags);
970 return retval;
971}
972
973static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
974{
975 struct sl811 *sl811 = hcd_to_sl811(hcd);
1e9a47b6 976 struct usb_host_endpoint *hep;
1da177e4
LT		 977 unsigned long flags;
978 struct sl811h_ep *ep;
979 int retval = 0;
980
1e9a47b6
DB		 981 spin_lock_irqsave(&sl811->lock, flags);
982 hep = urb->hcpriv;
1da177e4 983 if (!hep)
1e9a47b6 984 goto fail;
1da177e4 985
1da177e4
LT		 986 ep = hep->hcpriv;
987 if (ep) {
988 /* finish right away if this urb can't be active ...
989 * note that some drivers wrongly expect delays
990 */
991 if (ep->hep->urb_list.next != &urb->urb_list) {
992 /* not front of queue? never active */
993
994 /* for active transfers, we expect an IRQ */
995 } else if (sl811->active_a == ep) {
996 if (time_before_eq(sl811->jiffies_a, jiffies)) {
997 /* happens a lot with lowspeed?? */
998 DBG("giveup on DONE_A: ctrl %02x sts %02x\n",
999 sl811_read(sl811,
1000 SL811_EP_A(SL11H_HOSTCTLREG)),
1001 sl811_read(sl811,
1002 SL811_EP_A(SL11H_PKTSTATREG)));
1003 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1004 0);
1005 sl811->active_a = NULL;
1006 } else
1007 urb = NULL;
1008#ifdef USE_B
1009 } else if (sl811->active_b == ep) {
1010 if (time_before_eq(sl811->jiffies_a, jiffies)) {
1011 /* happens a lot with lowspeed?? */
1012 DBG("giveup on DONE_B: ctrl %02x sts %02x\n",
1013 sl811_read(sl811,
1014 SL811_EP_B(SL11H_HOSTCTLREG)),
1015 sl811_read(sl811,
1016 SL811_EP_B(SL11H_PKTSTATREG)));
1017 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG),
1018 0);
1019 sl811->active_b = NULL;
1020 } else
1021 urb = NULL;
1022#endif
1023 } else {
1024 /* front of queue for inactive endpoint */
1025 }
1026
1027 if (urb)
7d12e780 1028 finish_request(sl811, ep, urb, 0);
1da177e4
LT		 1029 else
1030 VDBG("dequeue, urb %p active %s; wait4irq\n", urb,
1031 (sl811->active_a == ep) ? "A" : "B");
1032 } else
1e9a47b6 1033fail:
1da177e4
LT		 1034 retval = -EINVAL;
1035 spin_unlock_irqrestore(&sl811->lock, flags);
1036 return retval;
1037}
1038
1039static void
1040sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
1041{
1042 struct sl811h_ep *ep = hep->hcpriv;
1043
1044 if (!ep)
1045 return;
1046
1047 /* assume we'd just wait for the irq */
1048 if (!list_empty(&hep->urb_list))
1049 msleep(3);
1050 if (!list_empty(&hep->urb_list))
1051 WARN("ep %p not empty?\n", ep);
1052
1da177e4
LT		 1053 kfree(ep);
1054 hep->hcpriv = NULL;
1055}
1056
1057static int
1058sl811h_get_frame(struct usb_hcd *hcd)
1059{
1060 struct sl811 *sl811 = hcd_to_sl811(hcd);
1061
1062 /* wrong except while periodic transfers are scheduled;
1063 * never matches the on-the-wire frame;
1064 * subject to overruns.
1065 */
1066 return sl811->frame;
1067}
1068
1069
1070/*-------------------------------------------------------------------------*/
1071
1072/* the virtual root hub timer IRQ checks for hub status */
1073static int
1074sl811h_hub_status_data(struct usb_hcd *hcd, char *buf)
1075{
1076 struct sl811 *sl811 = hcd_to_sl811(hcd);
1077#ifdef QUIRK3
1078 unsigned long flags;
1079
1080 /* non-SMP HACK: use root hub timer as i/o watchdog
1081 * this seems essential when SOF IRQs aren't in use...
1082 */
1083 local_irq_save(flags);
1084 if (!timer_pending(&sl811->timer)) {
7d12e780 1085 if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE)
1da177e4
LT		 1086 sl811->stat_lost++;
1087 }
1088 local_irq_restore(flags);
1089#endif
1090
1091 if (!(sl811->port1 & (0xffff << 16)))
1092 return 0;
1093
1094 /* tell khubd port 1 changed */
1095 *buf = (1 << 1);
1096 return 1;
1097}
1098
1099static void
1100sl811h_hub_descriptor (
1101 struct sl811 *sl811,
1102 struct usb_hub_descriptor *desc
1103) {
1104 u16 temp = 0;
1105
1106 desc->bDescriptorType = 0x29;
1107 desc->bHubContrCurrent = 0;
1108
1109 desc->bNbrPorts = 1;
1110 desc->bDescLength = 9;
1111
1112 /* per-port power switching (gang of one!), or none */
1113 desc->bPwrOn2PwrGood = 0;
1114 if (sl811->board && sl811->board->port_power) {
1115 desc->bPwrOn2PwrGood = sl811->board->potpg;
1116 if (!desc->bPwrOn2PwrGood)
1117 desc->bPwrOn2PwrGood = 10;
1118 temp = 0x0001;
1119 } else
1120 temp = 0x0002;
1121
1122 /* no overcurrent errors detection/handling */
1123 temp |= 0x0010;
1124
1125 desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
1126
1127 /* two bitmaps: ports removable, and legacy PortPwrCtrlMask */
4b2e790a 1128 desc->bitmap[0] = 0 << 1;
1da177e4
LT		 1129 desc->bitmap[1] = ~0;
1130}
1131
1132static void
1133sl811h_timer(unsigned long _sl811)
1134{
1135 struct sl811 *sl811 = (void *) _sl811;
1136 unsigned long flags;
1137 u8 irqstat;
1138 u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE;
1139 const u32 mask = (1 << USB_PORT_FEAT_CONNECTION)
1140 | (1 << USB_PORT_FEAT_ENABLE)
1141 | (1 << USB_PORT_FEAT_LOWSPEED);
1142
1143 spin_lock_irqsave(&sl811->lock, flags);
1144
1145 /* stop special signaling */
1146 sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE;
1147 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1148 udelay(3);
1149
1150 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS);
1151
1152 switch (signaling) {
1153 case SL11H_CTL1MASK_SE0:
1154 DBG("end reset\n");
1155 sl811->port1 = (1 << USB_PORT_FEAT_C_RESET)
1156 | (1 << USB_PORT_FEAT_POWER);
1157 sl811->ctrl1 = 0;
1158 /* don't wrongly ack RD */
1159 if (irqstat & SL11H_INTMASK_INSRMV)
1160 irqstat &= ~SL11H_INTMASK_RD;
1161 break;
1162 case SL11H_CTL1MASK_K:
1163 DBG("end resume\n");
1164 sl811->port1 &= ~(1 << USB_PORT_FEAT_SUSPEND);
1165 break;
1166 default:
1167 DBG("odd timer signaling: %02x\n", signaling);
1168 break;
1169 }
1170 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
1171
1172 if (irqstat & SL11H_INTMASK_RD) {
1173 /* usbcore nukes all pending transactions on disconnect */
1174 if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION))
1175 sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION)
1176 | (1 << USB_PORT_FEAT_C_ENABLE);
1177 sl811->port1 &= ~mask;
1178 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1179 } else {
1180 sl811->port1 |= mask;
1181 if (irqstat & SL11H_INTMASK_DP)
1182 sl811->port1 &= ~(1 << USB_PORT_FEAT_LOWSPEED);
1183 sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD;
1184 }
1185
1186 if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION)) {
1187 u8 ctrl2 = SL811HS_CTL2_INIT;
1188
1189 sl811->irq_enable |= SL11H_INTMASK_DONE_A;
1190#ifdef USE_B
1191 sl811->irq_enable |= SL11H_INTMASK_DONE_B;
1192#endif
1193 if (sl811->port1 & (1 << USB_PORT_FEAT_LOWSPEED)) {
1194 sl811->ctrl1 |= SL11H_CTL1MASK_LSPD;
1195 ctrl2 |= SL811HS_CTL2MASK_DSWAP;
1196 }
1197
1198 /* start SOFs flowing, kickstarting with A registers */
1199 sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA;
1200 sl811_write(sl811, SL11H_SOFLOWREG, 0xe0);
1201 sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
1202
1203 /* autoincrementing */
1204 sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0);
1205 writeb(SL_SOF, sl811->data_reg);
1206 writeb(0, sl811->data_reg);
1207 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1208 SL11H_HCTLMASK_ARM);
1209
1210 /* khubd provides debounce delay */
1211 } else {
1212 sl811->ctrl1 = 0;
1213 }
1214 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1215
1216 /* reenable irqs */
1217 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
1218 spin_unlock_irqrestore(&sl811->lock, flags);
1219}
1220
1221static int
1222sl811h_hub_control(
1223 struct usb_hcd *hcd,
1224 u16 typeReq,
1225 u16 wValue,
1226 u16 wIndex,
1227 char *buf,
1228 u16 wLength
1229) {
1230 struct sl811 *sl811 = hcd_to_sl811(hcd);
1231 int retval = 0;
1232 unsigned long flags;
1233
1234 spin_lock_irqsave(&sl811->lock, flags);
1235
1236 switch (typeReq) {
1237 case ClearHubFeature:
1238 case SetHubFeature:
1239 switch (wValue) {
1240 case C_HUB_OVER_CURRENT:
1241 case C_HUB_LOCAL_POWER:
1242 break;
1243 default:
1244 goto error;
1245 }
1246 break;
1247 case ClearPortFeature:
1248 if (wIndex != 1 || wLength != 0)
1249 goto error;
1250
1251 switch (wValue) {
1252 case USB_PORT_FEAT_ENABLE:
1253 sl811->port1 &= (1 << USB_PORT_FEAT_POWER);
1254 sl811->ctrl1 = 0;
1255 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1256 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1257 sl811_write(sl811, SL11H_IRQ_ENABLE,
1258 sl811->irq_enable);
1259 break;
1260 case USB_PORT_FEAT_SUSPEND:
1261 if (!(sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)))
1262 break;
1263
1264 /* 20 msec of resume/K signaling, other irqs blocked */
1265 DBG("start resume...\n");
1266 sl811->irq_enable = 0;
1267 sl811_write(sl811, SL11H_IRQ_ENABLE,
1268 sl811->irq_enable);
1269 sl811->ctrl1 |= SL11H_CTL1MASK_K;
1270 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1271
1272 mod_timer(&sl811->timer, jiffies
1273 + msecs_to_jiffies(20));
1274 break;
1275 case USB_PORT_FEAT_POWER:
1276 port_power(sl811, 0);
1277 break;
1278 case USB_PORT_FEAT_C_ENABLE:
1279 case USB_PORT_FEAT_C_SUSPEND:
1280 case USB_PORT_FEAT_C_CONNECTION:
1281 case USB_PORT_FEAT_C_OVER_CURRENT:
1282 case USB_PORT_FEAT_C_RESET:
1283 break;
1284 default:
1285 goto error;
1286 }
1287 sl811->port1 &= ~(1 << wValue);
1288 break;
1289 case GetHubDescriptor:
1290 sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf);
1291 break;
1292 case GetHubStatus:
1293 *(__le32 *) buf = cpu_to_le32(0);
1294 break;
1295 case GetPortStatus:
1296 if (wIndex != 1)
1297 goto error;
1298 *(__le32 *) buf = cpu_to_le32(sl811->port1);
1299
1300#ifndef VERBOSE
1301 if (*(u16*)(buf+2)) /* only if wPortChange is interesting */
1302#endif
1303 DBG("GetPortStatus %08x\n", sl811->port1);
1304 break;
1305 case SetPortFeature:
1306 if (wIndex != 1 || wLength != 0)
1307 goto error;
1308 switch (wValue) {
1309 case USB_PORT_FEAT_SUSPEND:
1310 if (sl811->port1 & (1 << USB_PORT_FEAT_RESET))
1311 goto error;
1312 if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE)))
1313 goto error;
1314
1315 DBG("suspend...\n");
1316 sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA;
1317 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1318 break;
1319 case USB_PORT_FEAT_POWER:
1320 port_power(sl811, 1);
1321 break;
1322 case USB_PORT_FEAT_RESET:
1323 if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))
1324 goto error;
1325 if (!(sl811->port1 & (1 << USB_PORT_FEAT_POWER)))
1326 break;
1327
1328 /* 50 msec of reset/SE0 signaling, irqs blocked */
1329 sl811->irq_enable = 0;
1330 sl811_write(sl811, SL11H_IRQ_ENABLE,
1331 sl811->irq_enable);
1332 sl811->ctrl1 = SL11H_CTL1MASK_SE0;
1333 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1334 sl811->port1 |= (1 << USB_PORT_FEAT_RESET);
1335 mod_timer(&sl811->timer, jiffies
1336 + msecs_to_jiffies(50));
1337 break;
1338 default:
1339 goto error;
1340 }
1341 sl811->port1 |= 1 << wValue;
1342 break;
1343
1344 default:
1345error:
1346 /* "protocol stall" on error */
1347 retval = -EPIPE;
1348 }
1349
1350 spin_unlock_irqrestore(&sl811->lock, flags);
1351 return retval;
1352}
1353
1354#ifdef CONFIG_PM
1355
1356static int
0c0382e3 1357sl811h_bus_suspend(struct usb_hcd *hcd)
1da177e4
LT		 1358{
1359 // SOFs off
1360 DBG("%s\n", __FUNCTION__);
1361 return 0;
1362}
1363
1364static int
0c0382e3 1365sl811h_bus_resume(struct usb_hcd *hcd)
1da177e4
LT		 1366{
1367 // SOFs on
1368 DBG("%s\n", __FUNCTION__);
1369 return 0;
1370}
1371
1372#else
1373
0c0382e3
AS		 1374#define sl811h_bus_suspend NULL
1375#define sl811h_bus_resume NULL
1da177e4
LT		 1376
1377#endif
1378
1379
1380/*-------------------------------------------------------------------------*/
1381
1382#ifdef STUB_DEBUG_FILE
1383
1384static inline void create_debug_file(struct sl811 *sl811) { }
1385static inline void remove_debug_file(struct sl811 *sl811) { }
1386
1387#else
1388
1389#include <linux/proc_fs.h>
1390#include <linux/seq_file.h>
1391
1392static void dump_irq(struct seq_file *s, char *label, u8 mask)
1393{
1394 seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask,
1395 (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "",
1396 (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "",
1397 (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "",
1398 (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "",
1399 (mask & SL11H_INTMASK_RD) ? " rd" : "",
1400 (mask & SL11H_INTMASK_DP) ? " dp" : "");
1401}
1402
1403static int proc_sl811h_show(struct seq_file *s, void *unused)
1404{
1405 struct sl811 *sl811 = s->private;
1406 struct sl811h_ep *ep;
1407 unsigned i;
1408
1409 seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n",
1410 sl811_to_hcd(sl811)->product_desc,
1411 hcd_name, DRIVER_VERSION,
1412 sl811->port1);
1413
1414 seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv);
1415 seq_printf(s, "current session: done_a %ld done_b %ld "
1416 "wake %ld sof %ld overrun %ld lost %ld\n\n",
1417 sl811->stat_a, sl811->stat_b,
1418 sl811->stat_wake, sl811->stat_sof,
1419 sl811->stat_overrun, sl811->stat_lost);
1420
1421 spin_lock_irq(&sl811->lock);
1422
1423 if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND)
1424 seq_printf(s, "(suspended)\n\n");
1425 else {
1426 u8 t = sl811_read(sl811, SL11H_CTLREG1);
1427
1428 seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t,
1429 (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "",
1430 ({char *s; switch (t & SL11H_CTL1MASK_FORCE) {
1431 case SL11H_CTL1MASK_NORMAL: s = ""; break;
1432 case SL11H_CTL1MASK_SE0: s = " se0/reset"; break;
1433 case SL11H_CTL1MASK_K: s = " k/resume"; break;
1434 default: s = "j"; break;
1435 }; s; }),
1436 (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "",
1437 (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : "");
1438
1439 dump_irq(s, "irq_enable",
1440 sl811_read(sl811, SL11H_IRQ_ENABLE));
1441 dump_irq(s, "irq_status",
1442 sl811_read(sl811, SL11H_IRQ_STATUS));
1443 seq_printf(s, "frame clocks remaining: %d\n",
1444 sl811_read(sl811, SL11H_SOFTMRREG) << 6);
1445 }
1446
1447 seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a,
1448 sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)),
1449 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
1450 seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b,
1451 sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)),
1452 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
1453 seq_printf(s, "\n");
1454 list_for_each_entry (ep, &sl811->async, schedule) {
1455 struct urb *urb;
1456
1457 seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d"
1458 " nak %d err %d\n",
1459 (ep == sl811->active_a) ? "(A) " : "",
1460 (ep == sl811->active_b) ? "(B) " : "",
1461 ep, ep->epnum,
1462 ({ char *s; switch (ep->nextpid) {
1463 case USB_PID_IN: s = "in"; break;
1464 case USB_PID_OUT: s = "out"; break;
1465 case USB_PID_SETUP: s = "setup"; break;
1466 case USB_PID_ACK: s = "status"; break;
1467 default: s = "?"; break;
1468 }; s;}),
1469 ep->maxpacket,
1470 ep->nak_count, ep->error_count);
1471 list_for_each_entry (urb, &ep->hep->urb_list, urb_list) {
1472 seq_printf(s, " urb%p, %d/%d\n", urb,
1473 urb->actual_length,
1474 urb->transfer_buffer_length);
1475 }
1476 }
1477 if (!list_empty(&sl811->async))
1478 seq_printf(s, "\n");
1479
1480 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
1481
1482 for (i = 0; i < PERIODIC_SIZE; i++) {
1483 ep = sl811->periodic[i];
1484 if (!ep)
1485 continue;
1486 seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]);
1487
1488 /* DUMB: prints shared entries multiple times */
1489 do {
1490 seq_printf(s,
1491 " %s%sqh%d/%p (%sdev%d ep%d%s max %d) "
1492 "err %d\n",
1493 (ep == sl811->active_a) ? "(A) " : "",
1494 (ep == sl811->active_b) ? "(B) " : "",
1495 ep->period, ep,
1496 (ep->udev->speed == USB_SPEED_FULL)
1497 ? "" : "ls ",
1498 ep->udev->devnum, ep->epnum,
1499 (ep->epnum == 0) ? ""
1500 : ((ep->nextpid == USB_PID_IN)
1501 ? "in"
1502 : "out"),
1503 ep->maxpacket, ep->error_count);
1504 ep = ep->next;
1505 } while (ep);
1506 }
1507
1508 spin_unlock_irq(&sl811->lock);
1509 seq_printf(s, "\n");
1510
1511 return 0;
1512}
1513
1514static int proc_sl811h_open(struct inode *inode, struct file *file)
1515{
1516 return single_open(file, proc_sl811h_show, PDE(inode)->data);
1517}
1518
066202dd 1519static const struct file_operations proc_ops = {
1da177e4
LT		 1520 .open = proc_sl811h_open,
1521 .read = seq_read,
1522 .llseek = seq_lseek,
1523 .release = single_release,
1524};
1525
1526/* expect just one sl811 per system */
1527static const char proc_filename[] = "driver/sl811h";
1528
1529static void create_debug_file(struct sl811 *sl811)
1530{
1531 struct proc_dir_entry *pde;
1532
1533 pde = create_proc_entry(proc_filename, 0, NULL);
1534 if (pde == NULL)
1535 return;
1536
1537 pde->proc_fops = &proc_ops;
1538 pde->data = sl811;
1539 sl811->pde = pde;
1540}
1541
1542static void remove_debug_file(struct sl811 *sl811)
1543{
1544 if (sl811->pde)
1545 remove_proc_entry(proc_filename, NULL);
1546}
1547
1548#endif
1549
1550/*-------------------------------------------------------------------------*/
1551
1552static void
1553sl811h_stop(struct usb_hcd *hcd)
1554{
1555 struct sl811 *sl811 = hcd_to_sl811(hcd);
1556 unsigned long flags;
1557
1558 del_timer_sync(&hcd->rh_timer);
1559
1560 spin_lock_irqsave(&sl811->lock, flags);
1561 port_power(sl811, 0);
1562 spin_unlock_irqrestore(&sl811->lock, flags);
1563}
1564
1565static int
1566sl811h_start(struct usb_hcd *hcd)
1567{
1568 struct sl811 *sl811 = hcd_to_sl811(hcd);
1da177e4
LT		 1569
1570 /* chip has been reset, VBUS power is off */
1da177e4
LT		 1571 hcd->state = HC_STATE_RUNNING;
1572
bc96c0ad 1573 if (sl811->board) {
0c8624f9
DB		 1574 if (!device_can_wakeup(hcd->self.controller))
1575 device_init_wakeup(hcd->self.controller,
1576 sl811->board->can_wakeup);
bc96c0ad
AS		 1577 hcd->power_budget = sl811->board->power * 2;
1578 }
1da177e4 1579
1e9a47b6
DB		 1580 /* enable power and interupts */
1581 port_power(sl811, 1);
1582
1da177e4
LT		 1583 return 0;
1584}
1585
1586/*-------------------------------------------------------------------------*/
1587
1588static struct hc_driver sl811h_hc_driver = {
1589 .description = hcd_name,
1590 .hcd_priv_size = sizeof(struct sl811),
1591
1592 /*
1593 * generic hardware linkage
1594 */
1595 .irq = sl811h_irq,
1596 .flags = HCD_USB11 | HCD_MEMORY,
1597
1598 /* Basic lifecycle operations */
1599 .start = sl811h_start,
1600 .stop = sl811h_stop,
1601
1602 /*
1603 * managing i/o requests and associated device resources
1604 */
1605 .urb_enqueue = sl811h_urb_enqueue,
1606 .urb_dequeue = sl811h_urb_dequeue,
1607 .endpoint_disable = sl811h_endpoint_disable,
1608
1609 /*
1610 * periodic schedule support
1611 */
1612 .get_frame_number = sl811h_get_frame,
1613
1614 /*
1615 * root hub support
1616 */
1617 .hub_status_data = sl811h_hub_status_data,
1618 .hub_control = sl811h_hub_control,
0c0382e3
AS		 1619 .bus_suspend = sl811h_bus_suspend,
1620 .bus_resume = sl811h_bus_resume,
1da177e4
LT		 1621};
1622
1623/*-------------------------------------------------------------------------*/
1624
1e9a47b6 1625static int __devexit
3ae5eaec 1626sl811h_remove(struct platform_device *dev)
1da177e4 1627{
3ae5eaec 1628 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4 1629 struct sl811 *sl811 = hcd_to_sl811(hcd);
1da177e4
LT		 1630 struct resource *res;
1631
1da177e4
LT		 1632 remove_debug_file(sl811);
1633 usb_remove_hcd(hcd);
1634
1e9a47b6 1635 /* some platforms may use IORESOURCE_IO */
3ae5eaec 1636 res = platform_get_resource(dev, IORESOURCE_MEM, 1);
1e9a47b6
DB		 1637 if (res)
1638 iounmap(sl811->data_reg);
1da177e4 1639
3ae5eaec 1640 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1e9a47b6
DB		 1641 if (res)
1642 iounmap(sl811->addr_reg);
1da177e4
LT		 1643
1644 usb_put_hcd(hcd);
1645 return 0;
1646}
1647
1e9a47b6 1648static int __devinit
3ae5eaec 1649sl811h_probe(struct platform_device *dev)
1da177e4
LT		 1650{
1651 struct usb_hcd *hcd;
1652 struct sl811 *sl811;
1da177e4
LT		 1653 struct resource *addr, *data;
1654 int irq;
1655 void __iomem *addr_reg;
1656 void __iomem *data_reg;
1657 int retval;
1e9a47b6 1658 u8 tmp, ioaddr = 0;
1da177e4
LT		 1659
1660 /* basic sanity checks first. board-specific init logic should
1661 * have initialized these three resources and probably board
1662 * specific platform_data. we don't probe for IRQs, and do only
1663 * minimal sanity checking.
1664 */
3ae5eaec
RK		 1665 irq = platform_get_irq(dev, 0);
1666 if (dev->num_resources < 3 || irq < 0)
1da177e4
LT		 1667 return -ENODEV;
1668
1669 /* refuse to confuse usbcore */
3ae5eaec 1670 if (dev->dev.dma_mask) {
1da177e4
LT		 1671 DBG("no we won't dma\n");
1672 return -EINVAL;
1673 }
1674
1e9a47b6 1675 /* the chip may be wired for either kind of addressing */
3ae5eaec
RK		 1676 addr = platform_get_resource(dev, IORESOURCE_MEM, 0);
1677 data = platform_get_resource(dev, IORESOURCE_MEM, 1);
1e9a47b6
DB		 1678 retval = -EBUSY;
1679 if (!addr || !data) {
3ae5eaec
RK		 1680 addr = platform_get_resource(dev, IORESOURCE_IO, 0);
1681 data = platform_get_resource(dev, IORESOURCE_IO, 1);
1e9a47b6
DB		 1682 if (!addr || !data)
1683 return -ENODEV;
1684 ioaddr = 1;
2427ddd8
GKH		 1685 /*
1686 * NOTE: 64-bit resource->start is getting truncated
1687 * to avoid compiler warning, assuming that ->start
1688 * is always 32-bit for this case
1689 */
1690 addr_reg = (void __iomem *) (unsigned long) addr->start;
1691 data_reg = (void __iomem *) (unsigned long) data->start;
1e9a47b6
DB		 1692 } else {
1693 addr_reg = ioremap(addr->start, 1);
1694 if (addr_reg == NULL) {
1695 retval = -ENOMEM;
1696 goto err2;
1697 }
1da177e4 1698
1e9a47b6
DB		 1699 data_reg = ioremap(data->start, 1);
1700 if (data_reg == NULL) {
1701 retval = -ENOMEM;
1702 goto err4;
1703 }
1da177e4
LT		 1704 }
1705
1706 /* allocate and initialize hcd */
3ae5eaec 1707 hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev->dev.bus_id);
1da177e4
LT		 1708 if (!hcd) {
1709 retval = -ENOMEM;
1710 goto err5;
1711 }
1712 hcd->rsrc_start = addr->start;
1713 sl811 = hcd_to_sl811(hcd);
1714
1715 spin_lock_init(&sl811->lock);
1716 INIT_LIST_HEAD(&sl811->async);
3ae5eaec 1717 sl811->board = dev->dev.platform_data;
1da177e4
LT		 1718 init_timer(&sl811->timer);
1719 sl811->timer.function = sl811h_timer;
1720 sl811->timer.data = (unsigned long) sl811;
1721 sl811->addr_reg = addr_reg;
1722 sl811->data_reg = data_reg;
1723
1724 spin_lock_irq(&sl811->lock);
1725 port_power(sl811, 0);
1726 spin_unlock_irq(&sl811->lock);
1727 msleep(200);
1728
1729 tmp = sl811_read(sl811, SL11H_HWREVREG);
1730 switch (tmp >> 4) {
1731 case 1:
1732 hcd->product_desc = "SL811HS v1.2";
1733 break;
1734 case 2:
1735 hcd->product_desc = "SL811HS v1.5";
1736 break;
1737 default:
1738 /* reject case 0, SL11S is less functional */
1739 DBG("chiprev %02x\n", tmp);
1740 retval = -ENXIO;
1741 goto err6;
1742 }
1743
1e9a47b6
DB		 1744 /* The chip's IRQ is level triggered, active high. A requirement
1745 * for platform device setup is to cope with things like signal
1746 * inverters (e.g. CF is active low) or working only with edge
1747 * triggers (e.g. most ARM CPUs). Initial driver stress testing
1748 * was on a system with single edge triggering, so most sorts of
1749 * triggering arrangement should work.
1750 */
d54b5caa 1751 retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
1da177e4
LT		 1752 if (retval != 0)
1753 goto err6;
1754
1755 create_debug_file(sl811);
1756 return retval;
1757
1758 err6:
1759 usb_put_hcd(hcd);
1760 err5:
1e9a47b6
DB		 1761 if (!ioaddr)
1762 iounmap(data_reg);
1da177e4 1763 err4:
1e9a47b6
DB		 1764 if (!ioaddr)
1765 iounmap(addr_reg);
1da177e4 1766 err2:
1da177e4
LT		 1767 DBG("init error, %d\n", retval);
1768 return retval;
1769}
1770
1771#ifdef CONFIG_PM
1772
1773/* for this device there's no useful distinction between the controller
1e9a47b6 1774 * and its root hub, except that the root hub only gets direct PM calls
1da177e4
LT		 1775 * when CONFIG_USB_SUSPEND is enabled.
1776 */
1777
1778static int
3ae5eaec 1779sl811h_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 1780{
3ae5eaec 1781 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT		 1782 struct sl811 *sl811 = hcd_to_sl811(hcd);
1783 int retval = 0;
1784
18584999
DB		 1785 switch (state.event) {
1786 case PM_EVENT_FREEZE:
0c0382e3 1787 retval = sl811h_bus_suspend(hcd);
18584999
DB		 1788 break;
1789 case PM_EVENT_SUSPEND:
1790 case PM_EVENT_PRETHAW: /* explicitly discard hw state */
1da177e4 1791 port_power(sl811, 0);
18584999
DB		 1792 break;
1793 }
1da177e4 1794 if (retval == 0)
3ae5eaec 1795 dev->dev.power.power_state = state;
1da177e4
LT		 1796 return retval;
1797}
1798
1799static int
3ae5eaec 1800sl811h_resume(struct platform_device *dev)
1da177e4 1801{
3ae5eaec 1802 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT		 1803 struct sl811 *sl811 = hcd_to_sl811(hcd);
1804
1da177e4
LT		 1805 /* with no "check to see if VBUS is still powered" board hook,
1806 * let's assume it'd only be powered to enable remote wakeup.
1807 */
3ae5eaec 1808 if (dev->dev.power.power_state.event == PM_EVENT_SUSPEND
0c8624f9 1809 || !device_can_wakeup(&hcd->self.root_hub->dev)) {
1da177e4
LT		 1810 sl811->port1 = 0;
1811 port_power(sl811, 1);
1c50c317 1812 usb_root_hub_lost_power(hcd->self.root_hub);
1da177e4
LT		 1813 return 0;
1814 }
1815
3ae5eaec 1816 dev->dev.power.power_state = PMSG_ON;
0c0382e3 1817 return sl811h_bus_resume(hcd);
1da177e4
LT		 1818}
1819
1820#else
1821
1822#define sl811h_suspend NULL
1823#define sl811h_resume NULL
1824
1825#endif
1826
1827
1e9a47b6 1828/* this driver is exported so sl811_cs can depend on it */
3ae5eaec 1829struct platform_driver sl811h_driver = {
1da177e4 1830 .probe = sl811h_probe,
1e9a47b6 1831 .remove = __devexit_p(sl811h_remove),
1da177e4
LT		 1832
1833 .suspend = sl811h_suspend,
1834 .resume = sl811h_resume,
3ae5eaec
RK		 1835 .driver = {
1836 .name = (char *) hcd_name,
1837 .owner = THIS_MODULE,
1838 },
1da177e4 1839};
1e9a47b6 1840EXPORT_SYMBOL(sl811h_driver);
1da177e4
LT		 1841
1842/*-------------------------------------------------------------------------*/
1e9a47b6
DB		 1843
1844static int __init sl811h_init(void)
1da177e4
LT		 1845{
1846 if (usb_disabled())
1847 return -ENODEV;
1848
1849 INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION);
3ae5eaec 1850 return platform_driver_register(&sl811h_driver);
1da177e4
LT		 1851}
1852module_init(sl811h_init);
1853
1e9a47b6
DB		 1854static void __exit sl811h_cleanup(void)
1855{
3ae5eaec 1856 platform_driver_unregister(&sl811h_driver);
1da177e4
LT		 1857}
1858module_exit(sl811h_cleanup);
kernel source for telekom puls (alcatel/mediatek)