Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | |
5 | * (C) Copyright 2000-2005 David Brownell | |
6 | * (C) Copyright 2002 Hewlett-Packard Company | |
bd35078f | 7 | * |
1da177e4 LT |
8 | * OMAP Bus Glue |
9 | * | |
10 | * Modified for OMAP by Tony Lindgren <tony@atomide.com> | |
11 | * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc. | |
12 | * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com> | |
13 | * | |
14 | * This file is licenced under the GPL. | |
15 | */ | |
16 | ||
b5dd18d8 | 17 | #include <linux/signal.h> |
4e57b681 | 18 | #include <linux/jiffies.h> |
d052d1be | 19 | #include <linux/platform_device.h> |
f8ce2547 | 20 | #include <linux/clk.h> |
ded017ee | 21 | #include <linux/err.h> |
944e1bff | 22 | #include <linux/gpio.h> |
4e57b681 | 23 | |
1da177e4 LT |
24 | #include <asm/io.h> |
25 | #include <asm/mach-types.h> | |
26 | ||
70c494c3 | 27 | #include <mach/mux.h> |
b924b204 TL |
28 | |
29 | #include <mach/hardware.h> | |
30 | #include <mach/irqs.h> | |
31 | #include <mach/usb.h> | |
1da177e4 LT |
32 | |
33 | ||
34 | /* OMAP-1510 OHCI has its own MMU for DMA */ | |
35 | #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ | |
36 | #define OMAP1510_LB_CLOCK_DIV 0xfffec10c | |
37 | #define OMAP1510_LB_MMU_CTL 0xfffec208 | |
38 | #define OMAP1510_LB_MMU_LCK 0xfffec224 | |
39 | #define OMAP1510_LB_MMU_LD_TLB 0xfffec228 | |
40 | #define OMAP1510_LB_MMU_CAM_H 0xfffec22c | |
41 | #define OMAP1510_LB_MMU_CAM_L 0xfffec230 | |
42 | #define OMAP1510_LB_MMU_RAM_H 0xfffec234 | |
43 | #define OMAP1510_LB_MMU_RAM_L 0xfffec238 | |
44 | ||
45 | ||
46 | #ifndef CONFIG_ARCH_OMAP | |
47 | #error "This file is OMAP bus glue. CONFIG_OMAP must be defined." | |
48 | #endif | |
49 | ||
50 | #ifdef CONFIG_TPS65010 | |
6d16bfb5 | 51 | #include <linux/i2c/tps65010.h> |
1da177e4 LT |
52 | #else |
53 | ||
54 | #define LOW 0 | |
55 | #define HIGH 1 | |
56 | ||
57 | #define GPIO1 1 | |
58 | ||
59 | static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value) | |
60 | { | |
61 | return 0; | |
62 | } | |
63 | ||
64 | #endif | |
65 | ||
66 | extern int usb_disabled(void); | |
67 | extern int ocpi_enable(void); | |
68 | ||
69 | static struct clk *usb_host_ck; | |
bd35078f DB |
70 | static struct clk *usb_dc_ck; |
71 | static int host_enabled; | |
72 | static int host_initialized; | |
1da177e4 LT |
73 | |
74 | static void omap_ohci_clock_power(int on) | |
75 | { | |
76 | if (on) { | |
bd35078f | 77 | clk_enable(usb_dc_ck); |
1da177e4 LT |
78 | clk_enable(usb_host_ck); |
79 | /* guesstimate for T5 == 1x 32K clock + APLL lock time */ | |
80 | udelay(100); | |
81 | } else { | |
82 | clk_disable(usb_host_ck); | |
bd35078f | 83 | clk_disable(usb_dc_ck); |
1da177e4 LT |
84 | } |
85 | } | |
86 | ||
87 | /* | |
88 | * Board specific gang-switched transceiver power on/off. | |
89 | * NOTE: OSK supplies power from DC, not battery. | |
90 | */ | |
91 | static int omap_ohci_transceiver_power(int on) | |
92 | { | |
93 | if (on) { | |
94 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
4c98dc6b | 95 | __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) |
bd35078f | 96 | | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
1da177e4 LT |
97 | INNOVATOR_FPGA_CAM_USB_CONTROL); |
98 | else if (machine_is_omap_osk()) | |
99 | tps65010_set_gpio_out_value(GPIO1, LOW); | |
100 | } else { | |
101 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
4c98dc6b | 102 | __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) |
bd35078f | 103 | & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
1da177e4 LT |
104 | INNOVATOR_FPGA_CAM_USB_CONTROL); |
105 | else if (machine_is_omap_osk()) | |
106 | tps65010_set_gpio_out_value(GPIO1, HIGH); | |
107 | } | |
108 | ||
109 | return 0; | |
110 | } | |
111 | ||
bd35078f | 112 | #ifdef CONFIG_ARCH_OMAP15XX |
1da177e4 LT |
113 | /* |
114 | * OMAP-1510 specific Local Bus clock on/off | |
115 | */ | |
116 | static int omap_1510_local_bus_power(int on) | |
117 | { | |
118 | if (on) { | |
119 | omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); | |
120 | udelay(200); | |
121 | } else { | |
122 | omap_writel(0, OMAP1510_LB_MMU_CTL); | |
123 | } | |
124 | ||
125 | return 0; | |
126 | } | |
127 | ||
128 | /* | |
129 | * OMAP-1510 specific Local Bus initialization | |
130 | * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. | |
bd35078f DB |
131 | * See also arch/mach-omap/memory.h for __virt_to_dma() and |
132 | * __dma_to_virt() which need to match with the physical | |
1da177e4 LT |
133 | * Local Bus address below. |
134 | */ | |
135 | static int omap_1510_local_bus_init(void) | |
136 | { | |
137 | unsigned int tlb; | |
138 | unsigned long lbaddr, physaddr; | |
139 | ||
bd35078f | 140 | omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, |
1da177e4 LT |
141 | OMAP1510_LB_CLOCK_DIV); |
142 | ||
143 | /* Configure the Local Bus MMU table */ | |
144 | for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { | |
145 | lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; | |
146 | physaddr = tlb * 0x00100000 + PHYS_OFFSET; | |
147 | omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); | |
bd35078f | 148 | omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, |
1da177e4 LT |
149 | OMAP1510_LB_MMU_CAM_L); |
150 | omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); | |
151 | omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); | |
152 | omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); | |
153 | omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); | |
154 | } | |
155 | ||
156 | /* Enable the walking table */ | |
157 | omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); | |
158 | udelay(200); | |
159 | ||
160 | return 0; | |
161 | } | |
bd35078f DB |
162 | #else |
163 | #define omap_1510_local_bus_power(x) {} | |
164 | #define omap_1510_local_bus_init() {} | |
165 | #endif | |
1da177e4 LT |
166 | |
167 | #ifdef CONFIG_USB_OTG | |
168 | ||
169 | static void start_hnp(struct ohci_hcd *ohci) | |
170 | { | |
c2e935a7 RZ |
171 | struct usb_hcd *hcd = ohci_to_hcd(ohci); |
172 | const unsigned port = hcd->self.otg_port - 1; | |
1da177e4 | 173 | unsigned long flags; |
f35ae634 | 174 | u32 l; |
1da177e4 | 175 | |
c2e935a7 | 176 | otg_start_hnp(hcd->phy->otg); |
1da177e4 LT |
177 | |
178 | local_irq_save(flags); | |
c2e935a7 | 179 | hcd->phy->state = OTG_STATE_A_SUSPEND; |
1da177e4 | 180 | writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); |
f35ae634 TL |
181 | l = omap_readl(OTG_CTRL); |
182 | l &= ~OTG_A_BUSREQ; | |
183 | omap_writel(l, OTG_CTRL); | |
1da177e4 LT |
184 | local_irq_restore(flags); |
185 | } | |
186 | ||
187 | #endif | |
188 | ||
189 | /*-------------------------------------------------------------------------*/ | |
190 | ||
bd35078f | 191 | static int ohci_omap_init(struct usb_hcd *hcd) |
1da177e4 | 192 | { |
bd35078f DB |
193 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); |
194 | struct omap_usb_config *config = hcd->self.controller->platform_data; | |
1da177e4 LT |
195 | int need_transceiver = (config->otg != 0); |
196 | int ret; | |
197 | ||
bd35078f | 198 | dev_dbg(hcd->self.controller, "starting USB Controller\n"); |
1da177e4 LT |
199 | |
200 | if (config->otg) { | |
201 | ohci_to_hcd(ohci)->self.otg_port = config->otg; | |
202 | /* default/minimum OTG power budget: 8 mA */ | |
bc96c0ad | 203 | ohci_to_hcd(ohci)->power_budget = 8; |
1da177e4 LT |
204 | } |
205 | ||
206 | /* boards can use OTG transceivers in non-OTG modes */ | |
207 | need_transceiver = need_transceiver | |
208 | || machine_is_omap_h2() || machine_is_omap_h3(); | |
209 | ||
d3645d39 PW |
210 | /* XXX OMAP16xx only */ |
211 | if (config->ocpi_enable) | |
212 | config->ocpi_enable(); | |
1da177e4 | 213 | |
c3df1a26 | 214 | #ifdef CONFIG_USB_OTG |
1da177e4 | 215 | if (need_transceiver) { |
ff9cce82 GKH |
216 | hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2); |
217 | if (!IS_ERR_OR_NULL(hcd->phy)) { | |
c2e935a7 | 218 | int status = otg_set_host(hcd->phy->otg, |
1da177e4 | 219 | &ohci_to_hcd(ohci)->self); |
c2e935a7 RZ |
220 | dev_dbg(hcd->self.controller, "init %s phy, status %d\n", |
221 | hcd->phy->label, status); | |
1da177e4 | 222 | if (status) { |
ff9cce82 | 223 | usb_put_phy(hcd->phy); |
1da177e4 LT |
224 | return status; |
225 | } | |
226 | } else { | |
c2e935a7 | 227 | dev_err(hcd->self.controller, "can't find phy\n"); |
1da177e4 LT |
228 | return -ENODEV; |
229 | } | |
e8b24450 | 230 | ohci->start_hnp = start_hnp; |
1da177e4 LT |
231 | } |
232 | #endif | |
233 | ||
234 | omap_ohci_clock_power(1); | |
235 | ||
9b466c3b | 236 | if (cpu_is_omap15xx()) { |
1da177e4 LT |
237 | omap_1510_local_bus_power(1); |
238 | omap_1510_local_bus_init(); | |
239 | } | |
240 | ||
241 | if ((ret = ohci_init(ohci)) < 0) | |
242 | return ret; | |
243 | ||
244 | /* board-specific power switching and overcurrent support */ | |
245 | if (machine_is_omap_osk() || machine_is_omap_innovator()) { | |
246 | u32 rh = roothub_a (ohci); | |
247 | ||
248 | /* power switching (ganged by default) */ | |
249 | rh &= ~RH_A_NPS; | |
250 | ||
251 | /* TPS2045 switch for internal transceiver (port 1) */ | |
252 | if (machine_is_omap_osk()) { | |
bc96c0ad | 253 | ohci_to_hcd(ohci)->power_budget = 250; |
1da177e4 LT |
254 | |
255 | rh &= ~RH_A_NOCP; | |
256 | ||
257 | /* gpio9 for overcurrent detction */ | |
258 | omap_cfg_reg(W8_1610_GPIO9); | |
944e1bff | 259 | gpio_request(9, "OHCI overcurrent"); |
40e3925b | 260 | gpio_direction_input(9); |
1da177e4 LT |
261 | |
262 | /* for paranoia's sake: disable USB.PUEN */ | |
263 | omap_cfg_reg(W4_USB_HIGHZ); | |
264 | } | |
265 | ohci_writel(ohci, rh, &ohci->regs->roothub.a); | |
1133cd8a | 266 | ohci->flags &= ~OHCI_QUIRK_HUB_POWER; |
bd35078f DB |
267 | } else if (machine_is_nokia770()) { |
268 | /* We require a self-powered hub, which should have | |
269 | * plenty of power. */ | |
270 | ohci_to_hcd(ohci)->power_budget = 0; | |
1da177e4 LT |
271 | } |
272 | ||
273 | /* FIXME khubd hub requests should manage power switching */ | |
274 | omap_ohci_transceiver_power(1); | |
275 | ||
276 | /* board init will have already handled HMC and mux setup. | |
277 | * any external transceiver should already be initialized | |
278 | * too, so all configured ports use the right signaling now. | |
279 | */ | |
280 | ||
281 | return 0; | |
282 | } | |
283 | ||
bd35078f | 284 | static void ohci_omap_stop(struct usb_hcd *hcd) |
1da177e4 | 285 | { |
bd35078f | 286 | dev_dbg(hcd->self.controller, "stopping USB Controller\n"); |
715bfc22 | 287 | ohci_stop(hcd); |
1da177e4 LT |
288 | omap_ohci_clock_power(0); |
289 | } | |
290 | ||
291 | ||
292 | /*-------------------------------------------------------------------------*/ | |
293 | ||
1da177e4 LT |
294 | /** |
295 | * usb_hcd_omap_probe - initialize OMAP-based HCDs | |
296 | * Context: !in_interrupt() | |
297 | * | |
298 | * Allocates basic resources for this USB host controller, and | |
299 | * then invokes the start() method for the HCD associated with it | |
300 | * through the hotplug entry's driver_data. | |
301 | */ | |
bd35078f | 302 | static int usb_hcd_omap_probe (const struct hc_driver *driver, |
1da177e4 LT |
303 | struct platform_device *pdev) |
304 | { | |
48944738 | 305 | int retval, irq; |
1da177e4 LT |
306 | struct usb_hcd *hcd = 0; |
307 | struct ohci_hcd *ohci; | |
308 | ||
309 | if (pdev->num_resources != 2) { | |
bd35078f | 310 | printk(KERN_ERR "hcd probe: invalid num_resources: %i\n", |
1da177e4 LT |
311 | pdev->num_resources); |
312 | return -ENODEV; | |
313 | } | |
314 | ||
bd35078f | 315 | if (pdev->resource[0].flags != IORESOURCE_MEM |
1da177e4 LT |
316 | || pdev->resource[1].flags != IORESOURCE_IRQ) { |
317 | printk(KERN_ERR "hcd probe: invalid resource type\n"); | |
318 | return -ENODEV; | |
319 | } | |
320 | ||
953a7e84 | 321 | usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck"); |
1da177e4 LT |
322 | if (IS_ERR(usb_host_ck)) |
323 | return PTR_ERR(usb_host_ck); | |
324 | ||
9b466c3b | 325 | if (!cpu_is_omap15xx()) |
953a7e84 | 326 | usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck"); |
bd35078f | 327 | else |
953a7e84 | 328 | usb_dc_ck = clk_get(&pdev->dev, "lb_ck"); |
bd35078f DB |
329 | |
330 | if (IS_ERR(usb_dc_ck)) { | |
331 | clk_put(usb_host_ck); | |
332 | return PTR_ERR(usb_dc_ck); | |
333 | } | |
334 | ||
335 | ||
7071a3ce | 336 | hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev)); |
1da177e4 LT |
337 | if (!hcd) { |
338 | retval = -ENOMEM; | |
339 | goto err0; | |
340 | } | |
341 | hcd->rsrc_start = pdev->resource[0].start; | |
342 | hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; | |
343 | ||
344 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | |
345 | dev_dbg(&pdev->dev, "request_mem_region failed\n"); | |
346 | retval = -EBUSY; | |
347 | goto err1; | |
348 | } | |
349 | ||
55c381e4 RK |
350 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); |
351 | if (!hcd->regs) { | |
352 | dev_err(&pdev->dev, "can't ioremap OHCI HCD\n"); | |
353 | retval = -ENOMEM; | |
354 | goto err2; | |
355 | } | |
1da177e4 LT |
356 | |
357 | ohci = hcd_to_ohci(hcd); | |
358 | ohci_hcd_init(ohci); | |
359 | ||
bd35078f DB |
360 | host_initialized = 0; |
361 | host_enabled = 1; | |
1da177e4 | 362 | |
48944738 DV |
363 | irq = platform_get_irq(pdev, 0); |
364 | if (irq < 0) { | |
365 | retval = -ENXIO; | |
55c381e4 | 366 | goto err3; |
48944738 | 367 | } |
b5dd18d8 | 368 | retval = usb_add_hcd(hcd, irq, 0); |
bd35078f | 369 | if (retval) |
55c381e4 | 370 | goto err3; |
bd35078f DB |
371 | |
372 | host_initialized = 1; | |
373 | ||
374 | if (!host_enabled) | |
375 | omap_ohci_clock_power(0); | |
1da177e4 | 376 | |
bd35078f | 377 | return 0; |
55c381e4 RK |
378 | err3: |
379 | iounmap(hcd->regs); | |
1da177e4 LT |
380 | err2: |
381 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
382 | err1: | |
383 | usb_put_hcd(hcd); | |
384 | err0: | |
bd35078f | 385 | clk_put(usb_dc_ck); |
1da177e4 LT |
386 | clk_put(usb_host_ck); |
387 | return retval; | |
388 | } | |
389 | ||
390 | ||
391 | /* may be called with controller, bus, and devices active */ | |
392 | ||
393 | /** | |
394 | * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs | |
395 | * @dev: USB Host Controller being removed | |
396 | * Context: !in_interrupt() | |
397 | * | |
398 | * Reverses the effect of usb_hcd_omap_probe(), first invoking | |
399 | * the HCD's stop() method. It is always called from a thread | |
400 | * context, normally "rmmod", "apmd", or something similar. | |
1da177e4 | 401 | */ |
bd35078f DB |
402 | static inline void |
403 | usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev) | |
1da177e4 LT |
404 | { |
405 | usb_remove_hcd(hcd); | |
ff9cce82 | 406 | if (!IS_ERR_OR_NULL(hcd->phy)) { |
c2e935a7 | 407 | (void) otg_set_host(hcd->phy->otg, 0); |
ff9cce82 | 408 | usb_put_phy(hcd->phy); |
bd35078f | 409 | } |
1da177e4 | 410 | if (machine_is_omap_osk()) |
944e1bff | 411 | gpio_free(9); |
55c381e4 | 412 | iounmap(hcd->regs); |
1da177e4 LT |
413 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
414 | usb_put_hcd(hcd); | |
bd35078f | 415 | clk_put(usb_dc_ck); |
1da177e4 LT |
416 | clk_put(usb_host_ck); |
417 | } | |
418 | ||
419 | /*-------------------------------------------------------------------------*/ | |
420 | ||
bd35078f | 421 | static int |
1da177e4 LT |
422 | ohci_omap_start (struct usb_hcd *hcd) |
423 | { | |
424 | struct omap_usb_config *config; | |
425 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
426 | int ret; | |
427 | ||
bd35078f DB |
428 | if (!host_enabled) |
429 | return 0; | |
1da177e4 | 430 | config = hcd->self.controller->platform_data; |
d413984a DB |
431 | if (config->otg || config->rwc) { |
432 | ohci->hc_control = OHCI_CTRL_RWC; | |
1da177e4 | 433 | writel(OHCI_CTRL_RWC, &ohci->regs->control); |
d413984a | 434 | } |
1da177e4 LT |
435 | |
436 | if ((ret = ohci_run (ohci)) < 0) { | |
437 | dev_err(hcd->self.controller, "can't start\n"); | |
438 | ohci_stop (hcd); | |
439 | return ret; | |
440 | } | |
441 | return 0; | |
442 | } | |
443 | ||
444 | /*-------------------------------------------------------------------------*/ | |
445 | ||
446 | static const struct hc_driver ohci_omap_hc_driver = { | |
447 | .description = hcd_name, | |
448 | .product_desc = "OMAP OHCI", | |
449 | .hcd_priv_size = sizeof(struct ohci_hcd), | |
450 | ||
451 | /* | |
452 | * generic hardware linkage | |
453 | */ | |
454 | .irq = ohci_irq, | |
455 | .flags = HCD_USB11 | HCD_MEMORY, | |
456 | ||
457 | /* | |
458 | * basic lifecycle operations | |
459 | */ | |
bd35078f | 460 | .reset = ohci_omap_init, |
1da177e4 | 461 | .start = ohci_omap_start, |
bd35078f | 462 | .stop = ohci_omap_stop, |
dd9048af | 463 | .shutdown = ohci_shutdown, |
1da177e4 LT |
464 | |
465 | /* | |
466 | * managing i/o requests and associated device resources | |
467 | */ | |
468 | .urb_enqueue = ohci_urb_enqueue, | |
469 | .urb_dequeue = ohci_urb_dequeue, | |
470 | .endpoint_disable = ohci_endpoint_disable, | |
471 | ||
472 | /* | |
473 | * scheduling support | |
474 | */ | |
475 | .get_frame_number = ohci_get_frame, | |
476 | ||
477 | /* | |
478 | * root hub support | |
479 | */ | |
480 | .hub_status_data = ohci_hub_status_data, | |
481 | .hub_control = ohci_hub_control, | |
8ad7fe16 | 482 | #ifdef CONFIG_PM |
0c0382e3 AS |
483 | .bus_suspend = ohci_bus_suspend, |
484 | .bus_resume = ohci_bus_resume, | |
1da177e4 LT |
485 | #endif |
486 | .start_port_reset = ohci_start_port_reset, | |
487 | }; | |
488 | ||
489 | /*-------------------------------------------------------------------------*/ | |
490 | ||
3ae5eaec | 491 | static int ohci_hcd_omap_drv_probe(struct platform_device *dev) |
1da177e4 | 492 | { |
3ae5eaec | 493 | return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev); |
1da177e4 LT |
494 | } |
495 | ||
3ae5eaec | 496 | static int ohci_hcd_omap_drv_remove(struct platform_device *dev) |
1da177e4 | 497 | { |
3ae5eaec | 498 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 | 499 | |
3ae5eaec | 500 | usb_hcd_omap_remove(hcd, dev); |
3ae5eaec | 501 | platform_set_drvdata(dev, NULL); |
1da177e4 LT |
502 | |
503 | return 0; | |
504 | } | |
505 | ||
506 | /*-------------------------------------------------------------------------*/ | |
507 | ||
508 | #ifdef CONFIG_PM | |
509 | ||
3ae5eaec | 510 | static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message) |
1da177e4 | 511 | { |
3ae5eaec | 512 | struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev)); |
f197b2c5 DB |
513 | |
514 | if (time_before(jiffies, ohci->next_statechange)) | |
515 | msleep(5); | |
516 | ohci->next_statechange = jiffies; | |
517 | ||
518 | omap_ohci_clock_power(0); | |
f197b2c5 | 519 | return 0; |
1da177e4 LT |
520 | } |
521 | ||
3ae5eaec | 522 | static int ohci_omap_resume(struct platform_device *dev) |
1da177e4 | 523 | { |
43bbb7e0 AS |
524 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
525 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | |
1da177e4 | 526 | |
b404a5b0 DB |
527 | if (time_before(jiffies, ohci->next_statechange)) |
528 | msleep(5); | |
529 | ohci->next_statechange = jiffies; | |
f197b2c5 | 530 | |
b404a5b0 | 531 | omap_ohci_clock_power(1); |
cfa49b4b | 532 | ohci_resume(hcd, false); |
f197b2c5 | 533 | return 0; |
1da177e4 LT |
534 | } |
535 | ||
536 | #endif | |
537 | ||
538 | /*-------------------------------------------------------------------------*/ | |
539 | ||
540 | /* | |
541 | * Driver definition to register with the OMAP bus | |
542 | */ | |
3ae5eaec | 543 | static struct platform_driver ohci_hcd_omap_driver = { |
1da177e4 LT |
544 | .probe = ohci_hcd_omap_drv_probe, |
545 | .remove = ohci_hcd_omap_drv_remove, | |
dd9048af | 546 | .shutdown = usb_hcd_platform_shutdown, |
1da177e4 LT |
547 | #ifdef CONFIG_PM |
548 | .suspend = ohci_omap_suspend, | |
549 | .resume = ohci_omap_resume, | |
550 | #endif | |
3ae5eaec RK |
551 | .driver = { |
552 | .owner = THIS_MODULE, | |
553 | .name = "ohci", | |
554 | }, | |
1da177e4 LT |
555 | }; |
556 | ||
f4fce61d | 557 | MODULE_ALIAS("platform:ohci"); |