projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
usb: return error code instead of 0 in the enqueue function.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / host / isp1760-hcd.c
CommitLineData
db11e47d
SS		 1/*
2 * Driver for the NXP ISP1760 chip
3 *
4 * However, the code might contain some bugs. What doesn't work for sure is:
5 * - ISO
6 * - OTG
7 e The interrupt line is configured as active low, level.
8 *
9 * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
10 *
11 */
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/slab.h>
15#include <linux/list.h>
16#include <linux/usb.h>
17#include <linux/debugfs.h>
18#include <linux/uaccess.h>
19#include <linux/io.h>
20#include <asm/unaligned.h>
21
22#include "../core/hcd.h"
23#include "isp1760-hcd.h"
24
25static struct kmem_cache *qtd_cachep;
26static struct kmem_cache *qh_cachep;
27
28struct isp1760_hcd {
29 u32 hcs_params;
30 spinlock_t lock;
31 struct inter_packet_info atl_ints[32];
32 struct inter_packet_info int_ints[32];
33 struct memory_chunk memory_pool[BLOCKS];
34
35 /* periodic schedule support */
36#define DEFAULT_I_TDPS 1024
37 unsigned periodic_size;
38 unsigned i_thresh;
39 unsigned long reset_done;
40 unsigned long next_statechange;
3faefc88 41 unsigned int devflags;
db11e47d
SS		 42};
43
44static inline struct isp1760_hcd *hcd_to_priv(struct usb_hcd *hcd)
45{
46 return (struct isp1760_hcd *) (hcd->hcd_priv);
47}
48static inline struct usb_hcd *priv_to_hcd(struct isp1760_hcd *priv)
49{
50 return container_of((void *) priv, struct usb_hcd, hcd_priv);
51}
52
53/* Section 2.2 Host Controller Capability Registers */
54#define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */
55#define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */
56#define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
57#define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
58#define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
59#define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */
60#define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */
61
62/* Section 2.3 Host Controller Operational Registers */
63#define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
64#define CMD_RESET (1<<1) /* reset HC not bus */
65#define CMD_RUN (1<<0) /* start/stop HC */
66#define STS_PCD (1<<2) /* port change detect */
67#define FLAG_CF (1<<0) /* true: we'll support "high speed" */
68
69#define PORT_OWNER (1<<13) /* true: companion hc owns this port */
70#define PORT_POWER (1<<12) /* true: has power (see PPC) */
71#define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1 device */
72#define PORT_RESET (1<<8) /* reset port */
73#define PORT_SUSPEND (1<<7) /* suspend port */
74#define PORT_RESUME (1<<6) /* resume it */
75#define PORT_PE (1<<2) /* port enable */
76#define PORT_CSC (1<<1) /* connect status change */
77#define PORT_CONNECT (1<<0) /* device connected */
78#define PORT_RWC_BITS (PORT_CSC)
79
80struct isp1760_qtd {
81 struct isp1760_qtd *hw_next;
82 u8 packet_type;
83 u8 toggle;
84
85 void *data_buffer;
86 /* the rest is HCD-private */
87 struct list_head qtd_list;
88 struct urb *urb;
89 size_t length;
90
91 /* isp special*/
92 u32 status;
93#define URB_COMPLETE_NOTIFY (1 << 0)
94#define URB_ENQUEUED (1 << 1)
95#define URB_TYPE_ATL (1 << 2)
96#define URB_TYPE_INT (1 << 3)
97};
98
99struct isp1760_qh {
100 /* first part defined by EHCI spec */
101 struct list_head qtd_list;
102 struct isp1760_hcd *priv;
103
104 /* periodic schedule info */
105 unsigned short period; /* polling interval */
106 struct usb_device *dev;
107
108 u32 toggle;
109 u32 ping;
110};
111
112#define ehci_port_speed(priv, portsc) (1 << USB_PORT_FEAT_HIGHSPEED)
113
114static unsigned int isp1760_readl(__u32 __iomem *regs)
115{
116 return readl(regs);
117}
118
119static void isp1760_writel(const unsigned int val, __u32 __iomem *regs)
120{
121 writel(val, regs);
122}
123
124/*
125 * The next two copy via MMIO data to/from the device. memcpy_{to|from}io()
126 * doesn't quite work because some people have to enforce 32-bit access
127 */
128static void priv_read_copy(struct isp1760_hcd *priv, u32 *src,
129 __u32 __iomem *dst, u32 offset, u32 len)
130{
131 struct usb_hcd *hcd = priv_to_hcd(priv);
132 u32 val;
133 u8 *buff8;
134
135 if (!src) {
136 printk(KERN_ERR "ERROR: buffer: %p len: %d\n", src, len);
137 return;
138 }
139 isp1760_writel(offset, hcd->regs + HC_MEMORY_REG);
140 /* XXX
141 * 90nsec delay, the spec says something how this could be avoided.
142 */
143 mdelay(1);
144
145 while (len >= 4) {
146 *src = __raw_readl(dst);
147 len -= 4;
148 src++;
149 dst++;
150 }
151
152 if (!len)
153 return;
154
155 /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
156 * allocated.
157 */
158 val = isp1760_readl(dst);
159
160 buff8 = (u8 *)src;
161 while (len) {
162
163 *buff8 = val;
164 val >>= 8;
165 len--;
166 buff8++;
167 }
168}
169
170static void priv_write_copy(const struct isp1760_hcd *priv, const u32 *src,
171 __u32 __iomem *dst, u32 len)
172{
173 while (len >= 4) {
174 __raw_writel(*src, dst);
175 len -= 4;
176 src++;
177 dst++;
178 }
179
180 if (!len)
181 return;
182 /* in case we have 3, 2 or 1 by left. The buffer is allocated and the
183 * extra bytes should not be read by the HW
184 */
185
186 __raw_writel(*src, dst);
187}
188
189/* memory management of the 60kb on the chip from 0x1000 to 0xffff */
190static void init_memory(struct isp1760_hcd *priv)
191{
192 int i;
193 u32 payload;
194
195 payload = 0x1000;
196 for (i = 0; i < BLOCK_1_NUM; i++) {
197 priv->memory_pool[i].start = payload;
198 priv->memory_pool[i].size = BLOCK_1_SIZE;
199 priv->memory_pool[i].free = 1;
200 payload += priv->memory_pool[i].size;
201 }
202
203
204 for (i = BLOCK_1_NUM; i < BLOCK_1_NUM + BLOCK_2_NUM; i++) {
205 priv->memory_pool[i].start = payload;
206 priv->memory_pool[i].size = BLOCK_2_SIZE;
207 priv->memory_pool[i].free = 1;
208 payload += priv->memory_pool[i].size;
209 }
210
211
212 for (i = BLOCK_1_NUM + BLOCK_2_NUM; i < BLOCKS; i++) {
213 priv->memory_pool[i].start = payload;
214 priv->memory_pool[i].size = BLOCK_3_SIZE;
215 priv->memory_pool[i].free = 1;
216 payload += priv->memory_pool[i].size;
217 }
218
219 BUG_ON(payload - priv->memory_pool[i - 1].size > PAYLOAD_SIZE);
220}
221
222static u32 alloc_mem(struct isp1760_hcd *priv, u32 size)
223{
224 int i;
225
226 if (!size)
227 return ISP1760_NULL_POINTER;
228
229 for (i = 0; i < BLOCKS; i++) {
230 if (priv->memory_pool[i].size >= size &&
231 priv->memory_pool[i].free) {
232
233 priv->memory_pool[i].free = 0;
234 return priv->memory_pool[i].start;
235 }
236 }
237
238 printk(KERN_ERR "ISP1760 MEM: can not allocate %d bytes of memory\n",
239 size);
240 printk(KERN_ERR "Current memory map:\n");
241 for (i = 0; i < BLOCKS; i++) {
242 printk(KERN_ERR "Pool %2d size %4d status: %d\n",
243 i, priv->memory_pool[i].size,
244 priv->memory_pool[i].free);
245 }
246 /* XXX maybe -ENOMEM could be possible */
247 BUG();
248 return 0;
249}
250
251static void free_mem(struct isp1760_hcd *priv, u32 mem)
252{
253 int i;
254
255 if (mem == ISP1760_NULL_POINTER)
256 return;
257
258 for (i = 0; i < BLOCKS; i++) {
259 if (priv->memory_pool[i].start == mem) {
260
261 BUG_ON(priv->memory_pool[i].free);
262
263 priv->memory_pool[i].free = 1;
264 return ;
265 }
266 }
267
268 printk(KERN_ERR "Trying to free not-here-allocated memory :%08x\n",
269 mem);
270 BUG();
271}
272
273static void isp1760_init_regs(struct usb_hcd *hcd)
274{
275 isp1760_writel(0, hcd->regs + HC_BUFFER_STATUS_REG);
276 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
277 HC_ATL_PTD_SKIPMAP_REG);
278 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
279 HC_INT_PTD_SKIPMAP_REG);
280 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
281 HC_ISO_PTD_SKIPMAP_REG);
282
283 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
284 HC_ATL_PTD_DONEMAP_REG);
285 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
286 HC_INT_PTD_DONEMAP_REG);
287 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
288 HC_ISO_PTD_DONEMAP_REG);
289}
290
291static int handshake(struct isp1760_hcd *priv, void __iomem *ptr,
292 u32 mask, u32 done, int usec)
293{
294 u32 result;
295
296 do {
297 result = isp1760_readl(ptr);
298 if (result == ~0)
299 return -ENODEV;
300 result &= mask;
301 if (result == done)
302 return 0;
303 udelay(1);
304 usec--;
305 } while (usec > 0);
306 return -ETIMEDOUT;
307}
308
309/* reset a non-running (STS_HALT == 1) controller */
310static int ehci_reset(struct isp1760_hcd *priv)
311{
312 int retval;
313 struct usb_hcd *hcd = priv_to_hcd(priv);
314 u32 command = isp1760_readl(hcd->regs + HC_USBCMD);
315
316 command |= CMD_RESET;
317 isp1760_writel(command, hcd->regs + HC_USBCMD);
318 hcd->state = HC_STATE_HALT;
319 priv->next_statechange = jiffies;
320 retval = handshake(priv, hcd->regs + HC_USBCMD,
321 CMD_RESET, 0, 250 * 1000);
322 return retval;
323}
324
325static void qh_destroy(struct isp1760_qh *qh)
326{
327 BUG_ON(!list_empty(&qh->qtd_list));
328 kmem_cache_free(qh_cachep, qh);
329}
330
331static struct isp1760_qh *isp1760_qh_alloc(struct isp1760_hcd *priv,
332 gfp_t flags)
333{
334 struct isp1760_qh *qh;
335
336 qh = kmem_cache_zalloc(qh_cachep, flags);
337 if (!qh)
338 return qh;
339
340 INIT_LIST_HEAD(&qh->qtd_list);
341 qh->priv = priv;
342 return qh;
343}
344
345/* magic numbers that can affect system performance */
346#define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
347#define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
348#define EHCI_TUNE_RL_TT 0
349#define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
350#define EHCI_TUNE_MULT_TT 1
351#define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
352
353/* one-time init, only for memory state */
354static int priv_init(struct usb_hcd *hcd)
355{
356 struct isp1760_hcd *priv = hcd_to_priv(hcd);
357 u32 hcc_params;
358
359 spin_lock_init(&priv->lock);
360
361 /*
362 * hw default: 1K periodic list heads, one per frame.
363 * periodic_size can shrink by USBCMD update if hcc_params allows.
364 */
365 priv->periodic_size = DEFAULT_I_TDPS;
366
367 /* controllers may cache some of the periodic schedule ... */
368 hcc_params = isp1760_readl(hcd->regs + HC_HCCPARAMS);
369 /* full frame cache */
370 if (HCC_ISOC_CACHE(hcc_params))
371 priv->i_thresh = 8;
372 else /* N microframes cached */
373 priv->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
374
375 return 0;
376}
377
378static int isp1760_hc_setup(struct usb_hcd *hcd)
379{
380 struct isp1760_hcd *priv = hcd_to_priv(hcd);
381 int result;
3faefc88
NC		 382 u32 scratch, hwmode;
383
384 /* Setup HW Mode Control: This assumes a level active-low interrupt */
385 hwmode = HW_DATA_BUS_32BIT;
386
387 if (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16)
388 hwmode &= ~HW_DATA_BUS_32BIT;
389 if (priv->devflags & ISP1760_FLAG_ANALOG_OC)
390 hwmode |= HW_ANA_DIGI_OC;
391 if (priv->devflags & ISP1760_FLAG_DACK_POL_HIGH)
392 hwmode |= HW_DACK_POL_HIGH;
393 if (priv->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
394 hwmode |= HW_DREQ_POL_HIGH;
395
396 /*
397 * We have to set this first in case we're in 16-bit mode.
398 * Write it twice to ensure correct upper bits if switching
399 * to 16-bit mode.
400 */
401 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
402 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
db11e47d
SS		 403
404 isp1760_writel(0xdeadbabe, hcd->regs + HC_SCRATCH_REG);
3faefc88
NC		 405 /* Change bus pattern */
406 scratch = isp1760_readl(hcd->regs + HC_CHIP_ID_REG);
db11e47d
SS		 407 scratch = isp1760_readl(hcd->regs + HC_SCRATCH_REG);
408 if (scratch != 0xdeadbabe) {
409 printk(KERN_ERR "ISP1760: Scratch test failed.\n");
410 return -ENODEV;
411 }
412
413 /* pre reset */
414 isp1760_init_regs(hcd);
415
416 /* reset */
417 isp1760_writel(SW_RESET_RESET_ALL, hcd->regs + HC_RESET_REG);
418 mdelay(100);
419
420 isp1760_writel(SW_RESET_RESET_HC, hcd->regs + HC_RESET_REG);
421 mdelay(100);
422
423 result = ehci_reset(priv);
424 if (result)
425 return result;
426
427 /* Step 11 passed */
428
3faefc88
NC		 429 isp1760_info(priv, "bus width: %d, oc: %s\n",
430 (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16) ?
431 16 : 32, (priv->devflags & ISP1760_FLAG_ANALOG_OC) ?
432 "analog" : "digital");
db11e47d
SS		 433
434 /* ATL reset */
3faefc88 435 isp1760_writel(hwmode | ALL_ATX_RESET, hcd->regs + HC_HW_MODE_CTRL);
db11e47d 436 mdelay(10);
3faefc88 437 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
db11e47d 438
3faefc88
NC		 439 isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_REG);
440 isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_ENABLE);
441
442 /*
443 * PORT 1 Control register of the ISP1760 is the OTG control
444 * register on ISP1761.
445 */
446 if (!(priv->devflags & ISP1760_FLAG_ISP1761) &&
447 !(priv->devflags & ISP1760_FLAG_PORT1_DIS)) {
448 isp1760_writel(PORT1_POWER | PORT1_INIT2,
449 hcd->regs + HC_PORT1_CTRL);
450 mdelay(10);
451 }
db11e47d
SS		 452
453 priv->hcs_params = isp1760_readl(hcd->regs + HC_HCSPARAMS);
454
455 return priv_init(hcd);
456}
457
458static void isp1760_init_maps(struct usb_hcd *hcd)
459{
460 /*set last maps, for iso its only 1, else 32 tds bitmap*/
461 isp1760_writel(0x80000000, hcd->regs + HC_ATL_PTD_LASTPTD_REG);
462 isp1760_writel(0x80000000, hcd->regs + HC_INT_PTD_LASTPTD_REG);
463 isp1760_writel(0x00000001, hcd->regs + HC_ISO_PTD_LASTPTD_REG);
464}
465
466static void isp1760_enable_interrupts(struct usb_hcd *hcd)
467{
468 isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_AND_REG);
469 isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
470 isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_AND_REG);
471 isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_OR_REG);
472 isp1760_writel(0, hcd->regs + HC_ISO_IRQ_MASK_AND_REG);
473 isp1760_writel(0xffffffff, hcd->regs + HC_ISO_IRQ_MASK_OR_REG);
474 /* step 23 passed */
475}
476
477static int isp1760_run(struct usb_hcd *hcd)
478{
479 struct isp1760_hcd *priv = hcd_to_priv(hcd);
480 int retval;
481 u32 temp;
482 u32 command;
483 u32 chipid;
484
485 hcd->uses_new_polling = 1;
486 hcd->poll_rh = 0;
487
488 hcd->state = HC_STATE_RUNNING;
489 isp1760_enable_interrupts(hcd);
490 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
3faefc88 491 isp1760_writel(temp | HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
db11e47d
SS		 492
493 command = isp1760_readl(hcd->regs + HC_USBCMD);
494 command &= ~(CMD_LRESET|CMD_RESET);
495 command |= CMD_RUN;
496 isp1760_writel(command, hcd->regs + HC_USBCMD);
497
498 retval = handshake(priv, hcd->regs + HC_USBCMD, CMD_RUN, CMD_RUN,
499 250 * 1000);
500 if (retval)
501 return retval;
502
503 /*
504 * XXX
505 * Spec says to write FLAG_CF as last config action, priv code grabs
506 * the semaphore while doing so.
507 */
508 down_write(&ehci_cf_port_reset_rwsem);
509 isp1760_writel(FLAG_CF, hcd->regs + HC_CONFIGFLAG);
510
511 retval = handshake(priv, hcd->regs + HC_CONFIGFLAG, FLAG_CF, FLAG_CF,
512 250 * 1000);
513 up_write(&ehci_cf_port_reset_rwsem);
514 if (retval)
515 return retval;
516
517 chipid = isp1760_readl(hcd->regs + HC_CHIP_ID_REG);
518 isp1760_info(priv, "USB ISP %04x HW rev. %d started\n", chipid & 0xffff,
519 chipid >> 16);
520
521 /* PTD Register Init Part 2, Step 28 */
522 /* enable INTs */
523 isp1760_init_maps(hcd);
524
525 /* GRR this is run-once init(), being done every time the HC starts.
526 * So long as they're part of class devices, we can't do it init()
527 * since the class device isn't created that early.
528 */
529 return 0;
530}
531
532static u32 base_to_chip(u32 base)
533{
534 return ((base - 0x400) >> 3);
535}
536
537static void transform_into_atl(struct isp1760_hcd *priv, struct isp1760_qh *qh,
538 struct isp1760_qtd *qtd, struct urb *urb,
539 u32 payload, struct ptd *ptd)
540{
541 u32 dw0;
542 u32 dw1;
543 u32 dw2;
544 u32 dw3;
545 u32 maxpacket;
546 u32 multi;
547 u32 pid_code;
548 u32 rl = RL_COUNTER;
549 u32 nak = NAK_COUNTER;
550
551 /* according to 3.6.2, max packet len can not be > 0x400 */
552 maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
553 multi = 1 + ((maxpacket >> 11) & 0x3);
554 maxpacket &= 0x7ff;
555
556 /* DW0 */
557 dw0 = PTD_VALID;
558 dw0 |= PTD_LENGTH(qtd->length);
559 dw0 |= PTD_MAXPACKET(maxpacket);
560 dw0 |= PTD_ENDPOINT(usb_pipeendpoint(urb->pipe));
561 dw1 = usb_pipeendpoint(urb->pipe) >> 1;
562
563 /* DW1 */
564 dw1 |= PTD_DEVICE_ADDR(usb_pipedevice(urb->pipe));
565
566 pid_code = qtd->packet_type;
567 dw1 |= PTD_PID_TOKEN(pid_code);
568
569 if (usb_pipebulk(urb->pipe))
570 dw1 |= PTD_TRANS_BULK;
571 else if (usb_pipeint(urb->pipe))
572 dw1 |= PTD_TRANS_INT;
573
574 if (urb->dev->speed != USB_SPEED_HIGH) {
575 /* split transaction */
576
577 dw1 |= PTD_TRANS_SPLIT;
578 if (urb->dev->speed == USB_SPEED_LOW)
579 dw1 |= PTD_SE_USB_LOSPEED;
580
581 dw1 |= PTD_PORT_NUM(urb->dev->ttport);
582 dw1 |= PTD_HUB_NUM(urb->dev->tt->hub->devnum);
583
584 /* SE bit for Split INT transfers */
585 if (usb_pipeint(urb->pipe) &&
586 (urb->dev->speed == USB_SPEED_LOW))
587 dw1 |= 2 << 16;
588
589 dw3 = 0;
590 rl = 0;
591 nak = 0;
592 } else {
593 dw0 |= PTD_MULTI(multi);
594 if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe))
595 dw3 = qh->ping;
596 else
597 dw3 = 0;
598 }
599 /* DW2 */
600 dw2 = 0;
601 dw2 |= PTD_DATA_START_ADDR(base_to_chip(payload));
602 dw2 |= PTD_RL_CNT(rl);
603 dw3 |= PTD_NAC_CNT(nak);
604
605 /* DW3 */
606 if (usb_pipecontrol(urb->pipe))
607 dw3 |= PTD_DATA_TOGGLE(qtd->toggle);
608 else
609 dw3 |= qh->toggle;
610
611
612 dw3 |= PTD_ACTIVE;
613 /* Cerr */
614 dw3 |= PTD_CERR(ERR_COUNTER);
615
616 memset(ptd, 0, sizeof(*ptd));
617
618 ptd->dw0 = cpu_to_le32(dw0);
619 ptd->dw1 = cpu_to_le32(dw1);
620 ptd->dw2 = cpu_to_le32(dw2);
621 ptd->dw3 = cpu_to_le32(dw3);
622}
623
624static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
625 struct isp1760_qtd *qtd, struct urb *urb,
626 u32 payload, struct ptd *ptd)
627{
628 u32 maxpacket;
629 u32 multi;
630 u32 numberofusofs;
631 u32 i;
632 u32 usofmask, usof;
633 u32 period;
634
635 maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
636 multi = 1 + ((maxpacket >> 11) & 0x3);
637 maxpacket &= 0x7ff;
638 /* length of the data per uframe */
639 maxpacket = multi * maxpacket;
640
641 numberofusofs = urb->transfer_buffer_length / maxpacket;
642 if (urb->transfer_buffer_length % maxpacket)
643 numberofusofs += 1;
644
645 usofmask = 1;
646 usof = 0;
647 for (i = 0; i < numberofusofs; i++) {
648 usof |= usofmask;
649 usofmask <<= 1;
650 }
651
652 if (urb->dev->speed != USB_SPEED_HIGH) {
653 /* split */
654 ptd->dw5 = __constant_cpu_to_le32(0x1c);
655
656 if (qh->period >= 32)
657 period = qh->period / 2;
658 else
659 period = qh->period;
660
661 } else {
662
663 if (qh->period >= 8)
664 period = qh->period/8;
665 else
666 period = qh->period;
667
668 if (period >= 32)
669 period = 16;
670
671 if (qh->period >= 8) {
672 /* millisecond period */
673 period = (period << 3);
674 } else {
675 /* usof based tranmsfers */
676 /* minimum 4 usofs */
677 usof = 0x11;
678 }
679 }
680
681 ptd->dw2 |= cpu_to_le32(period);
682 ptd->dw4 = cpu_to_le32(usof);
683}
684
685static void transform_into_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
686 struct isp1760_qtd *qtd, struct urb *urb,
687 u32 payload, struct ptd *ptd)
688{
689 transform_into_atl(priv, qh, qtd, urb, payload, ptd);
690 transform_add_int(priv, qh, qtd, urb, payload, ptd);
691}
692
693static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len,
694 u32 token)
695{
696 int count;
697
698 qtd->data_buffer = databuffer;
699 qtd->packet_type = GET_QTD_TOKEN_TYPE(token);
700 qtd->toggle = GET_DATA_TOGGLE(token);
701
702 if (len > HC_ATL_PL_SIZE)
703 count = HC_ATL_PL_SIZE;
704 else
705 count = len;
706
707 qtd->length = count;
708 return count;
709}
710
711static int check_error(struct ptd *ptd)
712{
713 int error = 0;
714 u32 dw3;
715
716 dw3 = le32_to_cpu(ptd->dw3);
717 if (dw3 & DW3_HALT_BIT)
718 error = -EPIPE;
719
720 if (dw3 & DW3_ERROR_BIT) {
721 printk(KERN_ERR "error bit is set in DW3\n");
722 error = -EPIPE;
723 }
724
725 if (dw3 & DW3_QTD_ACTIVE) {
726 printk(KERN_ERR "transfer active bit is set DW3\n");
727 printk(KERN_ERR "nak counter: %d, rl: %d\n", (dw3 >> 19) & 0xf,
728 (le32_to_cpu(ptd->dw2) >> 25) & 0xf);
729 }
730
731 return error;
732}
733
734static void check_int_err_status(u32 dw4)
735{
736 u32 i;
737
738 dw4 >>= 8;
739
740 for (i = 0; i < 8; i++) {
741 switch (dw4 & 0x7) {
742 case INT_UNDERRUN:
743 printk(KERN_ERR "ERROR: under run , %d\n", i);
744 break;
745
746 case INT_EXACT:
747 printk(KERN_ERR "ERROR: transaction error, %d\n", i);
748 break;
749
750 case INT_BABBLE:
751 printk(KERN_ERR "ERROR: babble error, %d\n", i);
752 break;
753 }
754 dw4 >>= 3;
755 }
756}
757
758static void enqueue_one_qtd(struct isp1760_qtd *qtd, struct isp1760_hcd *priv,
759 u32 payload)
760{
761 u32 token;
762 struct usb_hcd *hcd = priv_to_hcd(priv);
763
764 token = qtd->packet_type;
765
766 if (qtd->length && (qtd->length <= HC_ATL_PL_SIZE)) {
767 switch (token) {
768 case IN_PID:
769 break;
770 case OUT_PID:
771 case SETUP_PID:
772 priv_write_copy(priv, qtd->data_buffer,
773 hcd->regs + payload,
774 qtd->length);
775 }
776 }
777}
778
779static void enqueue_one_atl_qtd(u32 atl_regs, u32 payload,
780 struct isp1760_hcd *priv, struct isp1760_qh *qh,
781 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
782{
783 struct ptd ptd;
784 struct usb_hcd *hcd = priv_to_hcd(priv);
785
786 transform_into_atl(priv, qh, qtd, urb, payload, &ptd);
787 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + atl_regs, sizeof(ptd));
788 enqueue_one_qtd(qtd, priv, payload);
789
790 priv->atl_ints[slot].urb = urb;
791 priv->atl_ints[slot].qh = qh;
792 priv->atl_ints[slot].qtd = qtd;
793 priv->atl_ints[slot].data_buffer = qtd->data_buffer;
794 priv->atl_ints[slot].payload = payload;
795 qtd->status |= URB_ENQUEUED | URB_TYPE_ATL;
796 qtd->status |= slot << 16;
797}
798
799static void enqueue_one_int_qtd(u32 int_regs, u32 payload,
800 struct isp1760_hcd *priv, struct isp1760_qh *qh,
801 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
802{
803 struct ptd ptd;
804 struct usb_hcd *hcd = priv_to_hcd(priv);
805
806 transform_into_int(priv, qh, qtd, urb, payload, &ptd);
807 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + int_regs, sizeof(ptd));
808 enqueue_one_qtd(qtd, priv, payload);
809
810 priv->int_ints[slot].urb = urb;
811 priv->int_ints[slot].qh = qh;
812 priv->int_ints[slot].qtd = qtd;
813 priv->int_ints[slot].data_buffer = qtd->data_buffer;
814 priv->int_ints[slot].payload = payload;
815 qtd->status |= URB_ENQUEUED | URB_TYPE_INT;
816 qtd->status |= slot << 16;
817}
818
473bca94
AB		 819static void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
820 struct isp1760_qtd *qtd)
db11e47d
SS		 821{
822 struct isp1760_hcd *priv = hcd_to_priv(hcd);
823 u32 skip_map, or_map;
824 u32 queue_entry;
825 u32 slot;
826 u32 atl_regs, payload;
827 u32 buffstatus;
828
829 skip_map = isp1760_readl(hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
830
831 BUG_ON(!skip_map);
832 slot = __ffs(skip_map);
833 queue_entry = 1 << slot;
834
835 atl_regs = ATL_REGS_OFFSET + slot * sizeof(struct ptd);
836
837 payload = alloc_mem(priv, qtd->length);
838
839 enqueue_one_atl_qtd(atl_regs, payload, priv, qh, qtd->urb, slot, qtd);
840
841 or_map = isp1760_readl(hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
842 or_map |= queue_entry;
843 isp1760_writel(or_map, hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
844
845 skip_map &= ~queue_entry;
846 isp1760_writel(skip_map, hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
847
848 buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG);
849 buffstatus |= ATL_BUFFER;
850 isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG);
851}
852
473bca94
AB		 853static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
854 struct isp1760_qtd *qtd)
db11e47d
SS		 855{
856 struct isp1760_hcd *priv = hcd_to_priv(hcd);
857 u32 skip_map, or_map;
858 u32 queue_entry;
859 u32 slot;
860 u32 int_regs, payload;
861 u32 buffstatus;
862
863 skip_map = isp1760_readl(hcd->regs + HC_INT_PTD_SKIPMAP_REG);
864
865 BUG_ON(!skip_map);
866 slot = __ffs(skip_map);
867 queue_entry = 1 << slot;
868
869 int_regs = INT_REGS_OFFSET + slot * sizeof(struct ptd);
870
871 payload = alloc_mem(priv, qtd->length);
872
873 enqueue_one_int_qtd(int_regs, payload, priv, qh, qtd->urb, slot, qtd);
874
875 or_map = isp1760_readl(hcd->regs + HC_INT_IRQ_MASK_OR_REG);
876 or_map |= queue_entry;
877 isp1760_writel(or_map, hcd->regs + HC_INT_IRQ_MASK_OR_REG);
878
879 skip_map &= ~queue_entry;
880 isp1760_writel(skip_map, hcd->regs + HC_INT_PTD_SKIPMAP_REG);
881
882 buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG);
883 buffstatus |= INT_BUFFER;
884 isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG);
885}
886
887static void isp1760_urb_done(struct isp1760_hcd *priv, struct urb *urb, int status)
888__releases(priv->lock)
889__acquires(priv->lock)
890{
891 if (!urb->unlinked) {
892 if (status == -EINPROGRESS)
893 status = 0;
894 }
895
896 /* complete() can reenter this HCD */
897 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
898 spin_unlock(&priv->lock);
899 usb_hcd_giveback_urb(priv_to_hcd(priv), urb, status);
900 spin_lock(&priv->lock);
901}
902
903static void isp1760_qtd_free(struct isp1760_qtd *qtd)
904{
905 kmem_cache_free(qtd_cachep, qtd);
906}
907
908static struct isp1760_qtd *clean_this_qtd(struct isp1760_qtd *qtd)
909{
910 struct isp1760_qtd *tmp_qtd;
911
912 tmp_qtd = qtd->hw_next;
913 list_del(&qtd->qtd_list);
914 isp1760_qtd_free(qtd);
915 return tmp_qtd;
916}
917
918/*
919 * Remove this QTD from the QH list and free its memory. If this QTD
920 * isn't the last one than remove also his successor(s).
921 * Returns the QTD which is part of an new URB and should be enqueued.
922 */
923static struct isp1760_qtd *clean_up_qtdlist(struct isp1760_qtd *qtd)
924{
925 struct isp1760_qtd *tmp_qtd;
926 int last_one;
927
928 do {
929 tmp_qtd = qtd->hw_next;
930 last_one = qtd->status & URB_COMPLETE_NOTIFY;
931 list_del(&qtd->qtd_list);
932 isp1760_qtd_free(qtd);
933 qtd = tmp_qtd;
934 } while (!last_one && qtd);
935
936 return qtd;
937}
938
939static void do_atl_int(struct usb_hcd *usb_hcd)
940{
941 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
942 u32 done_map, skip_map;
943 struct ptd ptd;
944 struct urb *urb = NULL;
945 u32 atl_regs_base;
946 u32 atl_regs;
947 u32 queue_entry;
948 u32 payload;
949 u32 length;
950 u32 or_map;
951 u32 status = -EINVAL;
952 int error;
953 struct isp1760_qtd *qtd;
954 struct isp1760_qh *qh;
955 u32 rl;
956 u32 nakcount;
957
958 done_map = isp1760_readl(usb_hcd->regs +
959 HC_ATL_PTD_DONEMAP_REG);
960 skip_map = isp1760_readl(usb_hcd->regs +
961 HC_ATL_PTD_SKIPMAP_REG);
962
963 or_map = isp1760_readl(usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
964 or_map &= ~done_map;
965 isp1760_writel(or_map, usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
966
967 atl_regs_base = ATL_REGS_OFFSET;
968 while (done_map) {
969 u32 dw1;
970 u32 dw2;
971 u32 dw3;
972
973 status = 0;
974
975 queue_entry = __ffs(done_map);
976 done_map &= ~(1 << queue_entry);
977 skip_map |= 1 << queue_entry;
978
979 atl_regs = atl_regs_base + queue_entry * sizeof(struct ptd);
980
981 urb = priv->atl_ints[queue_entry].urb;
982 qtd = priv->atl_ints[queue_entry].qtd;
983 qh = priv->atl_ints[queue_entry].qh;
984 payload = priv->atl_ints[queue_entry].payload;
985
986 if (!qh) {
987 printk(KERN_ERR "qh is 0\n");
988 continue;
989 }
990 priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + atl_regs,
991 atl_regs, sizeof(ptd));
992
993 dw1 = le32_to_cpu(ptd.dw1);
994 dw2 = le32_to_cpu(ptd.dw2);
995 dw3 = le32_to_cpu(ptd.dw3);
996 rl = (dw2 >> 25) & 0x0f;
997 nakcount = (dw3 >> 19) & 0xf;
998
999 /* Transfer Error, *but* active and no HALT -> reload */
1000 if ((dw3 & DW3_ERROR_BIT) && (dw3 & DW3_QTD_ACTIVE) &&
1001 !(dw3 & DW3_HALT_BIT)) {
1002
1003 /* according to ppriv code, we have to
1004 * reload this one if trasfered bytes != requested bytes
1005 * else act like everything went smooth..
1006 * XXX This just doesn't feel right and hasn't
1007 * triggered so far.
1008 */
1009
1010 length = PTD_XFERRED_LENGTH(dw3);
1011 printk(KERN_ERR "Should reload now.... transfered %d "
1012 "of %zu\n", length, qtd->length);
1013 BUG();
1014 }
1015
1016 if (!nakcount && (dw3 & DW3_QTD_ACTIVE)) {
1017 u32 buffstatus;
1018
1019 /* XXX
1020 * NAKs are handled in HW by the chip. Usually if the
1021 * device is not able to send data fast enough.
1022 * This did not trigger for a long time now.
1023 */
1024 printk(KERN_ERR "Reloading ptd %p/%p... qh %p readed: "
22026473 1025 "%d of %zu done: %08x cur: %08x\n", qtd,
db11e47d
SS		 1026 urb, qh, PTD_XFERRED_LENGTH(dw3),
1027 qtd->length, done_map,
1028 (1 << queue_entry));
1029
1030 /* RL counter = ERR counter */
1031 dw3 &= ~(0xf << 19);
1032 dw3 |= rl << 19;
1033 dw3 &= ~(3 << (55 - 32));
1034 dw3 |= ERR_COUNTER << (55 - 32);
1035
1036 /*
1037 * It is not needed to write skip map back because it
1038 * is unchanged. Just make sure that this entry is
1039 * unskipped once it gets written to the HW.
1040 */
1041 skip_map &= ~(1 << queue_entry);
1042 or_map = isp1760_readl(usb_hcd->regs +
1043 HC_ATL_IRQ_MASK_OR_REG);
1044 or_map |= 1 << queue_entry;
1045 isp1760_writel(or_map, usb_hcd->regs +
1046 HC_ATL_IRQ_MASK_OR_REG);
1047
1048 ptd.dw3 = cpu_to_le32(dw3);
1049 priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
1050 atl_regs, sizeof(ptd));
1051
1052 ptd.dw0 |= __constant_cpu_to_le32(PTD_VALID);
1053 priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
1054 atl_regs, sizeof(ptd));
1055
1056 buffstatus = isp1760_readl(usb_hcd->regs +
1057 HC_BUFFER_STATUS_REG);
1058 buffstatus |= ATL_BUFFER;
1059 isp1760_writel(buffstatus, usb_hcd->regs +
1060 HC_BUFFER_STATUS_REG);
1061 continue;
1062 }
1063
1064 error = check_error(&ptd);
1065 if (error) {
1066 status = error;
1067 priv->atl_ints[queue_entry].qh->toggle = 0;
1068 priv->atl_ints[queue_entry].qh->ping = 0;
1069 urb->status = -EPIPE;
1070
1071#if 0
1072 printk(KERN_ERR "Error in %s().\n", __func__);
1073 printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1074 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1075 "%08x dw7: %08x\n",
1076 ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1077 ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1078#endif
1079 } else {
1080 if (usb_pipetype(urb->pipe) == PIPE_BULK) {
1081 priv->atl_ints[queue_entry].qh->toggle = dw3 &
1082 (1 << 25);
1083 priv->atl_ints[queue_entry].qh->ping = dw3 &
1084 (1 << 26);
1085 }
1086 }
1087
1088 length = PTD_XFERRED_LENGTH(dw3);
1089 if (length) {
1090 switch (DW1_GET_PID(dw1)) {
1091 case IN_PID:
1092 priv_read_copy(priv,
1093 priv->atl_ints[queue_entry].data_buffer,
1094 usb_hcd->regs + payload, payload,
1095 length);
1096
1097 case OUT_PID:
1098
1099 urb->actual_length += length;
1100
1101 case SETUP_PID:
1102 break;
1103 }
1104 }
1105
1106 priv->atl_ints[queue_entry].data_buffer = NULL;
1107 priv->atl_ints[queue_entry].urb = NULL;
1108 priv->atl_ints[queue_entry].qtd = NULL;
1109 priv->atl_ints[queue_entry].qh = NULL;
1110
1111 free_mem(priv, payload);
1112
1113 isp1760_writel(skip_map, usb_hcd->regs +
1114 HC_ATL_PTD_SKIPMAP_REG);
1115
1116 if (urb->status == -EPIPE) {
1117 /* HALT was received */
1118
1119 qtd = clean_up_qtdlist(qtd);
1120 isp1760_urb_done(priv, urb, urb->status);
1121
1122 } else if (usb_pipebulk(urb->pipe) && (length < qtd->length)) {
1123 /* short BULK received */
1124
22026473 1125 printk(KERN_ERR "short bulk, %d instead %zu\n", length,
db11e47d
SS		 1126 qtd->length);
1127 if (urb->transfer_flags & URB_SHORT_NOT_OK) {
1128 urb->status = -EREMOTEIO;
1129 printk(KERN_ERR "not okey\n");
1130 }
1131
1132 if (urb->status == -EINPROGRESS)
1133 urb->status = 0;
1134
1135 qtd = clean_up_qtdlist(qtd);
1136
1137 isp1760_urb_done(priv, urb, urb->status);
1138
1139 } else if (qtd->status & URB_COMPLETE_NOTIFY) {
1140 /* that was the last qtd of that URB */
1141
1142 if (urb->status == -EINPROGRESS)
1143 urb->status = 0;
1144
1145 qtd = clean_this_qtd(qtd);
1146 isp1760_urb_done(priv, urb, urb->status);
1147
1148 } else {
1149 /* next QTD of this URB */
1150
1151 qtd = clean_this_qtd(qtd);
1152 BUG_ON(!qtd);
1153 }
1154
1155 if (qtd)
1156 enqueue_an_ATL_packet(usb_hcd, qh, qtd);
1157
1158 skip_map = isp1760_readl(usb_hcd->regs +
1159 HC_ATL_PTD_SKIPMAP_REG);
1160 }
1161}
1162
1163static void do_intl_int(struct usb_hcd *usb_hcd)
1164{
1165 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
1166 u32 done_map, skip_map;
1167 struct ptd ptd;
1168 struct urb *urb = NULL;
1169 u32 int_regs;
1170 u32 int_regs_base;
1171 u32 payload;
1172 u32 length;
1173 u32 or_map;
1174 int error;
1175 u32 queue_entry;
1176 struct isp1760_qtd *qtd;
1177 struct isp1760_qh *qh;
1178
1179 done_map = isp1760_readl(usb_hcd->regs +
1180 HC_INT_PTD_DONEMAP_REG);
1181 skip_map = isp1760_readl(usb_hcd->regs +
1182 HC_INT_PTD_SKIPMAP_REG);
1183
1184 or_map = isp1760_readl(usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG);
1185 or_map &= ~done_map;
1186 isp1760_writel(or_map, usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG);
1187
1188 int_regs_base = INT_REGS_OFFSET;
1189
1190 while (done_map) {
1191 u32 dw1;
1192 u32 dw3;
1193
1194 queue_entry = __ffs(done_map);
1195 done_map &= ~(1 << queue_entry);
1196 skip_map |= 1 << queue_entry;
1197
1198 int_regs = int_regs_base + queue_entry * sizeof(struct ptd);
1199 urb = priv->int_ints[queue_entry].urb;
1200 qtd = priv->int_ints[queue_entry].qtd;
1201 qh = priv->int_ints[queue_entry].qh;
1202 payload = priv->int_ints[queue_entry].payload;
1203
1204 if (!qh) {
1205 printk(KERN_ERR "(INT) qh is 0\n");
1206 continue;
1207 }
1208
1209 priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + int_regs,
1210 int_regs, sizeof(ptd));
1211 dw1 = le32_to_cpu(ptd.dw1);
1212 dw3 = le32_to_cpu(ptd.dw3);
1213 check_int_err_status(le32_to_cpu(ptd.dw4));
1214
1215 error = check_error(&ptd);
1216 if (error) {
1217#if 0
1218 printk(KERN_ERR "Error in %s().\n", __func__);
1219 printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1220 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1221 "%08x dw7: %08x\n",
1222 ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1223 ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1224#endif
1225 urb->status = -EPIPE;
1226 priv->int_ints[queue_entry].qh->toggle = 0;
1227 priv->int_ints[queue_entry].qh->ping = 0;
1228
1229 } else {
1230 priv->int_ints[queue_entry].qh->toggle =
1231 dw3 & (1 << 25);
1232 priv->int_ints[queue_entry].qh->ping = dw3 & (1 << 26);
1233 }
1234
1235 if (urb->dev->speed != USB_SPEED_HIGH)
1236 length = PTD_XFERRED_LENGTH_LO(dw3);
1237 else
1238 length = PTD_XFERRED_LENGTH(dw3);
1239
1240 if (length) {
1241 switch (DW1_GET_PID(dw1)) {
1242 case IN_PID:
1243 priv_read_copy(priv,
1244 priv->int_ints[queue_entry].data_buffer,
1245 usb_hcd->regs + payload , payload,
1246 length);
1247 case OUT_PID:
1248
1249 urb->actual_length += length;
1250
1251 case SETUP_PID:
1252 break;
1253 }
1254 }
1255
1256 priv->int_ints[queue_entry].data_buffer = NULL;
1257 priv->int_ints[queue_entry].urb = NULL;
1258 priv->int_ints[queue_entry].qtd = NULL;
1259 priv->int_ints[queue_entry].qh = NULL;
1260
1261 isp1760_writel(skip_map, usb_hcd->regs +
1262 HC_INT_PTD_SKIPMAP_REG);
1263 free_mem(priv, payload);
1264
1265 if (urb->status == -EPIPE) {
1266 /* HALT received */
1267
1268 qtd = clean_up_qtdlist(qtd);
1269 isp1760_urb_done(priv, urb, urb->status);
1270
1271 } else if (qtd->status & URB_COMPLETE_NOTIFY) {
1272
1273 if (urb->status == -EINPROGRESS)
1274 urb->status = 0;
1275
1276 qtd = clean_this_qtd(qtd);
1277 isp1760_urb_done(priv, urb, urb->status);
1278
1279 } else {
1280 /* next QTD of this URB */
1281
1282 qtd = clean_this_qtd(qtd);
1283 BUG_ON(!qtd);
1284 }
1285
1286 if (qtd)
1287 enqueue_an_INT_packet(usb_hcd, qh, qtd);
1288
1289 skip_map = isp1760_readl(usb_hcd->regs +
1290 HC_INT_PTD_SKIPMAP_REG);
1291 }
1292}
1293
1294#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1295static struct isp1760_qh *qh_make(struct isp1760_hcd *priv, struct urb *urb,
1296 gfp_t flags)
1297{
1298 struct isp1760_qh *qh;
1299 int is_input, type;
1300
1301 qh = isp1760_qh_alloc(priv, flags);
1302 if (!qh)
1303 return qh;
1304
1305 /*
1306 * init endpoint/device data for this QH
1307 */
1308 is_input = usb_pipein(urb->pipe);
1309 type = usb_pipetype(urb->pipe);
1310
1311 if (type == PIPE_INTERRUPT) {
1312
1313 if (urb->dev->speed == USB_SPEED_HIGH) {
1314
1315 qh->period = urb->interval >> 3;
1316 if (qh->period == 0 && urb->interval != 1) {
1317 /* NOTE interval 2 or 4 uframes could work.
1318 * But interval 1 scheduling is simpler, and
1319 * includes high bandwidth.
1320 */
1321 printk(KERN_ERR "intr period %d uframes, NYET!",
1322 urb->interval);
1323 qh_destroy(qh);
1324 return NULL;
1325 }
1326 } else {
1327 qh->period = urb->interval;
1328 }
1329 }
1330
1331 /* support for tt scheduling, and access to toggles */
1332 qh->dev = urb->dev;
1333
1334 if (!usb_pipecontrol(urb->pipe))
1335 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input,
1336 1);
1337 return qh;
1338}
1339
1340/*
1341 * For control/bulk/interrupt, return QH with these TDs appended.
1342 * Allocates and initializes the QH if necessary.
1343 * Returns null if it can't allocate a QH it needs to.
1344 * If the QH has TDs (urbs) already, that's great.
1345 */
1346static struct isp1760_qh *qh_append_tds(struct isp1760_hcd *priv,
1347 struct urb *urb, struct list_head *qtd_list, int epnum,
1348 void **ptr)
1349{
1350 struct isp1760_qh *qh;
1351 struct isp1760_qtd *qtd;
1352 struct isp1760_qtd *prev_qtd;
1353
1354 qh = (struct isp1760_qh *)*ptr;
1355 if (!qh) {
1356 /* can't sleep here, we have priv->lock... */
1357 qh = qh_make(priv, urb, GFP_ATOMIC);
1358 if (!qh)
1359 return qh;
1360 *ptr = qh;
1361 }
1362
1363 qtd = list_entry(qtd_list->next, struct isp1760_qtd,
1364 qtd_list);
1365 if (!list_empty(&qh->qtd_list))
1366 prev_qtd = list_entry(qh->qtd_list.prev,
1367 struct isp1760_qtd, qtd_list);
1368 else
1369 prev_qtd = NULL;
1370
1371 list_splice(qtd_list, qh->qtd_list.prev);
1372 if (prev_qtd) {
1373 BUG_ON(prev_qtd->hw_next);
1374 prev_qtd->hw_next = qtd;
1375 }
1376
1377 urb->hcpriv = qh;
1378 return qh;
1379}
1380
1381static void qtd_list_free(struct isp1760_hcd *priv, struct urb *urb,
1382 struct list_head *qtd_list)
1383{
1384 struct list_head *entry, *temp;
1385
1386 list_for_each_safe(entry, temp, qtd_list) {
1387 struct isp1760_qtd *qtd;
1388
1389 qtd = list_entry(entry, struct isp1760_qtd, qtd_list);
1390 list_del(&qtd->qtd_list);
1391 isp1760_qtd_free(qtd);
1392 }
1393}
1394
1395static int isp1760_prepare_enqueue(struct isp1760_hcd *priv, struct urb *urb,
1396 struct list_head *qtd_list, gfp_t mem_flags, packet_enqueue *p)
1397{
1398 struct isp1760_qtd *qtd;
1399 int epnum;
1400 unsigned long flags;
1401 struct isp1760_qh *qh = NULL;
1402 int rc;
1403 int qh_busy;
1404
1405 qtd = list_entry(qtd_list->next, struct isp1760_qtd, qtd_list);
1406 epnum = urb->ep->desc.bEndpointAddress;
1407
1408 spin_lock_irqsave(&priv->lock, flags);
1409 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &priv_to_hcd(priv)->flags)) {
1410 rc = -ESHUTDOWN;
1411 goto done;
1412 }
1413 rc = usb_hcd_link_urb_to_ep(priv_to_hcd(priv), urb);
1414 if (rc)
1415 goto done;
1416
1417 qh = urb->ep->hcpriv;
1418 if (qh)
1419 qh_busy = !list_empty(&qh->qtd_list);
1420 else
1421 qh_busy = 0;
1422
1423 qh = qh_append_tds(priv, urb, qtd_list, epnum, &urb->ep->hcpriv);
1424 if (!qh) {
1425 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
1426 rc = -ENOMEM;
1427 goto done;
1428 }
1429
1430 if (!qh_busy)
1431 p(priv_to_hcd(priv), qh, qtd);
1432
1433done:
1434 spin_unlock_irqrestore(&priv->lock, flags);
1435 if (!qh)
1436 qtd_list_free(priv, urb, qtd_list);
1437 return rc;
1438}
1439
1440static struct isp1760_qtd *isp1760_qtd_alloc(struct isp1760_hcd *priv,
1441 gfp_t flags)
1442{
1443 struct isp1760_qtd *qtd;
1444
1445 qtd = kmem_cache_zalloc(qtd_cachep, flags);
1446 if (qtd)
1447 INIT_LIST_HEAD(&qtd->qtd_list);
1448
1449 return qtd;
1450}
1451
1452/*
1453 * create a list of filled qtds for this URB; won't link into qh.
1454 */
1455static struct list_head *qh_urb_transaction(struct isp1760_hcd *priv,
1456 struct urb *urb, struct list_head *head, gfp_t flags)
1457{
1458 struct isp1760_qtd *qtd, *qtd_prev;
1459 void *buf;
1460 int len, maxpacket;
1461 int is_input;
1462 u32 token;
1463
1464 /*
1465 * URBs map to sequences of QTDs: one logical transaction
1466 */
1467 qtd = isp1760_qtd_alloc(priv, flags);
1468 if (!qtd)
1469 return NULL;
1470
1471 list_add_tail(&qtd->qtd_list, head);
1472 qtd->urb = urb;
1473 urb->status = -EINPROGRESS;
1474
1475 token = 0;
1476 /* for split transactions, SplitXState initialized to zero */
1477
1478 len = urb->transfer_buffer_length;
1479 is_input = usb_pipein(urb->pipe);
1480 if (usb_pipecontrol(urb->pipe)) {
1481 /* SETUP pid */
1482 qtd_fill(qtd, urb->setup_packet,
1483 sizeof(struct usb_ctrlrequest),
1484 token | SETUP_PID);
1485
1486 /* ... and always at least one more pid */
1487 token ^= DATA_TOGGLE;
1488 qtd_prev = qtd;
1489 qtd = isp1760_qtd_alloc(priv, flags);
1490 if (!qtd)
1491 goto cleanup;
1492 qtd->urb = urb;
1493 qtd_prev->hw_next = qtd;
1494 list_add_tail(&qtd->qtd_list, head);
1495
1496 /* for zero length DATA stages, STATUS is always IN */
1497 if (len == 0)
1498 token |= IN_PID;
1499 }
1500
1501 /*
1502 * data transfer stage: buffer setup
1503 */
1504 buf = urb->transfer_buffer;
1505
1506 if (is_input)
1507 token |= IN_PID;
1508 else
1509 token |= OUT_PID;
1510
1511 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1512
1513 /*
1514 * buffer gets wrapped in one or more qtds;
1515 * last one may be "short" (including zero len)
1516 * and may serve as a control status ack
1517 */
1518 for (;;) {
1519 int this_qtd_len;
1520
1521 if (!buf && len) {
1522 /* XXX This looks like usb storage / SCSI bug */
1523 printk(KERN_ERR "buf is null, dma is %08lx len is %d\n",
1524 (long unsigned)urb->transfer_dma, len);
1525 WARN_ON(1);
1526 }
1527
1528 this_qtd_len = qtd_fill(qtd, buf, len, token);
1529 len -= this_qtd_len;
1530 buf += this_qtd_len;
1531
1532 /* qh makes control packets use qtd toggle; maybe switch it */
1533 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1534 token ^= DATA_TOGGLE;
1535
1536 if (len <= 0)
1537 break;
1538
1539 qtd_prev = qtd;
1540 qtd = isp1760_qtd_alloc(priv, flags);
1541 if (!qtd)
1542 goto cleanup;
1543 qtd->urb = urb;
1544 qtd_prev->hw_next = qtd;
1545 list_add_tail(&qtd->qtd_list, head);
1546 }
1547
1548 /*
1549 * control requests may need a terminating data "status" ack;
1550 * bulk ones may need a terminating short packet (zero length).
1551 */
1552 if (urb->transfer_buffer_length != 0) {
1553 int one_more = 0;
1554
1555 if (usb_pipecontrol(urb->pipe)) {
1556 one_more = 1;
1557 /* "in" <--> "out" */
1558 token ^= IN_PID;
1559 /* force DATA1 */
1560 token |= DATA_TOGGLE;
1561 } else if (usb_pipebulk(urb->pipe)
1562 && (urb->transfer_flags & URB_ZERO_PACKET)
1563 && !(urb->transfer_buffer_length % maxpacket)) {
1564 one_more = 1;
1565 }
1566 if (one_more) {
1567 qtd_prev = qtd;
1568 qtd = isp1760_qtd_alloc(priv, flags);
1569 if (!qtd)
1570 goto cleanup;
1571 qtd->urb = urb;
1572 qtd_prev->hw_next = qtd;
1573 list_add_tail(&qtd->qtd_list, head);
1574
1575 /* never any data in such packets */
1576 qtd_fill(qtd, NULL, 0, token);
1577 }
1578 }
1579
1580 qtd->status = URB_COMPLETE_NOTIFY;
1581 return head;
1582
1583cleanup:
1584 qtd_list_free(priv, urb, head);
1585 return NULL;
1586}
1587
1588static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
1589 gfp_t mem_flags)
1590{
1591 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1592 struct list_head qtd_list;
1593 packet_enqueue *pe;
1594
1595 INIT_LIST_HEAD(&qtd_list);
1596
1597 switch (usb_pipetype(urb->pipe)) {
1598 case PIPE_CONTROL:
1599 case PIPE_BULK:
1600
1601 if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
1602 return -ENOMEM;
1603 pe = enqueue_an_ATL_packet;
1604 break;
1605
1606 case PIPE_INTERRUPT:
1607 if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
1608 return -ENOMEM;
1609 pe = enqueue_an_INT_packet;
1610 break;
1611
1612 case PIPE_ISOCHRONOUS:
1613 printk(KERN_ERR "PIPE_ISOCHRONOUS ain't supported\n");
1614 default:
1615 return -EPIPE;
1616 }
1617
a36c27df 1618 return isp1760_prepare_enqueue(priv, urb, &qtd_list, mem_flags, pe);
db11e47d
SS		 1619}
1620
1621static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1622 int status)
1623{
1624 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1625 struct inter_packet_info *ints;
1626 u32 i;
1627 u32 reg_base, or_reg, skip_reg;
d249afdd 1628 unsigned long flags;
db11e47d
SS		 1629 struct ptd ptd;
1630
1631 switch (usb_pipetype(urb->pipe)) {
1632 case PIPE_ISOCHRONOUS:
1633 return -EPIPE;
1634 break;
1635
1636 case PIPE_INTERRUPT:
1637 ints = priv->int_ints;
1638 reg_base = INT_REGS_OFFSET;
1639 or_reg = HC_INT_IRQ_MASK_OR_REG;
1640 skip_reg = HC_INT_PTD_SKIPMAP_REG;
1641 break;
1642
1643 default:
1644 ints = priv->atl_ints;
1645 reg_base = ATL_REGS_OFFSET;
1646 or_reg = HC_ATL_IRQ_MASK_OR_REG;
1647 skip_reg = HC_ATL_PTD_SKIPMAP_REG;
1648 break;
1649 }
1650
1651 memset(&ptd, 0, sizeof(ptd));
1652 spin_lock_irqsave(&priv->lock, flags);
1653
1654 for (i = 0; i < 32; i++) {
1655 if (ints->urb == urb) {
1656 u32 skip_map;
1657 u32 or_map;
1658 struct isp1760_qtd *qtd;
1659
1660 skip_map = isp1760_readl(hcd->regs + skip_reg);
1661 skip_map |= 1 << i;
1662 isp1760_writel(skip_map, hcd->regs + skip_reg);
1663
1664 or_map = isp1760_readl(hcd->regs + or_reg);
1665 or_map &= ~(1 << i);
1666 isp1760_writel(or_map, hcd->regs + or_reg);
1667
1668 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + reg_base
1669 + i * sizeof(ptd), sizeof(ptd));
1670 qtd = ints->qtd;
1671
1672 clean_up_qtdlist(qtd);
1673
1674 free_mem(priv, ints->payload);
1675
1676 ints->urb = NULL;
1677 ints->qh = NULL;
1678 ints->qtd = NULL;
1679 ints->data_buffer = NULL;
1680 ints->payload = 0;
1681
1682 isp1760_urb_done(priv, urb, status);
1683 break;
1684 }
1685 ints++;
1686 }
1687
1688 spin_unlock_irqrestore(&priv->lock, flags);
1689 return 0;
1690}
1691
1692static irqreturn_t isp1760_irq(struct usb_hcd *usb_hcd)
1693{
1694 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
1695 u32 imask;
1696 irqreturn_t irqret = IRQ_NONE;
1697
1698 spin_lock(&priv->lock);
1699
1700 if (!(usb_hcd->state & HC_STATE_RUNNING))
1701 goto leave;
1702
1703 imask = isp1760_readl(usb_hcd->regs + HC_INTERRUPT_REG);
1704 if (unlikely(!imask))
1705 goto leave;
1706
1707 isp1760_writel(imask, usb_hcd->regs + HC_INTERRUPT_REG);
1708 if (imask & HC_ATL_INT)
1709 do_atl_int(usb_hcd);
1710
1711 if (imask & HC_INTL_INT)
1712 do_intl_int(usb_hcd);
1713
1714 irqret = IRQ_HANDLED;
1715leave:
1716 spin_unlock(&priv->lock);
1717 return irqret;
1718}
1719
1720static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
1721{
1722 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1723 u32 temp, status = 0;
1724 u32 mask;
1725 int retval = 1;
1726 unsigned long flags;
1727
1728 /* if !USB_SUSPEND, root hub timers won't get shut down ... */
1729 if (!HC_IS_RUNNING(hcd->state))
1730 return 0;
1731
1732 /* init status to no-changes */
1733 buf[0] = 0;
1734 mask = PORT_CSC;
1735
1736 spin_lock_irqsave(&priv->lock, flags);
1737 temp = isp1760_readl(hcd->regs + HC_PORTSC1);
1738
1739 if (temp & PORT_OWNER) {
1740 if (temp & PORT_CSC) {
1741 temp &= ~PORT_CSC;
1742 isp1760_writel(temp, hcd->regs + HC_PORTSC1);
1743 goto done;
1744 }
1745 }
1746
1747 /*
1748 * Return status information even for ports with OWNER set.
1749 * Otherwise khubd wouldn't see the disconnect event when a
1750 * high-speed device is switched over to the companion
1751 * controller by the user.
1752 */
1753
1754 if ((temp & mask) != 0
1755 || ((temp & PORT_RESUME) != 0
1756 && time_after_eq(jiffies,
1757 priv->reset_done))) {
1758 buf [0] |= 1 << (0 + 1);
1759 status = STS_PCD;
1760 }
1761 /* FIXME autosuspend idle root hubs */
1762done:
1763 spin_unlock_irqrestore(&priv->lock, flags);
1764 return status ? retval : 0;
1765}
1766
1767static void isp1760_hub_descriptor(struct isp1760_hcd *priv,
1768 struct usb_hub_descriptor *desc)
1769{
1770 int ports = HCS_N_PORTS(priv->hcs_params);
1771 u16 temp;
1772
1773 desc->bDescriptorType = 0x29;
1774 /* priv 1.0, 2.3.9 says 20ms max */
1775 desc->bPwrOn2PwrGood = 10;
1776 desc->bHubContrCurrent = 0;
1777
1778 desc->bNbrPorts = ports;
1779 temp = 1 + (ports / 8);
1780 desc->bDescLength = 7 + 2 * temp;
1781
1782 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1783 memset(&desc->bitmap[0], 0, temp);
1784 memset(&desc->bitmap[temp], 0xff, temp);
1785
1786 /* per-port overcurrent reporting */
1787 temp = 0x0008;
1788 if (HCS_PPC(priv->hcs_params))
1789 /* per-port power control */
1790 temp |= 0x0001;
1791 else
1792 /* no power switching */
1793 temp |= 0x0002;
1794 desc->wHubCharacteristics = cpu_to_le16(temp);
1795}
1796
1797#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
1798
1799static int check_reset_complete(struct isp1760_hcd *priv, int index,
1800 u32 __iomem *status_reg, int port_status)
1801{
1802 if (!(port_status & PORT_CONNECT))
1803 return port_status;
1804
1805 /* if reset finished and it's still not enabled -- handoff */
1806 if (!(port_status & PORT_PE)) {
1807
1808 printk(KERN_ERR "port %d full speed --> companion\n",
1809 index + 1);
1810
1811 port_status |= PORT_OWNER;
1812 port_status &= ~PORT_RWC_BITS;
1813 isp1760_writel(port_status, status_reg);
1814
1815 } else
1816 printk(KERN_ERR "port %d high speed\n", index + 1);
1817
1818 return port_status;
1819}
1820
1821static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1822 u16 wValue, u16 wIndex, char *buf, u16 wLength)
1823{
1824 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1825 int ports = HCS_N_PORTS(priv->hcs_params);
1826 u32 __iomem *status_reg = hcd->regs + HC_PORTSC1;
1827 u32 temp, status;
1828 unsigned long flags;
1829 int retval = 0;
1830 unsigned selector;
1831
1832 /*
1833 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1834 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1835 * (track current state ourselves) ... blink for diagnostics,
1836 * power, "this is the one", etc. EHCI spec supports this.
1837 */
1838
1839 spin_lock_irqsave(&priv->lock, flags);
1840 switch (typeReq) {
1841 case ClearHubFeature:
1842 switch (wValue) {
1843 case C_HUB_LOCAL_POWER:
1844 case C_HUB_OVER_CURRENT:
1845 /* no hub-wide feature/status flags */
1846 break;
1847 default:
1848 goto error;
1849 }
1850 break;
1851 case ClearPortFeature:
1852 if (!wIndex || wIndex > ports)
1853 goto error;
1854 wIndex--;
1855 temp = isp1760_readl(status_reg);
1856
1857 /*
1858 * Even if OWNER is set, so the port is owned by the
1859 * companion controller, khubd needs to be able to clear
1860 * the port-change status bits (especially
1861 * USB_PORT_FEAT_C_CONNECTION).
1862 */
1863
1864 switch (wValue) {
1865 case USB_PORT_FEAT_ENABLE:
1866 isp1760_writel(temp & ~PORT_PE, status_reg);
1867 break;
1868 case USB_PORT_FEAT_C_ENABLE:
1869 /* XXX error? */
1870 break;
1871 case USB_PORT_FEAT_SUSPEND:
1872 if (temp & PORT_RESET)
1873 goto error;
1874
1875 if (temp & PORT_SUSPEND) {
1876 if ((temp & PORT_PE) == 0)
1877 goto error;
1878 /* resume signaling for 20 msec */
1879 temp &= ~(PORT_RWC_BITS);
1880 isp1760_writel(temp | PORT_RESUME,
1881 status_reg);
1882 priv->reset_done = jiffies +
1883 msecs_to_jiffies(20);
1884 }
1885 break;
1886 case USB_PORT_FEAT_C_SUSPEND:
1887 /* we auto-clear this feature */
1888 break;
1889 case USB_PORT_FEAT_POWER:
1890 if (HCS_PPC(priv->hcs_params))
1891 isp1760_writel(temp & ~PORT_POWER, status_reg);
1892 break;
1893 case USB_PORT_FEAT_C_CONNECTION:
1894 isp1760_writel(temp | PORT_CSC,
1895 status_reg);
1896 break;
1897 case USB_PORT_FEAT_C_OVER_CURRENT:
1898 /* XXX error ?*/
1899 break;
1900 case USB_PORT_FEAT_C_RESET:
1901 /* GetPortStatus clears reset */
1902 break;
1903 default:
1904 goto error;
1905 }
1906 isp1760_readl(hcd->regs + HC_USBCMD);
1907 break;
1908 case GetHubDescriptor:
1909 isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *)
1910 buf);
1911 break;
1912 case GetHubStatus:
1913 /* no hub-wide feature/status flags */
1914 memset(buf, 0, 4);
1915 break;
1916 case GetPortStatus:
1917 if (!wIndex || wIndex > ports)
1918 goto error;
1919 wIndex--;
1920 status = 0;
1921 temp = isp1760_readl(status_reg);
1922
1923 /* wPortChange bits */
1924 if (temp & PORT_CSC)
1925 status |= 1 << USB_PORT_FEAT_C_CONNECTION;
1926
1927
1928 /* whoever resumes must GetPortStatus to complete it!! */
1929 if (temp & PORT_RESUME) {
1930 printk(KERN_ERR "Port resume should be skipped.\n");
1931
1932 /* Remote Wakeup received? */
1933 if (!priv->reset_done) {
1934 /* resume signaling for 20 msec */
1935 priv->reset_done = jiffies
1936 + msecs_to_jiffies(20);
1937 /* check the port again */
1938 mod_timer(&priv_to_hcd(priv)->rh_timer,
1939 priv->reset_done);
1940 }
1941
1942 /* resume completed? */
1943 else if (time_after_eq(jiffies,
1944 priv->reset_done)) {
1945 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
1946 priv->reset_done = 0;
1947
1948 /* stop resume signaling */
1949 temp = isp1760_readl(status_reg);
1950 isp1760_writel(
1951 temp & ~(PORT_RWC_BITS | PORT_RESUME),
1952 status_reg);
1953 retval = handshake(priv, status_reg,
1954 PORT_RESUME, 0, 2000 /* 2msec */);
1955 if (retval != 0) {
1956 isp1760_err(priv,
1957 "port %d resume error %d\n",
1958 wIndex + 1, retval);
1959 goto error;
1960 }
1961 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
1962 }
1963 }
1964
1965 /* whoever resets must GetPortStatus to complete it!! */
1966 if ((temp & PORT_RESET)
1967 && time_after_eq(jiffies,
1968 priv->reset_done)) {
1969 status |= 1 << USB_PORT_FEAT_C_RESET;
1970 priv->reset_done = 0;
1971
1972 /* force reset to complete */
1973 isp1760_writel(temp & ~PORT_RESET,
1974 status_reg);
1975 /* REVISIT: some hardware needs 550+ usec to clear
1976 * this bit; seems too long to spin routinely...
1977 */
1978 retval = handshake(priv, status_reg,
1979 PORT_RESET, 0, 750);
1980 if (retval != 0) {
1981 isp1760_err(priv, "port %d reset error %d\n",
1982 wIndex + 1, retval);
1983 goto error;
1984 }
1985
1986 /* see what we found out */
1987 temp = check_reset_complete(priv, wIndex, status_reg,
1988 isp1760_readl(status_reg));
1989 }
1990 /*
1991 * Even if OWNER is set, there's no harm letting khubd
1992 * see the wPortStatus values (they should all be 0 except
1993 * for PORT_POWER anyway).
1994 */
1995
1996 if (temp & PORT_OWNER)
1997 printk(KERN_ERR "Warning: PORT_OWNER is set\n");
1998
1999 if (temp & PORT_CONNECT) {
2000 status |= 1 << USB_PORT_FEAT_CONNECTION;
2001 /* status may be from integrated TT */
2002 status |= ehci_port_speed(priv, temp);
2003 }
2004 if (temp & PORT_PE)
2005 status |= 1 << USB_PORT_FEAT_ENABLE;
2006 if (temp & (PORT_SUSPEND|PORT_RESUME))
2007 status |= 1 << USB_PORT_FEAT_SUSPEND;
2008 if (temp & PORT_RESET)
2009 status |= 1 << USB_PORT_FEAT_RESET;
2010 if (temp & PORT_POWER)
2011 status |= 1 << USB_PORT_FEAT_POWER;
2012
2013 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
2014 break;
2015 case SetHubFeature:
2016 switch (wValue) {
2017 case C_HUB_LOCAL_POWER:
2018 case C_HUB_OVER_CURRENT:
2019 /* no hub-wide feature/status flags */
2020 break;
2021 default:
2022 goto error;
2023 }
2024 break;
2025 case SetPortFeature:
2026 selector = wIndex >> 8;
2027 wIndex &= 0xff;
2028 if (!wIndex || wIndex > ports)
2029 goto error;
2030 wIndex--;
2031 temp = isp1760_readl(status_reg);
2032 if (temp & PORT_OWNER)
2033 break;
2034
2035/* temp &= ~PORT_RWC_BITS; */
2036 switch (wValue) {
2037 case USB_PORT_FEAT_ENABLE:
2038 isp1760_writel(temp | PORT_PE, status_reg);
2039 break;
2040
2041 case USB_PORT_FEAT_SUSPEND:
2042 if ((temp & PORT_PE) == 0
2043 || (temp & PORT_RESET) != 0)
2044 goto error;
2045
2046 isp1760_writel(temp | PORT_SUSPEND, status_reg);
2047 break;
2048 case USB_PORT_FEAT_POWER:
2049 if (HCS_PPC(priv->hcs_params))
2050 isp1760_writel(temp | PORT_POWER,
2051 status_reg);
2052 break;
2053 case USB_PORT_FEAT_RESET:
2054 if (temp & PORT_RESUME)
2055 goto error;
2056 /* line status bits may report this as low speed,
2057 * which can be fine if this root hub has a
2058 * transaction translator built in.
2059 */
2060 if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
2061 && PORT_USB11(temp)) {
2062 temp |= PORT_OWNER;
2063 } else {
2064 temp |= PORT_RESET;
2065 temp &= ~PORT_PE;
2066
2067 /*
2068 * caller must wait, then call GetPortStatus
2069 * usb 2.0 spec says 50 ms resets on root
2070 */
2071 priv->reset_done = jiffies +
2072 msecs_to_jiffies(50);
2073 }
2074 isp1760_writel(temp, status_reg);
2075 break;
2076 default:
2077 goto error;
2078 }
2079 isp1760_readl(hcd->regs + HC_USBCMD);
2080 break;
2081
2082 default:
2083error:
2084 /* "stall" on error */
2085 retval = -EPIPE;
2086 }
2087 spin_unlock_irqrestore(&priv->lock, flags);
2088 return retval;
2089}
2090
2091static void isp1760_endpoint_disable(struct usb_hcd *usb_hcd,
2092 struct usb_host_endpoint *ep)
2093{
2094 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
2095 struct isp1760_qh *qh;
2096 struct isp1760_qtd *qtd;
d249afdd 2097 unsigned long flags;
db11e47d
SS		 2098
2099 spin_lock_irqsave(&priv->lock, flags);
2100 qh = ep->hcpriv;
2101 if (!qh)
2102 goto out;
2103
2104 ep->hcpriv = NULL;
2105 do {
2106 /* more than entry might get removed */
2107 if (list_empty(&qh->qtd_list))
2108 break;
2109
2110 qtd = list_first_entry(&qh->qtd_list, struct isp1760_qtd,
2111 qtd_list);
2112
2113 if (qtd->status & URB_ENQUEUED) {
2114
2115 spin_unlock_irqrestore(&priv->lock, flags);
2116 isp1760_urb_dequeue(usb_hcd, qtd->urb, -ECONNRESET);
2117 spin_lock_irqsave(&priv->lock, flags);
2118 } else {
2119 struct urb *urb;
2120
2121 urb = qtd->urb;
2122 clean_up_qtdlist(qtd);
2123 isp1760_urb_done(priv, urb, -ECONNRESET);
2124 }
2125 } while (1);
2126
2127 qh_destroy(qh);
2128 /* remove requests and leak them.
2129 * ATL are pretty fast done, INT could take a while...
2130 * The latter shoule be removed
2131 */
2132out:
2133 spin_unlock_irqrestore(&priv->lock, flags);
2134}
2135
2136static int isp1760_get_frame(struct usb_hcd *hcd)
2137{
2138 struct isp1760_hcd *priv = hcd_to_priv(hcd);
2139 u32 fr;
2140
2141 fr = isp1760_readl(hcd->regs + HC_FRINDEX);
2142 return (fr >> 3) % priv->periodic_size;
2143}
2144
2145static void isp1760_stop(struct usb_hcd *hcd)
2146{
2147 struct isp1760_hcd *priv = hcd_to_priv(hcd);
3faefc88 2148 u32 temp;
db11e47d
SS		 2149
2150 isp1760_hub_control(hcd, ClearPortFeature, USB_PORT_FEAT_POWER, 1,
2151 NULL, 0);
2152 mdelay(20);
2153
2154 spin_lock_irq(&priv->lock);
2155 ehci_reset(priv);
2156 /* Disable IRQ */
3faefc88
NC		 2157 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
2158 isp1760_writel(temp &= ~HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
db11e47d
SS		 2159 spin_unlock_irq(&priv->lock);
2160
2161 isp1760_writel(0, hcd->regs + HC_CONFIGFLAG);
2162}
2163
2164static void isp1760_shutdown(struct usb_hcd *hcd)
2165{
3faefc88 2166 u32 command, temp;
db11e47d
SS		 2167
2168 isp1760_stop(hcd);
3faefc88
NC		 2169 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
2170 isp1760_writel(temp &= ~HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
db11e47d
SS		 2171
2172 command = isp1760_readl(hcd->regs + HC_USBCMD);
2173 command &= ~CMD_RUN;
2174 isp1760_writel(command, hcd->regs + HC_USBCMD);
2175}
2176
2177static const struct hc_driver isp1760_hc_driver = {
2178 .description = "isp1760-hcd",
2179 .product_desc = "NXP ISP1760 USB Host Controller",
2180 .hcd_priv_size = sizeof(struct isp1760_hcd),
2181 .irq = isp1760_irq,
2182 .flags = HCD_MEMORY | HCD_USB2,
2183 .reset = isp1760_hc_setup,
2184 .start = isp1760_run,
2185 .stop = isp1760_stop,
2186 .shutdown = isp1760_shutdown,
2187 .urb_enqueue = isp1760_urb_enqueue,
2188 .urb_dequeue = isp1760_urb_dequeue,
2189 .endpoint_disable = isp1760_endpoint_disable,
2190 .get_frame_number = isp1760_get_frame,
2191 .hub_status_data = isp1760_hub_status_data,
2192 .hub_control = isp1760_hub_control,
2193};
2194
2195int __init init_kmem_once(void)
2196{
2197 qtd_cachep = kmem_cache_create("isp1760_qtd",
2198 sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY |
2199 SLAB_MEM_SPREAD, NULL);
2200
2201 if (!qtd_cachep)
2202 return -ENOMEM;
2203
2204 qh_cachep = kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh),
2205 0, SLAB_TEMPORARY | SLAB_MEM_SPREAD, NULL);
2206
2207 if (!qh_cachep) {
2208 kmem_cache_destroy(qtd_cachep);
2209 return -ENOMEM;
2210 }
2211
2212 return 0;
2213}
2214
2215void deinit_kmem_cache(void)
2216{
2217 kmem_cache_destroy(qtd_cachep);
2218 kmem_cache_destroy(qh_cachep);
2219}
2220
2221struct usb_hcd *isp1760_register(u64 res_start, u64 res_len, int irq,
3faefc88
NC		 2222 u64 irqflags, struct device *dev, const char *busname,
2223 unsigned int devflags)
db11e47d
SS		 2224{
2225 struct usb_hcd *hcd;
2226 struct isp1760_hcd *priv;
2227 int ret;
2228
2229 if (usb_disabled())
2230 return ERR_PTR(-ENODEV);
2231
2232 /* prevent usb-core allocating DMA pages */
2233 dev->dma_mask = NULL;
2234
0031a06e 2235 hcd = usb_create_hcd(&isp1760_hc_driver, dev, dev_name(dev));
db11e47d
SS		 2236 if (!hcd)
2237 return ERR_PTR(-ENOMEM);
2238
2239 priv = hcd_to_priv(hcd);
3faefc88 2240 priv->devflags = devflags;
db11e47d
SS		 2241 init_memory(priv);
2242 hcd->regs = ioremap(res_start, res_len);
2243 if (!hcd->regs) {
2244 ret = -EIO;
2245 goto err_put;
2246 }
2247
db11e47d
SS		 2248 hcd->irq = irq;
2249 hcd->rsrc_start = res_start;
2250 hcd->rsrc_len = res_len;
2251
e6942d63
NC		 2252 ret = usb_add_hcd(hcd, irq, irqflags);
2253 if (ret)
2254 goto err_unmap;
2255
db11e47d
SS		 2256 return hcd;
2257
2258err_unmap:
2259 iounmap(hcd->regs);
2260
2261err_put:
2262 usb_put_hcd(hcd);
2263
2264 return ERR_PTR(ret);
2265}
2266
2267MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
2268MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
2269MODULE_LICENSE("GPL v2");
kernel source for telekom puls (alcatel/mediatek)