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USB: EHCI: add software retry for transaction errors
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / host / isp1760-hcd.c
CommitLineData
db11e47d
SS		 1/*
2 * Driver for the NXP ISP1760 chip
3 *
4 * However, the code might contain some bugs. What doesn't work for sure is:
5 * - ISO
6 * - OTG
7 e The interrupt line is configured as active low, level.
8 *
9 * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
10 *
11 */
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/slab.h>
15#include <linux/list.h>
16#include <linux/usb.h>
17#include <linux/debugfs.h>
18#include <linux/uaccess.h>
19#include <linux/io.h>
20#include <asm/unaligned.h>
21
22#include "../core/hcd.h"
23#include "isp1760-hcd.h"
24
25static struct kmem_cache *qtd_cachep;
26static struct kmem_cache *qh_cachep;
27
28struct isp1760_hcd {
29 u32 hcs_params;
30 spinlock_t lock;
31 struct inter_packet_info atl_ints[32];
32 struct inter_packet_info int_ints[32];
33 struct memory_chunk memory_pool[BLOCKS];
34
35 /* periodic schedule support */
36#define DEFAULT_I_TDPS 1024
37 unsigned periodic_size;
38 unsigned i_thresh;
39 unsigned long reset_done;
40 unsigned long next_statechange;
3faefc88 41 unsigned int devflags;
db11e47d
SS		 42};
43
44static inline struct isp1760_hcd *hcd_to_priv(struct usb_hcd *hcd)
45{
46 return (struct isp1760_hcd *) (hcd->hcd_priv);
47}
48static inline struct usb_hcd *priv_to_hcd(struct isp1760_hcd *priv)
49{
50 return container_of((void *) priv, struct usb_hcd, hcd_priv);
51}
52
53/* Section 2.2 Host Controller Capability Registers */
54#define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */
55#define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */
56#define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
57#define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
58#define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
59#define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */
60#define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */
61
62/* Section 2.3 Host Controller Operational Registers */
63#define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
64#define CMD_RESET (1<<1) /* reset HC not bus */
65#define CMD_RUN (1<<0) /* start/stop HC */
66#define STS_PCD (1<<2) /* port change detect */
67#define FLAG_CF (1<<0) /* true: we'll support "high speed" */
68
69#define PORT_OWNER (1<<13) /* true: companion hc owns this port */
70#define PORT_POWER (1<<12) /* true: has power (see PPC) */
71#define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1 device */
72#define PORT_RESET (1<<8) /* reset port */
73#define PORT_SUSPEND (1<<7) /* suspend port */
74#define PORT_RESUME (1<<6) /* resume it */
75#define PORT_PE (1<<2) /* port enable */
76#define PORT_CSC (1<<1) /* connect status change */
77#define PORT_CONNECT (1<<0) /* device connected */
78#define PORT_RWC_BITS (PORT_CSC)
79
80struct isp1760_qtd {
81 struct isp1760_qtd *hw_next;
82 u8 packet_type;
83 u8 toggle;
84
85 void *data_buffer;
86 /* the rest is HCD-private */
87 struct list_head qtd_list;
88 struct urb *urb;
89 size_t length;
90
91 /* isp special*/
92 u32 status;
93#define URB_COMPLETE_NOTIFY (1 << 0)
94#define URB_ENQUEUED (1 << 1)
95#define URB_TYPE_ATL (1 << 2)
96#define URB_TYPE_INT (1 << 3)
97};
98
99struct isp1760_qh {
100 /* first part defined by EHCI spec */
101 struct list_head qtd_list;
102 struct isp1760_hcd *priv;
103
104 /* periodic schedule info */
105 unsigned short period; /* polling interval */
106 struct usb_device *dev;
107
108 u32 toggle;
109 u32 ping;
110};
111
112#define ehci_port_speed(priv, portsc) (1 << USB_PORT_FEAT_HIGHSPEED)
113
114static unsigned int isp1760_readl(__u32 __iomem *regs)
115{
116 return readl(regs);
117}
118
119static void isp1760_writel(const unsigned int val, __u32 __iomem *regs)
120{
121 writel(val, regs);
122}
123
124/*
125 * The next two copy via MMIO data to/from the device. memcpy_{to|from}io()
126 * doesn't quite work because some people have to enforce 32-bit access
127 */
128static void priv_read_copy(struct isp1760_hcd *priv, u32 *src,
3f02a957 129 __u32 __iomem *dst, u32 len)
db11e47d 130{
db11e47d
SS		 131 u32 val;
132 u8 *buff8;
133
134 if (!src) {
135 printk(KERN_ERR "ERROR: buffer: %p len: %d\n", src, len);
136 return;
137 }
db11e47d
SS		 138
139 while (len >= 4) {
140 *src = __raw_readl(dst);
141 len -= 4;
142 src++;
143 dst++;
144 }
145
146 if (!len)
147 return;
148
149 /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
150 * allocated.
151 */
152 val = isp1760_readl(dst);
153
154 buff8 = (u8 *)src;
155 while (len) {
156
157 *buff8 = val;
158 val >>= 8;
159 len--;
160 buff8++;
161 }
162}
163
164static void priv_write_copy(const struct isp1760_hcd *priv, const u32 *src,
165 __u32 __iomem *dst, u32 len)
166{
167 while (len >= 4) {
168 __raw_writel(*src, dst);
169 len -= 4;
170 src++;
171 dst++;
172 }
173
174 if (!len)
175 return;
176 /* in case we have 3, 2 or 1 by left. The buffer is allocated and the
177 * extra bytes should not be read by the HW
178 */
179
180 __raw_writel(*src, dst);
181}
182
183/* memory management of the 60kb on the chip from 0x1000 to 0xffff */
184static void init_memory(struct isp1760_hcd *priv)
185{
186 int i;
187 u32 payload;
188
189 payload = 0x1000;
190 for (i = 0; i < BLOCK_1_NUM; i++) {
191 priv->memory_pool[i].start = payload;
192 priv->memory_pool[i].size = BLOCK_1_SIZE;
193 priv->memory_pool[i].free = 1;
194 payload += priv->memory_pool[i].size;
195 }
196
197
198 for (i = BLOCK_1_NUM; i < BLOCK_1_NUM + BLOCK_2_NUM; i++) {
199 priv->memory_pool[i].start = payload;
200 priv->memory_pool[i].size = BLOCK_2_SIZE;
201 priv->memory_pool[i].free = 1;
202 payload += priv->memory_pool[i].size;
203 }
204
205
206 for (i = BLOCK_1_NUM + BLOCK_2_NUM; i < BLOCKS; i++) {
207 priv->memory_pool[i].start = payload;
208 priv->memory_pool[i].size = BLOCK_3_SIZE;
209 priv->memory_pool[i].free = 1;
210 payload += priv->memory_pool[i].size;
211 }
212
213 BUG_ON(payload - priv->memory_pool[i - 1].size > PAYLOAD_SIZE);
214}
215
216static u32 alloc_mem(struct isp1760_hcd *priv, u32 size)
217{
218 int i;
219
220 if (!size)
221 return ISP1760_NULL_POINTER;
222
223 for (i = 0; i < BLOCKS; i++) {
224 if (priv->memory_pool[i].size >= size &&
225 priv->memory_pool[i].free) {
226
227 priv->memory_pool[i].free = 0;
228 return priv->memory_pool[i].start;
229 }
230 }
231
232 printk(KERN_ERR "ISP1760 MEM: can not allocate %d bytes of memory\n",
233 size);
234 printk(KERN_ERR "Current memory map:\n");
235 for (i = 0; i < BLOCKS; i++) {
236 printk(KERN_ERR "Pool %2d size %4d status: %d\n",
237 i, priv->memory_pool[i].size,
238 priv->memory_pool[i].free);
239 }
240 /* XXX maybe -ENOMEM could be possible */
241 BUG();
242 return 0;
243}
244
245static void free_mem(struct isp1760_hcd *priv, u32 mem)
246{
247 int i;
248
249 if (mem == ISP1760_NULL_POINTER)
250 return;
251
252 for (i = 0; i < BLOCKS; i++) {
253 if (priv->memory_pool[i].start == mem) {
254
255 BUG_ON(priv->memory_pool[i].free);
256
257 priv->memory_pool[i].free = 1;
258 return ;
259 }
260 }
261
262 printk(KERN_ERR "Trying to free not-here-allocated memory :%08x\n",
263 mem);
264 BUG();
265}
266
267static void isp1760_init_regs(struct usb_hcd *hcd)
268{
269 isp1760_writel(0, hcd->regs + HC_BUFFER_STATUS_REG);
270 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
271 HC_ATL_PTD_SKIPMAP_REG);
272 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
273 HC_INT_PTD_SKIPMAP_REG);
274 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
275 HC_ISO_PTD_SKIPMAP_REG);
276
277 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
278 HC_ATL_PTD_DONEMAP_REG);
279 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
280 HC_INT_PTD_DONEMAP_REG);
281 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
282 HC_ISO_PTD_DONEMAP_REG);
283}
284
285static int handshake(struct isp1760_hcd *priv, void __iomem *ptr,
286 u32 mask, u32 done, int usec)
287{
288 u32 result;
289
290 do {
291 result = isp1760_readl(ptr);
292 if (result == ~0)
293 return -ENODEV;
294 result &= mask;
295 if (result == done)
296 return 0;
297 udelay(1);
298 usec--;
299 } while (usec > 0);
300 return -ETIMEDOUT;
301}
302
303/* reset a non-running (STS_HALT == 1) controller */
304static int ehci_reset(struct isp1760_hcd *priv)
305{
306 int retval;
307 struct usb_hcd *hcd = priv_to_hcd(priv);
308 u32 command = isp1760_readl(hcd->regs + HC_USBCMD);
309
310 command |= CMD_RESET;
311 isp1760_writel(command, hcd->regs + HC_USBCMD);
312 hcd->state = HC_STATE_HALT;
313 priv->next_statechange = jiffies;
314 retval = handshake(priv, hcd->regs + HC_USBCMD,
315 CMD_RESET, 0, 250 * 1000);
316 return retval;
317}
318
319static void qh_destroy(struct isp1760_qh *qh)
320{
321 BUG_ON(!list_empty(&qh->qtd_list));
322 kmem_cache_free(qh_cachep, qh);
323}
324
325static struct isp1760_qh *isp1760_qh_alloc(struct isp1760_hcd *priv,
326 gfp_t flags)
327{
328 struct isp1760_qh *qh;
329
330 qh = kmem_cache_zalloc(qh_cachep, flags);
331 if (!qh)
332 return qh;
333
334 INIT_LIST_HEAD(&qh->qtd_list);
335 qh->priv = priv;
336 return qh;
337}
338
339/* magic numbers that can affect system performance */
340#define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
341#define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
342#define EHCI_TUNE_RL_TT 0
343#define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
344#define EHCI_TUNE_MULT_TT 1
345#define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
346
347/* one-time init, only for memory state */
348static int priv_init(struct usb_hcd *hcd)
349{
350 struct isp1760_hcd *priv = hcd_to_priv(hcd);
351 u32 hcc_params;
352
353 spin_lock_init(&priv->lock);
354
355 /*
356 * hw default: 1K periodic list heads, one per frame.
357 * periodic_size can shrink by USBCMD update if hcc_params allows.
358 */
359 priv->periodic_size = DEFAULT_I_TDPS;
360
361 /* controllers may cache some of the periodic schedule ... */
362 hcc_params = isp1760_readl(hcd->regs + HC_HCCPARAMS);
363 /* full frame cache */
364 if (HCC_ISOC_CACHE(hcc_params))
365 priv->i_thresh = 8;
366 else /* N microframes cached */
367 priv->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
368
369 return 0;
370}
371
372static int isp1760_hc_setup(struct usb_hcd *hcd)
373{
374 struct isp1760_hcd *priv = hcd_to_priv(hcd);
375 int result;
3faefc88
NC		 376 u32 scratch, hwmode;
377
378 /* Setup HW Mode Control: This assumes a level active-low interrupt */
379 hwmode = HW_DATA_BUS_32BIT;
380
381 if (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16)
382 hwmode &= ~HW_DATA_BUS_32BIT;
383 if (priv->devflags & ISP1760_FLAG_ANALOG_OC)
384 hwmode |= HW_ANA_DIGI_OC;
385 if (priv->devflags & ISP1760_FLAG_DACK_POL_HIGH)
386 hwmode |= HW_DACK_POL_HIGH;
387 if (priv->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
388 hwmode |= HW_DREQ_POL_HIGH;
389
390 /*
391 * We have to set this first in case we're in 16-bit mode.
392 * Write it twice to ensure correct upper bits if switching
393 * to 16-bit mode.
394 */
395 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
396 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
db11e47d
SS		 397
398 isp1760_writel(0xdeadbabe, hcd->regs + HC_SCRATCH_REG);
3faefc88
NC		 399 /* Change bus pattern */
400 scratch = isp1760_readl(hcd->regs + HC_CHIP_ID_REG);
db11e47d
SS		 401 scratch = isp1760_readl(hcd->regs + HC_SCRATCH_REG);
402 if (scratch != 0xdeadbabe) {
403 printk(KERN_ERR "ISP1760: Scratch test failed.\n");
404 return -ENODEV;
405 }
406
407 /* pre reset */
408 isp1760_init_regs(hcd);
409
410 /* reset */
411 isp1760_writel(SW_RESET_RESET_ALL, hcd->regs + HC_RESET_REG);
412 mdelay(100);
413
414 isp1760_writel(SW_RESET_RESET_HC, hcd->regs + HC_RESET_REG);
415 mdelay(100);
416
417 result = ehci_reset(priv);
418 if (result)
419 return result;
420
421 /* Step 11 passed */
422
3faefc88
NC		 423 isp1760_info(priv, "bus width: %d, oc: %s\n",
424 (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16) ?
425 16 : 32, (priv->devflags & ISP1760_FLAG_ANALOG_OC) ?
426 "analog" : "digital");
db11e47d
SS		 427
428 /* ATL reset */
3faefc88 429 isp1760_writel(hwmode | ALL_ATX_RESET, hcd->regs + HC_HW_MODE_CTRL);
db11e47d 430 mdelay(10);
3faefc88 431 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
db11e47d 432
3faefc88
NC		 433 isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_REG);
434 isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_ENABLE);
435
436 /*
437 * PORT 1 Control register of the ISP1760 is the OTG control
42c65396
TH		 438 * register on ISP1761. Since there is no OTG or device controller
439 * support in this driver, we use port 1 as a "normal" USB host port on
440 * both chips.
3faefc88 441 */
42c65396
TH		 442 isp1760_writel(PORT1_POWER | PORT1_INIT2,
443 hcd->regs + HC_PORT1_CTRL);
444 mdelay(10);
db11e47d
SS		 445
446 priv->hcs_params = isp1760_readl(hcd->regs + HC_HCSPARAMS);
447
448 return priv_init(hcd);
449}
450
451static void isp1760_init_maps(struct usb_hcd *hcd)
452{
453 /*set last maps, for iso its only 1, else 32 tds bitmap*/
454 isp1760_writel(0x80000000, hcd->regs + HC_ATL_PTD_LASTPTD_REG);
455 isp1760_writel(0x80000000, hcd->regs + HC_INT_PTD_LASTPTD_REG);
456 isp1760_writel(0x00000001, hcd->regs + HC_ISO_PTD_LASTPTD_REG);
457}
458
459static void isp1760_enable_interrupts(struct usb_hcd *hcd)
460{
461 isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_AND_REG);
462 isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
463 isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_AND_REG);
464 isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_OR_REG);
465 isp1760_writel(0, hcd->regs + HC_ISO_IRQ_MASK_AND_REG);
466 isp1760_writel(0xffffffff, hcd->regs + HC_ISO_IRQ_MASK_OR_REG);
467 /* step 23 passed */
468}
469
470static int isp1760_run(struct usb_hcd *hcd)
471{
472 struct isp1760_hcd *priv = hcd_to_priv(hcd);
473 int retval;
474 u32 temp;
475 u32 command;
476 u32 chipid;
477
478 hcd->uses_new_polling = 1;
479 hcd->poll_rh = 0;
480
481 hcd->state = HC_STATE_RUNNING;
482 isp1760_enable_interrupts(hcd);
483 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
3faefc88 484 isp1760_writel(temp | HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
db11e47d
SS		 485
486 command = isp1760_readl(hcd->regs + HC_USBCMD);
487 command &= ~(CMD_LRESET|CMD_RESET);
488 command |= CMD_RUN;
489 isp1760_writel(command, hcd->regs + HC_USBCMD);
490
491 retval = handshake(priv, hcd->regs + HC_USBCMD, CMD_RUN, CMD_RUN,
492 250 * 1000);
493 if (retval)
494 return retval;
495
496 /*
497 * XXX
498 * Spec says to write FLAG_CF as last config action, priv code grabs
499 * the semaphore while doing so.
500 */
501 down_write(&ehci_cf_port_reset_rwsem);
502 isp1760_writel(FLAG_CF, hcd->regs + HC_CONFIGFLAG);
503
504 retval = handshake(priv, hcd->regs + HC_CONFIGFLAG, FLAG_CF, FLAG_CF,
505 250 * 1000);
506 up_write(&ehci_cf_port_reset_rwsem);
507 if (retval)
508 return retval;
509
510 chipid = isp1760_readl(hcd->regs + HC_CHIP_ID_REG);
511 isp1760_info(priv, "USB ISP %04x HW rev. %d started\n", chipid & 0xffff,
512 chipid >> 16);
513
514 /* PTD Register Init Part 2, Step 28 */
515 /* enable INTs */
516 isp1760_init_maps(hcd);
517
518 /* GRR this is run-once init(), being done every time the HC starts.
519 * So long as they're part of class devices, we can't do it init()
520 * since the class device isn't created that early.
521 */
522 return 0;
523}
524
525static u32 base_to_chip(u32 base)
526{
527 return ((base - 0x400) >> 3);
528}
529
530static void transform_into_atl(struct isp1760_hcd *priv, struct isp1760_qh *qh,
531 struct isp1760_qtd *qtd, struct urb *urb,
532 u32 payload, struct ptd *ptd)
533{
534 u32 dw0;
535 u32 dw1;
536 u32 dw2;
537 u32 dw3;
538 u32 maxpacket;
539 u32 multi;
540 u32 pid_code;
541 u32 rl = RL_COUNTER;
542 u32 nak = NAK_COUNTER;
543
544 /* according to 3.6.2, max packet len can not be > 0x400 */
545 maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
546 multi = 1 + ((maxpacket >> 11) & 0x3);
547 maxpacket &= 0x7ff;
548
549 /* DW0 */
550 dw0 = PTD_VALID;
551 dw0 |= PTD_LENGTH(qtd->length);
552 dw0 |= PTD_MAXPACKET(maxpacket);
553 dw0 |= PTD_ENDPOINT(usb_pipeendpoint(urb->pipe));
554 dw1 = usb_pipeendpoint(urb->pipe) >> 1;
555
556 /* DW1 */
557 dw1 |= PTD_DEVICE_ADDR(usb_pipedevice(urb->pipe));
558
559 pid_code = qtd->packet_type;
560 dw1 |= PTD_PID_TOKEN(pid_code);
561
562 if (usb_pipebulk(urb->pipe))
563 dw1 |= PTD_TRANS_BULK;
564 else if (usb_pipeint(urb->pipe))
565 dw1 |= PTD_TRANS_INT;
566
567 if (urb->dev->speed != USB_SPEED_HIGH) {
568 /* split transaction */
569
570 dw1 |= PTD_TRANS_SPLIT;
571 if (urb->dev->speed == USB_SPEED_LOW)
572 dw1 |= PTD_SE_USB_LOSPEED;
573
574 dw1 |= PTD_PORT_NUM(urb->dev->ttport);
575 dw1 |= PTD_HUB_NUM(urb->dev->tt->hub->devnum);
576
577 /* SE bit for Split INT transfers */
578 if (usb_pipeint(urb->pipe) &&
579 (urb->dev->speed == USB_SPEED_LOW))
580 dw1 |= 2 << 16;
581
582 dw3 = 0;
583 rl = 0;
584 nak = 0;
585 } else {
586 dw0 |= PTD_MULTI(multi);
587 if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe))
588 dw3 = qh->ping;
589 else
590 dw3 = 0;
591 }
592 /* DW2 */
593 dw2 = 0;
594 dw2 |= PTD_DATA_START_ADDR(base_to_chip(payload));
595 dw2 |= PTD_RL_CNT(rl);
596 dw3 |= PTD_NAC_CNT(nak);
597
598 /* DW3 */
599 if (usb_pipecontrol(urb->pipe))
600 dw3 |= PTD_DATA_TOGGLE(qtd->toggle);
601 else
602 dw3 |= qh->toggle;
603
604
605 dw3 |= PTD_ACTIVE;
606 /* Cerr */
607 dw3 |= PTD_CERR(ERR_COUNTER);
608
609 memset(ptd, 0, sizeof(*ptd));
610
611 ptd->dw0 = cpu_to_le32(dw0);
612 ptd->dw1 = cpu_to_le32(dw1);
613 ptd->dw2 = cpu_to_le32(dw2);
614 ptd->dw3 = cpu_to_le32(dw3);
615}
616
617static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
618 struct isp1760_qtd *qtd, struct urb *urb,
619 u32 payload, struct ptd *ptd)
620{
621 u32 maxpacket;
622 u32 multi;
623 u32 numberofusofs;
624 u32 i;
625 u32 usofmask, usof;
626 u32 period;
627
628 maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
629 multi = 1 + ((maxpacket >> 11) & 0x3);
630 maxpacket &= 0x7ff;
631 /* length of the data per uframe */
632 maxpacket = multi * maxpacket;
633
634 numberofusofs = urb->transfer_buffer_length / maxpacket;
635 if (urb->transfer_buffer_length % maxpacket)
636 numberofusofs += 1;
637
638 usofmask = 1;
639 usof = 0;
640 for (i = 0; i < numberofusofs; i++) {
641 usof |= usofmask;
642 usofmask <<= 1;
643 }
644
645 if (urb->dev->speed != USB_SPEED_HIGH) {
646 /* split */
647 ptd->dw5 = __constant_cpu_to_le32(0x1c);
648
649 if (qh->period >= 32)
650 period = qh->period / 2;
651 else
652 period = qh->period;
653
654 } else {
655
656 if (qh->period >= 8)
657 period = qh->period/8;
658 else
659 period = qh->period;
660
661 if (period >= 32)
662 period = 16;
663
664 if (qh->period >= 8) {
665 /* millisecond period */
666 period = (period << 3);
667 } else {
668 /* usof based tranmsfers */
669 /* minimum 4 usofs */
670 usof = 0x11;
671 }
672 }
673
674 ptd->dw2 |= cpu_to_le32(period);
675 ptd->dw4 = cpu_to_le32(usof);
676}
677
678static void transform_into_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
679 struct isp1760_qtd *qtd, struct urb *urb,
680 u32 payload, struct ptd *ptd)
681{
682 transform_into_atl(priv, qh, qtd, urb, payload, ptd);
683 transform_add_int(priv, qh, qtd, urb, payload, ptd);
684}
685
686static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len,
687 u32 token)
688{
689 int count;
690
691 qtd->data_buffer = databuffer;
692 qtd->packet_type = GET_QTD_TOKEN_TYPE(token);
693 qtd->toggle = GET_DATA_TOGGLE(token);
694
695 if (len > HC_ATL_PL_SIZE)
696 count = HC_ATL_PL_SIZE;
697 else
698 count = len;
699
700 qtd->length = count;
701 return count;
702}
703
704static int check_error(struct ptd *ptd)
705{
706 int error = 0;
707 u32 dw3;
708
709 dw3 = le32_to_cpu(ptd->dw3);
710 if (dw3 & DW3_HALT_BIT)
711 error = -EPIPE;
712
713 if (dw3 & DW3_ERROR_BIT) {
714 printk(KERN_ERR "error bit is set in DW3\n");
715 error = -EPIPE;
716 }
717
718 if (dw3 & DW3_QTD_ACTIVE) {
719 printk(KERN_ERR "transfer active bit is set DW3\n");
720 printk(KERN_ERR "nak counter: %d, rl: %d\n", (dw3 >> 19) & 0xf,
721 (le32_to_cpu(ptd->dw2) >> 25) & 0xf);
722 }
723
724 return error;
725}
726
727static void check_int_err_status(u32 dw4)
728{
729 u32 i;
730
731 dw4 >>= 8;
732
733 for (i = 0; i < 8; i++) {
734 switch (dw4 & 0x7) {
735 case INT_UNDERRUN:
736 printk(KERN_ERR "ERROR: under run , %d\n", i);
737 break;
738
739 case INT_EXACT:
740 printk(KERN_ERR "ERROR: transaction error, %d\n", i);
741 break;
742
743 case INT_BABBLE:
744 printk(KERN_ERR "ERROR: babble error, %d\n", i);
745 break;
746 }
747 dw4 >>= 3;
748 }
749}
750
751static void enqueue_one_qtd(struct isp1760_qtd *qtd, struct isp1760_hcd *priv,
752 u32 payload)
753{
754 u32 token;
755 struct usb_hcd *hcd = priv_to_hcd(priv);
756
757 token = qtd->packet_type;
758
759 if (qtd->length && (qtd->length <= HC_ATL_PL_SIZE)) {
760 switch (token) {
761 case IN_PID:
762 break;
763 case OUT_PID:
764 case SETUP_PID:
765 priv_write_copy(priv, qtd->data_buffer,
766 hcd->regs + payload,
767 qtd->length);
768 }
769 }
770}
771
772static void enqueue_one_atl_qtd(u32 atl_regs, u32 payload,
773 struct isp1760_hcd *priv, struct isp1760_qh *qh,
774 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
775{
776 struct ptd ptd;
777 struct usb_hcd *hcd = priv_to_hcd(priv);
778
779 transform_into_atl(priv, qh, qtd, urb, payload, &ptd);
780 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + atl_regs, sizeof(ptd));
781 enqueue_one_qtd(qtd, priv, payload);
782
783 priv->atl_ints[slot].urb = urb;
784 priv->atl_ints[slot].qh = qh;
785 priv->atl_ints[slot].qtd = qtd;
786 priv->atl_ints[slot].data_buffer = qtd->data_buffer;
787 priv->atl_ints[slot].payload = payload;
788 qtd->status |= URB_ENQUEUED | URB_TYPE_ATL;
789 qtd->status |= slot << 16;
790}
791
792static void enqueue_one_int_qtd(u32 int_regs, u32 payload,
793 struct isp1760_hcd *priv, struct isp1760_qh *qh,
794 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
795{
796 struct ptd ptd;
797 struct usb_hcd *hcd = priv_to_hcd(priv);
798
799 transform_into_int(priv, qh, qtd, urb, payload, &ptd);
800 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + int_regs, sizeof(ptd));
801 enqueue_one_qtd(qtd, priv, payload);
802
803 priv->int_ints[slot].urb = urb;
804 priv->int_ints[slot].qh = qh;
805 priv->int_ints[slot].qtd = qtd;
806 priv->int_ints[slot].data_buffer = qtd->data_buffer;
807 priv->int_ints[slot].payload = payload;
808 qtd->status |= URB_ENQUEUED | URB_TYPE_INT;
809 qtd->status |= slot << 16;
810}
811
473bca94
AB		 812static void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
813 struct isp1760_qtd *qtd)
db11e47d
SS		 814{
815 struct isp1760_hcd *priv = hcd_to_priv(hcd);
816 u32 skip_map, or_map;
817 u32 queue_entry;
818 u32 slot;
819 u32 atl_regs, payload;
820 u32 buffstatus;
821
822 skip_map = isp1760_readl(hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
823
824 BUG_ON(!skip_map);
825 slot = __ffs(skip_map);
826 queue_entry = 1 << slot;
827
828 atl_regs = ATL_REGS_OFFSET + slot * sizeof(struct ptd);
829
830 payload = alloc_mem(priv, qtd->length);
831
832 enqueue_one_atl_qtd(atl_regs, payload, priv, qh, qtd->urb, slot, qtd);
833
834 or_map = isp1760_readl(hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
835 or_map |= queue_entry;
836 isp1760_writel(or_map, hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
837
838 skip_map &= ~queue_entry;
839 isp1760_writel(skip_map, hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
840
841 buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG);
842 buffstatus |= ATL_BUFFER;
843 isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG);
844}
845
473bca94
AB		 846static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
847 struct isp1760_qtd *qtd)
db11e47d
SS		 848{
849 struct isp1760_hcd *priv = hcd_to_priv(hcd);
850 u32 skip_map, or_map;
851 u32 queue_entry;
852 u32 slot;
853 u32 int_regs, payload;
854 u32 buffstatus;
855
856 skip_map = isp1760_readl(hcd->regs + HC_INT_PTD_SKIPMAP_REG);
857
858 BUG_ON(!skip_map);
859 slot = __ffs(skip_map);
860 queue_entry = 1 << slot;
861
862 int_regs = INT_REGS_OFFSET + slot * sizeof(struct ptd);
863
864 payload = alloc_mem(priv, qtd->length);
865
866 enqueue_one_int_qtd(int_regs, payload, priv, qh, qtd->urb, slot, qtd);
867
868 or_map = isp1760_readl(hcd->regs + HC_INT_IRQ_MASK_OR_REG);
869 or_map |= queue_entry;
870 isp1760_writel(or_map, hcd->regs + HC_INT_IRQ_MASK_OR_REG);
871
872 skip_map &= ~queue_entry;
873 isp1760_writel(skip_map, hcd->regs + HC_INT_PTD_SKIPMAP_REG);
874
875 buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG);
876 buffstatus |= INT_BUFFER;
877 isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG);
878}
879
880static void isp1760_urb_done(struct isp1760_hcd *priv, struct urb *urb, int status)
881__releases(priv->lock)
882__acquires(priv->lock)
883{
884 if (!urb->unlinked) {
885 if (status == -EINPROGRESS)
886 status = 0;
887 }
888
889 /* complete() can reenter this HCD */
890 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
891 spin_unlock(&priv->lock);
892 usb_hcd_giveback_urb(priv_to_hcd(priv), urb, status);
893 spin_lock(&priv->lock);
894}
895
896static void isp1760_qtd_free(struct isp1760_qtd *qtd)
897{
898 kmem_cache_free(qtd_cachep, qtd);
899}
900
901static struct isp1760_qtd *clean_this_qtd(struct isp1760_qtd *qtd)
902{
903 struct isp1760_qtd *tmp_qtd;
904
905 tmp_qtd = qtd->hw_next;
906 list_del(&qtd->qtd_list);
907 isp1760_qtd_free(qtd);
908 return tmp_qtd;
909}
910
911/*
912 * Remove this QTD from the QH list and free its memory. If this QTD
913 * isn't the last one than remove also his successor(s).
914 * Returns the QTD which is part of an new URB and should be enqueued.
915 */
916static struct isp1760_qtd *clean_up_qtdlist(struct isp1760_qtd *qtd)
917{
918 struct isp1760_qtd *tmp_qtd;
919 int last_one;
920
921 do {
922 tmp_qtd = qtd->hw_next;
923 last_one = qtd->status & URB_COMPLETE_NOTIFY;
924 list_del(&qtd->qtd_list);
925 isp1760_qtd_free(qtd);
926 qtd = tmp_qtd;
927 } while (!last_one && qtd);
928
929 return qtd;
930}
931
932static void do_atl_int(struct usb_hcd *usb_hcd)
933{
934 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
935 u32 done_map, skip_map;
936 struct ptd ptd;
937 struct urb *urb = NULL;
938 u32 atl_regs_base;
939 u32 atl_regs;
940 u32 queue_entry;
941 u32 payload;
942 u32 length;
943 u32 or_map;
944 u32 status = -EINVAL;
945 int error;
946 struct isp1760_qtd *qtd;
947 struct isp1760_qh *qh;
948 u32 rl;
949 u32 nakcount;
950
951 done_map = isp1760_readl(usb_hcd->regs +
952 HC_ATL_PTD_DONEMAP_REG);
953 skip_map = isp1760_readl(usb_hcd->regs +
954 HC_ATL_PTD_SKIPMAP_REG);
955
956 or_map = isp1760_readl(usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
957 or_map &= ~done_map;
958 isp1760_writel(or_map, usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
959
960 atl_regs_base = ATL_REGS_OFFSET;
961 while (done_map) {
962 u32 dw1;
963 u32 dw2;
964 u32 dw3;
965
966 status = 0;
967
968 queue_entry = __ffs(done_map);
969 done_map &= ~(1 << queue_entry);
970 skip_map |= 1 << queue_entry;
971
972 atl_regs = atl_regs_base + queue_entry * sizeof(struct ptd);
973
974 urb = priv->atl_ints[queue_entry].urb;
975 qtd = priv->atl_ints[queue_entry].qtd;
976 qh = priv->atl_ints[queue_entry].qh;
977 payload = priv->atl_ints[queue_entry].payload;
978
979 if (!qh) {
980 printk(KERN_ERR "qh is 0\n");
981 continue;
982 }
3f02a957
ES		 983 isp1760_writel(atl_regs + ISP_BANK(0), usb_hcd->regs +
984 HC_MEMORY_REG);
985 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
986 HC_MEMORY_REG);
987 /*
988 * write bank1 address twice to ensure the 90ns delay (time
989 * between BANK0 write and the priv_read_copy() call is at
380ec678 990 * least 3*t_WHWL + 2*t_w11 = 3*25ns + 2*17ns = 109ns)
3f02a957
ES		 991 */
992 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
993 HC_MEMORY_REG);
994
995 priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + atl_regs +
996 ISP_BANK(0), sizeof(ptd));
db11e47d
SS		 997
998 dw1 = le32_to_cpu(ptd.dw1);
999 dw2 = le32_to_cpu(ptd.dw2);
1000 dw3 = le32_to_cpu(ptd.dw3);
1001 rl = (dw2 >> 25) & 0x0f;
1002 nakcount = (dw3 >> 19) & 0xf;
1003
1004 /* Transfer Error, *but* active and no HALT -> reload */
1005 if ((dw3 & DW3_ERROR_BIT) && (dw3 & DW3_QTD_ACTIVE) &&
1006 !(dw3 & DW3_HALT_BIT)) {
1007
1008 /* according to ppriv code, we have to
1009 * reload this one if trasfered bytes != requested bytes
1010 * else act like everything went smooth..
1011 * XXX This just doesn't feel right and hasn't
1012 * triggered so far.
1013 */
1014
1015 length = PTD_XFERRED_LENGTH(dw3);
1016 printk(KERN_ERR "Should reload now.... transfered %d "
1017 "of %zu\n", length, qtd->length);
1018 BUG();
1019 }
1020
1021 if (!nakcount && (dw3 & DW3_QTD_ACTIVE)) {
1022 u32 buffstatus;
1023
1024 /* XXX
1025 * NAKs are handled in HW by the chip. Usually if the
1026 * device is not able to send data fast enough.
1027 * This did not trigger for a long time now.
1028 */
1029 printk(KERN_ERR "Reloading ptd %p/%p... qh %p readed: "
22026473 1030 "%d of %zu done: %08x cur: %08x\n", qtd,
db11e47d
SS		 1031 urb, qh, PTD_XFERRED_LENGTH(dw3),
1032 qtd->length, done_map,
1033 (1 << queue_entry));
1034
1035 /* RL counter = ERR counter */
1036 dw3 &= ~(0xf << 19);
1037 dw3 |= rl << 19;
1038 dw3 &= ~(3 << (55 - 32));
1039 dw3 |= ERR_COUNTER << (55 - 32);
1040
1041 /*
1042 * It is not needed to write skip map back because it
1043 * is unchanged. Just make sure that this entry is
1044 * unskipped once it gets written to the HW.
1045 */
1046 skip_map &= ~(1 << queue_entry);
1047 or_map = isp1760_readl(usb_hcd->regs +
1048 HC_ATL_IRQ_MASK_OR_REG);
1049 or_map |= 1 << queue_entry;
1050 isp1760_writel(or_map, usb_hcd->regs +
1051 HC_ATL_IRQ_MASK_OR_REG);
1052
1053 ptd.dw3 = cpu_to_le32(dw3);
1054 priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
1055 atl_regs, sizeof(ptd));
1056
1057 ptd.dw0 |= __constant_cpu_to_le32(PTD_VALID);
1058 priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
1059 atl_regs, sizeof(ptd));
1060
1061 buffstatus = isp1760_readl(usb_hcd->regs +
1062 HC_BUFFER_STATUS_REG);
1063 buffstatus |= ATL_BUFFER;
1064 isp1760_writel(buffstatus, usb_hcd->regs +
1065 HC_BUFFER_STATUS_REG);
1066 continue;
1067 }
1068
1069 error = check_error(&ptd);
1070 if (error) {
1071 status = error;
1072 priv->atl_ints[queue_entry].qh->toggle = 0;
1073 priv->atl_ints[queue_entry].qh->ping = 0;
1074 urb->status = -EPIPE;
1075
1076#if 0
1077 printk(KERN_ERR "Error in %s().\n", __func__);
1078 printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1079 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1080 "%08x dw7: %08x\n",
1081 ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1082 ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1083#endif
1084 } else {
1085 if (usb_pipetype(urb->pipe) == PIPE_BULK) {
1086 priv->atl_ints[queue_entry].qh->toggle = dw3 &
1087 (1 << 25);
1088 priv->atl_ints[queue_entry].qh->ping = dw3 &
1089 (1 << 26);
1090 }
1091 }
1092
1093 length = PTD_XFERRED_LENGTH(dw3);
1094 if (length) {
1095 switch (DW1_GET_PID(dw1)) {
1096 case IN_PID:
1097 priv_read_copy(priv,
1098 priv->atl_ints[queue_entry].data_buffer,
3f02a957 1099 usb_hcd->regs + payload + ISP_BANK(1),
db11e47d
SS		 1100 length);
1101
1102 case OUT_PID:
1103
1104 urb->actual_length += length;
1105
1106 case SETUP_PID:
1107 break;
1108 }
1109 }
1110
1111 priv->atl_ints[queue_entry].data_buffer = NULL;
1112 priv->atl_ints[queue_entry].urb = NULL;
1113 priv->atl_ints[queue_entry].qtd = NULL;
1114 priv->atl_ints[queue_entry].qh = NULL;
1115
1116 free_mem(priv, payload);
1117
1118 isp1760_writel(skip_map, usb_hcd->regs +
1119 HC_ATL_PTD_SKIPMAP_REG);
1120
1121 if (urb->status == -EPIPE) {
1122 /* HALT was received */
1123
1124 qtd = clean_up_qtdlist(qtd);
1125 isp1760_urb_done(priv, urb, urb->status);
1126
1127 } else if (usb_pipebulk(urb->pipe) && (length < qtd->length)) {
1128 /* short BULK received */
1129
db11e47d
SS		 1130 if (urb->transfer_flags & URB_SHORT_NOT_OK) {
1131 urb->status = -EREMOTEIO;
7839b516
SS		 1132 isp1760_dbg(priv, "short bulk, %d instead %zu "
1133 "with URB_SHORT_NOT_OK flag.\n",
1134 length, qtd->length);
db11e47d
SS		 1135 }
1136
1137 if (urb->status == -EINPROGRESS)
1138 urb->status = 0;
1139
1140 qtd = clean_up_qtdlist(qtd);
1141
1142 isp1760_urb_done(priv, urb, urb->status);
1143
1144 } else if (qtd->status & URB_COMPLETE_NOTIFY) {
1145 /* that was the last qtd of that URB */
1146
1147 if (urb->status == -EINPROGRESS)
1148 urb->status = 0;
1149
1150 qtd = clean_this_qtd(qtd);
1151 isp1760_urb_done(priv, urb, urb->status);
1152
1153 } else {
1154 /* next QTD of this URB */
1155
1156 qtd = clean_this_qtd(qtd);
1157 BUG_ON(!qtd);
1158 }
1159
1160 if (qtd)
1161 enqueue_an_ATL_packet(usb_hcd, qh, qtd);
1162
1163 skip_map = isp1760_readl(usb_hcd->regs +
1164 HC_ATL_PTD_SKIPMAP_REG);
1165 }
1166}
1167
1168static void do_intl_int(struct usb_hcd *usb_hcd)
1169{
1170 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
1171 u32 done_map, skip_map;
1172 struct ptd ptd;
1173 struct urb *urb = NULL;
1174 u32 int_regs;
1175 u32 int_regs_base;
1176 u32 payload;
1177 u32 length;
1178 u32 or_map;
1179 int error;
1180 u32 queue_entry;
1181 struct isp1760_qtd *qtd;
1182 struct isp1760_qh *qh;
1183
1184 done_map = isp1760_readl(usb_hcd->regs +
1185 HC_INT_PTD_DONEMAP_REG);
1186 skip_map = isp1760_readl(usb_hcd->regs +
1187 HC_INT_PTD_SKIPMAP_REG);
1188
1189 or_map = isp1760_readl(usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG);
1190 or_map &= ~done_map;
1191 isp1760_writel(or_map, usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG);
1192
1193 int_regs_base = INT_REGS_OFFSET;
1194
1195 while (done_map) {
1196 u32 dw1;
1197 u32 dw3;
1198
1199 queue_entry = __ffs(done_map);
1200 done_map &= ~(1 << queue_entry);
1201 skip_map |= 1 << queue_entry;
1202
1203 int_regs = int_regs_base + queue_entry * sizeof(struct ptd);
1204 urb = priv->int_ints[queue_entry].urb;
1205 qtd = priv->int_ints[queue_entry].qtd;
1206 qh = priv->int_ints[queue_entry].qh;
1207 payload = priv->int_ints[queue_entry].payload;
1208
1209 if (!qh) {
1210 printk(KERN_ERR "(INT) qh is 0\n");
1211 continue;
1212 }
1213
3f02a957
ES		 1214 isp1760_writel(int_regs + ISP_BANK(0), usb_hcd->regs +
1215 HC_MEMORY_REG);
1216 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1217 HC_MEMORY_REG);
1218 /*
1219 * write bank1 address twice to ensure the 90ns delay (time
1220 * between BANK0 write and the priv_read_copy() call is at
1221 * least 3*t_WHWL + 2*t_w11 = 3*25ns + 2*17ns = 92ns)
1222 */
1223 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1224 HC_MEMORY_REG);
1225
1226 priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + int_regs +
1227 ISP_BANK(0), sizeof(ptd));
db11e47d
SS		 1228 dw1 = le32_to_cpu(ptd.dw1);
1229 dw3 = le32_to_cpu(ptd.dw3);
1230 check_int_err_status(le32_to_cpu(ptd.dw4));
1231
1232 error = check_error(&ptd);
1233 if (error) {
1234#if 0
1235 printk(KERN_ERR "Error in %s().\n", __func__);
1236 printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1237 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1238 "%08x dw7: %08x\n",
1239 ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1240 ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1241#endif
1242 urb->status = -EPIPE;
1243 priv->int_ints[queue_entry].qh->toggle = 0;
1244 priv->int_ints[queue_entry].qh->ping = 0;
1245
1246 } else {
1247 priv->int_ints[queue_entry].qh->toggle =
1248 dw3 & (1 << 25);
1249 priv->int_ints[queue_entry].qh->ping = dw3 & (1 << 26);
1250 }
1251
1252 if (urb->dev->speed != USB_SPEED_HIGH)
1253 length = PTD_XFERRED_LENGTH_LO(dw3);
1254 else
1255 length = PTD_XFERRED_LENGTH(dw3);
1256
1257 if (length) {
1258 switch (DW1_GET_PID(dw1)) {
1259 case IN_PID:
1260 priv_read_copy(priv,
1261 priv->int_ints[queue_entry].data_buffer,
3f02a957 1262 usb_hcd->regs + payload + ISP_BANK(1),
db11e47d
SS		 1263 length);
1264 case OUT_PID:
1265
1266 urb->actual_length += length;
1267
1268 case SETUP_PID:
1269 break;
1270 }
1271 }
1272
1273 priv->int_ints[queue_entry].data_buffer = NULL;
1274 priv->int_ints[queue_entry].urb = NULL;
1275 priv->int_ints[queue_entry].qtd = NULL;
1276 priv->int_ints[queue_entry].qh = NULL;
1277
1278 isp1760_writel(skip_map, usb_hcd->regs +
1279 HC_INT_PTD_SKIPMAP_REG);
1280 free_mem(priv, payload);
1281
1282 if (urb->status == -EPIPE) {
1283 /* HALT received */
1284
1285 qtd = clean_up_qtdlist(qtd);
1286 isp1760_urb_done(priv, urb, urb->status);
1287
1288 } else if (qtd->status & URB_COMPLETE_NOTIFY) {
1289
1290 if (urb->status == -EINPROGRESS)
1291 urb->status = 0;
1292
1293 qtd = clean_this_qtd(qtd);
1294 isp1760_urb_done(priv, urb, urb->status);
1295
1296 } else {
1297 /* next QTD of this URB */
1298
1299 qtd = clean_this_qtd(qtd);
1300 BUG_ON(!qtd);
1301 }
1302
1303 if (qtd)
1304 enqueue_an_INT_packet(usb_hcd, qh, qtd);
1305
1306 skip_map = isp1760_readl(usb_hcd->regs +
1307 HC_INT_PTD_SKIPMAP_REG);
1308 }
1309}
1310
1311#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1312static struct isp1760_qh *qh_make(struct isp1760_hcd *priv, struct urb *urb,
1313 gfp_t flags)
1314{
1315 struct isp1760_qh *qh;
1316 int is_input, type;
1317
1318 qh = isp1760_qh_alloc(priv, flags);
1319 if (!qh)
1320 return qh;
1321
1322 /*
1323 * init endpoint/device data for this QH
1324 */
1325 is_input = usb_pipein(urb->pipe);
1326 type = usb_pipetype(urb->pipe);
1327
1328 if (type == PIPE_INTERRUPT) {
1329
1330 if (urb->dev->speed == USB_SPEED_HIGH) {
1331
1332 qh->period = urb->interval >> 3;
1333 if (qh->period == 0 && urb->interval != 1) {
1334 /* NOTE interval 2 or 4 uframes could work.
1335 * But interval 1 scheduling is simpler, and
1336 * includes high bandwidth.
1337 */
1338 printk(KERN_ERR "intr period %d uframes, NYET!",
1339 urb->interval);
1340 qh_destroy(qh);
1341 return NULL;
1342 }
1343 } else {
1344 qh->period = urb->interval;
1345 }
1346 }
1347
1348 /* support for tt scheduling, and access to toggles */
1349 qh->dev = urb->dev;
1350
1351 if (!usb_pipecontrol(urb->pipe))
1352 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input,
1353 1);
1354 return qh;
1355}
1356
1357/*
1358 * For control/bulk/interrupt, return QH with these TDs appended.
1359 * Allocates and initializes the QH if necessary.
1360 * Returns null if it can't allocate a QH it needs to.
1361 * If the QH has TDs (urbs) already, that's great.
1362 */
1363static struct isp1760_qh *qh_append_tds(struct isp1760_hcd *priv,
1364 struct urb *urb, struct list_head *qtd_list, int epnum,
1365 void **ptr)
1366{
1367 struct isp1760_qh *qh;
1368 struct isp1760_qtd *qtd;
1369 struct isp1760_qtd *prev_qtd;
1370
1371 qh = (struct isp1760_qh *)*ptr;
1372 if (!qh) {
1373 /* can't sleep here, we have priv->lock... */
1374 qh = qh_make(priv, urb, GFP_ATOMIC);
1375 if (!qh)
1376 return qh;
1377 *ptr = qh;
1378 }
1379
1380 qtd = list_entry(qtd_list->next, struct isp1760_qtd,
1381 qtd_list);
1382 if (!list_empty(&qh->qtd_list))
1383 prev_qtd = list_entry(qh->qtd_list.prev,
1384 struct isp1760_qtd, qtd_list);
1385 else
1386 prev_qtd = NULL;
1387
1388 list_splice(qtd_list, qh->qtd_list.prev);
1389 if (prev_qtd) {
1390 BUG_ON(prev_qtd->hw_next);
1391 prev_qtd->hw_next = qtd;
1392 }
1393
1394 urb->hcpriv = qh;
1395 return qh;
1396}
1397
1398static void qtd_list_free(struct isp1760_hcd *priv, struct urb *urb,
1399 struct list_head *qtd_list)
1400{
1401 struct list_head *entry, *temp;
1402
1403 list_for_each_safe(entry, temp, qtd_list) {
1404 struct isp1760_qtd *qtd;
1405
1406 qtd = list_entry(entry, struct isp1760_qtd, qtd_list);
1407 list_del(&qtd->qtd_list);
1408 isp1760_qtd_free(qtd);
1409 }
1410}
1411
1412static int isp1760_prepare_enqueue(struct isp1760_hcd *priv, struct urb *urb,
1413 struct list_head *qtd_list, gfp_t mem_flags, packet_enqueue *p)
1414{
1415 struct isp1760_qtd *qtd;
1416 int epnum;
1417 unsigned long flags;
1418 struct isp1760_qh *qh = NULL;
1419 int rc;
1420 int qh_busy;
1421
1422 qtd = list_entry(qtd_list->next, struct isp1760_qtd, qtd_list);
1423 epnum = urb->ep->desc.bEndpointAddress;
1424
1425 spin_lock_irqsave(&priv->lock, flags);
1426 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &priv_to_hcd(priv)->flags)) {
1427 rc = -ESHUTDOWN;
1428 goto done;
1429 }
1430 rc = usb_hcd_link_urb_to_ep(priv_to_hcd(priv), urb);
1431 if (rc)
1432 goto done;
1433
1434 qh = urb->ep->hcpriv;
1435 if (qh)
1436 qh_busy = !list_empty(&qh->qtd_list);
1437 else
1438 qh_busy = 0;
1439
1440 qh = qh_append_tds(priv, urb, qtd_list, epnum, &urb->ep->hcpriv);
1441 if (!qh) {
1442 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
1443 rc = -ENOMEM;
1444 goto done;
1445 }
1446
1447 if (!qh_busy)
1448 p(priv_to_hcd(priv), qh, qtd);
1449
1450done:
1451 spin_unlock_irqrestore(&priv->lock, flags);
1452 if (!qh)
1453 qtd_list_free(priv, urb, qtd_list);
1454 return rc;
1455}
1456
1457static struct isp1760_qtd *isp1760_qtd_alloc(struct isp1760_hcd *priv,
1458 gfp_t flags)
1459{
1460 struct isp1760_qtd *qtd;
1461
1462 qtd = kmem_cache_zalloc(qtd_cachep, flags);
1463 if (qtd)
1464 INIT_LIST_HEAD(&qtd->qtd_list);
1465
1466 return qtd;
1467}
1468
1469/*
1470 * create a list of filled qtds for this URB; won't link into qh.
1471 */
1472static struct list_head *qh_urb_transaction(struct isp1760_hcd *priv,
1473 struct urb *urb, struct list_head *head, gfp_t flags)
1474{
1475 struct isp1760_qtd *qtd, *qtd_prev;
1476 void *buf;
1477 int len, maxpacket;
1478 int is_input;
1479 u32 token;
1480
1481 /*
1482 * URBs map to sequences of QTDs: one logical transaction
1483 */
1484 qtd = isp1760_qtd_alloc(priv, flags);
1485 if (!qtd)
1486 return NULL;
1487
1488 list_add_tail(&qtd->qtd_list, head);
1489 qtd->urb = urb;
1490 urb->status = -EINPROGRESS;
1491
1492 token = 0;
1493 /* for split transactions, SplitXState initialized to zero */
1494
1495 len = urb->transfer_buffer_length;
1496 is_input = usb_pipein(urb->pipe);
1497 if (usb_pipecontrol(urb->pipe)) {
1498 /* SETUP pid */
1499 qtd_fill(qtd, urb->setup_packet,
1500 sizeof(struct usb_ctrlrequest),
1501 token | SETUP_PID);
1502
1503 /* ... and always at least one more pid */
1504 token ^= DATA_TOGGLE;
1505 qtd_prev = qtd;
1506 qtd = isp1760_qtd_alloc(priv, flags);
1507 if (!qtd)
1508 goto cleanup;
1509 qtd->urb = urb;
1510 qtd_prev->hw_next = qtd;
1511 list_add_tail(&qtd->qtd_list, head);
1512
1513 /* for zero length DATA stages, STATUS is always IN */
1514 if (len == 0)
1515 token |= IN_PID;
1516 }
1517
1518 /*
1519 * data transfer stage: buffer setup
1520 */
1521 buf = urb->transfer_buffer;
1522
1523 if (is_input)
1524 token |= IN_PID;
1525 else
1526 token |= OUT_PID;
1527
1528 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1529
1530 /*
1531 * buffer gets wrapped in one or more qtds;
1532 * last one may be "short" (including zero len)
1533 * and may serve as a control status ack
1534 */
1535 for (;;) {
1536 int this_qtd_len;
1537
1538 if (!buf && len) {
1539 /* XXX This looks like usb storage / SCSI bug */
1540 printk(KERN_ERR "buf is null, dma is %08lx len is %d\n",
1541 (long unsigned)urb->transfer_dma, len);
1542 WARN_ON(1);
1543 }
1544
1545 this_qtd_len = qtd_fill(qtd, buf, len, token);
1546 len -= this_qtd_len;
1547 buf += this_qtd_len;
1548
1549 /* qh makes control packets use qtd toggle; maybe switch it */
1550 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1551 token ^= DATA_TOGGLE;
1552
1553 if (len <= 0)
1554 break;
1555
1556 qtd_prev = qtd;
1557 qtd = isp1760_qtd_alloc(priv, flags);
1558 if (!qtd)
1559 goto cleanup;
1560 qtd->urb = urb;
1561 qtd_prev->hw_next = qtd;
1562 list_add_tail(&qtd->qtd_list, head);
1563 }
1564
1565 /*
1566 * control requests may need a terminating data "status" ack;
1567 * bulk ones may need a terminating short packet (zero length).
1568 */
1569 if (urb->transfer_buffer_length != 0) {
1570 int one_more = 0;
1571
1572 if (usb_pipecontrol(urb->pipe)) {
1573 one_more = 1;
1574 /* "in" <--> "out" */
1575 token ^= IN_PID;
1576 /* force DATA1 */
1577 token |= DATA_TOGGLE;
1578 } else if (usb_pipebulk(urb->pipe)
1579 && (urb->transfer_flags & URB_ZERO_PACKET)
1580 && !(urb->transfer_buffer_length % maxpacket)) {
1581 one_more = 1;
1582 }
1583 if (one_more) {
1584 qtd_prev = qtd;
1585 qtd = isp1760_qtd_alloc(priv, flags);
1586 if (!qtd)
1587 goto cleanup;
1588 qtd->urb = urb;
1589 qtd_prev->hw_next = qtd;
1590 list_add_tail(&qtd->qtd_list, head);
1591
1592 /* never any data in such packets */
1593 qtd_fill(qtd, NULL, 0, token);
1594 }
1595 }
1596
1597 qtd->status = URB_COMPLETE_NOTIFY;
1598 return head;
1599
1600cleanup:
1601 qtd_list_free(priv, urb, head);
1602 return NULL;
1603}
1604
1605static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
1606 gfp_t mem_flags)
1607{
1608 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1609 struct list_head qtd_list;
1610 packet_enqueue *pe;
1611
1612 INIT_LIST_HEAD(&qtd_list);
1613
1614 switch (usb_pipetype(urb->pipe)) {
1615 case PIPE_CONTROL:
1616 case PIPE_BULK:
1617
1618 if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
1619 return -ENOMEM;
1620 pe = enqueue_an_ATL_packet;
1621 break;
1622
1623 case PIPE_INTERRUPT:
1624 if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
1625 return -ENOMEM;
1626 pe = enqueue_an_INT_packet;
1627 break;
1628
1629 case PIPE_ISOCHRONOUS:
1630 printk(KERN_ERR "PIPE_ISOCHRONOUS ain't supported\n");
1631 default:
1632 return -EPIPE;
1633 }
1634
a36c27df 1635 return isp1760_prepare_enqueue(priv, urb, &qtd_list, mem_flags, pe);
db11e47d
SS		 1636}
1637
1638static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1639 int status)
1640{
1641 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1642 struct inter_packet_info *ints;
1643 u32 i;
1644 u32 reg_base, or_reg, skip_reg;
d249afdd 1645 unsigned long flags;
db11e47d
SS		 1646 struct ptd ptd;
1647
1648 switch (usb_pipetype(urb->pipe)) {
1649 case PIPE_ISOCHRONOUS:
1650 return -EPIPE;
1651 break;
1652
1653 case PIPE_INTERRUPT:
1654 ints = priv->int_ints;
1655 reg_base = INT_REGS_OFFSET;
1656 or_reg = HC_INT_IRQ_MASK_OR_REG;
1657 skip_reg = HC_INT_PTD_SKIPMAP_REG;
1658 break;
1659
1660 default:
1661 ints = priv->atl_ints;
1662 reg_base = ATL_REGS_OFFSET;
1663 or_reg = HC_ATL_IRQ_MASK_OR_REG;
1664 skip_reg = HC_ATL_PTD_SKIPMAP_REG;
1665 break;
1666 }
1667
1668 memset(&ptd, 0, sizeof(ptd));
1669 spin_lock_irqsave(&priv->lock, flags);
1670
1671 for (i = 0; i < 32; i++) {
1672 if (ints->urb == urb) {
1673 u32 skip_map;
1674 u32 or_map;
1675 struct isp1760_qtd *qtd;
1676
1677 skip_map = isp1760_readl(hcd->regs + skip_reg);
1678 skip_map |= 1 << i;
1679 isp1760_writel(skip_map, hcd->regs + skip_reg);
1680
1681 or_map = isp1760_readl(hcd->regs + or_reg);
1682 or_map &= ~(1 << i);
1683 isp1760_writel(or_map, hcd->regs + or_reg);
1684
1685 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + reg_base
1686 + i * sizeof(ptd), sizeof(ptd));
1687 qtd = ints->qtd;
1688
1689 clean_up_qtdlist(qtd);
1690
1691 free_mem(priv, ints->payload);
1692
1693 ints->urb = NULL;
1694 ints->qh = NULL;
1695 ints->qtd = NULL;
1696 ints->data_buffer = NULL;
1697 ints->payload = 0;
1698
1699 isp1760_urb_done(priv, urb, status);
1700 break;
1701 }
1702 ints++;
1703 }
1704
1705 spin_unlock_irqrestore(&priv->lock, flags);
1706 return 0;
1707}
1708
1709static irqreturn_t isp1760_irq(struct usb_hcd *usb_hcd)
1710{
1711 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
1712 u32 imask;
1713 irqreturn_t irqret = IRQ_NONE;
1714
1715 spin_lock(&priv->lock);
1716
1717 if (!(usb_hcd->state & HC_STATE_RUNNING))
1718 goto leave;
1719
1720 imask = isp1760_readl(usb_hcd->regs + HC_INTERRUPT_REG);
1721 if (unlikely(!imask))
1722 goto leave;
1723
1724 isp1760_writel(imask, usb_hcd->regs + HC_INTERRUPT_REG);
1725 if (imask & HC_ATL_INT)
1726 do_atl_int(usb_hcd);
1727
1728 if (imask & HC_INTL_INT)
1729 do_intl_int(usb_hcd);
1730
1731 irqret = IRQ_HANDLED;
1732leave:
1733 spin_unlock(&priv->lock);
1734 return irqret;
1735}
1736
1737static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
1738{
1739 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1740 u32 temp, status = 0;
1741 u32 mask;
1742 int retval = 1;
1743 unsigned long flags;
1744
1745 /* if !USB_SUSPEND, root hub timers won't get shut down ... */
1746 if (!HC_IS_RUNNING(hcd->state))
1747 return 0;
1748
1749 /* init status to no-changes */
1750 buf[0] = 0;
1751 mask = PORT_CSC;
1752
1753 spin_lock_irqsave(&priv->lock, flags);
1754 temp = isp1760_readl(hcd->regs + HC_PORTSC1);
1755
1756 if (temp & PORT_OWNER) {
1757 if (temp & PORT_CSC) {
1758 temp &= ~PORT_CSC;
1759 isp1760_writel(temp, hcd->regs + HC_PORTSC1);
1760 goto done;
1761 }
1762 }
1763
1764 /*
1765 * Return status information even for ports with OWNER set.
1766 * Otherwise khubd wouldn't see the disconnect event when a
1767 * high-speed device is switched over to the companion
1768 * controller by the user.
1769 */
1770
1771 if ((temp & mask) != 0
1772 || ((temp & PORT_RESUME) != 0
1773 && time_after_eq(jiffies,
1774 priv->reset_done))) {
1775 buf [0] |= 1 << (0 + 1);
1776 status = STS_PCD;
1777 }
1778 /* FIXME autosuspend idle root hubs */
1779done:
1780 spin_unlock_irqrestore(&priv->lock, flags);
1781 return status ? retval : 0;
1782}
1783
1784static void isp1760_hub_descriptor(struct isp1760_hcd *priv,
1785 struct usb_hub_descriptor *desc)
1786{
1787 int ports = HCS_N_PORTS(priv->hcs_params);
1788 u16 temp;
1789
1790 desc->bDescriptorType = 0x29;
1791 /* priv 1.0, 2.3.9 says 20ms max */
1792 desc->bPwrOn2PwrGood = 10;
1793 desc->bHubContrCurrent = 0;
1794
1795 desc->bNbrPorts = ports;
1796 temp = 1 + (ports / 8);
1797 desc->bDescLength = 7 + 2 * temp;
1798
1799 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1800 memset(&desc->bitmap[0], 0, temp);
1801 memset(&desc->bitmap[temp], 0xff, temp);
1802
1803 /* per-port overcurrent reporting */
1804 temp = 0x0008;
1805 if (HCS_PPC(priv->hcs_params))
1806 /* per-port power control */
1807 temp |= 0x0001;
1808 else
1809 /* no power switching */
1810 temp |= 0x0002;
1811 desc->wHubCharacteristics = cpu_to_le16(temp);
1812}
1813
1814#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
1815
1816static int check_reset_complete(struct isp1760_hcd *priv, int index,
1817 u32 __iomem *status_reg, int port_status)
1818{
1819 if (!(port_status & PORT_CONNECT))
1820 return port_status;
1821
1822 /* if reset finished and it's still not enabled -- handoff */
1823 if (!(port_status & PORT_PE)) {
1824
1825 printk(KERN_ERR "port %d full speed --> companion\n",
1826 index + 1);
1827
1828 port_status |= PORT_OWNER;
1829 port_status &= ~PORT_RWC_BITS;
1830 isp1760_writel(port_status, status_reg);
1831
1832 } else
1833 printk(KERN_ERR "port %d high speed\n", index + 1);
1834
1835 return port_status;
1836}
1837
1838static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1839 u16 wValue, u16 wIndex, char *buf, u16 wLength)
1840{
1841 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1842 int ports = HCS_N_PORTS(priv->hcs_params);
1843 u32 __iomem *status_reg = hcd->regs + HC_PORTSC1;
1844 u32 temp, status;
1845 unsigned long flags;
1846 int retval = 0;
1847 unsigned selector;
1848
1849 /*
1850 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1851 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1852 * (track current state ourselves) ... blink for diagnostics,
1853 * power, "this is the one", etc. EHCI spec supports this.
1854 */
1855
1856 spin_lock_irqsave(&priv->lock, flags);
1857 switch (typeReq) {
1858 case ClearHubFeature:
1859 switch (wValue) {
1860 case C_HUB_LOCAL_POWER:
1861 case C_HUB_OVER_CURRENT:
1862 /* no hub-wide feature/status flags */
1863 break;
1864 default:
1865 goto error;
1866 }
1867 break;
1868 case ClearPortFeature:
1869 if (!wIndex || wIndex > ports)
1870 goto error;
1871 wIndex--;
1872 temp = isp1760_readl(status_reg);
1873
1874 /*
1875 * Even if OWNER is set, so the port is owned by the
1876 * companion controller, khubd needs to be able to clear
1877 * the port-change status bits (especially
1878 * USB_PORT_FEAT_C_CONNECTION).
1879 */
1880
1881 switch (wValue) {
1882 case USB_PORT_FEAT_ENABLE:
1883 isp1760_writel(temp & ~PORT_PE, status_reg);
1884 break;
1885 case USB_PORT_FEAT_C_ENABLE:
1886 /* XXX error? */
1887 break;
1888 case USB_PORT_FEAT_SUSPEND:
1889 if (temp & PORT_RESET)
1890 goto error;
1891
1892 if (temp & PORT_SUSPEND) {
1893 if ((temp & PORT_PE) == 0)
1894 goto error;
1895 /* resume signaling for 20 msec */
1896 temp &= ~(PORT_RWC_BITS);
1897 isp1760_writel(temp | PORT_RESUME,
1898 status_reg);
1899 priv->reset_done = jiffies +
1900 msecs_to_jiffies(20);
1901 }
1902 break;
1903 case USB_PORT_FEAT_C_SUSPEND:
1904 /* we auto-clear this feature */
1905 break;
1906 case USB_PORT_FEAT_POWER:
1907 if (HCS_PPC(priv->hcs_params))
1908 isp1760_writel(temp & ~PORT_POWER, status_reg);
1909 break;
1910 case USB_PORT_FEAT_C_CONNECTION:
1911 isp1760_writel(temp | PORT_CSC,
1912 status_reg);
1913 break;
1914 case USB_PORT_FEAT_C_OVER_CURRENT:
1915 /* XXX error ?*/
1916 break;
1917 case USB_PORT_FEAT_C_RESET:
1918 /* GetPortStatus clears reset */
1919 break;
1920 default:
1921 goto error;
1922 }
1923 isp1760_readl(hcd->regs + HC_USBCMD);
1924 break;
1925 case GetHubDescriptor:
1926 isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *)
1927 buf);
1928 break;
1929 case GetHubStatus:
1930 /* no hub-wide feature/status flags */
1931 memset(buf, 0, 4);
1932 break;
1933 case GetPortStatus:
1934 if (!wIndex || wIndex > ports)
1935 goto error;
1936 wIndex--;
1937 status = 0;
1938 temp = isp1760_readl(status_reg);
1939
1940 /* wPortChange bits */
1941 if (temp & PORT_CSC)
1942 status |= 1 << USB_PORT_FEAT_C_CONNECTION;
1943
1944
1945 /* whoever resumes must GetPortStatus to complete it!! */
1946 if (temp & PORT_RESUME) {
1947 printk(KERN_ERR "Port resume should be skipped.\n");
1948
1949 /* Remote Wakeup received? */
1950 if (!priv->reset_done) {
1951 /* resume signaling for 20 msec */
1952 priv->reset_done = jiffies
1953 + msecs_to_jiffies(20);
1954 /* check the port again */
1955 mod_timer(&priv_to_hcd(priv)->rh_timer,
1956 priv->reset_done);
1957 }
1958
1959 /* resume completed? */
1960 else if (time_after_eq(jiffies,
1961 priv->reset_done)) {
1962 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
1963 priv->reset_done = 0;
1964
1965 /* stop resume signaling */
1966 temp = isp1760_readl(status_reg);
1967 isp1760_writel(
1968 temp & ~(PORT_RWC_BITS | PORT_RESUME),
1969 status_reg);
1970 retval = handshake(priv, status_reg,
1971 PORT_RESUME, 0, 2000 /* 2msec */);
1972 if (retval != 0) {
1973 isp1760_err(priv,
1974 "port %d resume error %d\n",
1975 wIndex + 1, retval);
1976 goto error;
1977 }
1978 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
1979 }
1980 }
1981
1982 /* whoever resets must GetPortStatus to complete it!! */
1983 if ((temp & PORT_RESET)
1984 && time_after_eq(jiffies,
1985 priv->reset_done)) {
1986 status |= 1 << USB_PORT_FEAT_C_RESET;
1987 priv->reset_done = 0;
1988
1989 /* force reset to complete */
1990 isp1760_writel(temp & ~PORT_RESET,
1991 status_reg);
1992 /* REVISIT: some hardware needs 550+ usec to clear
1993 * this bit; seems too long to spin routinely...
1994 */
1995 retval = handshake(priv, status_reg,
1996 PORT_RESET, 0, 750);
1997 if (retval != 0) {
1998 isp1760_err(priv, "port %d reset error %d\n",
1999 wIndex + 1, retval);
2000 goto error;
2001 }
2002
2003 /* see what we found out */
2004 temp = check_reset_complete(priv, wIndex, status_reg,
2005 isp1760_readl(status_reg));
2006 }
2007 /*
2008 * Even if OWNER is set, there's no harm letting khubd
2009 * see the wPortStatus values (they should all be 0 except
2010 * for PORT_POWER anyway).
2011 */
2012
2013 if (temp & PORT_OWNER)
2014 printk(KERN_ERR "Warning: PORT_OWNER is set\n");
2015
2016 if (temp & PORT_CONNECT) {
2017 status |= 1 << USB_PORT_FEAT_CONNECTION;
2018 /* status may be from integrated TT */
2019 status |= ehci_port_speed(priv, temp);
2020 }
2021 if (temp & PORT_PE)
2022 status |= 1 << USB_PORT_FEAT_ENABLE;
2023 if (temp & (PORT_SUSPEND|PORT_RESUME))
2024 status |= 1 << USB_PORT_FEAT_SUSPEND;
2025 if (temp & PORT_RESET)
2026 status |= 1 << USB_PORT_FEAT_RESET;
2027 if (temp & PORT_POWER)
2028 status |= 1 << USB_PORT_FEAT_POWER;
2029
2030 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
2031 break;
2032 case SetHubFeature:
2033 switch (wValue) {
2034 case C_HUB_LOCAL_POWER:
2035 case C_HUB_OVER_CURRENT:
2036 /* no hub-wide feature/status flags */
2037 break;
2038 default:
2039 goto error;
2040 }
2041 break;
2042 case SetPortFeature:
2043 selector = wIndex >> 8;
2044 wIndex &= 0xff;
2045 if (!wIndex || wIndex > ports)
2046 goto error;
2047 wIndex--;
2048 temp = isp1760_readl(status_reg);
2049 if (temp & PORT_OWNER)
2050 break;
2051
2052/* temp &= ~PORT_RWC_BITS; */
2053 switch (wValue) {
2054 case USB_PORT_FEAT_ENABLE:
2055 isp1760_writel(temp | PORT_PE, status_reg);
2056 break;
2057
2058 case USB_PORT_FEAT_SUSPEND:
2059 if ((temp & PORT_PE) == 0
2060 || (temp & PORT_RESET) != 0)
2061 goto error;
2062
2063 isp1760_writel(temp | PORT_SUSPEND, status_reg);
2064 break;
2065 case USB_PORT_FEAT_POWER:
2066 if (HCS_PPC(priv->hcs_params))
2067 isp1760_writel(temp | PORT_POWER,
2068 status_reg);
2069 break;
2070 case USB_PORT_FEAT_RESET:
2071 if (temp & PORT_RESUME)
2072 goto error;
2073 /* line status bits may report this as low speed,
2074 * which can be fine if this root hub has a
2075 * transaction translator built in.
2076 */
2077 if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
2078 && PORT_USB11(temp)) {
2079 temp |= PORT_OWNER;
2080 } else {
2081 temp |= PORT_RESET;
2082 temp &= ~PORT_PE;
2083
2084 /*
2085 * caller must wait, then call GetPortStatus
2086 * usb 2.0 spec says 50 ms resets on root
2087 */
2088 priv->reset_done = jiffies +
2089 msecs_to_jiffies(50);
2090 }
2091 isp1760_writel(temp, status_reg);
2092 break;
2093 default:
2094 goto error;
2095 }
2096 isp1760_readl(hcd->regs + HC_USBCMD);
2097 break;
2098
2099 default:
2100error:
2101 /* "stall" on error */
2102 retval = -EPIPE;
2103 }
2104 spin_unlock_irqrestore(&priv->lock, flags);
2105 return retval;
2106}
2107
2108static void isp1760_endpoint_disable(struct usb_hcd *usb_hcd,
2109 struct usb_host_endpoint *ep)
2110{
2111 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
2112 struct isp1760_qh *qh;
2113 struct isp1760_qtd *qtd;
d249afdd 2114 unsigned long flags;
db11e47d
SS		 2115
2116 spin_lock_irqsave(&priv->lock, flags);
2117 qh = ep->hcpriv;
2118 if (!qh)
2119 goto out;
2120
2121 ep->hcpriv = NULL;
2122 do {
2123 /* more than entry might get removed */
2124 if (list_empty(&qh->qtd_list))
2125 break;
2126
2127 qtd = list_first_entry(&qh->qtd_list, struct isp1760_qtd,
2128 qtd_list);
2129
2130 if (qtd->status & URB_ENQUEUED) {
2131
2132 spin_unlock_irqrestore(&priv->lock, flags);
2133 isp1760_urb_dequeue(usb_hcd, qtd->urb, -ECONNRESET);
2134 spin_lock_irqsave(&priv->lock, flags);
2135 } else {
2136 struct urb *urb;
2137
2138 urb = qtd->urb;
2139 clean_up_qtdlist(qtd);
2140 isp1760_urb_done(priv, urb, -ECONNRESET);
2141 }
2142 } while (1);
2143
2144 qh_destroy(qh);
2145 /* remove requests and leak them.
2146 * ATL are pretty fast done, INT could take a while...
2147 * The latter shoule be removed
2148 */
2149out:
2150 spin_unlock_irqrestore(&priv->lock, flags);
2151}
2152
2153static int isp1760_get_frame(struct usb_hcd *hcd)
2154{
2155 struct isp1760_hcd *priv = hcd_to_priv(hcd);
2156 u32 fr;
2157
2158 fr = isp1760_readl(hcd->regs + HC_FRINDEX);
2159 return (fr >> 3) % priv->periodic_size;
2160}
2161
2162static void isp1760_stop(struct usb_hcd *hcd)
2163{
2164 struct isp1760_hcd *priv = hcd_to_priv(hcd);
3faefc88 2165 u32 temp;
db11e47d
SS		 2166
2167 isp1760_hub_control(hcd, ClearPortFeature, USB_PORT_FEAT_POWER, 1,
2168 NULL, 0);
2169 mdelay(20);
2170
2171 spin_lock_irq(&priv->lock);
2172 ehci_reset(priv);
2173 /* Disable IRQ */
3faefc88
NC		 2174 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
2175 isp1760_writel(temp &= ~HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
db11e47d
SS		 2176 spin_unlock_irq(&priv->lock);
2177
2178 isp1760_writel(0, hcd->regs + HC_CONFIGFLAG);
2179}
2180
2181static void isp1760_shutdown(struct usb_hcd *hcd)
2182{
3faefc88 2183 u32 command, temp;
db11e47d
SS		 2184
2185 isp1760_stop(hcd);
3faefc88
NC		 2186 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
2187 isp1760_writel(temp &= ~HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
db11e47d
SS		 2188
2189 command = isp1760_readl(hcd->regs + HC_USBCMD);
2190 command &= ~CMD_RUN;
2191 isp1760_writel(command, hcd->regs + HC_USBCMD);
2192}
2193
2194static const struct hc_driver isp1760_hc_driver = {
2195 .description = "isp1760-hcd",
2196 .product_desc = "NXP ISP1760 USB Host Controller",
2197 .hcd_priv_size = sizeof(struct isp1760_hcd),
2198 .irq = isp1760_irq,
2199 .flags = HCD_MEMORY | HCD_USB2,
2200 .reset = isp1760_hc_setup,
2201 .start = isp1760_run,
2202 .stop = isp1760_stop,
2203 .shutdown = isp1760_shutdown,
2204 .urb_enqueue = isp1760_urb_enqueue,
2205 .urb_dequeue = isp1760_urb_dequeue,
2206 .endpoint_disable = isp1760_endpoint_disable,
2207 .get_frame_number = isp1760_get_frame,
2208 .hub_status_data = isp1760_hub_status_data,
2209 .hub_control = isp1760_hub_control,
2210};
2211
2212int __init init_kmem_once(void)
2213{
2214 qtd_cachep = kmem_cache_create("isp1760_qtd",
2215 sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY |
2216 SLAB_MEM_SPREAD, NULL);
2217
2218 if (!qtd_cachep)
2219 return -ENOMEM;
2220
2221 qh_cachep = kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh),
2222 0, SLAB_TEMPORARY | SLAB_MEM_SPREAD, NULL);
2223
2224 if (!qh_cachep) {
2225 kmem_cache_destroy(qtd_cachep);
2226 return -ENOMEM;
2227 }
2228
2229 return 0;
2230}
2231
2232void deinit_kmem_cache(void)
2233{
2234 kmem_cache_destroy(qtd_cachep);
2235 kmem_cache_destroy(qh_cachep);
2236}
2237
2238struct usb_hcd *isp1760_register(u64 res_start, u64 res_len, int irq,
3faefc88
NC		 2239 u64 irqflags, struct device *dev, const char *busname,
2240 unsigned int devflags)
db11e47d
SS		 2241{
2242 struct usb_hcd *hcd;
2243 struct isp1760_hcd *priv;
2244 int ret;
2245
2246 if (usb_disabled())
2247 return ERR_PTR(-ENODEV);
2248
2249 /* prevent usb-core allocating DMA pages */
2250 dev->dma_mask = NULL;
2251
0031a06e 2252 hcd = usb_create_hcd(&isp1760_hc_driver, dev, dev_name(dev));
db11e47d
SS		 2253 if (!hcd)
2254 return ERR_PTR(-ENOMEM);
2255
2256 priv = hcd_to_priv(hcd);
3faefc88 2257 priv->devflags = devflags;
db11e47d
SS		 2258 init_memory(priv);
2259 hcd->regs = ioremap(res_start, res_len);
2260 if (!hcd->regs) {
2261 ret = -EIO;
2262 goto err_put;
2263 }
2264
db11e47d
SS		 2265 hcd->irq = irq;
2266 hcd->rsrc_start = res_start;
2267 hcd->rsrc_len = res_len;
2268
e6942d63
NC		 2269 ret = usb_add_hcd(hcd, irq, irqflags);
2270 if (ret)
2271 goto err_unmap;
2272
db11e47d
SS		 2273 return hcd;
2274
2275err_unmap:
2276 iounmap(hcd->regs);
2277
2278err_put:
2279 usb_put_hcd(hcd);
2280
2281 return ERR_PTR(ret);
2282}
2283
2284MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
2285MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
2286MODULE_LICENSE("GPL v2");
kernel source for telekom puls (alcatel/mediatek)