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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2000-2004 by David Brownell | |
53bd6a60 | 3 | * |
1da177e4 LT |
4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but | |
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 | * for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software Foundation, | |
16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
1da177e4 LT |
19 | #include <linux/module.h> |
20 | #include <linux/pci.h> | |
21 | #include <linux/dmapool.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/ioport.h> | |
25 | #include <linux/sched.h> | |
26 | #include <linux/slab.h> | |
1da177e4 LT |
27 | #include <linux/errno.h> |
28 | #include <linux/init.h> | |
29 | #include <linux/timer.h> | |
30 | #include <linux/list.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/reboot.h> | |
33 | #include <linux/usb.h> | |
34 | #include <linux/moduleparam.h> | |
35 | #include <linux/dma-mapping.h> | |
694cc208 | 36 | #include <linux/debugfs.h> |
1da177e4 LT |
37 | |
38 | #include "../core/hcd.h" | |
39 | ||
40 | #include <asm/byteorder.h> | |
41 | #include <asm/io.h> | |
42 | #include <asm/irq.h> | |
43 | #include <asm/system.h> | |
44 | #include <asm/unaligned.h> | |
1da177e4 LT |
45 | |
46 | /*-------------------------------------------------------------------------*/ | |
47 | ||
48 | /* | |
49 | * EHCI hc_driver implementation ... experimental, incomplete. | |
50 | * Based on the final 1.0 register interface specification. | |
51 | * | |
52 | * USB 2.0 shows up in upcoming www.pcmcia.org technology. | |
53 | * First was PCMCIA, like ISA; then CardBus, which is PCI. | |
54 | * Next comes "CardBay", using USB 2.0 signals. | |
55 | * | |
56 | * Contains additional contributions by Brad Hards, Rory Bolt, and others. | |
57 | * Special thanks to Intel and VIA for providing host controllers to | |
58 | * test this driver on, and Cypress (including In-System Design) for | |
59 | * providing early devices for those host controllers to talk to! | |
60 | * | |
61 | * HISTORY: | |
62 | * | |
63 | * 2004-05-10 Root hub and PCI suspend/resume support; remote wakeup. (db) | |
64 | * 2004-02-24 Replace pci_* with generic dma_* API calls (dsaxena@plexity.net) | |
65 | * 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka, | |
66 | * <sojkam@centrum.cz>, updates by DB). | |
67 | * | |
68 | * 2002-11-29 Correct handling for hw async_next register. | |
69 | * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared; | |
70 | * only scheduling is different, no arbitrary limitations. | |
71 | * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support, | |
53bd6a60 | 72 | * clean up HC run state handshaking. |
1da177e4 LT |
73 | * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts |
74 | * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other | |
75 | * missing pieces: enabling 64bit dma, handoff from BIOS/SMM. | |
76 | * 2002-05-07 Some error path cleanups to report better errors; wmb(); | |
77 | * use non-CVS version id; better iso bandwidth claim. | |
78 | * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on | |
79 | * errors in submit path. Bugfixes to interrupt scheduling/processing. | |
80 | * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift | |
81 | * more checking to generic hcd framework (db). Make it work with | |
82 | * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt). | |
83 | * 2002-01-14 Minor cleanup; version synch. | |
84 | * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers. | |
85 | * 2002-01-04 Control/Bulk queuing behaves. | |
86 | * | |
87 | * 2001-12-12 Initial patch version for Linux 2.5.1 kernel. | |
88 | * 2001-June Works with usb-storage and NEC EHCI on 2.4 | |
89 | */ | |
90 | ||
91 | #define DRIVER_VERSION "10 Dec 2004" | |
92 | #define DRIVER_AUTHOR "David Brownell" | |
93 | #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver" | |
94 | ||
95 | static const char hcd_name [] = "ehci_hcd"; | |
96 | ||
97 | ||
98 | #undef EHCI_VERBOSE_DEBUG | |
99 | #undef EHCI_URB_TRACE | |
100 | ||
101 | #ifdef DEBUG | |
102 | #define EHCI_STATS | |
103 | #endif | |
104 | ||
105 | /* magic numbers that can affect system performance */ | |
106 | #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */ | |
107 | #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */ | |
108 | #define EHCI_TUNE_RL_TT 0 | |
109 | #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */ | |
110 | #define EHCI_TUNE_MULT_TT 1 | |
111 | #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */ | |
112 | ||
64f89798 | 113 | #define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */ |
1da177e4 LT |
114 | #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */ |
115 | #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */ | |
116 | #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */ | |
117 | ||
118 | /* Initial IRQ latency: faster than hw default */ | |
119 | static int log2_irq_thresh = 0; // 0 to 6 | |
120 | module_param (log2_irq_thresh, int, S_IRUGO); | |
121 | MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes"); | |
122 | ||
123 | /* initial park setting: slower than hw default */ | |
124 | static unsigned park = 0; | |
125 | module_param (park, uint, S_IRUGO); | |
126 | MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets"); | |
127 | ||
93f1a47c DB |
128 | /* for flakey hardware, ignore overcurrent indicators */ |
129 | static int ignore_oc = 0; | |
130 | module_param (ignore_oc, bool, S_IRUGO); | |
131 | MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications"); | |
132 | ||
1da177e4 LT |
133 | #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) |
134 | ||
135 | /*-------------------------------------------------------------------------*/ | |
136 | ||
137 | #include "ehci.h" | |
138 | #include "ehci-dbg.c" | |
139 | ||
140 | /*-------------------------------------------------------------------------*/ | |
141 | ||
142 | /* | |
143 | * handshake - spin reading hc until handshake completes or fails | |
144 | * @ptr: address of hc register to be read | |
145 | * @mask: bits to look at in result of read | |
146 | * @done: value of those bits when handshake succeeds | |
147 | * @usec: timeout in microseconds | |
148 | * | |
149 | * Returns negative errno, or zero on success | |
150 | * | |
151 | * Success happens when the "mask" bits have the specified value (hardware | |
152 | * handshake done). There are two failure modes: "usec" have passed (major | |
153 | * hardware flakeout), or the register reads as all-ones (hardware removed). | |
154 | * | |
155 | * That last failure should_only happen in cases like physical cardbus eject | |
156 | * before driver shutdown. But it also seems to be caused by bugs in cardbus | |
157 | * bridge shutdown: shutting down the bridge before the devices using it. | |
158 | */ | |
083522d7 BH |
159 | static int handshake (struct ehci_hcd *ehci, void __iomem *ptr, |
160 | u32 mask, u32 done, int usec) | |
1da177e4 LT |
161 | { |
162 | u32 result; | |
163 | ||
164 | do { | |
083522d7 | 165 | result = ehci_readl(ehci, ptr); |
1da177e4 LT |
166 | if (result == ~(u32)0) /* card removed */ |
167 | return -ENODEV; | |
168 | result &= mask; | |
169 | if (result == done) | |
170 | return 0; | |
171 | udelay (1); | |
172 | usec--; | |
173 | } while (usec > 0); | |
174 | return -ETIMEDOUT; | |
175 | } | |
176 | ||
177 | /* force HC to halt state from unknown (EHCI spec section 2.3) */ | |
178 | static int ehci_halt (struct ehci_hcd *ehci) | |
179 | { | |
083522d7 | 180 | u32 temp = ehci_readl(ehci, &ehci->regs->status); |
1da177e4 | 181 | |
72f30b6f | 182 | /* disable any irqs left enabled by previous code */ |
083522d7 | 183 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
72f30b6f | 184 | |
1da177e4 LT |
185 | if ((temp & STS_HALT) != 0) |
186 | return 0; | |
187 | ||
083522d7 | 188 | temp = ehci_readl(ehci, &ehci->regs->command); |
1da177e4 | 189 | temp &= ~CMD_RUN; |
083522d7 BH |
190 | ehci_writel(ehci, temp, &ehci->regs->command); |
191 | return handshake (ehci, &ehci->regs->status, | |
192 | STS_HALT, STS_HALT, 16 * 125); | |
1da177e4 LT |
193 | } |
194 | ||
195 | /* put TDI/ARC silicon into EHCI mode */ | |
196 | static void tdi_reset (struct ehci_hcd *ehci) | |
197 | { | |
198 | u32 __iomem *reg_ptr; | |
199 | u32 tmp; | |
200 | ||
d23a1377 | 201 | reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE); |
083522d7 | 202 | tmp = ehci_readl(ehci, reg_ptr); |
d23a1377 VB |
203 | tmp |= USBMODE_CM_HC; |
204 | /* The default byte access to MMR space is LE after | |
205 | * controller reset. Set the required endian mode | |
206 | * for transfer buffers to match the host microprocessor | |
207 | */ | |
208 | if (ehci_big_endian_mmio(ehci)) | |
209 | tmp |= USBMODE_BE; | |
083522d7 | 210 | ehci_writel(ehci, tmp, reg_ptr); |
1da177e4 LT |
211 | } |
212 | ||
213 | /* reset a non-running (STS_HALT == 1) controller */ | |
214 | static int ehci_reset (struct ehci_hcd *ehci) | |
215 | { | |
216 | int retval; | |
083522d7 | 217 | u32 command = ehci_readl(ehci, &ehci->regs->command); |
1da177e4 LT |
218 | |
219 | command |= CMD_RESET; | |
220 | dbg_cmd (ehci, "reset", command); | |
083522d7 | 221 | ehci_writel(ehci, command, &ehci->regs->command); |
1da177e4 LT |
222 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; |
223 | ehci->next_statechange = jiffies; | |
083522d7 BH |
224 | retval = handshake (ehci, &ehci->regs->command, |
225 | CMD_RESET, 0, 250 * 1000); | |
1da177e4 LT |
226 | |
227 | if (retval) | |
228 | return retval; | |
229 | ||
230 | if (ehci_is_TDI(ehci)) | |
231 | tdi_reset (ehci); | |
232 | ||
233 | return retval; | |
234 | } | |
235 | ||
236 | /* idle the controller (from running) */ | |
237 | static void ehci_quiesce (struct ehci_hcd *ehci) | |
238 | { | |
239 | u32 temp; | |
240 | ||
241 | #ifdef DEBUG | |
242 | if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) | |
243 | BUG (); | |
244 | #endif | |
245 | ||
246 | /* wait for any schedule enables/disables to take effect */ | |
083522d7 | 247 | temp = ehci_readl(ehci, &ehci->regs->command) << 10; |
1da177e4 | 248 | temp &= STS_ASS | STS_PSS; |
083522d7 | 249 | if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS, |
1da177e4 LT |
250 | temp, 16 * 125) != 0) { |
251 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; | |
252 | return; | |
253 | } | |
254 | ||
255 | /* then disable anything that's still active */ | |
083522d7 | 256 | temp = ehci_readl(ehci, &ehci->regs->command); |
1da177e4 | 257 | temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE); |
083522d7 | 258 | ehci_writel(ehci, temp, &ehci->regs->command); |
1da177e4 LT |
259 | |
260 | /* hardware can take 16 microframes to turn off ... */ | |
083522d7 | 261 | if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS, |
1da177e4 LT |
262 | 0, 16 * 125) != 0) { |
263 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; | |
264 | return; | |
265 | } | |
266 | } | |
267 | ||
268 | /*-------------------------------------------------------------------------*/ | |
269 | ||
7d12e780 | 270 | static void ehci_work(struct ehci_hcd *ehci); |
1da177e4 LT |
271 | |
272 | #include "ehci-hub.c" | |
273 | #include "ehci-mem.c" | |
274 | #include "ehci-q.c" | |
275 | #include "ehci-sched.c" | |
276 | ||
277 | /*-------------------------------------------------------------------------*/ | |
278 | ||
64f89798 | 279 | static void ehci_watchdog (unsigned long param) |
1da177e4 LT |
280 | { |
281 | struct ehci_hcd *ehci = (struct ehci_hcd *) param; | |
282 | unsigned long flags; | |
283 | ||
284 | spin_lock_irqsave (&ehci->lock, flags); | |
285 | ||
64f89798 | 286 | /* lost IAA irqs wedge things badly; seen with a vt8235 */ |
1da177e4 | 287 | if (ehci->reclaim) { |
083522d7 | 288 | u32 status = ehci_readl(ehci, &ehci->regs->status); |
1da177e4 LT |
289 | if (status & STS_IAA) { |
290 | ehci_vdbg (ehci, "lost IAA\n"); | |
291 | COUNT (ehci->stats.lost_iaa); | |
083522d7 | 292 | ehci_writel(ehci, STS_IAA, &ehci->regs->status); |
64f89798 | 293 | ehci->reclaim_ready = 1; |
1da177e4 LT |
294 | } |
295 | } | |
296 | ||
64f89798 | 297 | /* stop async processing after it's idled a bit */ |
1da177e4 | 298 | if (test_bit (TIMER_ASYNC_OFF, &ehci->actions)) |
26f953fd | 299 | start_unlink_async (ehci, ehci->async); |
1da177e4 LT |
300 | |
301 | /* ehci could run by timer, without IRQs ... */ | |
7d12e780 | 302 | ehci_work (ehci); |
1da177e4 LT |
303 | |
304 | spin_unlock_irqrestore (&ehci->lock, flags); | |
305 | } | |
306 | ||
8903795a AS |
307 | /* On some systems, leaving remote wakeup enabled prevents system shutdown. |
308 | * The firmware seems to think that powering off is a wakeup event! | |
309 | * This routine turns off remote wakeup and everything else, on all ports. | |
310 | */ | |
311 | static void ehci_turn_off_all_ports(struct ehci_hcd *ehci) | |
312 | { | |
313 | int port = HCS_N_PORTS(ehci->hcs_params); | |
314 | ||
315 | while (port--) | |
316 | ehci_writel(ehci, PORT_RWC_BITS, | |
317 | &ehci->regs->port_status[port]); | |
318 | } | |
319 | ||
64a21d02 | 320 | /* ehci_shutdown kick in for silicon on any bus (not just pci, etc). |
72f30b6f DB |
321 | * This forcibly disables dma and IRQs, helping kexec and other cases |
322 | * where the next system software may expect clean state. | |
323 | */ | |
64a21d02 AG |
324 | static void |
325 | ehci_shutdown (struct usb_hcd *hcd) | |
1da177e4 | 326 | { |
64a21d02 | 327 | struct ehci_hcd *ehci; |
1da177e4 | 328 | |
64a21d02 | 329 | ehci = hcd_to_ehci (hcd); |
72f30b6f | 330 | (void) ehci_halt (ehci); |
8903795a | 331 | ehci_turn_off_all_ports(ehci); |
1da177e4 LT |
332 | |
333 | /* make BIOS/etc use companion controller during reboot */ | |
083522d7 | 334 | ehci_writel(ehci, 0, &ehci->regs->configured_flag); |
8903795a AS |
335 | |
336 | /* unblock posted writes */ | |
337 | ehci_readl(ehci, &ehci->regs->configured_flag); | |
1da177e4 LT |
338 | } |
339 | ||
56c1e26d DB |
340 | static void ehci_port_power (struct ehci_hcd *ehci, int is_on) |
341 | { | |
342 | unsigned port; | |
343 | ||
344 | if (!HCS_PPC (ehci->hcs_params)) | |
345 | return; | |
346 | ||
347 | ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down"); | |
348 | for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) | |
349 | (void) ehci_hub_control(ehci_to_hcd(ehci), | |
350 | is_on ? SetPortFeature : ClearPortFeature, | |
351 | USB_PORT_FEAT_POWER, | |
352 | port--, NULL, 0); | |
383975d7 AS |
353 | /* Flush those writes */ |
354 | ehci_readl(ehci, &ehci->regs->command); | |
56c1e26d DB |
355 | msleep(20); |
356 | } | |
357 | ||
7ff71d6a | 358 | /*-------------------------------------------------------------------------*/ |
1da177e4 | 359 | |
7ff71d6a MP |
360 | /* |
361 | * ehci_work is called from some interrupts, timers, and so on. | |
362 | * it calls driver completion functions, after dropping ehci->lock. | |
363 | */ | |
7d12e780 | 364 | static void ehci_work (struct ehci_hcd *ehci) |
7ff71d6a MP |
365 | { |
366 | timer_action_done (ehci, TIMER_IO_WATCHDOG); | |
64f89798 GKH |
367 | if (ehci->reclaim_ready) |
368 | end_unlink_async (ehci); | |
7ff71d6a MP |
369 | |
370 | /* another CPU may drop ehci->lock during a schedule scan while | |
371 | * it reports urb completions. this flag guards against bogus | |
372 | * attempts at re-entrant schedule scanning. | |
373 | */ | |
374 | if (ehci->scanning) | |
375 | return; | |
376 | ehci->scanning = 1; | |
7d12e780 | 377 | scan_async (ehci); |
7ff71d6a | 378 | if (ehci->next_uframe != -1) |
7d12e780 | 379 | scan_periodic (ehci); |
7ff71d6a MP |
380 | ehci->scanning = 0; |
381 | ||
382 | /* the IO watchdog guards against hardware or driver bugs that | |
383 | * misplace IRQs, and should let us run completely without IRQs. | |
384 | * such lossage has been observed on both VT6202 and VT8235. | |
385 | */ | |
386 | if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && | |
387 | (ehci->async->qh_next.ptr != NULL || | |
388 | ehci->periodic_sched != 0)) | |
389 | timer_action (ehci, TIMER_IO_WATCHDOG); | |
390 | } | |
1da177e4 | 391 | |
7ff71d6a | 392 | static void ehci_stop (struct usb_hcd *hcd) |
1da177e4 LT |
393 | { |
394 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
1da177e4 | 395 | |
7ff71d6a | 396 | ehci_dbg (ehci, "stop\n"); |
1da177e4 | 397 | |
7ff71d6a MP |
398 | /* Turn off port power on all root hub ports. */ |
399 | ehci_port_power (ehci, 0); | |
1da177e4 | 400 | |
7ff71d6a MP |
401 | /* no more interrupts ... */ |
402 | del_timer_sync (&ehci->watchdog); | |
56c1e26d | 403 | |
7ff71d6a MP |
404 | spin_lock_irq(&ehci->lock); |
405 | if (HC_IS_RUNNING (hcd->state)) | |
406 | ehci_quiesce (ehci); | |
1da177e4 | 407 | |
7ff71d6a | 408 | ehci_reset (ehci); |
083522d7 | 409 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
7ff71d6a | 410 | spin_unlock_irq(&ehci->lock); |
1da177e4 | 411 | |
7ff71d6a | 412 | /* let companion controllers work when we aren't */ |
083522d7 | 413 | ehci_writel(ehci, 0, &ehci->regs->configured_flag); |
56c1e26d | 414 | |
57e06c11 | 415 | remove_companion_file(ehci); |
7ff71d6a | 416 | remove_debug_files (ehci); |
1da177e4 | 417 | |
7ff71d6a MP |
418 | /* root hub is shut down separately (first, when possible) */ |
419 | spin_lock_irq (&ehci->lock); | |
420 | if (ehci->async) | |
7d12e780 | 421 | ehci_work (ehci); |
7ff71d6a MP |
422 | spin_unlock_irq (&ehci->lock); |
423 | ehci_mem_cleanup (ehci); | |
1da177e4 | 424 | |
7ff71d6a MP |
425 | #ifdef EHCI_STATS |
426 | ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n", | |
427 | ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim, | |
428 | ehci->stats.lost_iaa); | |
429 | ehci_dbg (ehci, "complete %ld unlink %ld\n", | |
430 | ehci->stats.complete, ehci->stats.unlink); | |
1da177e4 | 431 | #endif |
1da177e4 | 432 | |
083522d7 BH |
433 | dbg_status (ehci, "ehci_stop completed", |
434 | ehci_readl(ehci, &ehci->regs->status)); | |
1da177e4 LT |
435 | } |
436 | ||
18807521 DB |
437 | /* one-time init, only for memory state */ |
438 | static int ehci_init(struct usb_hcd *hcd) | |
1da177e4 | 439 | { |
18807521 | 440 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
1da177e4 | 441 | u32 temp; |
1da177e4 LT |
442 | int retval; |
443 | u32 hcc_params; | |
18807521 DB |
444 | |
445 | spin_lock_init(&ehci->lock); | |
446 | ||
447 | init_timer(&ehci->watchdog); | |
448 | ehci->watchdog.function = ehci_watchdog; | |
449 | ehci->watchdog.data = (unsigned long) ehci; | |
1da177e4 LT |
450 | |
451 | /* | |
452 | * hw default: 1K periodic list heads, one per frame. | |
453 | * periodic_size can shrink by USBCMD update if hcc_params allows. | |
454 | */ | |
455 | ehci->periodic_size = DEFAULT_I_TDPS; | |
18807521 | 456 | if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0) |
1da177e4 LT |
457 | return retval; |
458 | ||
459 | /* controllers may cache some of the periodic schedule ... */ | |
083522d7 | 460 | hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); |
53bd6a60 | 461 | if (HCC_ISOC_CACHE(hcc_params)) // full frame cache |
1da177e4 LT |
462 | ehci->i_thresh = 8; |
463 | else // N microframes cached | |
18807521 | 464 | ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params); |
1da177e4 LT |
465 | |
466 | ehci->reclaim = NULL; | |
64f89798 | 467 | ehci->reclaim_ready = 0; |
1da177e4 LT |
468 | ehci->next_uframe = -1; |
469 | ||
1da177e4 LT |
470 | /* |
471 | * dedicate a qh for the async ring head, since we couldn't unlink | |
472 | * a 'real' qh without stopping the async schedule [4.8]. use it | |
473 | * as the 'reclamation list head' too. | |
474 | * its dummy is used in hw_alt_next of many tds, to prevent the qh | |
475 | * from automatically advancing to the next td after short reads. | |
476 | */ | |
18807521 | 477 | ehci->async->qh_next.qh = NULL; |
6dbd682b SR |
478 | ehci->async->hw_next = QH_NEXT(ehci, ehci->async->qh_dma); |
479 | ehci->async->hw_info1 = cpu_to_hc32(ehci, QH_HEAD); | |
480 | ehci->async->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); | |
481 | ehci->async->hw_qtd_next = EHCI_LIST_END(ehci); | |
18807521 | 482 | ehci->async->qh_state = QH_STATE_LINKED; |
6dbd682b | 483 | ehci->async->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma); |
1da177e4 LT |
484 | |
485 | /* clear interrupt enables, set irq latency */ | |
486 | if (log2_irq_thresh < 0 || log2_irq_thresh > 6) | |
487 | log2_irq_thresh = 0; | |
488 | temp = 1 << (16 + log2_irq_thresh); | |
489 | if (HCC_CANPARK(hcc_params)) { | |
490 | /* HW default park == 3, on hardware that supports it (like | |
491 | * NVidia and ALI silicon), maximizes throughput on the async | |
492 | * schedule by avoiding QH fetches between transfers. | |
493 | * | |
494 | * With fast usb storage devices and NForce2, "park" seems to | |
495 | * make problems: throughput reduction (!), data errors... | |
496 | */ | |
497 | if (park) { | |
18807521 | 498 | park = min(park, (unsigned) 3); |
1da177e4 LT |
499 | temp |= CMD_PARK; |
500 | temp |= park << 8; | |
501 | } | |
18807521 | 502 | ehci_dbg(ehci, "park %d\n", park); |
1da177e4 | 503 | } |
18807521 | 504 | if (HCC_PGM_FRAMELISTLEN(hcc_params)) { |
1da177e4 LT |
505 | /* periodic schedule size can be smaller than default */ |
506 | temp &= ~(3 << 2); | |
507 | temp |= (EHCI_TUNE_FLS << 2); | |
508 | switch (EHCI_TUNE_FLS) { | |
509 | case 0: ehci->periodic_size = 1024; break; | |
510 | case 1: ehci->periodic_size = 512; break; | |
511 | case 2: ehci->periodic_size = 256; break; | |
18807521 | 512 | default: BUG(); |
1da177e4 LT |
513 | } |
514 | } | |
18807521 DB |
515 | ehci->command = temp; |
516 | ||
18807521 DB |
517 | return 0; |
518 | } | |
519 | ||
520 | /* start HC running; it's halted, ehci_init() has been run (once) */ | |
521 | static int ehci_run (struct usb_hcd *hcd) | |
522 | { | |
523 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
524 | int retval; | |
525 | u32 temp; | |
526 | u32 hcc_params; | |
527 | ||
1d619f12 MT |
528 | hcd->uses_new_polling = 1; |
529 | hcd->poll_rh = 0; | |
530 | ||
18807521 DB |
531 | /* EHCI spec section 4.1 */ |
532 | if ((retval = ehci_reset(ehci)) != 0) { | |
18807521 DB |
533 | ehci_mem_cleanup(ehci); |
534 | return retval; | |
535 | } | |
083522d7 BH |
536 | ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); |
537 | ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next); | |
18807521 DB |
538 | |
539 | /* | |
540 | * hcc_params controls whether ehci->regs->segment must (!!!) | |
541 | * be used; it constrains QH/ITD/SITD and QTD locations. | |
542 | * pci_pool consistent memory always uses segment zero. | |
543 | * streaming mappings for I/O buffers, like pci_map_single(), | |
544 | * can return segments above 4GB, if the device allows. | |
545 | * | |
546 | * NOTE: the dma mask is visible through dma_supported(), so | |
547 | * drivers can pass this info along ... like NETIF_F_HIGHDMA, | |
548 | * Scsi_Host.highmem_io, and so forth. It's readonly to all | |
549 | * host side drivers though. | |
550 | */ | |
083522d7 | 551 | hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); |
18807521 | 552 | if (HCC_64BIT_ADDR(hcc_params)) { |
083522d7 | 553 | ehci_writel(ehci, 0, &ehci->regs->segment); |
18807521 DB |
554 | #if 0 |
555 | // this is deeply broken on almost all architectures | |
556 | if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK)) | |
557 | ehci_info(ehci, "enabled 64bit DMA\n"); | |
558 | #endif | |
559 | } | |
560 | ||
561 | ||
1da177e4 LT |
562 | // Philips, Intel, and maybe others need CMD_RUN before the |
563 | // root hub will detect new devices (why?); NEC doesn't | |
18807521 DB |
564 | ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); |
565 | ehci->command |= CMD_RUN; | |
083522d7 | 566 | ehci_writel(ehci, ehci->command, &ehci->regs->command); |
18807521 | 567 | dbg_cmd (ehci, "init", ehci->command); |
1da177e4 | 568 | |
1da177e4 LT |
569 | /* |
570 | * Start, enabling full USB 2.0 functionality ... usb 1.1 devices | |
571 | * are explicitly handed to companion controller(s), so no TT is | |
572 | * involved with the root hub. (Except where one is integrated, | |
573 | * and there's no companion controller unless maybe for USB OTG.) | |
32fe0198 AS |
574 | * |
575 | * Turning on the CF flag will transfer ownership of all ports | |
576 | * from the companions to the EHCI controller. If any of the | |
577 | * companions are in the middle of a port reset at the time, it | |
578 | * could cause trouble. Write-locking ehci_cf_port_reset_rwsem | |
1cb52658 DB |
579 | * guarantees that no resets are in progress. After we set CF, |
580 | * a short delay lets the hardware catch up; new resets shouldn't | |
581 | * be started before the port switching actions could complete. | |
1da177e4 | 582 | */ |
32fe0198 | 583 | down_write(&ehci_cf_port_reset_rwsem); |
1da177e4 | 584 | hcd->state = HC_STATE_RUNNING; |
083522d7 BH |
585 | ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); |
586 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ | |
1cb52658 | 587 | msleep(5); |
32fe0198 | 588 | up_write(&ehci_cf_port_reset_rwsem); |
1da177e4 | 589 | |
083522d7 | 590 | temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase)); |
1da177e4 | 591 | ehci_info (ehci, |
93f1a47c | 592 | "USB %x.%x started, EHCI %x.%02x, driver %s%s\n", |
7ff71d6a | 593 | ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), |
93f1a47c DB |
594 | temp >> 8, temp & 0xff, DRIVER_VERSION, |
595 | ignore_oc ? ", overcurrent ignored" : ""); | |
1da177e4 | 596 | |
083522d7 BH |
597 | ehci_writel(ehci, INTR_MASK, |
598 | &ehci->regs->intr_enable); /* Turn On Interrupts */ | |
1da177e4 | 599 | |
18807521 DB |
600 | /* GRR this is run-once init(), being done every time the HC starts. |
601 | * So long as they're part of class devices, we can't do it init() | |
602 | * since the class device isn't created that early. | |
603 | */ | |
604 | create_debug_files(ehci); | |
57e06c11 | 605 | create_companion_file(ehci); |
1da177e4 LT |
606 | |
607 | return 0; | |
608 | } | |
609 | ||
1da177e4 LT |
610 | /*-------------------------------------------------------------------------*/ |
611 | ||
7d12e780 | 612 | static irqreturn_t ehci_irq (struct usb_hcd *hcd) |
1da177e4 LT |
613 | { |
614 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
1d619f12 | 615 | u32 status, pcd_status = 0; |
1da177e4 LT |
616 | int bh; |
617 | ||
618 | spin_lock (&ehci->lock); | |
619 | ||
083522d7 | 620 | status = ehci_readl(ehci, &ehci->regs->status); |
1da177e4 LT |
621 | |
622 | /* e.g. cardbus physical eject */ | |
623 | if (status == ~(u32) 0) { | |
624 | ehci_dbg (ehci, "device removed\n"); | |
625 | goto dead; | |
626 | } | |
627 | ||
628 | status &= INTR_MASK; | |
629 | if (!status) { /* irq sharing? */ | |
630 | spin_unlock(&ehci->lock); | |
631 | return IRQ_NONE; | |
632 | } | |
633 | ||
634 | /* clear (just) interrupts */ | |
083522d7 BH |
635 | ehci_writel(ehci, status, &ehci->regs->status); |
636 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */ | |
1da177e4 LT |
637 | bh = 0; |
638 | ||
639 | #ifdef EHCI_VERBOSE_DEBUG | |
640 | /* unrequested/ignored: Frame List Rollover */ | |
641 | dbg_status (ehci, "irq", status); | |
642 | #endif | |
643 | ||
644 | /* INT, ERR, and IAA interrupt rates can be throttled */ | |
645 | ||
646 | /* normal [4.15.1.2] or error [4.15.1.1] completion */ | |
647 | if (likely ((status & (STS_INT|STS_ERR)) != 0)) { | |
648 | if (likely ((status & STS_ERR) == 0)) | |
649 | COUNT (ehci->stats.normal); | |
650 | else | |
651 | COUNT (ehci->stats.error); | |
652 | bh = 1; | |
653 | } | |
654 | ||
655 | /* complete the unlinking of some qh [4.15.2.3] */ | |
656 | if (status & STS_IAA) { | |
657 | COUNT (ehci->stats.reclaim); | |
64f89798 | 658 | ehci->reclaim_ready = 1; |
1da177e4 LT |
659 | bh = 1; |
660 | } | |
661 | ||
662 | /* remote wakeup [4.3.1] */ | |
d97cc2f2 | 663 | if (status & STS_PCD) { |
1da177e4 | 664 | unsigned i = HCS_N_PORTS (ehci->hcs_params); |
1d619f12 | 665 | pcd_status = status; |
1da177e4 LT |
666 | |
667 | /* resume root hub? */ | |
083522d7 | 668 | if (!(ehci_readl(ehci, &ehci->regs->command) & CMD_RUN)) |
8c03356a | 669 | usb_hcd_resume_root_hub(hcd); |
1da177e4 LT |
670 | |
671 | while (i--) { | |
083522d7 BH |
672 | int pstatus = ehci_readl(ehci, |
673 | &ehci->regs->port_status [i]); | |
b972b68c DB |
674 | |
675 | if (pstatus & PORT_OWNER) | |
1da177e4 | 676 | continue; |
b972b68c | 677 | if (!(pstatus & PORT_RESUME) |
1da177e4 LT |
678 | || ehci->reset_done [i] != 0) |
679 | continue; | |
680 | ||
681 | /* start 20 msec resume signaling from this port, | |
682 | * and make khubd collect PORT_STAT_C_SUSPEND to | |
683 | * stop that signaling. | |
684 | */ | |
685 | ehci->reset_done [i] = jiffies + msecs_to_jiffies (20); | |
1da177e4 | 686 | ehci_dbg (ehci, "port %d remote wakeup\n", i + 1); |
61e8b858 | 687 | mod_timer(&hcd->rh_timer, ehci->reset_done[i]); |
1da177e4 LT |
688 | } |
689 | } | |
690 | ||
691 | /* PCI errors [4.15.2.4] */ | |
692 | if (unlikely ((status & STS_FATAL) != 0)) { | |
693 | /* bogus "fatal" IRQs appear on some chips... why? */ | |
083522d7 BH |
694 | status = ehci_readl(ehci, &ehci->regs->status); |
695 | dbg_cmd (ehci, "fatal", ehci_readl(ehci, | |
696 | &ehci->regs->command)); | |
1da177e4 LT |
697 | dbg_status (ehci, "fatal", status); |
698 | if (status & STS_HALT) { | |
699 | ehci_err (ehci, "fatal error\n"); | |
700 | dead: | |
701 | ehci_reset (ehci); | |
083522d7 | 702 | ehci_writel(ehci, 0, &ehci->regs->configured_flag); |
1da177e4 LT |
703 | /* generic layer kills/unlinks all urbs, then |
704 | * uses ehci_stop to clean up the rest | |
705 | */ | |
706 | bh = 1; | |
707 | } | |
708 | } | |
709 | ||
710 | if (bh) | |
7d12e780 | 711 | ehci_work (ehci); |
1da177e4 | 712 | spin_unlock (&ehci->lock); |
1d619f12 MT |
713 | if (pcd_status & STS_PCD) |
714 | usb_hcd_poll_rh_status(hcd); | |
1da177e4 LT |
715 | return IRQ_HANDLED; |
716 | } | |
717 | ||
718 | /*-------------------------------------------------------------------------*/ | |
719 | ||
720 | /* | |
721 | * non-error returns are a promise to giveback() the urb later | |
722 | * we drop ownership so next owner (or urb unlink) can get it | |
723 | * | |
724 | * urb + dev is in hcd.self.controller.urb_list | |
725 | * we're queueing TDs onto software and hardware lists | |
726 | * | |
727 | * hcd-specific init for hcpriv hasn't been done yet | |
728 | * | |
729 | * NOTE: control, bulk, and interrupt share the same code to append TDs | |
730 | * to a (possibly active) QH, and the same QH scanning code. | |
731 | */ | |
732 | static int ehci_urb_enqueue ( | |
733 | struct usb_hcd *hcd, | |
1da177e4 | 734 | struct urb *urb, |
55016f10 | 735 | gfp_t mem_flags |
1da177e4 LT |
736 | ) { |
737 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
738 | struct list_head qtd_list; | |
739 | ||
740 | INIT_LIST_HEAD (&qtd_list); | |
741 | ||
742 | switch (usb_pipetype (urb->pipe)) { | |
743 | // case PIPE_CONTROL: | |
744 | // case PIPE_BULK: | |
745 | default: | |
746 | if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) | |
747 | return -ENOMEM; | |
e9df41c5 | 748 | return submit_async(ehci, urb, &qtd_list, mem_flags); |
1da177e4 LT |
749 | |
750 | case PIPE_INTERRUPT: | |
751 | if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) | |
752 | return -ENOMEM; | |
e9df41c5 | 753 | return intr_submit(ehci, urb, &qtd_list, mem_flags); |
1da177e4 LT |
754 | |
755 | case PIPE_ISOCHRONOUS: | |
756 | if (urb->dev->speed == USB_SPEED_HIGH) | |
757 | return itd_submit (ehci, urb, mem_flags); | |
758 | else | |
759 | return sitd_submit (ehci, urb, mem_flags); | |
760 | } | |
761 | } | |
762 | ||
763 | static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh) | |
764 | { | |
64f89798 GKH |
765 | /* if we need to use IAA and it's busy, defer */ |
766 | if (qh->qh_state == QH_STATE_LINKED | |
767 | && ehci->reclaim | |
768 | && HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) { | |
1da177e4 LT |
769 | struct ehci_qh *last; |
770 | ||
771 | for (last = ehci->reclaim; | |
772 | last->reclaim; | |
773 | last = last->reclaim) | |
774 | continue; | |
775 | qh->qh_state = QH_STATE_UNLINK_WAIT; | |
776 | last->reclaim = qh; | |
777 | ||
64f89798 GKH |
778 | /* bypass IAA if the hc can't care */ |
779 | } else if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && ehci->reclaim) | |
780 | end_unlink_async (ehci); | |
781 | ||
782 | /* something else might have unlinked the qh by now */ | |
783 | if (qh->qh_state == QH_STATE_LINKED) | |
1da177e4 LT |
784 | start_unlink_async (ehci, qh); |
785 | } | |
786 | ||
787 | /* remove from hardware lists | |
788 | * completions normally happen asynchronously | |
789 | */ | |
790 | ||
e9df41c5 | 791 | static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) |
1da177e4 LT |
792 | { |
793 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
794 | struct ehci_qh *qh; | |
795 | unsigned long flags; | |
e9df41c5 | 796 | int rc; |
1da177e4 LT |
797 | |
798 | spin_lock_irqsave (&ehci->lock, flags); | |
e9df41c5 AS |
799 | rc = usb_hcd_check_unlink_urb(hcd, urb, status); |
800 | if (rc) | |
801 | goto done; | |
802 | ||
1da177e4 LT |
803 | switch (usb_pipetype (urb->pipe)) { |
804 | // case PIPE_CONTROL: | |
805 | // case PIPE_BULK: | |
806 | default: | |
807 | qh = (struct ehci_qh *) urb->hcpriv; | |
808 | if (!qh) | |
809 | break; | |
64f89798 | 810 | unlink_async (ehci, qh); |
1da177e4 LT |
811 | break; |
812 | ||
813 | case PIPE_INTERRUPT: | |
814 | qh = (struct ehci_qh *) urb->hcpriv; | |
815 | if (!qh) | |
816 | break; | |
817 | switch (qh->qh_state) { | |
818 | case QH_STATE_LINKED: | |
819 | intr_deschedule (ehci, qh); | |
820 | /* FALL THROUGH */ | |
821 | case QH_STATE_IDLE: | |
7d12e780 | 822 | qh_completions (ehci, qh); |
1da177e4 LT |
823 | break; |
824 | default: | |
825 | ehci_dbg (ehci, "bogus qh %p state %d\n", | |
826 | qh, qh->qh_state); | |
827 | goto done; | |
828 | } | |
829 | ||
830 | /* reschedule QH iff another request is queued */ | |
831 | if (!list_empty (&qh->qtd_list) | |
832 | && HC_IS_RUNNING (hcd->state)) { | |
833 | int status; | |
834 | ||
835 | status = qh_schedule (ehci, qh); | |
836 | spin_unlock_irqrestore (&ehci->lock, flags); | |
837 | ||
838 | if (status != 0) { | |
839 | // shouldn't happen often, but ... | |
840 | // FIXME kill those tds' urbs | |
841 | err ("can't reschedule qh %p, err %d", | |
842 | qh, status); | |
843 | } | |
844 | return status; | |
845 | } | |
846 | break; | |
847 | ||
848 | case PIPE_ISOCHRONOUS: | |
849 | // itd or sitd ... | |
850 | ||
851 | // wait till next completion, do it then. | |
852 | // completion irqs can wait up to 1024 msec, | |
853 | break; | |
854 | } | |
855 | done: | |
856 | spin_unlock_irqrestore (&ehci->lock, flags); | |
e9df41c5 | 857 | return rc; |
1da177e4 LT |
858 | } |
859 | ||
860 | /*-------------------------------------------------------------------------*/ | |
861 | ||
862 | // bulk qh holds the data toggle | |
863 | ||
864 | static void | |
865 | ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep) | |
866 | { | |
867 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
868 | unsigned long flags; | |
869 | struct ehci_qh *qh, *tmp; | |
870 | ||
871 | /* ASSERT: any requests/urbs are being unlinked */ | |
872 | /* ASSERT: nobody can be submitting urbs for this any more */ | |
873 | ||
874 | rescan: | |
875 | spin_lock_irqsave (&ehci->lock, flags); | |
876 | qh = ep->hcpriv; | |
877 | if (!qh) | |
878 | goto done; | |
879 | ||
880 | /* endpoints can be iso streams. for now, we don't | |
881 | * accelerate iso completions ... so spin a while. | |
882 | */ | |
883 | if (qh->hw_info1 == 0) { | |
884 | ehci_vdbg (ehci, "iso delay\n"); | |
885 | goto idle_timeout; | |
886 | } | |
887 | ||
888 | if (!HC_IS_RUNNING (hcd->state)) | |
889 | qh->qh_state = QH_STATE_IDLE; | |
890 | switch (qh->qh_state) { | |
891 | case QH_STATE_LINKED: | |
892 | for (tmp = ehci->async->qh_next.qh; | |
893 | tmp && tmp != qh; | |
894 | tmp = tmp->qh_next.qh) | |
895 | continue; | |
896 | /* periodic qh self-unlinks on empty */ | |
897 | if (!tmp) | |
898 | goto nogood; | |
899 | unlink_async (ehci, qh); | |
900 | /* FALL THROUGH */ | |
901 | case QH_STATE_UNLINK: /* wait for hw to finish? */ | |
902 | idle_timeout: | |
903 | spin_unlock_irqrestore (&ehci->lock, flags); | |
22c43863 | 904 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
905 | goto rescan; |
906 | case QH_STATE_IDLE: /* fully unlinked */ | |
907 | if (list_empty (&qh->qtd_list)) { | |
908 | qh_put (qh); | |
909 | break; | |
910 | } | |
911 | /* else FALL THROUGH */ | |
912 | default: | |
913 | nogood: | |
914 | /* caller was supposed to have unlinked any requests; | |
915 | * that's not our job. just leak this memory. | |
916 | */ | |
917 | ehci_err (ehci, "qh %p (#%02x) state %d%s\n", | |
918 | qh, ep->desc.bEndpointAddress, qh->qh_state, | |
919 | list_empty (&qh->qtd_list) ? "" : "(has tds)"); | |
920 | break; | |
921 | } | |
922 | ep->hcpriv = NULL; | |
923 | done: | |
924 | spin_unlock_irqrestore (&ehci->lock, flags); | |
925 | return; | |
926 | } | |
927 | ||
7ff71d6a MP |
928 | static int ehci_get_frame (struct usb_hcd *hcd) |
929 | { | |
930 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
083522d7 BH |
931 | return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) % |
932 | ehci->periodic_size; | |
7ff71d6a | 933 | } |
1da177e4 LT |
934 | |
935 | /*-------------------------------------------------------------------------*/ | |
936 | ||
1da177e4 LT |
937 | #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC |
938 | ||
939 | MODULE_DESCRIPTION (DRIVER_INFO); | |
940 | MODULE_AUTHOR (DRIVER_AUTHOR); | |
941 | MODULE_LICENSE ("GPL"); | |
942 | ||
7ff71d6a MP |
943 | #ifdef CONFIG_PCI |
944 | #include "ehci-pci.c" | |
01cced25 | 945 | #define PCI_DRIVER ehci_pci_driver |
7ff71d6a | 946 | #endif |
1da177e4 | 947 | |
ba02978a | 948 | #ifdef CONFIG_USB_EHCI_FSL |
80cb9aee | 949 | #include "ehci-fsl.c" |
01cced25 | 950 | #define PLATFORM_DRIVER ehci_fsl_driver |
80cb9aee RV |
951 | #endif |
952 | ||
dfbaa7d8 | 953 | #ifdef CONFIG_SOC_AU1200 |
76fa9a24 | 954 | #include "ehci-au1xxx.c" |
01cced25 | 955 | #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver |
76fa9a24 JC |
956 | #endif |
957 | ||
ad75a410 GL |
958 | #ifdef CONFIG_PPC_PS3 |
959 | #include "ehci-ps3.c" | |
7a4eb7fd | 960 | #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver |
ad75a410 GL |
961 | #endif |
962 | ||
fc65a15f SR |
963 | #ifdef CONFIG_440EPX |
964 | #include "ehci-ppc-soc.c" | |
965 | #define PLATFORM_DRIVER ehci_ppc_soc_driver | |
966 | #endif | |
967 | ||
ad75a410 GL |
968 | #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \ |
969 | !defined(PS3_SYSTEM_BUS_DRIVER) | |
7ff71d6a MP |
970 | #error "missing bus glue for ehci-hcd" |
971 | #endif | |
01cced25 KG |
972 | |
973 | static int __init ehci_hcd_init(void) | |
974 | { | |
975 | int retval = 0; | |
976 | ||
977 | pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", | |
978 | hcd_name, | |
979 | sizeof(struct ehci_qh), sizeof(struct ehci_qtd), | |
980 | sizeof(struct ehci_itd), sizeof(struct ehci_sitd)); | |
981 | ||
694cc208 TJ |
982 | #ifdef DEBUG |
983 | ehci_debug_root = debugfs_create_dir("ehci", NULL); | |
984 | if (!ehci_debug_root) | |
985 | return -ENOENT; | |
986 | #endif | |
987 | ||
01cced25 KG |
988 | #ifdef PLATFORM_DRIVER |
989 | retval = platform_driver_register(&PLATFORM_DRIVER); | |
694cc208 TJ |
990 | if (retval < 0) { |
991 | #ifdef DEBUG | |
992 | debugfs_remove(ehci_debug_root); | |
993 | ehci_debug_root = NULL; | |
994 | #endif | |
01cced25 | 995 | return retval; |
694cc208 | 996 | } |
01cced25 KG |
997 | #endif |
998 | ||
999 | #ifdef PCI_DRIVER | |
1000 | retval = pci_register_driver(&PCI_DRIVER); | |
1001 | if (retval < 0) { | |
694cc208 TJ |
1002 | #ifdef DEBUG |
1003 | debugfs_remove(ehci_debug_root); | |
1004 | ehci_debug_root = NULL; | |
1005 | #endif | |
01cced25 KG |
1006 | #ifdef PLATFORM_DRIVER |
1007 | platform_driver_unregister(&PLATFORM_DRIVER); | |
1008 | #endif | |
ad75a410 GL |
1009 | return retval; |
1010 | } | |
1011 | #endif | |
1012 | ||
1013 | #ifdef PS3_SYSTEM_BUS_DRIVER | |
7a4eb7fd GL |
1014 | retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER); |
1015 | if (retval < 0) { | |
694cc208 TJ |
1016 | #ifdef DEBUG |
1017 | debugfs_remove(ehci_debug_root); | |
1018 | ehci_debug_root = NULL; | |
1019 | #endif | |
ad75a410 | 1020 | #ifdef PLATFORM_DRIVER |
7a4eb7fd | 1021 | platform_driver_unregister(&PLATFORM_DRIVER); |
ad75a410 GL |
1022 | #endif |
1023 | #ifdef PCI_DRIVER | |
7a4eb7fd | 1024 | pci_unregister_driver(&PCI_DRIVER); |
ad75a410 | 1025 | #endif |
7a4eb7fd | 1026 | return retval; |
01cced25 KG |
1027 | } |
1028 | #endif | |
1029 | ||
1030 | return retval; | |
1031 | } | |
1032 | module_init(ehci_hcd_init); | |
1033 | ||
1034 | static void __exit ehci_hcd_cleanup(void) | |
1035 | { | |
1036 | #ifdef PLATFORM_DRIVER | |
1037 | platform_driver_unregister(&PLATFORM_DRIVER); | |
1038 | #endif | |
1039 | #ifdef PCI_DRIVER | |
1040 | pci_unregister_driver(&PCI_DRIVER); | |
1041 | #endif | |
ad75a410 | 1042 | #ifdef PS3_SYSTEM_BUS_DRIVER |
7a4eb7fd | 1043 | ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER); |
ad75a410 | 1044 | #endif |
694cc208 TJ |
1045 | #ifdef DEBUG |
1046 | debugfs_remove(ehci_debug_root); | |
1047 | #endif | |
01cced25 KG |
1048 | } |
1049 | module_exit(ehci_hcd_cleanup); | |
1050 |