Commit | Line | Data |
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c4144247 YS |
1 | /* |
2 | * R8A66597 UDC (USB gadget) | |
3 | * | |
4 | * Copyright (C) 2006-2009 Renesas Solutions Corp. | |
5 | * | |
5db05c09 | 6 | * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
c4144247 YS |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
c4144247 YS |
11 | */ |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/platform_device.h> | |
d2e27bdf | 18 | #include <linux/clk.h> |
ae3a0792 | 19 | #include <linux/err.h> |
5a0e3ad6 | 20 | #include <linux/slab.h> |
c4144247 YS |
21 | |
22 | #include <linux/usb/ch9.h> | |
23 | #include <linux/usb/gadget.h> | |
24 | ||
25 | #include "r8a66597-udc.h" | |
26 | ||
27 | #define DRIVER_VERSION "2009-08-18" | |
28 | ||
29 | static const char udc_name[] = "r8a66597_udc"; | |
30 | static const char *r8a66597_ep_name[] = { | |
31 | "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", | |
32 | "ep8", "ep9", | |
33 | }; | |
34 | ||
e576a7a9 | 35 | static void init_controller(struct r8a66597 *r8a66597); |
c4144247 YS |
36 | static void disable_controller(struct r8a66597 *r8a66597); |
37 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req); | |
38 | static void irq_packet_write(struct r8a66597_ep *ep, | |
39 | struct r8a66597_request *req); | |
40 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | |
41 | gfp_t gfp_flags); | |
42 | ||
43 | static void transfer_complete(struct r8a66597_ep *ep, | |
44 | struct r8a66597_request *req, int status); | |
45 | ||
46 | /*-------------------------------------------------------------------------*/ | |
47 | static inline u16 get_usb_speed(struct r8a66597 *r8a66597) | |
48 | { | |
49 | return r8a66597_read(r8a66597, DVSTCTR0) & RHST; | |
50 | } | |
51 | ||
52 | static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | |
53 | unsigned long reg) | |
54 | { | |
55 | u16 tmp; | |
56 | ||
57 | tmp = r8a66597_read(r8a66597, INTENB0); | |
58 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | |
59 | INTENB0); | |
60 | r8a66597_bset(r8a66597, (1 << pipenum), reg); | |
61 | r8a66597_write(r8a66597, tmp, INTENB0); | |
62 | } | |
63 | ||
64 | static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | |
65 | unsigned long reg) | |
66 | { | |
67 | u16 tmp; | |
68 | ||
69 | tmp = r8a66597_read(r8a66597, INTENB0); | |
70 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | |
71 | INTENB0); | |
72 | r8a66597_bclr(r8a66597, (1 << pipenum), reg); | |
73 | r8a66597_write(r8a66597, tmp, INTENB0); | |
74 | } | |
75 | ||
76 | static void r8a66597_usb_connect(struct r8a66597 *r8a66597) | |
77 | { | |
78 | r8a66597_bset(r8a66597, CTRE, INTENB0); | |
79 | r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0); | |
80 | ||
81 | r8a66597_bset(r8a66597, DPRPU, SYSCFG0); | |
82 | } | |
83 | ||
84 | static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597) | |
85 | __releases(r8a66597->lock) | |
86 | __acquires(r8a66597->lock) | |
87 | { | |
88 | r8a66597_bclr(r8a66597, CTRE, INTENB0); | |
89 | r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0); | |
90 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
91 | ||
92 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | |
93 | spin_unlock(&r8a66597->lock); | |
94 | r8a66597->driver->disconnect(&r8a66597->gadget); | |
95 | spin_lock(&r8a66597->lock); | |
96 | ||
97 | disable_controller(r8a66597); | |
e576a7a9 YG |
98 | init_controller(r8a66597); |
99 | r8a66597_bset(r8a66597, VBSE, INTENB0); | |
c4144247 YS |
100 | INIT_LIST_HEAD(&r8a66597->ep[0].queue); |
101 | } | |
102 | ||
103 | static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum) | |
104 | { | |
105 | u16 pid = 0; | |
106 | unsigned long offset; | |
107 | ||
108 | if (pipenum == 0) | |
109 | pid = r8a66597_read(r8a66597, DCPCTR) & PID; | |
110 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
111 | offset = get_pipectr_addr(pipenum); | |
112 | pid = r8a66597_read(r8a66597, offset) & PID; | |
113 | } else | |
114 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
115 | ||
116 | return pid; | |
117 | } | |
118 | ||
119 | static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum, | |
120 | u16 pid) | |
121 | { | |
122 | unsigned long offset; | |
123 | ||
124 | if (pipenum == 0) | |
125 | r8a66597_mdfy(r8a66597, pid, PID, DCPCTR); | |
126 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
127 | offset = get_pipectr_addr(pipenum); | |
128 | r8a66597_mdfy(r8a66597, pid, PID, offset); | |
129 | } else | |
130 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
131 | } | |
132 | ||
133 | static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum) | |
134 | { | |
135 | control_reg_set_pid(r8a66597, pipenum, PID_BUF); | |
136 | } | |
137 | ||
138 | static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum) | |
139 | { | |
140 | control_reg_set_pid(r8a66597, pipenum, PID_NAK); | |
141 | } | |
142 | ||
143 | static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum) | |
144 | { | |
145 | control_reg_set_pid(r8a66597, pipenum, PID_STALL); | |
146 | } | |
147 | ||
148 | static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum) | |
149 | { | |
150 | u16 ret = 0; | |
151 | unsigned long offset; | |
152 | ||
153 | if (pipenum == 0) | |
154 | ret = r8a66597_read(r8a66597, DCPCTR); | |
155 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
156 | offset = get_pipectr_addr(pipenum); | |
157 | ret = r8a66597_read(r8a66597, offset); | |
158 | } else | |
159 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
160 | ||
161 | return ret; | |
162 | } | |
163 | ||
164 | static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum) | |
165 | { | |
166 | unsigned long offset; | |
167 | ||
168 | pipe_stop(r8a66597, pipenum); | |
169 | ||
170 | if (pipenum == 0) | |
171 | r8a66597_bset(r8a66597, SQCLR, DCPCTR); | |
172 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
173 | offset = get_pipectr_addr(pipenum); | |
174 | r8a66597_bset(r8a66597, SQCLR, offset); | |
175 | } else | |
176 | printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum); | |
177 | } | |
178 | ||
179 | static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum) | |
180 | { | |
181 | u16 tmp; | |
182 | int size; | |
183 | ||
184 | if (pipenum == 0) { | |
185 | tmp = r8a66597_read(r8a66597, DCPCFG); | |
186 | if ((tmp & R8A66597_CNTMD) != 0) | |
187 | size = 256; | |
188 | else { | |
189 | tmp = r8a66597_read(r8a66597, DCPMAXP); | |
190 | size = tmp & MAXP; | |
191 | } | |
192 | } else { | |
193 | r8a66597_write(r8a66597, pipenum, PIPESEL); | |
194 | tmp = r8a66597_read(r8a66597, PIPECFG); | |
195 | if ((tmp & R8A66597_CNTMD) != 0) { | |
196 | tmp = r8a66597_read(r8a66597, PIPEBUF); | |
197 | size = ((tmp >> 10) + 1) * 64; | |
198 | } else { | |
199 | tmp = r8a66597_read(r8a66597, PIPEMAXP); | |
200 | size = tmp & MXPS; | |
201 | } | |
202 | } | |
203 | ||
204 | return size; | |
205 | } | |
206 | ||
207 | static inline unsigned short mbw_value(struct r8a66597 *r8a66597) | |
208 | { | |
209 | if (r8a66597->pdata->on_chip) | |
210 | return MBW_32; | |
211 | else | |
212 | return MBW_16; | |
213 | } | |
214 | ||
215 | static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum) | |
216 | { | |
217 | struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum]; | |
218 | ||
219 | if (ep->use_dma) | |
220 | return; | |
221 | ||
222 | r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel); | |
223 | ||
224 | ndelay(450); | |
225 | ||
226 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | |
227 | } | |
228 | ||
229 | static int pipe_buffer_setting(struct r8a66597 *r8a66597, | |
230 | struct r8a66597_pipe_info *info) | |
231 | { | |
232 | u16 bufnum = 0, buf_bsize = 0; | |
233 | u16 pipecfg = 0; | |
234 | ||
235 | if (info->pipe == 0) | |
236 | return -EINVAL; | |
237 | ||
238 | r8a66597_write(r8a66597, info->pipe, PIPESEL); | |
239 | ||
240 | if (info->dir_in) | |
241 | pipecfg |= R8A66597_DIR; | |
242 | pipecfg |= info->type; | |
243 | pipecfg |= info->epnum; | |
244 | switch (info->type) { | |
245 | case R8A66597_INT: | |
246 | bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT); | |
247 | buf_bsize = 0; | |
248 | break; | |
249 | case R8A66597_BULK: | |
ef5ce3b6 | 250 | /* isochronous pipes may be used as bulk pipes */ |
6d86d52a | 251 | if (info->pipe >= R8A66597_BASE_PIPENUM_BULK) |
ef5ce3b6 MD |
252 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK; |
253 | else | |
254 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC; | |
255 | ||
256 | bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16); | |
c4144247 YS |
257 | buf_bsize = 7; |
258 | pipecfg |= R8A66597_DBLB; | |
259 | if (!info->dir_in) | |
260 | pipecfg |= R8A66597_SHTNAK; | |
261 | break; | |
262 | case R8A66597_ISO: | |
ef5ce3b6 | 263 | bufnum = R8A66597_BASE_BUFNUM + |
c4144247 | 264 | (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16; |
c4144247 YS |
265 | buf_bsize = 7; |
266 | break; | |
267 | } | |
ef5ce3b6 MD |
268 | |
269 | if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) { | |
c0109b8f | 270 | pr_err("r8a66597 pipe memory is insufficient\n"); |
c4144247 YS |
271 | return -ENOMEM; |
272 | } | |
273 | ||
274 | r8a66597_write(r8a66597, pipecfg, PIPECFG); | |
275 | r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF); | |
276 | r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP); | |
277 | if (info->interval) | |
278 | info->interval--; | |
279 | r8a66597_write(r8a66597, info->interval, PIPEPERI); | |
280 | ||
281 | return 0; | |
282 | } | |
283 | ||
284 | static void pipe_buffer_release(struct r8a66597 *r8a66597, | |
285 | struct r8a66597_pipe_info *info) | |
286 | { | |
287 | if (info->pipe == 0) | |
288 | return; | |
289 | ||
c4144247 YS |
290 | if (is_bulk_pipe(info->pipe)) |
291 | r8a66597->bulk--; | |
292 | else if (is_interrupt_pipe(info->pipe)) | |
293 | r8a66597->interrupt--; | |
294 | else if (is_isoc_pipe(info->pipe)) { | |
295 | r8a66597->isochronous--; | |
296 | if (info->type == R8A66597_BULK) | |
297 | r8a66597->bulk--; | |
298 | } else | |
299 | printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n", | |
300 | info->pipe); | |
301 | } | |
302 | ||
303 | static void pipe_initialize(struct r8a66597_ep *ep) | |
304 | { | |
305 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
306 | ||
307 | r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel); | |
308 | ||
309 | r8a66597_write(r8a66597, ACLRM, ep->pipectr); | |
310 | r8a66597_write(r8a66597, 0, ep->pipectr); | |
311 | r8a66597_write(r8a66597, SQCLR, ep->pipectr); | |
312 | if (ep->use_dma) { | |
313 | r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel); | |
314 | ||
315 | ndelay(450); | |
316 | ||
317 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | |
318 | } | |
319 | } | |
320 | ||
321 | static void r8a66597_ep_setting(struct r8a66597 *r8a66597, | |
322 | struct r8a66597_ep *ep, | |
323 | const struct usb_endpoint_descriptor *desc, | |
324 | u16 pipenum, int dma) | |
325 | { | |
326 | ep->use_dma = 0; | |
327 | ep->fifoaddr = CFIFO; | |
328 | ep->fifosel = CFIFOSEL; | |
329 | ep->fifoctr = CFIFOCTR; | |
330 | ep->fifotrn = 0; | |
331 | ||
332 | ep->pipectr = get_pipectr_addr(pipenum); | |
333 | ep->pipenum = pipenum; | |
29cc8897 | 334 | ep->ep.maxpacket = usb_endpoint_maxp(desc); |
c4144247 YS |
335 | r8a66597->pipenum2ep[pipenum] = ep; |
336 | r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK] | |
337 | = ep; | |
338 | INIT_LIST_HEAD(&ep->queue); | |
339 | } | |
340 | ||
341 | static void r8a66597_ep_release(struct r8a66597_ep *ep) | |
342 | { | |
343 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
344 | u16 pipenum = ep->pipenum; | |
345 | ||
346 | if (pipenum == 0) | |
347 | return; | |
348 | ||
349 | if (ep->use_dma) | |
350 | r8a66597->num_dma--; | |
351 | ep->pipenum = 0; | |
352 | ep->busy = 0; | |
353 | ep->use_dma = 0; | |
354 | } | |
355 | ||
356 | static int alloc_pipe_config(struct r8a66597_ep *ep, | |
357 | const struct usb_endpoint_descriptor *desc) | |
358 | { | |
359 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
360 | struct r8a66597_pipe_info info; | |
361 | int dma = 0; | |
362 | unsigned char *counter; | |
363 | int ret; | |
364 | ||
365 | ep->desc = desc; | |
366 | ||
367 | if (ep->pipenum) /* already allocated pipe */ | |
368 | return 0; | |
369 | ||
370 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | |
371 | case USB_ENDPOINT_XFER_BULK: | |
372 | if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) { | |
373 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | |
374 | printk(KERN_ERR "bulk pipe is insufficient\n"); | |
375 | return -ENODEV; | |
376 | } else { | |
377 | info.pipe = R8A66597_BASE_PIPENUM_ISOC | |
378 | + r8a66597->isochronous; | |
379 | counter = &r8a66597->isochronous; | |
380 | } | |
381 | } else { | |
382 | info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk; | |
383 | counter = &r8a66597->bulk; | |
384 | } | |
385 | info.type = R8A66597_BULK; | |
386 | dma = 1; | |
387 | break; | |
388 | case USB_ENDPOINT_XFER_INT: | |
389 | if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) { | |
390 | printk(KERN_ERR "interrupt pipe is insufficient\n"); | |
391 | return -ENODEV; | |
392 | } | |
393 | info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt; | |
394 | info.type = R8A66597_INT; | |
395 | counter = &r8a66597->interrupt; | |
396 | break; | |
397 | case USB_ENDPOINT_XFER_ISOC: | |
398 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | |
399 | printk(KERN_ERR "isochronous pipe is insufficient\n"); | |
400 | return -ENODEV; | |
401 | } | |
402 | info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous; | |
403 | info.type = R8A66597_ISO; | |
404 | counter = &r8a66597->isochronous; | |
405 | break; | |
406 | default: | |
407 | printk(KERN_ERR "unexpect xfer type\n"); | |
408 | return -EINVAL; | |
409 | } | |
410 | ep->type = info.type; | |
411 | ||
412 | info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; | |
29cc8897 | 413 | info.maxpacket = usb_endpoint_maxp(desc); |
c4144247 YS |
414 | info.interval = desc->bInterval; |
415 | if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) | |
416 | info.dir_in = 1; | |
417 | else | |
418 | info.dir_in = 0; | |
419 | ||
420 | ret = pipe_buffer_setting(r8a66597, &info); | |
421 | if (ret < 0) { | |
422 | printk(KERN_ERR "pipe_buffer_setting fail\n"); | |
423 | return ret; | |
424 | } | |
425 | ||
426 | (*counter)++; | |
427 | if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK) | |
428 | r8a66597->bulk++; | |
429 | ||
430 | r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma); | |
431 | pipe_initialize(ep); | |
432 | ||
433 | return 0; | |
434 | } | |
435 | ||
436 | static int free_pipe_config(struct r8a66597_ep *ep) | |
437 | { | |
438 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
439 | struct r8a66597_pipe_info info; | |
440 | ||
441 | info.pipe = ep->pipenum; | |
442 | info.type = ep->type; | |
443 | pipe_buffer_release(r8a66597, &info); | |
444 | r8a66597_ep_release(ep); | |
445 | ||
446 | return 0; | |
447 | } | |
448 | ||
449 | /*-------------------------------------------------------------------------*/ | |
450 | static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum) | |
451 | { | |
452 | enable_irq_ready(r8a66597, pipenum); | |
453 | enable_irq_nrdy(r8a66597, pipenum); | |
454 | } | |
455 | ||
456 | static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum) | |
457 | { | |
458 | disable_irq_ready(r8a66597, pipenum); | |
459 | disable_irq_nrdy(r8a66597, pipenum); | |
460 | } | |
461 | ||
462 | /* if complete is true, gadget driver complete function is not call */ | |
463 | static void control_end(struct r8a66597 *r8a66597, unsigned ccpl) | |
464 | { | |
465 | r8a66597->ep[0].internal_ccpl = ccpl; | |
466 | pipe_start(r8a66597, 0); | |
467 | r8a66597_bset(r8a66597, CCPL, DCPCTR); | |
468 | } | |
469 | ||
470 | static void start_ep0_write(struct r8a66597_ep *ep, | |
471 | struct r8a66597_request *req) | |
472 | { | |
473 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
474 | ||
475 | pipe_change(r8a66597, ep->pipenum); | |
476 | r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL); | |
477 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
478 | if (req->req.length == 0) { | |
479 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
480 | pipe_start(r8a66597, 0); | |
481 | transfer_complete(ep, req, 0); | |
482 | } else { | |
483 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | |
484 | irq_ep0_write(ep, req); | |
485 | } | |
486 | } | |
487 | ||
488 | static void start_packet_write(struct r8a66597_ep *ep, | |
489 | struct r8a66597_request *req) | |
490 | { | |
491 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
492 | u16 tmp; | |
493 | ||
494 | pipe_change(r8a66597, ep->pipenum); | |
495 | disable_irq_empty(r8a66597, ep->pipenum); | |
496 | pipe_start(r8a66597, ep->pipenum); | |
497 | ||
498 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
499 | if (unlikely((tmp & FRDY) == 0)) | |
500 | pipe_irq_enable(r8a66597, ep->pipenum); | |
501 | else | |
502 | irq_packet_write(ep, req); | |
503 | } | |
504 | ||
505 | static void start_packet_read(struct r8a66597_ep *ep, | |
506 | struct r8a66597_request *req) | |
507 | { | |
508 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
509 | u16 pipenum = ep->pipenum; | |
510 | ||
511 | if (ep->pipenum == 0) { | |
512 | r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL); | |
513 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
514 | pipe_start(r8a66597, pipenum); | |
515 | pipe_irq_enable(r8a66597, pipenum); | |
516 | } else { | |
517 | if (ep->use_dma) { | |
518 | r8a66597_bset(r8a66597, TRCLR, ep->fifosel); | |
519 | pipe_change(r8a66597, pipenum); | |
520 | r8a66597_bset(r8a66597, TRENB, ep->fifosel); | |
521 | r8a66597_write(r8a66597, | |
522 | (req->req.length + ep->ep.maxpacket - 1) | |
523 | / ep->ep.maxpacket, | |
524 | ep->fifotrn); | |
525 | } | |
526 | pipe_start(r8a66597, pipenum); /* trigger once */ | |
527 | pipe_irq_enable(r8a66597, pipenum); | |
528 | } | |
529 | } | |
530 | ||
531 | static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
532 | { | |
533 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | |
534 | start_packet_write(ep, req); | |
535 | else | |
536 | start_packet_read(ep, req); | |
537 | } | |
538 | ||
539 | static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
540 | { | |
541 | u16 ctsq; | |
542 | ||
543 | ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ; | |
544 | ||
545 | switch (ctsq) { | |
546 | case CS_RDDS: | |
547 | start_ep0_write(ep, req); | |
548 | break; | |
549 | case CS_WRDS: | |
550 | start_packet_read(ep, req); | |
551 | break; | |
552 | ||
553 | case CS_WRND: | |
554 | control_end(ep->r8a66597, 0); | |
555 | break; | |
556 | default: | |
557 | printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq); | |
558 | break; | |
559 | } | |
560 | } | |
561 | ||
562 | static void init_controller(struct r8a66597 *r8a66597) | |
563 | { | |
564 | u16 vif = r8a66597->pdata->vif ? LDRV : 0; | |
565 | u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0; | |
566 | u16 endian = r8a66597->pdata->endian ? BIGEND : 0; | |
567 | ||
568 | if (r8a66597->pdata->on_chip) { | |
5154e9f1 YS |
569 | if (r8a66597->pdata->buswait) |
570 | r8a66597_write(r8a66597, r8a66597->pdata->buswait, | |
571 | SYSCFG1); | |
572 | else | |
573 | r8a66597_write(r8a66597, 0x0f, SYSCFG1); | |
c4144247 YS |
574 | r8a66597_bset(r8a66597, HSE, SYSCFG0); |
575 | ||
576 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
577 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
578 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | |
579 | ||
580 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
581 | ||
582 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | |
583 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | |
584 | DMA0CFG); | |
585 | } else { | |
586 | r8a66597_bset(r8a66597, vif | endian, PINCFG); | |
587 | r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */ | |
588 | r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), | |
589 | XTAL, SYSCFG0); | |
590 | ||
591 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
592 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
593 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | |
594 | ||
595 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | |
596 | ||
597 | msleep(3); | |
598 | ||
599 | r8a66597_bset(r8a66597, PLLC, SYSCFG0); | |
600 | ||
601 | msleep(1); | |
602 | ||
603 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
604 | ||
605 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | |
606 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | |
607 | DMA0CFG); | |
608 | } | |
609 | } | |
610 | ||
611 | static void disable_controller(struct r8a66597 *r8a66597) | |
612 | { | |
613 | if (r8a66597->pdata->on_chip) { | |
614 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
96fe53ef | 615 | r8a66597_bclr(r8a66597, UTST, TESTMODE); |
c4144247 | 616 | |
0bb886d2 | 617 | /* disable interrupts */ |
c4144247 YS |
618 | r8a66597_write(r8a66597, 0, INTENB0); |
619 | r8a66597_write(r8a66597, 0, INTENB1); | |
0bb886d2 MD |
620 | r8a66597_write(r8a66597, 0, BRDYENB); |
621 | r8a66597_write(r8a66597, 0, BEMPENB); | |
622 | r8a66597_write(r8a66597, 0, NRDYENB); | |
623 | ||
624 | /* clear status */ | |
625 | r8a66597_write(r8a66597, 0, BRDYSTS); | |
626 | r8a66597_write(r8a66597, 0, NRDYSTS); | |
627 | r8a66597_write(r8a66597, 0, BEMPSTS); | |
c4144247 YS |
628 | |
629 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
630 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | |
631 | ||
632 | } else { | |
96fe53ef | 633 | r8a66597_bclr(r8a66597, UTST, TESTMODE); |
c4144247 YS |
634 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); |
635 | udelay(1); | |
636 | r8a66597_bclr(r8a66597, PLLC, SYSCFG0); | |
637 | udelay(1); | |
638 | udelay(1); | |
639 | r8a66597_bclr(r8a66597, XCKE, SYSCFG0); | |
640 | } | |
641 | } | |
642 | ||
643 | static void r8a66597_start_xclock(struct r8a66597 *r8a66597) | |
644 | { | |
645 | u16 tmp; | |
646 | ||
647 | if (!r8a66597->pdata->on_chip) { | |
648 | tmp = r8a66597_read(r8a66597, SYSCFG0); | |
649 | if (!(tmp & XCKE)) | |
650 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | |
651 | } | |
652 | } | |
653 | ||
654 | static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep) | |
655 | { | |
656 | return list_entry(ep->queue.next, struct r8a66597_request, queue); | |
657 | } | |
658 | ||
659 | /*-------------------------------------------------------------------------*/ | |
660 | static void transfer_complete(struct r8a66597_ep *ep, | |
661 | struct r8a66597_request *req, int status) | |
662 | __releases(r8a66597->lock) | |
663 | __acquires(r8a66597->lock) | |
664 | { | |
665 | int restart = 0; | |
666 | ||
667 | if (unlikely(ep->pipenum == 0)) { | |
668 | if (ep->internal_ccpl) { | |
669 | ep->internal_ccpl = 0; | |
670 | return; | |
671 | } | |
672 | } | |
673 | ||
674 | list_del_init(&req->queue); | |
675 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
676 | req->req.status = -ESHUTDOWN; | |
677 | else | |
678 | req->req.status = status; | |
679 | ||
680 | if (!list_empty(&ep->queue)) | |
681 | restart = 1; | |
682 | ||
683 | spin_unlock(&ep->r8a66597->lock); | |
684 | req->req.complete(&ep->ep, &req->req); | |
685 | spin_lock(&ep->r8a66597->lock); | |
686 | ||
687 | if (restart) { | |
688 | req = get_request_from_ep(ep); | |
689 | if (ep->desc) | |
690 | start_packet(ep, req); | |
691 | } | |
692 | } | |
693 | ||
694 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
695 | { | |
696 | int i; | |
697 | u16 tmp; | |
698 | unsigned bufsize; | |
699 | size_t size; | |
700 | void *buf; | |
701 | u16 pipenum = ep->pipenum; | |
702 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
703 | ||
704 | pipe_change(r8a66597, pipenum); | |
705 | r8a66597_bset(r8a66597, ISEL, ep->fifosel); | |
706 | ||
707 | i = 0; | |
708 | do { | |
709 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
710 | if (i++ > 100000) { | |
711 | printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus" | |
712 | "conflict. please power off this controller."); | |
713 | return; | |
714 | } | |
715 | ndelay(1); | |
716 | } while ((tmp & FRDY) == 0); | |
717 | ||
718 | /* prepare parameters */ | |
719 | bufsize = get_buffer_size(r8a66597, pipenum); | |
720 | buf = req->req.buf + req->req.actual; | |
721 | size = min(bufsize, req->req.length - req->req.actual); | |
722 | ||
723 | /* write fifo */ | |
724 | if (req->req.buf) { | |
725 | if (size > 0) | |
726 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | |
727 | if ((size == 0) || ((size % ep->ep.maxpacket) != 0)) | |
728 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
729 | } | |
730 | ||
731 | /* update parameters */ | |
732 | req->req.actual += size; | |
733 | ||
734 | /* check transfer finish */ | |
735 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
736 | || (size % ep->ep.maxpacket) | |
737 | || (size == 0)) { | |
738 | disable_irq_ready(r8a66597, pipenum); | |
739 | disable_irq_empty(r8a66597, pipenum); | |
740 | } else { | |
741 | disable_irq_ready(r8a66597, pipenum); | |
742 | enable_irq_empty(r8a66597, pipenum); | |
743 | } | |
744 | pipe_start(r8a66597, pipenum); | |
745 | } | |
746 | ||
747 | static void irq_packet_write(struct r8a66597_ep *ep, | |
748 | struct r8a66597_request *req) | |
749 | { | |
750 | u16 tmp; | |
751 | unsigned bufsize; | |
752 | size_t size; | |
753 | void *buf; | |
754 | u16 pipenum = ep->pipenum; | |
755 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
756 | ||
757 | pipe_change(r8a66597, pipenum); | |
758 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
759 | if (unlikely((tmp & FRDY) == 0)) { | |
760 | pipe_stop(r8a66597, pipenum); | |
761 | pipe_irq_disable(r8a66597, pipenum); | |
762 | printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum); | |
763 | return; | |
764 | } | |
765 | ||
766 | /* prepare parameters */ | |
767 | bufsize = get_buffer_size(r8a66597, pipenum); | |
768 | buf = req->req.buf + req->req.actual; | |
769 | size = min(bufsize, req->req.length - req->req.actual); | |
770 | ||
771 | /* write fifo */ | |
772 | if (req->req.buf) { | |
773 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | |
774 | if ((size == 0) | |
775 | || ((size % ep->ep.maxpacket) != 0) | |
776 | || ((bufsize != ep->ep.maxpacket) | |
777 | && (bufsize > size))) | |
778 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
779 | } | |
780 | ||
781 | /* update parameters */ | |
782 | req->req.actual += size; | |
783 | /* check transfer finish */ | |
784 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
785 | || (size % ep->ep.maxpacket) | |
786 | || (size == 0)) { | |
787 | disable_irq_ready(r8a66597, pipenum); | |
788 | enable_irq_empty(r8a66597, pipenum); | |
789 | } else { | |
790 | disable_irq_empty(r8a66597, pipenum); | |
791 | pipe_irq_enable(r8a66597, pipenum); | |
792 | } | |
793 | } | |
794 | ||
795 | static void irq_packet_read(struct r8a66597_ep *ep, | |
796 | struct r8a66597_request *req) | |
797 | { | |
798 | u16 tmp; | |
799 | int rcv_len, bufsize, req_len; | |
800 | int size; | |
801 | void *buf; | |
802 | u16 pipenum = ep->pipenum; | |
803 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
804 | int finish = 0; | |
805 | ||
806 | pipe_change(r8a66597, pipenum); | |
807 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
808 | if (unlikely((tmp & FRDY) == 0)) { | |
809 | req->req.status = -EPIPE; | |
810 | pipe_stop(r8a66597, pipenum); | |
811 | pipe_irq_disable(r8a66597, pipenum); | |
812 | printk(KERN_ERR "read fifo not ready"); | |
813 | return; | |
814 | } | |
815 | ||
816 | /* prepare parameters */ | |
817 | rcv_len = tmp & DTLN; | |
818 | bufsize = get_buffer_size(r8a66597, pipenum); | |
819 | ||
820 | buf = req->req.buf + req->req.actual; | |
821 | req_len = req->req.length - req->req.actual; | |
822 | if (rcv_len < bufsize) | |
823 | size = min(rcv_len, req_len); | |
824 | else | |
825 | size = min(bufsize, req_len); | |
826 | ||
827 | /* update parameters */ | |
828 | req->req.actual += size; | |
829 | ||
830 | /* check transfer finish */ | |
831 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
832 | || (size % ep->ep.maxpacket) | |
833 | || (size == 0)) { | |
834 | pipe_stop(r8a66597, pipenum); | |
835 | pipe_irq_disable(r8a66597, pipenum); | |
836 | finish = 1; | |
837 | } | |
838 | ||
839 | /* read fifo */ | |
840 | if (req->req.buf) { | |
841 | if (size == 0) | |
842 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
843 | else | |
844 | r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size); | |
845 | ||
846 | } | |
847 | ||
848 | if ((ep->pipenum != 0) && finish) | |
849 | transfer_complete(ep, req, 0); | |
850 | } | |
851 | ||
852 | static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb) | |
853 | { | |
854 | u16 check; | |
855 | u16 pipenum; | |
856 | struct r8a66597_ep *ep; | |
857 | struct r8a66597_request *req; | |
858 | ||
859 | if ((status & BRDY0) && (enb & BRDY0)) { | |
860 | r8a66597_write(r8a66597, ~BRDY0, BRDYSTS); | |
861 | r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL); | |
862 | ||
863 | ep = &r8a66597->ep[0]; | |
864 | req = get_request_from_ep(ep); | |
865 | irq_packet_read(ep, req); | |
866 | } else { | |
867 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | |
868 | check = 1 << pipenum; | |
869 | if ((status & check) && (enb & check)) { | |
870 | r8a66597_write(r8a66597, ~check, BRDYSTS); | |
871 | ep = r8a66597->pipenum2ep[pipenum]; | |
872 | req = get_request_from_ep(ep); | |
873 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | |
874 | irq_packet_write(ep, req); | |
875 | else | |
876 | irq_packet_read(ep, req); | |
877 | } | |
878 | } | |
879 | } | |
880 | } | |
881 | ||
882 | static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb) | |
883 | { | |
884 | u16 tmp; | |
885 | u16 check; | |
886 | u16 pipenum; | |
887 | struct r8a66597_ep *ep; | |
888 | struct r8a66597_request *req; | |
889 | ||
890 | if ((status & BEMP0) && (enb & BEMP0)) { | |
891 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | |
892 | ||
893 | ep = &r8a66597->ep[0]; | |
894 | req = get_request_from_ep(ep); | |
895 | irq_ep0_write(ep, req); | |
896 | } else { | |
897 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | |
898 | check = 1 << pipenum; | |
899 | if ((status & check) && (enb & check)) { | |
900 | r8a66597_write(r8a66597, ~check, BEMPSTS); | |
901 | tmp = control_reg_get(r8a66597, pipenum); | |
902 | if ((tmp & INBUFM) == 0) { | |
903 | disable_irq_empty(r8a66597, pipenum); | |
904 | pipe_irq_disable(r8a66597, pipenum); | |
905 | pipe_stop(r8a66597, pipenum); | |
906 | ep = r8a66597->pipenum2ep[pipenum]; | |
907 | req = get_request_from_ep(ep); | |
908 | if (!list_empty(&ep->queue)) | |
909 | transfer_complete(ep, req, 0); | |
910 | } | |
911 | } | |
912 | } | |
913 | } | |
914 | } | |
915 | ||
916 | static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
917 | __releases(r8a66597->lock) | |
918 | __acquires(r8a66597->lock) | |
919 | { | |
920 | struct r8a66597_ep *ep; | |
921 | u16 pid; | |
922 | u16 status = 0; | |
923 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
924 | ||
925 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
926 | case USB_RECIP_DEVICE: | |
927 | status = 1 << USB_DEVICE_SELF_POWERED; | |
928 | break; | |
929 | case USB_RECIP_INTERFACE: | |
930 | status = 0; | |
931 | break; | |
932 | case USB_RECIP_ENDPOINT: | |
933 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
934 | pid = control_reg_get_pid(r8a66597, ep->pipenum); | |
935 | if (pid == PID_STALL) | |
936 | status = 1 << USB_ENDPOINT_HALT; | |
937 | else | |
938 | status = 0; | |
939 | break; | |
940 | default: | |
941 | pipe_stall(r8a66597, 0); | |
942 | return; /* exit */ | |
943 | } | |
944 | ||
945 | r8a66597->ep0_data = cpu_to_le16(status); | |
946 | r8a66597->ep0_req->buf = &r8a66597->ep0_data; | |
947 | r8a66597->ep0_req->length = 2; | |
948 | /* AV: what happens if we get called again before that gets through? */ | |
949 | spin_unlock(&r8a66597->lock); | |
950 | r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL); | |
951 | spin_lock(&r8a66597->lock); | |
952 | } | |
953 | ||
954 | static void clear_feature(struct r8a66597 *r8a66597, | |
955 | struct usb_ctrlrequest *ctrl) | |
956 | { | |
957 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
958 | case USB_RECIP_DEVICE: | |
959 | control_end(r8a66597, 1); | |
960 | break; | |
961 | case USB_RECIP_INTERFACE: | |
962 | control_end(r8a66597, 1); | |
963 | break; | |
964 | case USB_RECIP_ENDPOINT: { | |
965 | struct r8a66597_ep *ep; | |
966 | struct r8a66597_request *req; | |
967 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
968 | ||
969 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
9e7291c1 YS |
970 | if (!ep->wedge) { |
971 | pipe_stop(r8a66597, ep->pipenum); | |
972 | control_reg_sqclr(r8a66597, ep->pipenum); | |
973 | spin_unlock(&r8a66597->lock); | |
974 | usb_ep_clear_halt(&ep->ep); | |
975 | spin_lock(&r8a66597->lock); | |
976 | } | |
c4144247 YS |
977 | |
978 | control_end(r8a66597, 1); | |
979 | ||
980 | req = get_request_from_ep(ep); | |
981 | if (ep->busy) { | |
982 | ep->busy = 0; | |
983 | if (list_empty(&ep->queue)) | |
984 | break; | |
985 | start_packet(ep, req); | |
986 | } else if (!list_empty(&ep->queue)) | |
987 | pipe_start(r8a66597, ep->pipenum); | |
988 | } | |
989 | break; | |
990 | default: | |
991 | pipe_stall(r8a66597, 0); | |
992 | break; | |
993 | } | |
994 | } | |
995 | ||
996 | static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
997 | { | |
96fe53ef YS |
998 | u16 tmp; |
999 | int timeout = 3000; | |
c4144247 YS |
1000 | |
1001 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
1002 | case USB_RECIP_DEVICE: | |
96fe53ef YS |
1003 | switch (le16_to_cpu(ctrl->wValue)) { |
1004 | case USB_DEVICE_TEST_MODE: | |
1005 | control_end(r8a66597, 1); | |
1006 | /* Wait for the completion of status stage */ | |
1007 | do { | |
1008 | tmp = r8a66597_read(r8a66597, INTSTS0) & CTSQ; | |
1009 | udelay(1); | |
1010 | } while (tmp != CS_IDST || timeout-- > 0); | |
1011 | ||
1012 | if (tmp == CS_IDST) | |
1013 | r8a66597_bset(r8a66597, | |
1014 | le16_to_cpu(ctrl->wIndex >> 8), | |
1015 | TESTMODE); | |
1016 | break; | |
1017 | default: | |
1018 | pipe_stall(r8a66597, 0); | |
1019 | break; | |
1020 | } | |
c4144247 YS |
1021 | break; |
1022 | case USB_RECIP_INTERFACE: | |
1023 | control_end(r8a66597, 1); | |
1024 | break; | |
1025 | case USB_RECIP_ENDPOINT: { | |
1026 | struct r8a66597_ep *ep; | |
1027 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
1028 | ||
1029 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
1030 | pipe_stall(r8a66597, ep->pipenum); | |
1031 | ||
1032 | control_end(r8a66597, 1); | |
1033 | } | |
1034 | break; | |
1035 | default: | |
1036 | pipe_stall(r8a66597, 0); | |
1037 | break; | |
1038 | } | |
1039 | } | |
1040 | ||
1041 | /* if return value is true, call class driver's setup() */ | |
1042 | static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
1043 | { | |
1044 | u16 *p = (u16 *)ctrl; | |
1045 | unsigned long offset = USBREQ; | |
1046 | int i, ret = 0; | |
1047 | ||
1048 | /* read fifo */ | |
1049 | r8a66597_write(r8a66597, ~VALID, INTSTS0); | |
1050 | ||
1051 | for (i = 0; i < 4; i++) | |
1052 | p[i] = r8a66597_read(r8a66597, offset + i*2); | |
1053 | ||
1054 | /* check request */ | |
1055 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | |
1056 | switch (ctrl->bRequest) { | |
1057 | case USB_REQ_GET_STATUS: | |
1058 | get_status(r8a66597, ctrl); | |
1059 | break; | |
1060 | case USB_REQ_CLEAR_FEATURE: | |
1061 | clear_feature(r8a66597, ctrl); | |
1062 | break; | |
1063 | case USB_REQ_SET_FEATURE: | |
1064 | set_feature(r8a66597, ctrl); | |
1065 | break; | |
1066 | default: | |
1067 | ret = 1; | |
1068 | break; | |
1069 | } | |
1070 | } else | |
1071 | ret = 1; | |
1072 | return ret; | |
1073 | } | |
1074 | ||
1075 | static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597) | |
1076 | { | |
1077 | u16 speed = get_usb_speed(r8a66597); | |
1078 | ||
1079 | switch (speed) { | |
1080 | case HSMODE: | |
1081 | r8a66597->gadget.speed = USB_SPEED_HIGH; | |
1082 | break; | |
1083 | case FSMODE: | |
1084 | r8a66597->gadget.speed = USB_SPEED_FULL; | |
1085 | break; | |
1086 | default: | |
1087 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | |
1088 | printk(KERN_ERR "USB speed unknown\n"); | |
1089 | } | |
1090 | } | |
1091 | ||
1092 | static void irq_device_state(struct r8a66597 *r8a66597) | |
1093 | { | |
1094 | u16 dvsq; | |
1095 | ||
1096 | dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ; | |
1097 | r8a66597_write(r8a66597, ~DVST, INTSTS0); | |
1098 | ||
1099 | if (dvsq == DS_DFLT) { | |
1100 | /* bus reset */ | |
2c2da179 | 1101 | spin_unlock(&r8a66597->lock); |
c4144247 | 1102 | r8a66597->driver->disconnect(&r8a66597->gadget); |
2c2da179 | 1103 | spin_lock(&r8a66597->lock); |
c4144247 YS |
1104 | r8a66597_update_usb_speed(r8a66597); |
1105 | } | |
1106 | if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG) | |
1107 | r8a66597_update_usb_speed(r8a66597); | |
1108 | if ((dvsq == DS_CNFG || dvsq == DS_ADDS) | |
1109 | && r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
1110 | r8a66597_update_usb_speed(r8a66597); | |
1111 | ||
1112 | r8a66597->old_dvsq = dvsq; | |
1113 | } | |
1114 | ||
1115 | static void irq_control_stage(struct r8a66597 *r8a66597) | |
1116 | __releases(r8a66597->lock) | |
1117 | __acquires(r8a66597->lock) | |
1118 | { | |
1119 | struct usb_ctrlrequest ctrl; | |
1120 | u16 ctsq; | |
1121 | ||
1122 | ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ; | |
1123 | r8a66597_write(r8a66597, ~CTRT, INTSTS0); | |
1124 | ||
1125 | switch (ctsq) { | |
1126 | case CS_IDST: { | |
1127 | struct r8a66597_ep *ep; | |
1128 | struct r8a66597_request *req; | |
1129 | ep = &r8a66597->ep[0]; | |
1130 | req = get_request_from_ep(ep); | |
1131 | transfer_complete(ep, req, 0); | |
1132 | } | |
1133 | break; | |
1134 | ||
1135 | case CS_RDDS: | |
1136 | case CS_WRDS: | |
1137 | case CS_WRND: | |
1138 | if (setup_packet(r8a66597, &ctrl)) { | |
1139 | spin_unlock(&r8a66597->lock); | |
1140 | if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl) | |
1141 | < 0) | |
1142 | pipe_stall(r8a66597, 0); | |
1143 | spin_lock(&r8a66597->lock); | |
1144 | } | |
1145 | break; | |
1146 | case CS_RDSS: | |
1147 | case CS_WRSS: | |
1148 | control_end(r8a66597, 0); | |
1149 | break; | |
1150 | default: | |
1151 | printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq); | |
1152 | break; | |
1153 | } | |
1154 | } | |
1155 | ||
1156 | static irqreturn_t r8a66597_irq(int irq, void *_r8a66597) | |
1157 | { | |
1158 | struct r8a66597 *r8a66597 = _r8a66597; | |
1159 | u16 intsts0; | |
1160 | u16 intenb0; | |
1161 | u16 brdysts, nrdysts, bempsts; | |
1162 | u16 brdyenb, nrdyenb, bempenb; | |
1163 | u16 savepipe; | |
1164 | u16 mask0; | |
1165 | ||
1166 | spin_lock(&r8a66597->lock); | |
1167 | ||
1168 | intsts0 = r8a66597_read(r8a66597, INTSTS0); | |
1169 | intenb0 = r8a66597_read(r8a66597, INTENB0); | |
1170 | ||
1171 | savepipe = r8a66597_read(r8a66597, CFIFOSEL); | |
1172 | ||
1173 | mask0 = intsts0 & intenb0; | |
1174 | if (mask0) { | |
1175 | brdysts = r8a66597_read(r8a66597, BRDYSTS); | |
1176 | nrdysts = r8a66597_read(r8a66597, NRDYSTS); | |
1177 | bempsts = r8a66597_read(r8a66597, BEMPSTS); | |
1178 | brdyenb = r8a66597_read(r8a66597, BRDYENB); | |
1179 | nrdyenb = r8a66597_read(r8a66597, NRDYENB); | |
1180 | bempenb = r8a66597_read(r8a66597, BEMPENB); | |
1181 | ||
1182 | if (mask0 & VBINT) { | |
1183 | r8a66597_write(r8a66597, 0xffff & ~VBINT, | |
1184 | INTSTS0); | |
1185 | r8a66597_start_xclock(r8a66597); | |
1186 | ||
1187 | /* start vbus sampling */ | |
1188 | r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0) | |
1189 | & VBSTS; | |
1190 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1191 | ||
1192 | mod_timer(&r8a66597->timer, | |
1193 | jiffies + msecs_to_jiffies(50)); | |
1194 | } | |
1195 | if (intsts0 & DVSQ) | |
1196 | irq_device_state(r8a66597); | |
1197 | ||
1198 | if ((intsts0 & BRDY) && (intenb0 & BRDYE) | |
1199 | && (brdysts & brdyenb)) | |
1200 | irq_pipe_ready(r8a66597, brdysts, brdyenb); | |
1201 | if ((intsts0 & BEMP) && (intenb0 & BEMPE) | |
1202 | && (bempsts & bempenb)) | |
1203 | irq_pipe_empty(r8a66597, bempsts, bempenb); | |
1204 | ||
1205 | if (intsts0 & CTRT) | |
1206 | irq_control_stage(r8a66597); | |
1207 | } | |
1208 | ||
1209 | r8a66597_write(r8a66597, savepipe, CFIFOSEL); | |
1210 | ||
1211 | spin_unlock(&r8a66597->lock); | |
1212 | return IRQ_HANDLED; | |
1213 | } | |
1214 | ||
1215 | static void r8a66597_timer(unsigned long _r8a66597) | |
1216 | { | |
1217 | struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597; | |
1218 | unsigned long flags; | |
1219 | u16 tmp; | |
1220 | ||
1221 | spin_lock_irqsave(&r8a66597->lock, flags); | |
1222 | tmp = r8a66597_read(r8a66597, SYSCFG0); | |
1223 | if (r8a66597->scount > 0) { | |
1224 | tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS; | |
1225 | if (tmp == r8a66597->old_vbus) { | |
1226 | r8a66597->scount--; | |
1227 | if (r8a66597->scount == 0) { | |
1228 | if (tmp == VBSTS) | |
1229 | r8a66597_usb_connect(r8a66597); | |
1230 | else | |
1231 | r8a66597_usb_disconnect(r8a66597); | |
1232 | } else { | |
1233 | mod_timer(&r8a66597->timer, | |
1234 | jiffies + msecs_to_jiffies(50)); | |
1235 | } | |
1236 | } else { | |
1237 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1238 | r8a66597->old_vbus = tmp; | |
1239 | mod_timer(&r8a66597->timer, | |
1240 | jiffies + msecs_to_jiffies(50)); | |
1241 | } | |
1242 | } | |
1243 | spin_unlock_irqrestore(&r8a66597->lock, flags); | |
1244 | } | |
1245 | ||
1246 | /*-------------------------------------------------------------------------*/ | |
1247 | static int r8a66597_enable(struct usb_ep *_ep, | |
1248 | const struct usb_endpoint_descriptor *desc) | |
1249 | { | |
1250 | struct r8a66597_ep *ep; | |
1251 | ||
1252 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1253 | return alloc_pipe_config(ep, desc); | |
1254 | } | |
1255 | ||
1256 | static int r8a66597_disable(struct usb_ep *_ep) | |
1257 | { | |
1258 | struct r8a66597_ep *ep; | |
1259 | struct r8a66597_request *req; | |
1260 | unsigned long flags; | |
1261 | ||
1262 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1263 | BUG_ON(!ep); | |
1264 | ||
1265 | while (!list_empty(&ep->queue)) { | |
1266 | req = get_request_from_ep(ep); | |
1267 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1268 | transfer_complete(ep, req, -ECONNRESET); | |
1269 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1270 | } | |
1271 | ||
1272 | pipe_irq_disable(ep->r8a66597, ep->pipenum); | |
1273 | return free_pipe_config(ep); | |
1274 | } | |
1275 | ||
1276 | static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep, | |
1277 | gfp_t gfp_flags) | |
1278 | { | |
1279 | struct r8a66597_request *req; | |
1280 | ||
1281 | req = kzalloc(sizeof(struct r8a66597_request), gfp_flags); | |
1282 | if (!req) | |
1283 | return NULL; | |
1284 | ||
1285 | INIT_LIST_HEAD(&req->queue); | |
1286 | ||
1287 | return &req->req; | |
1288 | } | |
1289 | ||
1290 | static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
1291 | { | |
1292 | struct r8a66597_request *req; | |
1293 | ||
1294 | req = container_of(_req, struct r8a66597_request, req); | |
1295 | kfree(req); | |
1296 | } | |
1297 | ||
1298 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | |
1299 | gfp_t gfp_flags) | |
1300 | { | |
1301 | struct r8a66597_ep *ep; | |
1302 | struct r8a66597_request *req; | |
1303 | unsigned long flags; | |
1304 | int request = 0; | |
1305 | ||
1306 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1307 | req = container_of(_req, struct r8a66597_request, req); | |
1308 | ||
1309 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
1310 | return -ESHUTDOWN; | |
1311 | ||
1312 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1313 | ||
1314 | if (list_empty(&ep->queue)) | |
1315 | request = 1; | |
1316 | ||
1317 | list_add_tail(&req->queue, &ep->queue); | |
1318 | req->req.actual = 0; | |
1319 | req->req.status = -EINPROGRESS; | |
1320 | ||
1321 | if (ep->desc == NULL) /* control */ | |
1322 | start_ep0(ep, req); | |
1323 | else { | |
1324 | if (request && !ep->busy) | |
1325 | start_packet(ep, req); | |
1326 | } | |
1327 | ||
1328 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1329 | ||
1330 | return 0; | |
1331 | } | |
1332 | ||
1333 | static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1334 | { | |
1335 | struct r8a66597_ep *ep; | |
1336 | struct r8a66597_request *req; | |
1337 | unsigned long flags; | |
1338 | ||
1339 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1340 | req = container_of(_req, struct r8a66597_request, req); | |
1341 | ||
1342 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1343 | if (!list_empty(&ep->queue)) | |
1344 | transfer_complete(ep, req, -ECONNRESET); | |
1345 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1346 | ||
1347 | return 0; | |
1348 | } | |
1349 | ||
1350 | static int r8a66597_set_halt(struct usb_ep *_ep, int value) | |
1351 | { | |
1352 | struct r8a66597_ep *ep; | |
1353 | struct r8a66597_request *req; | |
1354 | unsigned long flags; | |
1355 | int ret = 0; | |
1356 | ||
1357 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1358 | req = get_request_from_ep(ep); | |
1359 | ||
1360 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1361 | if (!list_empty(&ep->queue)) { | |
1362 | ret = -EAGAIN; | |
1363 | goto out; | |
1364 | } | |
1365 | if (value) { | |
1366 | ep->busy = 1; | |
1367 | pipe_stall(ep->r8a66597, ep->pipenum); | |
1368 | } else { | |
1369 | ep->busy = 0; | |
9e7291c1 | 1370 | ep->wedge = 0; |
c4144247 YS |
1371 | pipe_stop(ep->r8a66597, ep->pipenum); |
1372 | } | |
1373 | ||
1374 | out: | |
1375 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1376 | return ret; | |
1377 | } | |
1378 | ||
9e7291c1 YS |
1379 | static int r8a66597_set_wedge(struct usb_ep *_ep) |
1380 | { | |
1381 | struct r8a66597_ep *ep; | |
1382 | unsigned long flags; | |
1383 | ||
1384 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1385 | ||
1386 | if (!ep || !ep->desc) | |
1387 | return -EINVAL; | |
1388 | ||
1389 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1390 | ep->wedge = 1; | |
1391 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1392 | ||
1393 | return usb_ep_set_halt(_ep); | |
1394 | } | |
1395 | ||
c4144247 YS |
1396 | static void r8a66597_fifo_flush(struct usb_ep *_ep) |
1397 | { | |
1398 | struct r8a66597_ep *ep; | |
1399 | unsigned long flags; | |
1400 | ||
1401 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1402 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1403 | if (list_empty(&ep->queue) && !ep->busy) { | |
1404 | pipe_stop(ep->r8a66597, ep->pipenum); | |
1405 | r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr); | |
1406 | } | |
1407 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1408 | } | |
1409 | ||
1410 | static struct usb_ep_ops r8a66597_ep_ops = { | |
1411 | .enable = r8a66597_enable, | |
1412 | .disable = r8a66597_disable, | |
1413 | ||
1414 | .alloc_request = r8a66597_alloc_request, | |
1415 | .free_request = r8a66597_free_request, | |
1416 | ||
1417 | .queue = r8a66597_queue, | |
1418 | .dequeue = r8a66597_dequeue, | |
1419 | ||
1420 | .set_halt = r8a66597_set_halt, | |
9e7291c1 | 1421 | .set_wedge = r8a66597_set_wedge, |
c4144247 YS |
1422 | .fifo_flush = r8a66597_fifo_flush, |
1423 | }; | |
1424 | ||
1425 | /*-------------------------------------------------------------------------*/ | |
1426 | static struct r8a66597 *the_controller; | |
1427 | ||
0f91349b | 1428 | static int r8a66597_start(struct usb_gadget_driver *driver, |
b0fca50f | 1429 | int (*bind)(struct usb_gadget *)) |
c4144247 YS |
1430 | { |
1431 | struct r8a66597 *r8a66597 = the_controller; | |
1432 | int retval; | |
1433 | ||
1434 | if (!driver | |
1435 | || driver->speed != USB_SPEED_HIGH | |
b0fca50f | 1436 | || !bind |
c4144247 YS |
1437 | || !driver->setup) |
1438 | return -EINVAL; | |
1439 | if (!r8a66597) | |
1440 | return -ENODEV; | |
1441 | if (r8a66597->driver) | |
1442 | return -EBUSY; | |
1443 | ||
1444 | /* hook up the driver */ | |
1445 | driver->driver.bus = NULL; | |
1446 | r8a66597->driver = driver; | |
1447 | r8a66597->gadget.dev.driver = &driver->driver; | |
1448 | ||
1449 | retval = device_add(&r8a66597->gadget.dev); | |
1450 | if (retval) { | |
1451 | printk(KERN_ERR "device_add error (%d)\n", retval); | |
1452 | goto error; | |
1453 | } | |
1454 | ||
b0fca50f | 1455 | retval = bind(&r8a66597->gadget); |
c4144247 YS |
1456 | if (retval) { |
1457 | printk(KERN_ERR "bind to driver error (%d)\n", retval); | |
1458 | device_del(&r8a66597->gadget.dev); | |
1459 | goto error; | |
1460 | } | |
1461 | ||
deafeb24 | 1462 | init_controller(r8a66597); |
c4144247 YS |
1463 | r8a66597_bset(r8a66597, VBSE, INTENB0); |
1464 | if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) { | |
1465 | r8a66597_start_xclock(r8a66597); | |
1466 | /* start vbus sampling */ | |
1467 | r8a66597->old_vbus = r8a66597_read(r8a66597, | |
1468 | INTSTS0) & VBSTS; | |
1469 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1470 | mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50)); | |
1471 | } | |
1472 | ||
1473 | return 0; | |
1474 | ||
1475 | error: | |
1476 | r8a66597->driver = NULL; | |
1477 | r8a66597->gadget.dev.driver = NULL; | |
1478 | ||
1479 | return retval; | |
1480 | } | |
c4144247 | 1481 | |
0f91349b | 1482 | static int r8a66597_stop(struct usb_gadget_driver *driver) |
c4144247 YS |
1483 | { |
1484 | struct r8a66597 *r8a66597 = the_controller; | |
1485 | unsigned long flags; | |
1486 | ||
1487 | if (driver != r8a66597->driver || !driver->unbind) | |
1488 | return -EINVAL; | |
1489 | ||
1490 | spin_lock_irqsave(&r8a66597->lock, flags); | |
1491 | if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN) | |
1492 | r8a66597_usb_disconnect(r8a66597); | |
c4144247 | 1493 | r8a66597_bclr(r8a66597, VBSE, INTENB0); |
deafeb24 YS |
1494 | disable_controller(r8a66597); |
1495 | spin_unlock_irqrestore(&r8a66597->lock, flags); | |
c4144247 YS |
1496 | |
1497 | driver->unbind(&r8a66597->gadget); | |
1498 | ||
c4144247 YS |
1499 | device_del(&r8a66597->gadget.dev); |
1500 | r8a66597->driver = NULL; | |
1501 | return 0; | |
1502 | } | |
c4144247 YS |
1503 | |
1504 | /*-------------------------------------------------------------------------*/ | |
1505 | static int r8a66597_get_frame(struct usb_gadget *_gadget) | |
1506 | { | |
1507 | struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget); | |
1508 | return r8a66597_read(r8a66597, FRMNUM) & 0x03FF; | |
1509 | } | |
1510 | ||
8ca13756 YS |
1511 | static int r8a66597_pullup(struct usb_gadget *gadget, int is_on) |
1512 | { | |
1513 | struct r8a66597 *r8a66597 = gadget_to_r8a66597(gadget); | |
1514 | unsigned long flags; | |
1515 | ||
1516 | spin_lock_irqsave(&r8a66597->lock, flags); | |
1517 | if (is_on) | |
1518 | r8a66597_bset(r8a66597, DPRPU, SYSCFG0); | |
1519 | else | |
1520 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
1521 | spin_unlock_irqrestore(&r8a66597->lock, flags); | |
1522 | ||
1523 | return 0; | |
1524 | } | |
1525 | ||
c4144247 YS |
1526 | static struct usb_gadget_ops r8a66597_gadget_ops = { |
1527 | .get_frame = r8a66597_get_frame, | |
0f91349b SAS |
1528 | .start = r8a66597_start, |
1529 | .stop = r8a66597_stop, | |
8ca13756 | 1530 | .pullup = r8a66597_pullup, |
c4144247 YS |
1531 | }; |
1532 | ||
1533 | static int __exit r8a66597_remove(struct platform_device *pdev) | |
1534 | { | |
1535 | struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); | |
1536 | ||
0f91349b | 1537 | usb_del_gadget_udc(&r8a66597->gadget); |
c4144247 | 1538 | del_timer_sync(&r8a66597->timer); |
e8b48669 | 1539 | iounmap(r8a66597->reg); |
c4144247 YS |
1540 | free_irq(platform_get_irq(pdev, 0), r8a66597); |
1541 | r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req); | |
d2e27bdf MD |
1542 | #ifdef CONFIG_HAVE_CLK |
1543 | if (r8a66597->pdata->on_chip) { | |
1544 | clk_disable(r8a66597->clk); | |
1545 | clk_put(r8a66597->clk); | |
1546 | } | |
1547 | #endif | |
c4144247 YS |
1548 | kfree(r8a66597); |
1549 | return 0; | |
1550 | } | |
1551 | ||
1552 | static void nop_completion(struct usb_ep *ep, struct usb_request *r) | |
1553 | { | |
1554 | } | |
1555 | ||
1556 | static int __init r8a66597_probe(struct platform_device *pdev) | |
1557 | { | |
d2e27bdf MD |
1558 | #ifdef CONFIG_HAVE_CLK |
1559 | char clk_name[8]; | |
1560 | #endif | |
c4144247 YS |
1561 | struct resource *res, *ires; |
1562 | int irq; | |
1563 | void __iomem *reg = NULL; | |
1564 | struct r8a66597 *r8a66597 = NULL; | |
1565 | int ret = 0; | |
1566 | int i; | |
1567 | unsigned long irq_trigger; | |
1568 | ||
1569 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1570 | if (!res) { | |
1571 | ret = -ENODEV; | |
1572 | printk(KERN_ERR "platform_get_resource error.\n"); | |
1573 | goto clean_up; | |
1574 | } | |
1575 | ||
1576 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1577 | irq = ires->start; | |
1578 | irq_trigger = ires->flags & IRQF_TRIGGER_MASK; | |
1579 | ||
1580 | if (irq < 0) { | |
1581 | ret = -ENODEV; | |
1582 | printk(KERN_ERR "platform_get_irq error.\n"); | |
1583 | goto clean_up; | |
1584 | } | |
1585 | ||
1586 | reg = ioremap(res->start, resource_size(res)); | |
1587 | if (reg == NULL) { | |
1588 | ret = -ENOMEM; | |
1589 | printk(KERN_ERR "ioremap error.\n"); | |
1590 | goto clean_up; | |
1591 | } | |
1592 | ||
1593 | /* initialize ucd */ | |
1594 | r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL); | |
1595 | if (r8a66597 == NULL) { | |
96f2a34d | 1596 | ret = -ENOMEM; |
c4144247 YS |
1597 | printk(KERN_ERR "kzalloc error\n"); |
1598 | goto clean_up; | |
1599 | } | |
1600 | ||
1601 | spin_lock_init(&r8a66597->lock); | |
1602 | dev_set_drvdata(&pdev->dev, r8a66597); | |
1603 | r8a66597->pdata = pdev->dev.platform_data; | |
1604 | r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; | |
1605 | ||
1606 | r8a66597->gadget.ops = &r8a66597_gadget_ops; | |
1607 | device_initialize(&r8a66597->gadget.dev); | |
1608 | dev_set_name(&r8a66597->gadget.dev, "gadget"); | |
1609 | r8a66597->gadget.is_dualspeed = 1; | |
1610 | r8a66597->gadget.dev.parent = &pdev->dev; | |
1611 | r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1612 | r8a66597->gadget.dev.release = pdev->dev.release; | |
1613 | r8a66597->gadget.name = udc_name; | |
1614 | ||
1615 | init_timer(&r8a66597->timer); | |
1616 | r8a66597->timer.function = r8a66597_timer; | |
1617 | r8a66597->timer.data = (unsigned long)r8a66597; | |
e8b48669 | 1618 | r8a66597->reg = reg; |
c4144247 | 1619 | |
d2e27bdf MD |
1620 | #ifdef CONFIG_HAVE_CLK |
1621 | if (r8a66597->pdata->on_chip) { | |
1622 | snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); | |
1623 | r8a66597->clk = clk_get(&pdev->dev, clk_name); | |
1624 | if (IS_ERR(r8a66597->clk)) { | |
1625 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", | |
1626 | clk_name); | |
1627 | ret = PTR_ERR(r8a66597->clk); | |
1628 | goto clean_up; | |
1629 | } | |
1630 | clk_enable(r8a66597->clk); | |
1631 | } | |
1632 | #endif | |
1633 | ||
c4144247 YS |
1634 | disable_controller(r8a66597); /* make sure controller is disabled */ |
1635 | ||
1636 | ret = request_irq(irq, r8a66597_irq, IRQF_DISABLED | IRQF_SHARED, | |
1637 | udc_name, r8a66597); | |
1638 | if (ret < 0) { | |
1639 | printk(KERN_ERR "request_irq error (%d)\n", ret); | |
d2e27bdf | 1640 | goto clean_up2; |
c4144247 YS |
1641 | } |
1642 | ||
1643 | INIT_LIST_HEAD(&r8a66597->gadget.ep_list); | |
1644 | r8a66597->gadget.ep0 = &r8a66597->ep[0].ep; | |
1645 | INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list); | |
1646 | for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) { | |
1647 | struct r8a66597_ep *ep = &r8a66597->ep[i]; | |
1648 | ||
1649 | if (i != 0) { | |
1650 | INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list); | |
1651 | list_add_tail(&r8a66597->ep[i].ep.ep_list, | |
1652 | &r8a66597->gadget.ep_list); | |
1653 | } | |
1654 | ep->r8a66597 = r8a66597; | |
1655 | INIT_LIST_HEAD(&ep->queue); | |
1656 | ep->ep.name = r8a66597_ep_name[i]; | |
1657 | ep->ep.ops = &r8a66597_ep_ops; | |
1658 | ep->ep.maxpacket = 512; | |
1659 | } | |
1660 | r8a66597->ep[0].ep.maxpacket = 64; | |
1661 | r8a66597->ep[0].pipenum = 0; | |
1662 | r8a66597->ep[0].fifoaddr = CFIFO; | |
1663 | r8a66597->ep[0].fifosel = CFIFOSEL; | |
1664 | r8a66597->ep[0].fifoctr = CFIFOCTR; | |
1665 | r8a66597->ep[0].fifotrn = 0; | |
1666 | r8a66597->ep[0].pipectr = get_pipectr_addr(0); | |
1667 | r8a66597->pipenum2ep[0] = &r8a66597->ep[0]; | |
1668 | r8a66597->epaddr2ep[0] = &r8a66597->ep[0]; | |
1669 | ||
1670 | the_controller = r8a66597; | |
1671 | ||
1672 | r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep, | |
1673 | GFP_KERNEL); | |
1674 | if (r8a66597->ep0_req == NULL) | |
d2e27bdf | 1675 | goto clean_up3; |
c4144247 YS |
1676 | r8a66597->ep0_req->complete = nop_completion; |
1677 | ||
0f91349b SAS |
1678 | ret = usb_add_gadget_udc(&pdev->dev, &r8a66597->gadget); |
1679 | if (ret) | |
1680 | goto err_add_udc; | |
1681 | ||
c4144247 YS |
1682 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); |
1683 | return 0; | |
1684 | ||
0f91349b SAS |
1685 | err_add_udc: |
1686 | r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req); | |
d2e27bdf | 1687 | clean_up3: |
c4144247 | 1688 | free_irq(irq, r8a66597); |
d2e27bdf MD |
1689 | clean_up2: |
1690 | #ifdef CONFIG_HAVE_CLK | |
1691 | if (r8a66597->pdata->on_chip) { | |
1692 | clk_disable(r8a66597->clk); | |
1693 | clk_put(r8a66597->clk); | |
1694 | } | |
1695 | #endif | |
c4144247 YS |
1696 | clean_up: |
1697 | if (r8a66597) { | |
1698 | if (r8a66597->ep0_req) | |
1699 | r8a66597_free_request(&r8a66597->ep[0].ep, | |
1700 | r8a66597->ep0_req); | |
1701 | kfree(r8a66597); | |
1702 | } | |
1703 | if (reg) | |
1704 | iounmap(reg); | |
1705 | ||
1706 | return ret; | |
1707 | } | |
1708 | ||
1709 | /*-------------------------------------------------------------------------*/ | |
1710 | static struct platform_driver r8a66597_driver = { | |
1711 | .remove = __exit_p(r8a66597_remove), | |
1712 | .driver = { | |
1713 | .name = (char *) udc_name, | |
1714 | }, | |
1715 | }; | |
86081d7b | 1716 | MODULE_ALIAS("platform:r8a66597_udc"); |
c4144247 YS |
1717 | |
1718 | static int __init r8a66597_udc_init(void) | |
1719 | { | |
1720 | return platform_driver_probe(&r8a66597_driver, r8a66597_probe); | |
1721 | } | |
1722 | module_init(r8a66597_udc_init); | |
1723 | ||
1724 | static void __exit r8a66597_udc_cleanup(void) | |
1725 | { | |
1726 | platform_driver_unregister(&r8a66597_driver); | |
1727 | } | |
1728 | module_exit(r8a66597_udc_cleanup); | |
1729 | ||
1730 | MODULE_DESCRIPTION("R8A66597 USB gadget driver"); | |
1731 | MODULE_LICENSE("GPL"); | |
1732 | MODULE_AUTHOR("Yoshihiro Shimoda"); | |
1733 |