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2a4f136f DA |
1 | /* |
2 | * Copyright (C) 2005 Mike Lee(eemike@gmail.com) | |
3 | * | |
4 | * This udc driver is now under testing and code is based on pxa2xx_udc.h | |
5 | * Please use it with your own risk! | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | */ | |
17 | ||
18 | #ifndef __LINUX_USB_GADGET_IMX_H | |
19 | #define __LINUX_USB_GADGET_IMX_H | |
20 | ||
21 | #include <linux/types.h> | |
22 | ||
23 | /* Helper macros */ | |
24 | #define EP_NO(ep) ((ep->bEndpointAddress) & ~USB_DIR_IN) /* IN:1, OUT:0 */ | |
25 | #define EP_DIR(ep) ((ep->bEndpointAddress) & USB_DIR_IN ? 1 : 0) | |
593bef6c DA |
26 | #define irq_to_ep(irq) (((irq) >= USBD_INT0) || ((irq) <= USBD_INT6) \ |
27 | ? ((irq) - USBD_INT0) : (USBD_INT6)) /*should not happen*/ | |
2a4f136f DA |
28 | #define ep_to_irq(ep) (EP_NO((ep)) + USBD_INT0) |
29 | #define IMX_USB_NB_EP 6 | |
30 | ||
31 | /* Driver structures */ | |
32 | struct imx_request { | |
33 | struct usb_request req; | |
34 | struct list_head queue; | |
35 | unsigned int in_use; | |
36 | }; | |
37 | ||
38 | enum ep0_state { | |
39 | EP0_IDLE, | |
40 | EP0_IN_DATA_PHASE, | |
41 | EP0_OUT_DATA_PHASE, | |
42 | EP0_CONFIG, | |
43 | EP0_STALL, | |
44 | }; | |
45 | ||
46 | struct imx_ep_struct { | |
47 | struct usb_ep ep; | |
48 | struct imx_udc_struct *imx_usb; | |
49 | struct list_head queue; | |
50 | unsigned char stopped; | |
51 | unsigned char fifosize; | |
52 | unsigned char bEndpointAddress; | |
53 | unsigned char bmAttributes; | |
54 | }; | |
55 | ||
56 | struct imx_udc_struct { | |
57 | struct usb_gadget gadget; | |
58 | struct usb_gadget_driver *driver; | |
59 | struct device *dev; | |
60 | struct imx_ep_struct imx_ep[IMX_USB_NB_EP]; | |
61 | struct clk *clk; | |
62 | enum ep0_state ep0state; | |
63 | struct resource *res; | |
64 | void __iomem *base; | |
65 | unsigned char set_config; | |
66 | int cfg, | |
67 | intf, | |
68 | alt, | |
69 | usbd_int[7]; | |
70 | }; | |
71 | ||
72 | /* USB registers */ | |
73 | #define USB_FRAME (0x00) /* USB frame */ | |
74 | #define USB_SPEC (0x04) /* USB Spec */ | |
75 | #define USB_STAT (0x08) /* USB Status */ | |
76 | #define USB_CTRL (0x0C) /* USB Control */ | |
77 | #define USB_DADR (0x10) /* USB Desc RAM addr */ | |
78 | #define USB_DDAT (0x14) /* USB Desc RAM/EP buffer data */ | |
79 | #define USB_INTR (0x18) /* USB interrupt */ | |
80 | #define USB_MASK (0x1C) /* USB Mask */ | |
81 | #define USB_ENAB (0x24) /* USB Enable */ | |
82 | #define USB_EP_STAT(x) (0x30 + (x*0x30)) /* USB status/control */ | |
83 | #define USB_EP_INTR(x) (0x34 + (x*0x30)) /* USB interrupt */ | |
84 | #define USB_EP_MASK(x) (0x38 + (x*0x30)) /* USB mask */ | |
85 | #define USB_EP_FDAT(x) (0x3C + (x*0x30)) /* USB FIFO data */ | |
86 | #define USB_EP_FDAT0(x) (0x3C + (x*0x30)) /* USB FIFO data */ | |
87 | #define USB_EP_FDAT1(x) (0x3D + (x*0x30)) /* USB FIFO data */ | |
88 | #define USB_EP_FDAT2(x) (0x3E + (x*0x30)) /* USB FIFO data */ | |
89 | #define USB_EP_FDAT3(x) (0x3F + (x*0x30)) /* USB FIFO data */ | |
90 | #define USB_EP_FSTAT(x) (0x40 + (x*0x30)) /* USB FIFO status */ | |
91 | #define USB_EP_FCTRL(x) (0x44 + (x*0x30)) /* USB FIFO control */ | |
593bef6c DA |
92 | #define USB_EP_LRFP(x) (0x48 + (x*0x30)) /* USB last rd f. pointer */ |
93 | #define USB_EP_LWFP(x) (0x4C + (x*0x30)) /* USB last wr f. pointer */ | |
2a4f136f DA |
94 | #define USB_EP_FALRM(x) (0x50 + (x*0x30)) /* USB FIFO alarm */ |
95 | #define USB_EP_FRDP(x) (0x54 + (x*0x30)) /* USB FIFO read pointer */ | |
96 | #define USB_EP_FWRP(x) (0x58 + (x*0x30)) /* USB FIFO write pointer */ | |
97 | /* USB Control Register Bit Fields.*/ | |
98 | #define CTRL_CMDOVER (1<<6) /* UDC status */ | |
99 | #define CTRL_CMDERROR (1<<5) /* UDC status */ | |
100 | #define CTRL_FE_ENA (1<<3) /* Enable Font End logic */ | |
101 | #define CTRL_UDC_RST (1<<2) /* UDC reset */ | |
102 | #define CTRL_AFE_ENA (1<<1) /* Analog Font end enable */ | |
103 | #define CTRL_RESUME (1<<0) /* UDC resume */ | |
104 | /* USB Status Register Bit Fields.*/ | |
105 | #define STAT_RST (1<<8) | |
106 | #define STAT_SUSP (1<<7) | |
107 | #define STAT_CFG (3<<5) | |
108 | #define STAT_INTF (3<<3) | |
109 | #define STAT_ALTSET (7<<0) | |
110 | /* USB Interrupt Status/Mask Registers Bit fields */ | |
111 | #define INTR_WAKEUP (1<<31) /* Wake up Interrupt */ | |
112 | #define INTR_MSOF (1<<7) /* Missed Start of Frame */ | |
113 | #define INTR_SOF (1<<6) /* Start of Frame */ | |
114 | #define INTR_RESET_STOP (1<<5) /* Reset Signaling stop */ | |
115 | #define INTR_RESET_START (1<<4) /* Reset Signaling start */ | |
116 | #define INTR_RESUME (1<<3) /* Suspend to resume */ | |
117 | #define INTR_SUSPEND (1<<2) /* Active to suspend */ | |
118 | #define INTR_FRAME_MATCH (1<<1) /* Frame matched */ | |
119 | #define INTR_CFG_CHG (1<<0) /* Configuration change occurred */ | |
120 | /* USB Enable Register Bit Fields.*/ | |
121 | #define ENAB_RST (1<<31) /* Reset USB modules */ | |
122 | #define ENAB_ENAB (1<<30) /* Enable USB modules*/ | |
123 | #define ENAB_SUSPEND (1<<29) /* Suspend USB modules */ | |
124 | #define ENAB_ENDIAN (1<<28) /* Endian of USB modules */ | |
125 | #define ENAB_PWRMD (1<<0) /* Power mode of USB modules */ | |
126 | /* USB Descriptor Ram Address Register bit fields */ | |
127 | #define DADR_CFG (1<<31) /* Configuration */ | |
128 | #define DADR_BSY (1<<30) /* Busy status */ | |
129 | #define DADR_DADR (0x1FF) /* Descriptor Ram Address */ | |
130 | /* USB Descriptor RAM/Endpoint Buffer Data Register bit fields */ | |
131 | #define DDAT_DDAT (0xFF) /* Descriptor Endpoint Buffer */ | |
132 | /* USB Endpoint Status Register bit fields */ | |
133 | #define EPSTAT_BCOUNT (0x7F<<16) /* Endpoint FIFO byte count */ | |
134 | #define EPSTAT_SIP (1<<8) /* Endpoint setup in progress */ | |
135 | #define EPSTAT_DIR (1<<7) /* Endpoint transfer direction */ | |
136 | #define EPSTAT_MAX (3<<5) /* Endpoint Max packet size */ | |
137 | #define EPSTAT_TYP (3<<3) /* Endpoint type */ | |
138 | #define EPSTAT_ZLPS (1<<2) /* Send zero length packet */ | |
139 | #define EPSTAT_FLUSH (1<<1) /* Endpoint FIFO Flush */ | |
140 | #define EPSTAT_STALL (1<<0) /* Force stall */ | |
141 | /* USB Endpoint FIFO Status Register bit fields */ | |
142 | #define FSTAT_FRAME_STAT (0xF<<24) /* Frame status bit [0-3] */ | |
143 | #define FSTAT_ERR (1<<22) /* FIFO error */ | |
144 | #define FSTAT_UF (1<<21) /* FIFO underflow */ | |
145 | #define FSTAT_OF (1<<20) /* FIFO overflow */ | |
146 | #define FSTAT_FR (1<<19) /* FIFO frame ready */ | |
147 | #define FSTAT_FULL (1<<18) /* FIFO full */ | |
148 | #define FSTAT_ALRM (1<<17) /* FIFO alarm */ | |
149 | #define FSTAT_EMPTY (1<<16) /* FIFO empty */ | |
150 | /* USB Endpoint FIFO Control Register bit fields */ | |
151 | #define FCTRL_WFR (1<<29) /* Write frame end */ | |
152 | /* USB Endpoint Interrupt Status Regsiter bit fields */ | |
153 | #define EPINTR_FIFO_FULL (1<<8) /* fifo full */ | |
154 | #define EPINTR_FIFO_EMPTY (1<<7) /* fifo empty */ | |
155 | #define EPINTR_FIFO_ERROR (1<<6) /* fifo error */ | |
156 | #define EPINTR_FIFO_HIGH (1<<5) /* fifo high */ | |
157 | #define EPINTR_FIFO_LOW (1<<4) /* fifo low */ | |
158 | #define EPINTR_MDEVREQ (1<<3) /* multi Device request */ | |
159 | #define EPINTR_EOT (1<<2) /* fifo end of transfer */ | |
160 | #define EPINTR_DEVREQ (1<<1) /* Device request */ | |
161 | #define EPINTR_EOF (1<<0) /* fifo end of frame */ | |
162 | ||
163 | /* Debug macros */ | |
164 | #ifdef DEBUG | |
165 | ||
166 | /* #define DEBUG_REQ */ | |
167 | /* #define DEBUG_TRX */ | |
168 | /* #define DEBUG_INIT */ | |
169 | /* #define DEBUG_EP0 */ | |
170 | /* #define DEBUG_EPX */ | |
171 | /* #define DEBUG_IRQ */ | |
172 | /* #define DEBUG_EPIRQ */ | |
173 | /* #define DEBUG_DUMP */ | |
8f182e5d | 174 | /* #define DEBUG_ERR */ |
2a4f136f DA |
175 | |
176 | #ifdef DEBUG_REQ | |
177 | #define D_REQ(dev, args...) dev_dbg(dev, ## args) | |
178 | #else | |
179 | #define D_REQ(dev, args...) do {} while (0) | |
180 | #endif /* DEBUG_REQ */ | |
181 | ||
182 | #ifdef DEBUG_TRX | |
183 | #define D_TRX(dev, args...) dev_dbg(dev, ## args) | |
184 | #else | |
185 | #define D_TRX(dev, args...) do {} while (0) | |
186 | #endif /* DEBUG_TRX */ | |
187 | ||
188 | #ifdef DEBUG_INIT | |
189 | #define D_INI(dev, args...) dev_dbg(dev, ## args) | |
190 | #else | |
191 | #define D_INI(dev, args...) do {} while (0) | |
192 | #endif /* DEBUG_INIT */ | |
193 | ||
194 | #ifdef DEBUG_EP0 | |
195 | static const char *state_name[] = { | |
196 | "EP0_IDLE", | |
197 | "EP0_IN_DATA_PHASE", | |
198 | "EP0_OUT_DATA_PHASE", | |
199 | "EP0_CONFIG", | |
200 | "EP0_STALL" | |
201 | }; | |
202 | #define D_EP0(dev, args...) dev_dbg(dev, ## args) | |
203 | #else | |
204 | #define D_EP0(dev, args...) do {} while (0) | |
205 | #endif /* DEBUG_EP0 */ | |
206 | ||
207 | #ifdef DEBUG_EPX | |
208 | #define D_EPX(dev, args...) dev_dbg(dev, ## args) | |
209 | #else | |
210 | #define D_EPX(dev, args...) do {} while (0) | |
211 | #endif /* DEBUG_EP0 */ | |
212 | ||
213 | #ifdef DEBUG_IRQ | |
214 | static void dump_intr(const char *label, int irqreg, struct device *dev) | |
215 | { | |
216 | dev_dbg(dev, "<%s> USB_INTR=[%s%s%s%s%s%s%s%s%s]\n", label, | |
217 | (irqreg & INTR_WAKEUP) ? " wake" : "", | |
218 | (irqreg & INTR_MSOF) ? " msof" : "", | |
219 | (irqreg & INTR_SOF) ? " sof" : "", | |
220 | (irqreg & INTR_RESUME) ? " resume" : "", | |
221 | (irqreg & INTR_SUSPEND) ? " suspend" : "", | |
222 | (irqreg & INTR_RESET_STOP) ? " noreset" : "", | |
223 | (irqreg & INTR_RESET_START) ? " reset" : "", | |
224 | (irqreg & INTR_FRAME_MATCH) ? " fmatch" : "", | |
225 | (irqreg & INTR_CFG_CHG) ? " config" : ""); | |
226 | } | |
227 | #else | |
228 | #define dump_intr(x, y, z) do {} while (0) | |
229 | #endif /* DEBUG_IRQ */ | |
230 | ||
231 | #ifdef DEBUG_EPIRQ | |
593bef6c DA |
232 | static void dump_ep_intr(const char *label, int nr, int irqreg, |
233 | struct device *dev) | |
2a4f136f DA |
234 | { |
235 | dev_dbg(dev, "<%s> EP%d_INTR=[%s%s%s%s%s%s%s%s%s]\n", label, nr, | |
236 | (irqreg & EPINTR_FIFO_FULL) ? " full" : "", | |
237 | (irqreg & EPINTR_FIFO_EMPTY) ? " fempty" : "", | |
238 | (irqreg & EPINTR_FIFO_ERROR) ? " ferr" : "", | |
239 | (irqreg & EPINTR_FIFO_HIGH) ? " fhigh" : "", | |
240 | (irqreg & EPINTR_FIFO_LOW) ? " flow" : "", | |
241 | (irqreg & EPINTR_MDEVREQ) ? " mreq" : "", | |
242 | (irqreg & EPINTR_EOF) ? " eof" : "", | |
243 | (irqreg & EPINTR_DEVREQ) ? " devreq" : "", | |
244 | (irqreg & EPINTR_EOT) ? " eot" : ""); | |
245 | } | |
246 | #else | |
247 | #define dump_ep_intr(x, y, z, i) do {} while (0) | |
248 | #endif /* DEBUG_IRQ */ | |
249 | ||
250 | #ifdef DEBUG_DUMP | |
593bef6c DA |
251 | static void dump_usb_stat(const char *label, |
252 | struct imx_udc_struct *imx_usb) | |
2a4f136f DA |
253 | { |
254 | int temp = __raw_readl(imx_usb->base + USB_STAT); | |
255 | ||
256 | dev_dbg(imx_usb->dev, | |
257 | "<%s> USB_STAT=[%s%s CFG=%d, INTF=%d, ALTR=%d]\n", label, | |
258 | (temp & STAT_RST) ? " reset" : "", | |
259 | (temp & STAT_SUSP) ? " suspend" : "", | |
260 | (temp & STAT_CFG) >> 5, | |
261 | (temp & STAT_INTF) >> 3, | |
262 | (temp & STAT_ALTSET)); | |
263 | } | |
264 | ||
593bef6c DA |
265 | static void dump_ep_stat(const char *label, |
266 | struct imx_ep_struct *imx_ep) | |
2a4f136f | 267 | { |
593bef6c DA |
268 | int temp = __raw_readl(imx_ep->imx_usb->base |
269 | + USB_EP_INTR(EP_NO(imx_ep))); | |
2a4f136f DA |
270 | |
271 | dev_dbg(imx_ep->imx_usb->dev, | |
593bef6c DA |
272 | "<%s> EP%d_INTR=[%s%s%s%s%s%s%s%s%s]\n", |
273 | label, EP_NO(imx_ep), | |
2a4f136f DA |
274 | (temp & EPINTR_FIFO_FULL) ? " full" : "", |
275 | (temp & EPINTR_FIFO_EMPTY) ? " fempty" : "", | |
276 | (temp & EPINTR_FIFO_ERROR) ? " ferr" : "", | |
277 | (temp & EPINTR_FIFO_HIGH) ? " fhigh" : "", | |
278 | (temp & EPINTR_FIFO_LOW) ? " flow" : "", | |
279 | (temp & EPINTR_MDEVREQ) ? " mreq" : "", | |
280 | (temp & EPINTR_EOF) ? " eof" : "", | |
281 | (temp & EPINTR_DEVREQ) ? " devreq" : "", | |
282 | (temp & EPINTR_EOT) ? " eot" : ""); | |
283 | ||
593bef6c DA |
284 | temp = __raw_readl(imx_ep->imx_usb->base |
285 | + USB_EP_STAT(EP_NO(imx_ep))); | |
2a4f136f DA |
286 | |
287 | dev_dbg(imx_ep->imx_usb->dev, | |
593bef6c DA |
288 | "<%s> EP%d_STAT=[%s%s bcount=%d]\n", |
289 | label, EP_NO(imx_ep), | |
2a4f136f DA |
290 | (temp & EPSTAT_SIP) ? " sip" : "", |
291 | (temp & EPSTAT_STALL) ? " stall" : "", | |
292 | (temp & EPSTAT_BCOUNT) >> 16); | |
293 | ||
593bef6c DA |
294 | temp = __raw_readl(imx_ep->imx_usb->base |
295 | + USB_EP_FSTAT(EP_NO(imx_ep))); | |
2a4f136f DA |
296 | |
297 | dev_dbg(imx_ep->imx_usb->dev, | |
593bef6c DA |
298 | "<%s> EP%d_FSTAT=[%s%s%s%s%s%s%s]\n", |
299 | label, EP_NO(imx_ep), | |
2a4f136f DA |
300 | (temp & FSTAT_ERR) ? " ferr" : "", |
301 | (temp & FSTAT_UF) ? " funder" : "", | |
302 | (temp & FSTAT_OF) ? " fover" : "", | |
303 | (temp & FSTAT_FR) ? " fready" : "", | |
304 | (temp & FSTAT_FULL) ? " ffull" : "", | |
305 | (temp & FSTAT_ALRM) ? " falarm" : "", | |
306 | (temp & FSTAT_EMPTY) ? " fempty" : ""); | |
307 | } | |
308 | ||
593bef6c DA |
309 | static void dump_req(const char *label, struct imx_ep_struct *imx_ep, |
310 | struct usb_request *req) | |
2a4f136f DA |
311 | { |
312 | int i; | |
313 | ||
314 | if (!req || !req->buf) { | |
593bef6c DA |
315 | dev_dbg(imx_ep->imx_usb->dev, |
316 | "<%s> req or req buf is free\n", label); | |
2a4f136f DA |
317 | return; |
318 | } | |
319 | ||
593bef6c DA |
320 | if ((!EP_NO(imx_ep) && imx_ep->imx_usb->ep0state |
321 | == EP0_IN_DATA_PHASE) | |
2a4f136f DA |
322 | || (EP_NO(imx_ep) && EP_DIR(imx_ep))) { |
323 | ||
593bef6c DA |
324 | dev_dbg(imx_ep->imx_usb->dev, |
325 | "<%s> request dump <", label); | |
2a4f136f DA |
326 | for (i = 0; i < req->length; i++) |
327 | printk("%02x-", *((u8 *)req->buf + i)); | |
328 | printk(">\n"); | |
329 | } | |
330 | } | |
331 | ||
332 | #else | |
333 | #define dump_ep_stat(x, y) do {} while (0) | |
334 | #define dump_usb_stat(x, y) do {} while (0) | |
335 | #define dump_req(x, y, z) do {} while (0) | |
336 | #endif /* DEBUG_DUMP */ | |
337 | ||
338 | #ifdef DEBUG_ERR | |
339 | #define D_ERR(dev, args...) dev_dbg(dev, ## args) | |
340 | #else | |
341 | #define D_ERR(dev, args...) do {} while (0) | |
342 | #endif | |
343 | ||
344 | #else | |
345 | #define D_REQ(dev, args...) do {} while (0) | |
346 | #define D_TRX(dev, args...) do {} while (0) | |
347 | #define D_INI(dev, args...) do {} while (0) | |
348 | #define D_EP0(dev, args...) do {} while (0) | |
349 | #define D_EPX(dev, args...) do {} while (0) | |
350 | #define dump_ep_intr(x, y, z, i) do {} while (0) | |
351 | #define dump_intr(x, y, z) do {} while (0) | |
352 | #define dump_ep_stat(x, y) do {} while (0) | |
353 | #define dump_usb_stat(x, y) do {} while (0) | |
354 | #define dump_req(x, y, z) do {} while (0) | |
355 | #define D_ERR(dev, args...) do {} while (0) | |
356 | #endif /* DEBUG */ | |
357 | ||
358 | #endif /* __LINUX_USB_GADGET_IMX_H */ |