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fsl_usb2_udc: Remove check for udc == NULL in dr_controller_setup.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / gadget / fsl_usb2_udc.c
CommitLineData
b504882d
LY		 1/*
2 * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved.
3 *
4 * Author: Li Yang <leoli@freescale.com>
5 * Jiang Bo <tanya.jiang@freescale.com>
6 *
7 * Description:
8 * Freescale high-speed USB SOC DR module device controller driver.
9 * This can be found on MPC8349E/MPC8313E cpus.
10 * The driver is previously named as mpc_udc. Based on bare board
11 * code from Dave Liu and Shlomi Gridish.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 */
18
19#undef VERBOSE
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/ioport.h>
24#include <linux/types.h>
25#include <linux/errno.h>
26#include <linux/delay.h>
27#include <linux/sched.h>
28#include <linux/slab.h>
29#include <linux/init.h>
30#include <linux/timer.h>
31#include <linux/list.h>
32#include <linux/interrupt.h>
33#include <linux/proc_fs.h>
34#include <linux/mm.h>
35#include <linux/moduleparam.h>
36#include <linux/device.h>
37#include <linux/usb/ch9.h>
9454a57a 38#include <linux/usb/gadget.h>
b504882d
LY		 39#include <linux/usb/otg.h>
40#include <linux/dma-mapping.h>
41#include <linux/platform_device.h>
42#include <linux/fsl_devices.h>
43#include <linux/dmapool.h>
44
45#include <asm/byteorder.h>
46#include <asm/io.h>
47#include <asm/irq.h>
48#include <asm/system.h>
49#include <asm/unaligned.h>
50#include <asm/dma.h>
51#include <asm/cacheflush.h>
52
53#include "fsl_usb2_udc.h"
54
55#define DRIVER_DESC "Freescale High-Speed USB SOC Device Controller driver"
56#define DRIVER_AUTHOR "Li Yang/Jiang Bo"
57#define DRIVER_VERSION "Apr 20, 2007"
58
59#define DMA_ADDR_INVALID (~(dma_addr_t)0)
60
61static const char driver_name[] = "fsl-usb2-udc";
62static const char driver_desc[] = DRIVER_DESC;
63
64volatile static struct usb_dr_device *dr_regs = NULL;
65volatile static struct usb_sys_interface *usb_sys_regs = NULL;
66
67/* it is initialized in probe() */
68static struct fsl_udc *udc_controller = NULL;
69
70static const struct usb_endpoint_descriptor
71fsl_ep0_desc = {
72 .bLength = USB_DT_ENDPOINT_SIZE,
73 .bDescriptorType = USB_DT_ENDPOINT,
74 .bEndpointAddress = 0,
75 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
76 .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
77};
78
79static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state);
80static int fsl_udc_resume(struct platform_device *pdev);
81static void fsl_ep_fifo_flush(struct usb_ep *_ep);
82
83#ifdef CONFIG_PPC32
84#define fsl_readl(addr) in_le32(addr)
85#define fsl_writel(addr, val32) out_le32(val32, addr)
86#else
87#define fsl_readl(addr) readl(addr)
88#define fsl_writel(addr, val32) writel(addr, val32)
89#endif
90
91/********************************************************************
92 * Internal Used Function
93********************************************************************/
94/*-----------------------------------------------------------------
95 * done() - retire a request; caller blocked irqs
96 * @status : request status to be set, only works when
97 * request is still in progress.
98 *--------------------------------------------------------------*/
99static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
100{
101 struct fsl_udc *udc = NULL;
102 unsigned char stopped = ep->stopped;
103 struct ep_td_struct *curr_td, *next_td;
104 int j;
105
106 udc = (struct fsl_udc *)ep->udc;
107 /* Removed the req from fsl_ep->queue */
108 list_del_init(&req->queue);
109
110 /* req.status should be set as -EINPROGRESS in ep_queue() */
111 if (req->req.status == -EINPROGRESS)
112 req->req.status = status;
113 else
114 status = req->req.status;
115
116 /* Free dtd for the request */
117 next_td = req->head;
118 for (j = 0; j < req->dtd_count; j++) {
119 curr_td = next_td;
120 if (j != req->dtd_count - 1) {
121 next_td = curr_td->next_td_virt;
122 }
123 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
124 }
125
126 if (req->mapped) {
127 dma_unmap_single(ep->udc->gadget.dev.parent,
128 req->req.dma, req->req.length,
129 ep_is_in(ep)
130 ? DMA_TO_DEVICE
131 : DMA_FROM_DEVICE);
132 req->req.dma = DMA_ADDR_INVALID;
133 req->mapped = 0;
134 } else
135 dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
136 req->req.dma, req->req.length,
137 ep_is_in(ep)
138 ? DMA_TO_DEVICE
139 : DMA_FROM_DEVICE);
140
141 if (status && (status != -ESHUTDOWN))
142 VDBG("complete %s req %p stat %d len %u/%u",
143 ep->ep.name, &req->req, status,
144 req->req.actual, req->req.length);
145
146 ep->stopped = 1;
147
148 spin_unlock(&ep->udc->lock);
149 /* complete() is from gadget layer,
150 * eg fsg->bulk_in_complete() */
151 if (req->req.complete)
152 req->req.complete(&ep->ep, &req->req);
153
154 spin_lock(&ep->udc->lock);
155 ep->stopped = stopped;
156}
157
158/*-----------------------------------------------------------------
159 * nuke(): delete all requests related to this ep
160 * called with spinlock held
161 *--------------------------------------------------------------*/
162static void nuke(struct fsl_ep *ep, int status)
163{
164 ep->stopped = 1;
165
166 /* Flush fifo */
167 fsl_ep_fifo_flush(&ep->ep);
168
169 /* Whether this eq has request linked */
170 while (!list_empty(&ep->queue)) {
171 struct fsl_req *req = NULL;
172
173 req = list_entry(ep->queue.next, struct fsl_req, queue);
174 done(ep, req, status);
175 }
176}
177
178/*------------------------------------------------------------------
179 Internal Hardware related function
180 ------------------------------------------------------------------*/
181
182static int dr_controller_setup(struct fsl_udc *udc)
183{
184 unsigned int tmp = 0, portctrl = 0, ctrl = 0;
185 unsigned long timeout;
186#define FSL_UDC_RESET_TIMEOUT 1000
187
b504882d
LY		 188 /* Stop and reset the usb controller */
189 tmp = fsl_readl(&dr_regs->usbcmd);
190 tmp &= ~USB_CMD_RUN_STOP;
191 fsl_writel(tmp, &dr_regs->usbcmd);
192
193 tmp = fsl_readl(&dr_regs->usbcmd);
194 tmp |= USB_CMD_CTRL_RESET;
195 fsl_writel(tmp, &dr_regs->usbcmd);
196
197 /* Wait for reset to complete */
198 timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
199 while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
200 if (time_after(jiffies, timeout)) {
201 ERR("udc reset timeout! \n");
202 return -ETIMEDOUT;
203 }
204 cpu_relax();
205 }
206
207 /* Set the controller as device mode */
208 tmp = fsl_readl(&dr_regs->usbmode);
209 tmp |= USB_MODE_CTRL_MODE_DEVICE;
210 /* Disable Setup Lockout */
211 tmp |= USB_MODE_SETUP_LOCK_OFF;
212 fsl_writel(tmp, &dr_regs->usbmode);
213
214 /* Clear the setup status */
215 fsl_writel(0, &dr_regs->usbsts);
216
217 tmp = udc->ep_qh_dma;
218 tmp &= USB_EP_LIST_ADDRESS_MASK;
219 fsl_writel(tmp, &dr_regs->endpointlistaddr);
220
221 VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
6ef65a7f 222 udc->ep_qh, (int)tmp,
b504882d
LY		 223 fsl_readl(&dr_regs->endpointlistaddr));
224
225 /* Config PHY interface */
226 portctrl = fsl_readl(&dr_regs->portsc1);
7542548f 227 portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
b504882d
LY		 228 switch (udc->phy_mode) {
229 case FSL_USB2_PHY_ULPI:
230 portctrl |= PORTSCX_PTS_ULPI;
231 break;
b504882d 232 case FSL_USB2_PHY_UTMI_WIDE:
fcbd9639
LY		 233 portctrl |= PORTSCX_PTW_16BIT;
234 /* fall through */
235 case FSL_USB2_PHY_UTMI:
b504882d
LY		 236 portctrl |= PORTSCX_PTS_UTMI;
237 break;
238 case FSL_USB2_PHY_SERIAL:
239 portctrl |= PORTSCX_PTS_FSLS;
240 break;
241 default:
242 return -EINVAL;
243 }
244 fsl_writel(portctrl, &dr_regs->portsc1);
245
246 /* Config control enable i/o output, cpu endian register */
247 ctrl = __raw_readl(&usb_sys_regs->control);
248 ctrl |= USB_CTRL_IOENB;
249 __raw_writel(ctrl, &usb_sys_regs->control);
250
251#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
252 /* Turn on cache snooping hardware, since some PowerPC platforms
253 * wholly rely on hardware to deal with cache coherent. */
254
255 /* Setup Snooping for all the 4GB space */
256 tmp = SNOOP_SIZE_2GB; /* starts from 0x0, size 2G */
257 __raw_writel(tmp, &usb_sys_regs->snoop1);
258 tmp |= 0x80000000; /* starts from 0x8000000, size 2G */
259 __raw_writel(tmp, &usb_sys_regs->snoop2);
260#endif
261
262 return 0;
263}
264
265/* Enable DR irq and set controller to run state */
266static void dr_controller_run(struct fsl_udc *udc)
267{
268 u32 temp;
269
270 /* Enable DR irq reg */
271 temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
272 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
273 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
274
275 fsl_writel(temp, &dr_regs->usbintr);
276
277 /* Clear stopped bit */
278 udc->stopped = 0;
279
280 /* Set the controller as device mode */
281 temp = fsl_readl(&dr_regs->usbmode);
282 temp |= USB_MODE_CTRL_MODE_DEVICE;
283 fsl_writel(temp, &dr_regs->usbmode);
284
285 /* Set controller to Run */
286 temp = fsl_readl(&dr_regs->usbcmd);
287 temp |= USB_CMD_RUN_STOP;
288 fsl_writel(temp, &dr_regs->usbcmd);
289
290 return;
291}
292
293static void dr_controller_stop(struct fsl_udc *udc)
294{
295 unsigned int tmp;
296
297 /* disable all INTR */
298 fsl_writel(0, &dr_regs->usbintr);
299
300 /* Set stopped bit for isr */
301 udc->stopped = 1;
302
303 /* disable IO output */
304/* usb_sys_regs->control = 0; */
305
306 /* set controller to Stop */
307 tmp = fsl_readl(&dr_regs->usbcmd);
308 tmp &= ~USB_CMD_RUN_STOP;
309 fsl_writel(tmp, &dr_regs->usbcmd);
310
311 return;
312}
313
9c94155e
WN		 314static void dr_ep_setup(unsigned char ep_num, unsigned char dir,
315 unsigned char ep_type)
b504882d
LY		 316{
317 unsigned int tmp_epctrl = 0;
318
319 tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
320 if (dir) {
321 if (ep_num)
322 tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
323 tmp_epctrl |= EPCTRL_TX_ENABLE;
324 tmp_epctrl |= ((unsigned int)(ep_type)
325 << EPCTRL_TX_EP_TYPE_SHIFT);
326 } else {
327 if (ep_num)
328 tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
329 tmp_epctrl |= EPCTRL_RX_ENABLE;
330 tmp_epctrl |= ((unsigned int)(ep_type)
331 << EPCTRL_RX_EP_TYPE_SHIFT);
332 }
333
334 fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
335}
336
337static void
338dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
339{
340 u32 tmp_epctrl = 0;
341
342 tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
343
344 if (value) {
345 /* set the stall bit */
346 if (dir)
347 tmp_epctrl |= EPCTRL_TX_EP_STALL;
348 else
349 tmp_epctrl |= EPCTRL_RX_EP_STALL;
350 } else {
351 /* clear the stall bit and reset data toggle */
352 if (dir) {
353 tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
354 tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
355 } else {
356 tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
357 tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
358 }
359 }
360 fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
361}
362
363/* Get stall status of a specific ep
364 Return: 0: not stalled; 1:stalled */
365static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
366{
367 u32 epctrl;
368
369 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
370 if (dir)
371 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
372 else
373 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
374}
375
376/********************************************************************
377 Internal Structure Build up functions
378********************************************************************/
379
380/*------------------------------------------------------------------
381* struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
382 * @zlt: Zero Length Termination Select (1: disable; 0: enable)
383 * @mult: Mult field
384 ------------------------------------------------------------------*/
385static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
386 unsigned char dir, unsigned char ep_type,
387 unsigned int max_pkt_len,
388 unsigned int zlt, unsigned char mult)
389{
390 struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
391 unsigned int tmp = 0;
392
393 /* set the Endpoint Capabilites in QH */
394 switch (ep_type) {
395 case USB_ENDPOINT_XFER_CONTROL:
396 /* Interrupt On Setup (IOS). for control ep */
397 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
398 | EP_QUEUE_HEAD_IOS;
399 break;
400 case USB_ENDPOINT_XFER_ISOC:
401 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
402 | (mult << EP_QUEUE_HEAD_MULT_POS);
403 break;
404 case USB_ENDPOINT_XFER_BULK:
405 case USB_ENDPOINT_XFER_INT:
406 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
407 break;
408 default:
409 VDBG("error ep type is %d", ep_type);
410 return;
411 }
412 if (zlt)
413 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
414 p_QH->max_pkt_length = cpu_to_le32(tmp);
415
416 return;
417}
418
419/* Setup qh structure and ep register for ep0. */
420static void ep0_setup(struct fsl_udc *udc)
421{
422 /* the intialization of an ep includes: fields in QH, Regs,
423 * fsl_ep struct */
424 struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
425 USB_MAX_CTRL_PAYLOAD, 0, 0);
426 struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
427 USB_MAX_CTRL_PAYLOAD, 0, 0);
428 dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
429 dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
430
431 return;
432
433}
434
435/***********************************************************************
436 Endpoint Management Functions
437***********************************************************************/
438
439/*-------------------------------------------------------------------------
440 * when configurations are set, or when interface settings change
441 * for example the do_set_interface() in gadget layer,
442 * the driver will enable or disable the relevant endpoints
443 * ep0 doesn't use this routine. It is always enabled.
444-------------------------------------------------------------------------*/
445static int fsl_ep_enable(struct usb_ep *_ep,
446 const struct usb_endpoint_descriptor *desc)
447{
448 struct fsl_udc *udc = NULL;
449 struct fsl_ep *ep = NULL;
450 unsigned short max = 0;
451 unsigned char mult = 0, zlt;
452 int retval = -EINVAL;
453 unsigned long flags = 0;
454
455 ep = container_of(_ep, struct fsl_ep, ep);
456
457 /* catch various bogus parameters */
458 if (!_ep || !desc || ep->desc
459 || (desc->bDescriptorType != USB_DT_ENDPOINT))
460 return -EINVAL;
461
462 udc = ep->udc;
463
464 if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
465 return -ESHUTDOWN;
466
467 max = le16_to_cpu(desc->wMaxPacketSize);
468
469 /* Disable automatic zlp generation. Driver is reponsible to indicate
470 * explicitly through req->req.zero. This is needed to enable multi-td
471 * request. */
472 zlt = 1;
473
474 /* Assume the max packet size from gadget is always correct */
475 switch (desc->bmAttributes & 0x03) {
476 case USB_ENDPOINT_XFER_CONTROL:
477 case USB_ENDPOINT_XFER_BULK:
478 case USB_ENDPOINT_XFER_INT:
479 /* mult = 0. Execute N Transactions as demonstrated by
480 * the USB variable length packet protocol where N is
481 * computed using the Maximum Packet Length (dQH) and
482 * the Total Bytes field (dTD) */
483 mult = 0;
484 break;
485 case USB_ENDPOINT_XFER_ISOC:
486 /* Calculate transactions needed for high bandwidth iso */
487 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
488 max = max & 0x8ff; /* bit 0~10 */
489 /* 3 transactions at most */
490 if (mult > 3)
491 goto en_done;
492 break;
493 default:
494 goto en_done;
495 }
496
497 spin_lock_irqsave(&udc->lock, flags);
498 ep->ep.maxpacket = max;
499 ep->desc = desc;
500 ep->stopped = 0;
501
502 /* Controller related setup */
503 /* Init EPx Queue Head (Ep Capabilites field in QH
504 * according to max, zlt, mult) */
505 struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
506 (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
507 ? USB_SEND : USB_RECV),
508 (unsigned char) (desc->bmAttributes
509 & USB_ENDPOINT_XFERTYPE_MASK),
510 max, zlt, mult);
511
512 /* Init endpoint ctrl register */
513 dr_ep_setup((unsigned char) ep_index(ep),
514 (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
515 ? USB_SEND : USB_RECV),
516 (unsigned char) (desc->bmAttributes
517 & USB_ENDPOINT_XFERTYPE_MASK));
518
519 spin_unlock_irqrestore(&udc->lock, flags);
520 retval = 0;
521
522 VDBG("enabled %s (ep%d%s) maxpacket %d",ep->ep.name,
523 ep->desc->bEndpointAddress & 0x0f,
524 (desc->bEndpointAddress & USB_DIR_IN)
525 ? "in" : "out", max);
526en_done:
527 return retval;
528}
529
530/*---------------------------------------------------------------------
531 * @ep : the ep being unconfigured. May not be ep0
532 * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
533*---------------------------------------------------------------------*/
534static int fsl_ep_disable(struct usb_ep *_ep)
535{
536 struct fsl_udc *udc = NULL;
537 struct fsl_ep *ep = NULL;
538 unsigned long flags = 0;
539 u32 epctrl;
540 int ep_num;
541
542 ep = container_of(_ep, struct fsl_ep, ep);
543 if (!_ep || !ep->desc) {
544 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
545 return -EINVAL;
546 }
547
548 /* disable ep on controller */
549 ep_num = ep_index(ep);
550 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
551 if (ep_is_in(ep))
552 epctrl &= ~EPCTRL_TX_ENABLE;
553 else
554 epctrl &= ~EPCTRL_RX_ENABLE;
555 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
556
557 udc = (struct fsl_udc *)ep->udc;
558 spin_lock_irqsave(&udc->lock, flags);
559
560 /* nuke all pending requests (does flush) */
561 nuke(ep, -ESHUTDOWN);
562
563 ep->desc = 0;
564 ep->stopped = 1;
565 spin_unlock_irqrestore(&udc->lock, flags);
566
567 VDBG("disabled %s OK", _ep->name);
568 return 0;
569}
570
571/*---------------------------------------------------------------------
572 * allocate a request object used by this endpoint
573 * the main operation is to insert the req->queue to the eq->queue
574 * Returns the request, or null if one could not be allocated
575*---------------------------------------------------------------------*/
576static struct usb_request *
577fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
578{
579 struct fsl_req *req = NULL;
580
581 req = kzalloc(sizeof *req, gfp_flags);
582 if (!req)
583 return NULL;
584
585 req->req.dma = DMA_ADDR_INVALID;
586 INIT_LIST_HEAD(&req->queue);
587
588 return &req->req;
589}
590
591static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
592{
593 struct fsl_req *req = NULL;
594
595 req = container_of(_req, struct fsl_req, req);
596
597 if (_req)
598 kfree(req);
599}
600
b504882d
LY		 601/*-------------------------------------------------------------------------*/
602static int fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
603{
604 int i = ep_index(ep) * 2 + ep_is_in(ep);
605 u32 temp, bitmask, tmp_stat;
606 struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
607
608 /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
609 VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
610
611 bitmask = ep_is_in(ep)
612 ? (1 << (ep_index(ep) + 16))
613 : (1 << (ep_index(ep)));
614
615 /* check if the pipe is empty */
616 if (!(list_empty(&ep->queue))) {
617 /* Add td to the end */
618 struct fsl_req *lastreq;
619 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
620 lastreq->tail->next_td_ptr =
621 cpu_to_le32(req->head->td_dma & DTD_ADDR_MASK);
622 /* Read prime bit, if 1 goto done */
623 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
624 goto out;
625
626 do {
627 /* Set ATDTW bit in USBCMD */
628 temp = fsl_readl(&dr_regs->usbcmd);
629 fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
630
631 /* Read correct status bit */
632 tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
633
634 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
635
636 /* Write ATDTW bit to 0 */
637 temp = fsl_readl(&dr_regs->usbcmd);
638 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
639
640 if (tmp_stat)
641 goto out;
642 }
643
644 /* Write dQH next pointer and terminate bit to 0 */
645 temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
646 dQH->next_dtd_ptr = cpu_to_le32(temp);
647
648 /* Clear active and halt bit */
649 temp = cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
650 | EP_QUEUE_HEAD_STATUS_HALT));
651 dQH->size_ioc_int_sts &= temp;
652
653 /* Prime endpoint by writing 1 to ENDPTPRIME */
654 temp = ep_is_in(ep)
655 ? (1 << (ep_index(ep) + 16))
656 : (1 << (ep_index(ep)));
657 fsl_writel(temp, &dr_regs->endpointprime);
658out:
659 return 0;
660}
661
662/* Fill in the dTD structure
663 * @req: request that the transfer belongs to
664 * @length: return actually data length of the dTD
665 * @dma: return dma address of the dTD
666 * @is_last: return flag if it is the last dTD of the request
667 * return: pointer to the built dTD */
668static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
669 dma_addr_t *dma, int *is_last)
670{
671 u32 swap_temp;
672 struct ep_td_struct *dtd;
673
674 /* how big will this transfer be? */
675 *length = min(req->req.length - req->req.actual,
676 (unsigned)EP_MAX_LENGTH_TRANSFER);
677
678 dtd = dma_pool_alloc(udc_controller->td_pool, GFP_KERNEL, dma);
679 if (dtd == NULL)
680 return dtd;
681
682 dtd->td_dma = *dma;
683 /* Clear reserved field */
684 swap_temp = cpu_to_le32(dtd->size_ioc_sts);
685 swap_temp &= ~DTD_RESERVED_FIELDS;
686 dtd->size_ioc_sts = cpu_to_le32(swap_temp);
687
688 /* Init all of buffer page pointers */
689 swap_temp = (u32) (req->req.dma + req->req.actual);
690 dtd->buff_ptr0 = cpu_to_le32(swap_temp);
691 dtd->buff_ptr1 = cpu_to_le32(swap_temp + 0x1000);
692 dtd->buff_ptr2 = cpu_to_le32(swap_temp + 0x2000);
693 dtd->buff_ptr3 = cpu_to_le32(swap_temp + 0x3000);
694 dtd->buff_ptr4 = cpu_to_le32(swap_temp + 0x4000);
695
696 req->req.actual += *length;
697
698 /* zlp is needed if req->req.zero is set */
699 if (req->req.zero) {
700 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
701 *is_last = 1;
702 else
703 *is_last = 0;
704 } else if (req->req.length == req->req.actual)
705 *is_last = 1;
706 else
707 *is_last = 0;
708
709 if ((*is_last) == 0)
710 VDBG("multi-dtd request!\n");
711 /* Fill in the transfer size; set active bit */
712 swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
713
714 /* Enable interrupt for the last dtd of a request */
715 if (*is_last && !req->req.no_interrupt)
716 swap_temp |= DTD_IOC;
717
718 dtd->size_ioc_sts = cpu_to_le32(swap_temp);
719
720 mb();
721
722 VDBG("length = %d address= 0x%x", *length, (int)*dma);
723
724 return dtd;
725}
726
727/* Generate dtd chain for a request */
728static int fsl_req_to_dtd(struct fsl_req *req)
729{
730 unsigned count;
731 int is_last;
732 int is_first =1;
733 struct ep_td_struct *last_dtd = NULL, *dtd;
734 dma_addr_t dma;
735
736 do {
737 dtd = fsl_build_dtd(req, &count, &dma, &is_last);
738 if (dtd == NULL)
739 return -ENOMEM;
740
741 if (is_first) {
742 is_first = 0;
743 req->head = dtd;
744 } else {
745 last_dtd->next_td_ptr = cpu_to_le32(dma);
746 last_dtd->next_td_virt = dtd;
747 }
748 last_dtd = dtd;
749
750 req->dtd_count++;
751 } while (!is_last);
752
753 dtd->next_td_ptr = cpu_to_le32(DTD_NEXT_TERMINATE);
754
755 req->tail = dtd;
756
757 return 0;
758}
759
760/* queues (submits) an I/O request to an endpoint */
761static int
762fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
763{
764 struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
765 struct fsl_req *req = container_of(_req, struct fsl_req, req);
766 struct fsl_udc *udc;
767 unsigned long flags;
768 int is_iso = 0;
769
770 /* catch various bogus parameters */
771 if (!_req || !req->req.complete || !req->req.buf
772 || !list_empty(&req->queue)) {
441b62c1 773 VDBG("%s, bad params\n", __func__);
b504882d
LY		 774 return -EINVAL;
775 }
2336a986 776 if (unlikely(!_ep || !ep->desc)) {
441b62c1 777 VDBG("%s, bad ep\n", __func__);
b504882d
LY		 778 return -EINVAL;
779 }
780 if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
781 if (req->req.length > ep->ep.maxpacket)
782 return -EMSGSIZE;
783 is_iso = 1;
784 }
785
786 udc = ep->udc;
787 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
788 return -ESHUTDOWN;
789
790 req->ep = ep;
791
792 /* map virtual address to hardware */
793 if (req->req.dma == DMA_ADDR_INVALID) {
794 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
795 req->req.buf,
796 req->req.length, ep_is_in(ep)
797 ? DMA_TO_DEVICE
798 : DMA_FROM_DEVICE);
799 req->mapped = 1;
800 } else {
801 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
802 req->req.dma, req->req.length,
803 ep_is_in(ep)
804 ? DMA_TO_DEVICE
805 : DMA_FROM_DEVICE);
806 req->mapped = 0;
807 }
808
809 req->req.status = -EINPROGRESS;
810 req->req.actual = 0;
811 req->dtd_count = 0;
812
813 spin_lock_irqsave(&udc->lock, flags);
814
815 /* build dtds and push them to device queue */
816 if (!fsl_req_to_dtd(req)) {
817 fsl_queue_td(ep, req);
818 } else {
819 spin_unlock_irqrestore(&udc->lock, flags);
820 return -ENOMEM;
821 }
822
823 /* Update ep0 state */
824 if ((ep_index(ep) == 0))
825 udc->ep0_state = DATA_STATE_XMIT;
826
827 /* irq handler advances the queue */
828 if (req != NULL)
829 list_add_tail(&req->queue, &ep->queue);
830 spin_unlock_irqrestore(&udc->lock, flags);
831
832 return 0;
833}
834
835/* dequeues (cancels, unlinks) an I/O request from an endpoint */
836static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
837{
838 struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
839 struct fsl_req *req;
840 unsigned long flags;
841 int ep_num, stopped, ret = 0;
842 u32 epctrl;
843
844 if (!_ep || !_req)
845 return -EINVAL;
846
847 spin_lock_irqsave(&ep->udc->lock, flags);
848 stopped = ep->stopped;
849
850 /* Stop the ep before we deal with the queue */
851 ep->stopped = 1;
852 ep_num = ep_index(ep);
853 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
854 if (ep_is_in(ep))
855 epctrl &= ~EPCTRL_TX_ENABLE;
856 else
857 epctrl &= ~EPCTRL_RX_ENABLE;
858 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
859
860 /* make sure it's actually queued on this endpoint */
861 list_for_each_entry(req, &ep->queue, queue) {
862 if (&req->req == _req)
863 break;
864 }
865 if (&req->req != _req) {
866 ret = -EINVAL;
867 goto out;
868 }
869
870 /* The request is in progress, or completed but not dequeued */
871 if (ep->queue.next == &req->queue) {
872 _req->status = -ECONNRESET;
873 fsl_ep_fifo_flush(_ep); /* flush current transfer */
874
875 /* The request isn't the last request in this ep queue */
876 if (req->queue.next != &ep->queue) {
877 struct ep_queue_head *qh;
878 struct fsl_req *next_req;
879
880 qh = ep->qh;
881 next_req = list_entry(req->queue.next, struct fsl_req,
882 queue);
883
884 /* Point the QH to the first TD of next request */
885 fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr);
886 }
887
888 /* The request hasn't been processed, patch up the TD chain */
889 } else {
890 struct fsl_req *prev_req;
891
892 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
893 fsl_writel(fsl_readl(&req->tail->next_td_ptr),
894 &prev_req->tail->next_td_ptr);
895
896 }
897
898 done(ep, req, -ECONNRESET);
899
900 /* Enable EP */
901out: epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
902 if (ep_is_in(ep))
903 epctrl |= EPCTRL_TX_ENABLE;
904 else
905 epctrl |= EPCTRL_RX_ENABLE;
906 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
907 ep->stopped = stopped;
908
909 spin_unlock_irqrestore(&ep->udc->lock, flags);
910 return ret;
911}
912
913/*-------------------------------------------------------------------------*/
914
915/*-----------------------------------------------------------------
916 * modify the endpoint halt feature
917 * @ep: the non-isochronous endpoint being stalled
918 * @value: 1--set halt 0--clear halt
919 * Returns zero, or a negative error code.
920*----------------------------------------------------------------*/
921static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
922{
923 struct fsl_ep *ep = NULL;
924 unsigned long flags = 0;
925 int status = -EOPNOTSUPP; /* operation not supported */
926 unsigned char ep_dir = 0, ep_num = 0;
927 struct fsl_udc *udc = NULL;
928
929 ep = container_of(_ep, struct fsl_ep, ep);
930 udc = ep->udc;
931 if (!_ep || !ep->desc) {
932 status = -EINVAL;
933 goto out;
934 }
935
936 if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
937 status = -EOPNOTSUPP;
938 goto out;
939 }
940
941 /* Attempt to halt IN ep will fail if any transfer requests
942 * are still queue */
943 if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
944 status = -EAGAIN;
945 goto out;
946 }
947
948 status = 0;
949 ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
950 ep_num = (unsigned char)(ep_index(ep));
951 spin_lock_irqsave(&ep->udc->lock, flags);
952 dr_ep_change_stall(ep_num, ep_dir, value);
953 spin_unlock_irqrestore(&ep->udc->lock, flags);
954
955 if (ep_index(ep) == 0) {
956 udc->ep0_state = WAIT_FOR_SETUP;
957 udc->ep0_dir = 0;
958 }
959out:
960 VDBG(" %s %s halt stat %d", ep->ep.name,
961 value ? "set" : "clear", status);
962
963 return status;
964}
965
966static void fsl_ep_fifo_flush(struct usb_ep *_ep)
967{
968 struct fsl_ep *ep;
969 int ep_num, ep_dir;
970 u32 bits;
971 unsigned long timeout;
972#define FSL_UDC_FLUSH_TIMEOUT 1000
973
974 if (!_ep) {
975 return;
976 } else {
977 ep = container_of(_ep, struct fsl_ep, ep);
978 if (!ep->desc)
979 return;
980 }
981 ep_num = ep_index(ep);
982 ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
983
984 if (ep_num == 0)
985 bits = (1 << 16) | 1;
986 else if (ep_dir == USB_SEND)
987 bits = 1 << (16 + ep_num);
988 else
989 bits = 1 << ep_num;
990
991 timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
992 do {
993 fsl_writel(bits, &dr_regs->endptflush);
994
995 /* Wait until flush complete */
996 while (fsl_readl(&dr_regs->endptflush)) {
997 if (time_after(jiffies, timeout)) {
998 ERR("ep flush timeout\n");
999 return;
1000 }
1001 cpu_relax();
1002 }
1003 /* See if we need to flush again */
1004 } while (fsl_readl(&dr_regs->endptstatus) & bits);
1005}
1006
1007static struct usb_ep_ops fsl_ep_ops = {
1008 .enable = fsl_ep_enable,
1009 .disable = fsl_ep_disable,
1010
1011 .alloc_request = fsl_alloc_request,
1012 .free_request = fsl_free_request,
1013
b504882d
LY		 1014 .queue = fsl_ep_queue,
1015 .dequeue = fsl_ep_dequeue,
1016
1017 .set_halt = fsl_ep_set_halt,
1018 .fifo_flush = fsl_ep_fifo_flush, /* flush fifo */
1019};
1020
1021/*-------------------------------------------------------------------------
1022 Gadget Driver Layer Operations
1023-------------------------------------------------------------------------*/
1024
1025/*----------------------------------------------------------------------
1026 * Get the current frame number (from DR frame_index Reg )
1027 *----------------------------------------------------------------------*/
1028static int fsl_get_frame(struct usb_gadget *gadget)
1029{
1030 return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1031}
1032
1033/*-----------------------------------------------------------------------
1034 * Tries to wake up the host connected to this gadget
1035 -----------------------------------------------------------------------*/
1036static int fsl_wakeup(struct usb_gadget *gadget)
1037{
1038 struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1039 u32 portsc;
1040
1041 /* Remote wakeup feature not enabled by host */
1042 if (!udc->remote_wakeup)
1043 return -ENOTSUPP;
1044
1045 portsc = fsl_readl(&dr_regs->portsc1);
1046 /* not suspended? */
1047 if (!(portsc & PORTSCX_PORT_SUSPEND))
1048 return 0;
1049 /* trigger force resume */
1050 portsc |= PORTSCX_PORT_FORCE_RESUME;
1051 fsl_writel(portsc, &dr_regs->portsc1);
1052 return 0;
1053}
1054
1055static int can_pullup(struct fsl_udc *udc)
1056{
1057 return udc->driver && udc->softconnect && udc->vbus_active;
1058}
1059
1060/* Notify controller that VBUS is powered, Called by whatever
1061 detects VBUS sessions */
1062static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1063{
1064 struct fsl_udc *udc;
1065 unsigned long flags;
1066
1067 udc = container_of(gadget, struct fsl_udc, gadget);
1068 spin_lock_irqsave(&udc->lock, flags);
1069 VDBG("VBUS %s\n", is_active ? "on" : "off");
1070 udc->vbus_active = (is_active != 0);
1071 if (can_pullup(udc))
1072 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1073 &dr_regs->usbcmd);
1074 else
1075 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1076 &dr_regs->usbcmd);
1077 spin_unlock_irqrestore(&udc->lock, flags);
1078 return 0;
1079}
1080
1081/* constrain controller's VBUS power usage
1082 * This call is used by gadget drivers during SET_CONFIGURATION calls,
1083 * reporting how much power the device may consume. For example, this
1084 * could affect how quickly batteries are recharged.
1085 *
1086 * Returns zero on success, else negative errno.
1087 */
1088static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1089{
b504882d
LY		 1090 struct fsl_udc *udc;
1091
1092 udc = container_of(gadget, struct fsl_udc, gadget);
b504882d
LY		 1093 if (udc->transceiver)
1094 return otg_set_power(udc->transceiver, mA);
b504882d
LY		 1095 return -ENOTSUPP;
1096}
1097
1098/* Change Data+ pullup status
1099 * this func is used by usb_gadget_connect/disconnet
1100 */
1101static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1102{
1103 struct fsl_udc *udc;
1104
1105 udc = container_of(gadget, struct fsl_udc, gadget);
1106 udc->softconnect = (is_on != 0);
1107 if (can_pullup(udc))
1108 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1109 &dr_regs->usbcmd);
1110 else
1111 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1112 &dr_regs->usbcmd);
1113
1114 return 0;
1115}
1116
9454a57a 1117/* defined in gadget.h */
b504882d
LY		 1118static struct usb_gadget_ops fsl_gadget_ops = {
1119 .get_frame = fsl_get_frame,
1120 .wakeup = fsl_wakeup,
1121/* .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1122 .vbus_session = fsl_vbus_session,
1123 .vbus_draw = fsl_vbus_draw,
1124 .pullup = fsl_pullup,
1125};
1126
1127/* Set protocol stall on ep0, protocol stall will automatically be cleared
1128 on new transaction */
1129static void ep0stall(struct fsl_udc *udc)
1130{
1131 u32 tmp;
1132
1133 /* must set tx and rx to stall at the same time */
1134 tmp = fsl_readl(&dr_regs->endptctrl[0]);
1135 tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1136 fsl_writel(tmp, &dr_regs->endptctrl[0]);
1137 udc->ep0_state = WAIT_FOR_SETUP;
1138 udc->ep0_dir = 0;
1139}
1140
1141/* Prime a status phase for ep0 */
1142static int ep0_prime_status(struct fsl_udc *udc, int direction)
1143{
1144 struct fsl_req *req = udc->status_req;
1145 struct fsl_ep *ep;
1146 int status = 0;
1147
1148 if (direction == EP_DIR_IN)
1149 udc->ep0_dir = USB_DIR_IN;
1150 else
1151 udc->ep0_dir = USB_DIR_OUT;
1152
1153 ep = &udc->eps[0];
1154 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1155
1156 req->ep = ep;
1157 req->req.length = 0;
1158 req->req.status = -EINPROGRESS;
1159 req->req.actual = 0;
1160 req->req.complete = NULL;
1161 req->dtd_count = 0;
1162
1163 if (fsl_req_to_dtd(req) == 0)
1164 status = fsl_queue_td(ep, req);
1165 else
1166 return -ENOMEM;
1167
1168 if (status)
1169 ERR("Can't queue ep0 status request \n");
1170 list_add_tail(&req->queue, &ep->queue);
1171
1172 return status;
1173}
1174
1175static inline int udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
1176{
1177 struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1178
1179 if (!ep->name)
1180 return 0;
1181
1182 nuke(ep, -ESHUTDOWN);
1183
1184 return 0;
1185}
1186
1187/*
1188 * ch9 Set address
1189 */
1190static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1191{
1192 /* Save the new address to device struct */
1193 udc->device_address = (u8) value;
1194 /* Update usb state */
1195 udc->usb_state = USB_STATE_ADDRESS;
1196 /* Status phase */
1197 if (ep0_prime_status(udc, EP_DIR_IN))
1198 ep0stall(udc);
1199}
1200
1201/*
1202 * ch9 Get status
1203 */
1204static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1205 u16 index, u16 length)
1206{
1207 u16 tmp = 0; /* Status, cpu endian */
1208
1209 struct fsl_req *req;
1210 struct fsl_ep *ep;
1211 int status = 0;
1212
1213 ep = &udc->eps[0];
1214
1215 if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1216 /* Get device status */
1217 tmp = 1 << USB_DEVICE_SELF_POWERED;
1218 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1219 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1220 /* Get interface status */
1221 /* We don't have interface information in udc driver */
1222 tmp = 0;
1223 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1224 /* Get endpoint status */
1225 struct fsl_ep *target_ep;
1226
1227 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1228
1229 /* stall if endpoint doesn't exist */
1230 if (!target_ep->desc)
1231 goto stall;
1232 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1233 << USB_ENDPOINT_HALT;
1234 }
1235
1236 udc->ep0_dir = USB_DIR_IN;
1237 /* Borrow the per device status_req */
1238 req = udc->status_req;
1239 /* Fill in the reqest structure */
1240 *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1241 req->ep = ep;
1242 req->req.length = 2;
1243 req->req.status = -EINPROGRESS;
1244 req->req.actual = 0;
1245 req->req.complete = NULL;
1246 req->dtd_count = 0;
1247
1248 /* prime the data phase */
1249 if ((fsl_req_to_dtd(req) == 0))
1250 status = fsl_queue_td(ep, req);
1251 else /* no mem */
1252 goto stall;
1253
1254 if (status) {
1255 ERR("Can't respond to getstatus request \n");
1256 goto stall;
1257 }
1258 list_add_tail(&req->queue, &ep->queue);
1259 udc->ep0_state = DATA_STATE_XMIT;
1260 return;
1261stall:
1262 ep0stall(udc);
1263}
1264
1265static void setup_received_irq(struct fsl_udc *udc,
1266 struct usb_ctrlrequest *setup)
1267{
1268 u16 wValue = le16_to_cpu(setup->wValue);
1269 u16 wIndex = le16_to_cpu(setup->wIndex);
1270 u16 wLength = le16_to_cpu(setup->wLength);
1271
1272 udc_reset_ep_queue(udc, 0);
1273
39d1f8c9 1274 /* We process some stardard setup requests here */
b504882d 1275 switch (setup->bRequest) {
b504882d 1276 case USB_REQ_GET_STATUS:
39d1f8c9
LY		 1277 /* Data+Status phase from udc */
1278 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
b504882d
LY		 1279 != (USB_DIR_IN | USB_TYPE_STANDARD))
1280 break;
1281 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
39d1f8c9 1282 return;
b504882d 1283
b504882d 1284 case USB_REQ_SET_ADDRESS:
39d1f8c9 1285 /* Status phase from udc */
b504882d
LY		 1286 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1287 | USB_RECIP_DEVICE))
1288 break;
1289 ch9setaddress(udc, wValue, wIndex, wLength);
39d1f8c9 1290 return;
b504882d 1291
b504882d
LY		 1292 case USB_REQ_CLEAR_FEATURE:
1293 case USB_REQ_SET_FEATURE:
39d1f8c9
LY		 1294 /* Status phase from udc */
1295 {
b504882d
LY		 1296 int rc = -EOPNOTSUPP;
1297
39d1f8c9
LY		 1298 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1299 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
b504882d
LY		 1300 int pipe = get_pipe_by_windex(wIndex);
1301 struct fsl_ep *ep;
1302
1303 if (wValue != 0 || wLength != 0 || pipe > udc->max_ep)
1304 break;
1305 ep = get_ep_by_pipe(udc, pipe);
1306
1307 spin_unlock(&udc->lock);
1308 rc = fsl_ep_set_halt(&ep->ep,
1309 (setup->bRequest == USB_REQ_SET_FEATURE)
1310 ? 1 : 0);
1311 spin_lock(&udc->lock);
1312
39d1f8c9
LY		 1313 } else if ((setup->bRequestType & (USB_RECIP_MASK
1314 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1315 | USB_TYPE_STANDARD)) {
b504882d
LY		 1316 /* Note: The driver has not include OTG support yet.
1317 * This will be set when OTG support is added */
3bf44688 1318 if (!gadget_is_otg(&udc->gadget))
b504882d
LY		 1319 break;
1320 else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
1321 udc->gadget.b_hnp_enable = 1;
1322 else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
1323 udc->gadget.a_hnp_support = 1;
1324 else if (setup->bRequest ==
1325 USB_DEVICE_A_ALT_HNP_SUPPORT)
1326 udc->gadget.a_alt_hnp_support = 1;
a4e3ef55
DB		 1327 else
1328 break;
b504882d 1329 rc = 0;
39d1f8c9
LY		 1330 } else
1331 break;
1332
b504882d
LY		 1333 if (rc == 0) {
1334 if (ep0_prime_status(udc, EP_DIR_IN))
1335 ep0stall(udc);
1336 }
39d1f8c9 1337 return;
b504882d 1338 }
b504882d 1339
39d1f8c9 1340 default:
b504882d
LY		 1341 break;
1342 }
39d1f8c9
LY		 1343
1344 /* Requests handled by gadget */
1345 if (wLength) {
1346 /* Data phase from gadget, status phase from udc */
1347 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1348 ? USB_DIR_IN : USB_DIR_OUT;
1349 spin_unlock(&udc->lock);
1350 if (udc->driver->setup(&udc->gadget,
1351 &udc->local_setup_buff) < 0)
1352 ep0stall(udc);
1353 spin_lock(&udc->lock);
1354 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1355 ? DATA_STATE_XMIT : DATA_STATE_RECV;
1356 } else {
1357 /* No data phase, IN status from gadget */
1358 udc->ep0_dir = USB_DIR_IN;
1359 spin_unlock(&udc->lock);
1360 if (udc->driver->setup(&udc->gadget,
1361 &udc->local_setup_buff) < 0)
1362 ep0stall(udc);
1363 spin_lock(&udc->lock);
1364 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1365 }
b504882d
LY		 1366}
1367
1368/* Process request for Data or Status phase of ep0
1369 * prime status phase if needed */
1370static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1371 struct fsl_req *req)
1372{
1373 if (udc->usb_state == USB_STATE_ADDRESS) {
1374 /* Set the new address */
1375 u32 new_address = (u32) udc->device_address;
1376 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1377 &dr_regs->deviceaddr);
1378 }
1379
1380 done(ep0, req, 0);
1381
1382 switch (udc->ep0_state) {
1383 case DATA_STATE_XMIT:
1384 /* receive status phase */
1385 if (ep0_prime_status(udc, EP_DIR_OUT))
1386 ep0stall(udc);
1387 break;
1388 case DATA_STATE_RECV:
1389 /* send status phase */
1390 if (ep0_prime_status(udc, EP_DIR_IN))
1391 ep0stall(udc);
1392 break;
1393 case WAIT_FOR_OUT_STATUS:
1394 udc->ep0_state = WAIT_FOR_SETUP;
1395 break;
1396 case WAIT_FOR_SETUP:
1397 ERR("Unexpect ep0 packets \n");
1398 break;
1399 default:
1400 ep0stall(udc);
1401 break;
1402 }
1403}
1404
1405/* Tripwire mechanism to ensure a setup packet payload is extracted without
1406 * being corrupted by another incoming setup packet */
1407static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1408{
1409 u32 temp;
1410 struct ep_queue_head *qh;
1411
1412 qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1413
1414 /* Clear bit in ENDPTSETUPSTAT */
1415 temp = fsl_readl(&dr_regs->endptsetupstat);
1416 fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1417
1418 /* while a hazard exists when setup package arrives */
1419 do {
1420 /* Set Setup Tripwire */
1421 temp = fsl_readl(&dr_regs->usbcmd);
1422 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1423
1424 /* Copy the setup packet to local buffer */
1425 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1426 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1427
1428 /* Clear Setup Tripwire */
1429 temp = fsl_readl(&dr_regs->usbcmd);
1430 fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1431}
1432
1433/* process-ep_req(): free the completed Tds for this req */
1434static int process_ep_req(struct fsl_udc *udc, int pipe,
1435 struct fsl_req *curr_req)
1436{
1437 struct ep_td_struct *curr_td;
1438 int td_complete, actual, remaining_length, j, tmp;
1439 int status = 0;
1440 int errors = 0;
1441 struct ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1442 int direction = pipe % 2;
1443
1444 curr_td = curr_req->head;
1445 td_complete = 0;
1446 actual = curr_req->req.length;
1447
1448 for (j = 0; j < curr_req->dtd_count; j++) {
1449 remaining_length = (le32_to_cpu(curr_td->size_ioc_sts)
1450 & DTD_PACKET_SIZE)
1451 >> DTD_LENGTH_BIT_POS;
1452 actual -= remaining_length;
1453
1454 if ((errors = le32_to_cpu(curr_td->size_ioc_sts) &
1455 DTD_ERROR_MASK)) {
1456 if (errors & DTD_STATUS_HALTED) {
1457 ERR("dTD error %08x QH=%d\n", errors, pipe);
1458 /* Clear the errors and Halt condition */
1459 tmp = le32_to_cpu(curr_qh->size_ioc_int_sts);
1460 tmp &= ~errors;
1461 curr_qh->size_ioc_int_sts = cpu_to_le32(tmp);
1462 status = -EPIPE;
1463 /* FIXME: continue with next queued TD? */
1464
1465 break;
1466 }
1467 if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1468 VDBG("Transfer overflow");
1469 status = -EPROTO;
1470 break;
1471 } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1472 VDBG("ISO error");
1473 status = -EILSEQ;
1474 break;
1475 } else
1476 ERR("Unknown error has occured (0x%x)!\r\n",
1477 errors);
1478
1479 } else if (le32_to_cpu(curr_td->size_ioc_sts)
1480 & DTD_STATUS_ACTIVE) {
1481 VDBG("Request not complete");
1482 status = REQ_UNCOMPLETE;
1483 return status;
1484 } else if (remaining_length) {
1485 if (direction) {
1486 VDBG("Transmit dTD remaining length not zero");
1487 status = -EPROTO;
1488 break;
1489 } else {
1490 td_complete++;
1491 break;
1492 }
1493 } else {
1494 td_complete++;
1495 VDBG("dTD transmitted successful ");
1496 }
1497
1498 if (j != curr_req->dtd_count - 1)
1499 curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1500 }
1501
1502 if (status)
1503 return status;
1504
1505 curr_req->req.actual = actual;
1506
1507 return 0;
1508}
1509
1510/* Process a DTD completion interrupt */
1511static void dtd_complete_irq(struct fsl_udc *udc)
1512{
1513 u32 bit_pos;
1514 int i, ep_num, direction, bit_mask, status;
1515 struct fsl_ep *curr_ep;
1516 struct fsl_req *curr_req, *temp_req;
1517
1518 /* Clear the bits in the register */
1519 bit_pos = fsl_readl(&dr_regs->endptcomplete);
1520 fsl_writel(bit_pos, &dr_regs->endptcomplete);
1521
1522 if (!bit_pos)
1523 return;
1524
1525 for (i = 0; i < udc->max_ep * 2; i++) {
1526 ep_num = i >> 1;
1527 direction = i % 2;
1528
1529 bit_mask = 1 << (ep_num + 16 * direction);
1530
1531 if (!(bit_pos & bit_mask))
1532 continue;
1533
1534 curr_ep = get_ep_by_pipe(udc, i);
1535
1536 /* If the ep is configured */
1537 if (curr_ep->name == NULL) {
b6c63937 1538 WARNING("Invalid EP?");
b504882d
LY		 1539 continue;
1540 }
1541
1542 /* process the req queue until an uncomplete request */
1543 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1544 queue) {
1545 status = process_ep_req(udc, i, curr_req);
1546
1547 VDBG("status of process_ep_req= %d, ep = %d",
1548 status, ep_num);
1549 if (status == REQ_UNCOMPLETE)
1550 break;
1551 /* write back status to req */
1552 curr_req->req.status = status;
1553
1554 if (ep_num == 0) {
1555 ep0_req_complete(udc, curr_ep, curr_req);
1556 break;
1557 } else
1558 done(curr_ep, curr_req, status);
1559 }
1560 }
1561}
1562
1563/* Process a port change interrupt */
1564static void port_change_irq(struct fsl_udc *udc)
1565{
1566 u32 speed;
1567
1568 if (udc->bus_reset)
1569 udc->bus_reset = 0;
1570
1571 /* Bus resetting is finished */
1572 if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) {
1573 /* Get the speed */
1574 speed = (fsl_readl(&dr_regs->portsc1)
1575 & PORTSCX_PORT_SPEED_MASK);
1576 switch (speed) {
1577 case PORTSCX_PORT_SPEED_HIGH:
1578 udc->gadget.speed = USB_SPEED_HIGH;
1579 break;
1580 case PORTSCX_PORT_SPEED_FULL:
1581 udc->gadget.speed = USB_SPEED_FULL;
1582 break;
1583 case PORTSCX_PORT_SPEED_LOW:
1584 udc->gadget.speed = USB_SPEED_LOW;
1585 break;
1586 default:
1587 udc->gadget.speed = USB_SPEED_UNKNOWN;
1588 break;
1589 }
1590 }
1591
1592 /* Update USB state */
1593 if (!udc->resume_state)
1594 udc->usb_state = USB_STATE_DEFAULT;
1595}
1596
1597/* Process suspend interrupt */
1598static void suspend_irq(struct fsl_udc *udc)
1599{
1600 udc->resume_state = udc->usb_state;
1601 udc->usb_state = USB_STATE_SUSPENDED;
1602
1603 /* report suspend to the driver, serial.c does not support this */
1604 if (udc->driver->suspend)
1605 udc->driver->suspend(&udc->gadget);
1606}
1607
1608static void bus_resume(struct fsl_udc *udc)
1609{
1610 udc->usb_state = udc->resume_state;
1611 udc->resume_state = 0;
1612
1613 /* report resume to the driver, serial.c does not support this */
1614 if (udc->driver->resume)
1615 udc->driver->resume(&udc->gadget);
1616}
1617
1618/* Clear up all ep queues */
1619static int reset_queues(struct fsl_udc *udc)
1620{
1621 u8 pipe;
1622
1623 for (pipe = 0; pipe < udc->max_pipes; pipe++)
1624 udc_reset_ep_queue(udc, pipe);
1625
1626 /* report disconnect; the driver is already quiesced */
185e3dea 1627 spin_unlock(&udc->lock);
b504882d 1628 udc->driver->disconnect(&udc->gadget);
185e3dea 1629 spin_lock(&udc->lock);
b504882d
LY		 1630
1631 return 0;
1632}
1633
1634/* Process reset interrupt */
1635static void reset_irq(struct fsl_udc *udc)
1636{
1637 u32 temp;
1638 unsigned long timeout;
1639
1640 /* Clear the device address */
1641 temp = fsl_readl(&dr_regs->deviceaddr);
1642 fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
1643
1644 udc->device_address = 0;
1645
1646 /* Clear usb state */
1647 udc->resume_state = 0;
1648 udc->ep0_dir = 0;
1649 udc->ep0_state = WAIT_FOR_SETUP;
1650 udc->remote_wakeup = 0; /* default to 0 on reset */
1651 udc->gadget.b_hnp_enable = 0;
1652 udc->gadget.a_hnp_support = 0;
1653 udc->gadget.a_alt_hnp_support = 0;
1654
1655 /* Clear all the setup token semaphores */
1656 temp = fsl_readl(&dr_regs->endptsetupstat);
1657 fsl_writel(temp, &dr_regs->endptsetupstat);
1658
1659 /* Clear all the endpoint complete status bits */
1660 temp = fsl_readl(&dr_regs->endptcomplete);
1661 fsl_writel(temp, &dr_regs->endptcomplete);
1662
1663 timeout = jiffies + 100;
1664 while (fsl_readl(&dr_regs->endpointprime)) {
1665 /* Wait until all endptprime bits cleared */
1666 if (time_after(jiffies, timeout)) {
1667 ERR("Timeout for reset\n");
1668 break;
1669 }
1670 cpu_relax();
1671 }
1672
1673 /* Write 1s to the flush register */
1674 fsl_writel(0xffffffff, &dr_regs->endptflush);
1675
1676 if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1677 VDBG("Bus reset");
1678 /* Bus is reseting */
1679 udc->bus_reset = 1;
1680 /* Reset all the queues, include XD, dTD, EP queue
1681 * head and TR Queue */
1682 reset_queues(udc);
1683 udc->usb_state = USB_STATE_DEFAULT;
1684 } else {
1685 VDBG("Controller reset");
1686 /* initialize usb hw reg except for regs for EP, not
1687 * touch usbintr reg */
1688 dr_controller_setup(udc);
1689
1690 /* Reset all internal used Queues */
1691 reset_queues(udc);
1692
1693 ep0_setup(udc);
1694
1695 /* Enable DR IRQ reg, Set Run bit, change udc state */
1696 dr_controller_run(udc);
1697 udc->usb_state = USB_STATE_ATTACHED;
1698 }
1699}
1700
1701/*
1702 * USB device controller interrupt handler
1703 */
1704static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1705{
1706 struct fsl_udc *udc = _udc;
1707 u32 irq_src;
1708 irqreturn_t status = IRQ_NONE;
1709 unsigned long flags;
1710
1711 /* Disable ISR for OTG host mode */
1712 if (udc->stopped)
1713 return IRQ_NONE;
1714 spin_lock_irqsave(&udc->lock, flags);
1715 irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
1716 /* Clear notification bits */
1717 fsl_writel(irq_src, &dr_regs->usbsts);
1718
1719 /* VDBG("irq_src [0x%8x]", irq_src); */
1720
1721 /* Need to resume? */
1722 if (udc->usb_state == USB_STATE_SUSPENDED)
1723 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
1724 bus_resume(udc);
1725
1726 /* USB Interrupt */
1727 if (irq_src & USB_STS_INT) {
1728 VDBG("Packet int");
1729 /* Setup package, we only support ep0 as control ep */
1730 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
1731 tripwire_handler(udc, 0,
1732 (u8 *) (&udc->local_setup_buff));
1733 setup_received_irq(udc, &udc->local_setup_buff);
1734 status = IRQ_HANDLED;
1735 }
1736
1737 /* completion of dtd */
1738 if (fsl_readl(&dr_regs->endptcomplete)) {
1739 dtd_complete_irq(udc);
1740 status = IRQ_HANDLED;
1741 }
1742 }
1743
1744 /* SOF (for ISO transfer) */
1745 if (irq_src & USB_STS_SOF) {
1746 status = IRQ_HANDLED;
1747 }
1748
1749 /* Port Change */
1750 if (irq_src & USB_STS_PORT_CHANGE) {
1751 port_change_irq(udc);
1752 status = IRQ_HANDLED;
1753 }
1754
1755 /* Reset Received */
1756 if (irq_src & USB_STS_RESET) {
1757 reset_irq(udc);
1758 status = IRQ_HANDLED;
1759 }
1760
1761 /* Sleep Enable (Suspend) */
1762 if (irq_src & USB_STS_SUSPEND) {
1763 suspend_irq(udc);
1764 status = IRQ_HANDLED;
1765 }
1766
1767 if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
1768 VDBG("Error IRQ %x ", irq_src);
1769 }
1770
1771 spin_unlock_irqrestore(&udc->lock, flags);
1772 return status;
1773}
1774
1775/*----------------------------------------------------------------*
1776 * Hook to gadget drivers
1777 * Called by initialization code of gadget drivers
1778*----------------------------------------------------------------*/
1779int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1780{
1781 int retval = -ENODEV;
1782 unsigned long flags = 0;
1783
1784 if (!udc_controller)
1785 return -ENODEV;
1786
1787 if (!driver || (driver->speed != USB_SPEED_FULL
1788 && driver->speed != USB_SPEED_HIGH)
1789 || !driver->bind || !driver->disconnect
1790 || !driver->setup)
1791 return -EINVAL;
1792
1793 if (udc_controller->driver)
1794 return -EBUSY;
1795
1796 /* lock is needed but whether should use this lock or another */
1797 spin_lock_irqsave(&udc_controller->lock, flags);
1798
1799 driver->driver.bus = 0;
1800 /* hook up the driver */
1801 udc_controller->driver = driver;
1802 udc_controller->gadget.dev.driver = &driver->driver;
1803 spin_unlock_irqrestore(&udc_controller->lock, flags);
1804
1805 /* bind udc driver to gadget driver */
1806 retval = driver->bind(&udc_controller->gadget);
1807 if (retval) {
1808 VDBG("bind to %s --> %d", driver->driver.name, retval);
1809 udc_controller->gadget.dev.driver = 0;
1810 udc_controller->driver = 0;
1811 goto out;
1812 }
1813
1814 /* Enable DR IRQ reg and Set usbcmd reg Run bit */
1815 dr_controller_run(udc_controller);
1816 udc_controller->usb_state = USB_STATE_ATTACHED;
1817 udc_controller->ep0_state = WAIT_FOR_SETUP;
1818 udc_controller->ep0_dir = 0;
1819 printk(KERN_INFO "%s: bind to driver %s \n",
1820 udc_controller->gadget.name, driver->driver.name);
1821
1822out:
1823 if (retval)
1824 printk("retval %d \n", retval);
1825 return retval;
1826}
1827EXPORT_SYMBOL(usb_gadget_register_driver);
1828
1829/* Disconnect from gadget driver */
1830int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1831{
1832 struct fsl_ep *loop_ep;
1833 unsigned long flags;
1834
1835 if (!udc_controller)
1836 return -ENODEV;
1837
1838 if (!driver || driver != udc_controller->driver || !driver->unbind)
1839 return -EINVAL;
1840
b504882d
LY		 1841 if (udc_controller->transceiver)
1842 (void)otg_set_peripheral(udc_controller->transceiver, 0);
b504882d
LY		 1843
1844 /* stop DR, disable intr */
1845 dr_controller_stop(udc_controller);
1846
1847 /* in fact, no needed */
1848 udc_controller->usb_state = USB_STATE_ATTACHED;
1849 udc_controller->ep0_state = WAIT_FOR_SETUP;
1850 udc_controller->ep0_dir = 0;
1851
1852 /* stand operation */
1853 spin_lock_irqsave(&udc_controller->lock, flags);
1854 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
1855 nuke(&udc_controller->eps[0], -ESHUTDOWN);
1856 list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
1857 ep.ep_list)
1858 nuke(loop_ep, -ESHUTDOWN);
1859 spin_unlock_irqrestore(&udc_controller->lock, flags);
1860
1861 /* unbind gadget and unhook driver. */
1862 driver->unbind(&udc_controller->gadget);
1863 udc_controller->gadget.dev.driver = 0;
1864 udc_controller->driver = 0;
1865
1866 printk("unregistered gadget driver '%s'\r\n", driver->driver.name);
1867 return 0;
1868}
1869EXPORT_SYMBOL(usb_gadget_unregister_driver);
1870
1871/*-------------------------------------------------------------------------
1872 PROC File System Support
1873-------------------------------------------------------------------------*/
1874#ifdef CONFIG_USB_GADGET_DEBUG_FILES
1875
1876#include <linux/seq_file.h>
1877
1878static const char proc_filename[] = "driver/fsl_usb2_udc";
1879
1880static int fsl_proc_read(char *page, char **start, off_t off, int count,
1881 int *eof, void *_dev)
1882{
1883 char *buf = page;
1884 char *next = buf;
1885 unsigned size = count;
1886 unsigned long flags;
1887 int t, i;
1888 u32 tmp_reg;
1889 struct fsl_ep *ep = NULL;
1890 struct fsl_req *req;
1891
1892 struct fsl_udc *udc = udc_controller;
1893 if (off != 0)
1894 return 0;
1895
1896 spin_lock_irqsave(&udc->lock, flags);
1897
dc0d5c1e 1898 /* ------basic driver information ---- */
b504882d
LY		 1899 t = scnprintf(next, size,
1900 DRIVER_DESC "\n"
1901 "%s version: %s\n"
1902 "Gadget driver: %s\n\n",
1903 driver_name, DRIVER_VERSION,
1904 udc->driver ? udc->driver->driver.name : "(none)");
1905 size -= t;
1906 next += t;
1907
1908 /* ------ DR Registers ----- */
1909 tmp_reg = fsl_readl(&dr_regs->usbcmd);
1910 t = scnprintf(next, size,
1911 "USBCMD reg:\n"
1912 "SetupTW: %d\n"
1913 "Run/Stop: %s\n\n",
1914 (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
1915 (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
1916 size -= t;
1917 next += t;
1918
1919 tmp_reg = fsl_readl(&dr_regs->usbsts);
1920 t = scnprintf(next, size,
1921 "USB Status Reg:\n"
1922 "Dr Suspend: %d" "Reset Received: %d" "System Error: %s"
1923 "USB Error Interrupt: %s\n\n",
1924 (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
1925 (tmp_reg & USB_STS_RESET) ? 1 : 0,
1926 (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
1927 (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
1928 size -= t;
1929 next += t;
1930
1931 tmp_reg = fsl_readl(&dr_regs->usbintr);
1932 t = scnprintf(next, size,
1933 "USB Intrrupt Enable Reg:\n"
1934 "Sleep Enable: %d" "SOF Received Enable: %d"
1935 "Reset Enable: %d\n"
1936 "System Error Enable: %d"
1937 "Port Change Dectected Enable: %d\n"
1938 "USB Error Intr Enable: %d" "USB Intr Enable: %d\n\n",
1939 (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
1940 (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
1941 (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
1942 (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
1943 (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
1944 (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
1945 (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
1946 size -= t;
1947 next += t;
1948
1949 tmp_reg = fsl_readl(&dr_regs->frindex);
1950 t = scnprintf(next, size,
1951 "USB Frame Index Reg:" "Frame Number is 0x%x\n\n",
1952 (tmp_reg & USB_FRINDEX_MASKS));
1953 size -= t;
1954 next += t;
1955
1956 tmp_reg = fsl_readl(&dr_regs->deviceaddr);
1957 t = scnprintf(next, size,
1958 "USB Device Address Reg:" "Device Addr is 0x%x\n\n",
1959 (tmp_reg & USB_DEVICE_ADDRESS_MASK));
1960 size -= t;
1961 next += t;
1962
1963 tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
1964 t = scnprintf(next, size,
1965 "USB Endpoint List Address Reg:"
1966 "Device Addr is 0x%x\n\n",
1967 (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
1968 size -= t;
1969 next += t;
1970
1971 tmp_reg = fsl_readl(&dr_regs->portsc1);
1972 t = scnprintf(next, size,
1973 "USB Port Status&Control Reg:\n"
1974 "Port Transceiver Type : %s" "Port Speed: %s \n"
1975 "PHY Low Power Suspend: %s" "Port Reset: %s"
1976 "Port Suspend Mode: %s \n" "Over-current Change: %s"
1977 "Port Enable/Disable Change: %s\n"
1978 "Port Enabled/Disabled: %s"
1979 "Current Connect Status: %s\n\n", ( {
1980 char *s;
1981 switch (tmp_reg & PORTSCX_PTS_FSLS) {
1982 case PORTSCX_PTS_UTMI:
1983 s = "UTMI"; break;
1984 case PORTSCX_PTS_ULPI:
1985 s = "ULPI "; break;
1986 case PORTSCX_PTS_FSLS:
1987 s = "FS/LS Serial"; break;
1988 default:
1989 s = "None"; break;
1990 }
1991 s;} ), ( {
1992 char *s;
1993 switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) {
1994 case PORTSCX_PORT_SPEED_FULL:
1995 s = "Full Speed"; break;
1996 case PORTSCX_PORT_SPEED_LOW:
1997 s = "Low Speed"; break;
1998 case PORTSCX_PORT_SPEED_HIGH:
1999 s = "High Speed"; break;
2000 default:
2001 s = "Undefined"; break;
2002 }
2003 s;
2004 } ),
2005 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
2006 "Normal PHY mode" : "Low power mode",
2007 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
2008 "Not in Reset",
2009 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
2010 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
2011 "No",
2012 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
2013 "Not change",
2014 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
2015 "Not correct",
2016 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
2017 "Attached" : "Not-Att");
2018 size -= t;
2019 next += t;
2020
2021 tmp_reg = fsl_readl(&dr_regs->usbmode);
2022 t = scnprintf(next, size,
2023 "USB Mode Reg:" "Controller Mode is : %s\n\n", ( {
2024 char *s;
2025 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2026 case USB_MODE_CTRL_MODE_IDLE:
2027 s = "Idle"; break;
2028 case USB_MODE_CTRL_MODE_DEVICE:
2029 s = "Device Controller"; break;
2030 case USB_MODE_CTRL_MODE_HOST:
2031 s = "Host Controller"; break;
2032 default:
2033 s = "None"; break;
2034 }
2035 s;
2036 } ));
2037 size -= t;
2038 next += t;
2039
2040 tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2041 t = scnprintf(next, size,
2042 "Endpoint Setup Status Reg:" "SETUP on ep 0x%x\n\n",
2043 (tmp_reg & EP_SETUP_STATUS_MASK));
2044 size -= t;
2045 next += t;
2046
2047 for (i = 0; i < udc->max_ep / 2; i++) {
2048 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2049 t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2050 i, tmp_reg);
2051 size -= t;
2052 next += t;
2053 }
2054 tmp_reg = fsl_readl(&dr_regs->endpointprime);
2055 t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n", tmp_reg);
2056 size -= t;
2057 next += t;
2058
2059 tmp_reg = usb_sys_regs->snoop1;
2060 t = scnprintf(next, size, "\nSnoop1 Reg : = [0x%x]\n\n", tmp_reg);
2061 size -= t;
2062 next += t;
2063
2064 tmp_reg = usb_sys_regs->control;
2065 t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n",
2066 tmp_reg);
2067 size -= t;
2068 next += t;
2069
2070 /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2071 ep = &udc->eps[0];
2072 t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n",
2073 ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2074 size -= t;
2075 next += t;
2076
2077 if (list_empty(&ep->queue)) {
2078 t = scnprintf(next, size, "its req queue is empty\n\n");
2079 size -= t;
2080 next += t;
2081 } else {
2082 list_for_each_entry(req, &ep->queue, queue) {
2083 t = scnprintf(next, size,
2084 "req %p actual 0x%x length 0x%x buf %p\n",
2085 &req->req, req->req.actual,
2086 req->req.length, req->req.buf);
2087 size -= t;
2088 next += t;
2089 }
2090 }
2091 /* other gadget->eplist ep */
2092 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2093 if (ep->desc) {
2094 t = scnprintf(next, size,
2095 "\nFor %s Maxpkt is 0x%x "
2096 "index is 0x%x\n",
2097 ep->ep.name, ep_maxpacket(ep),
2098 ep_index(ep));
2099 size -= t;
2100 next += t;
2101
2102 if (list_empty(&ep->queue)) {
2103 t = scnprintf(next, size,
2104 "its req queue is empty\n\n");
2105 size -= t;
2106 next += t;
2107 } else {
2108 list_for_each_entry(req, &ep->queue, queue) {
2109 t = scnprintf(next, size,
2110 "req %p actual 0x%x length"
2111 "0x%x buf %p\n",
2112 &req->req, req->req.actual,
2113 req->req.length, req->req.buf);
2114 size -= t;
2115 next += t;
2116 } /* end for each_entry of ep req */
2117 } /* end for else */
2118 } /* end for if(ep->queue) */
2119 } /* end (ep->desc) */
2120
2121 spin_unlock_irqrestore(&udc->lock, flags);
2122
2123 *eof = 1;
2124 return count - size;
2125}
2126
2127#define create_proc_file() create_proc_read_entry(proc_filename, \
2128 0, NULL, fsl_proc_read, NULL)
2129
2130#define remove_proc_file() remove_proc_entry(proc_filename, NULL)
2131
2132#else /* !CONFIG_USB_GADGET_DEBUG_FILES */
2133
2134#define create_proc_file() do {} while (0)
2135#define remove_proc_file() do {} while (0)
2136
2137#endif /* CONFIG_USB_GADGET_DEBUG_FILES */
2138
2139/*-------------------------------------------------------------------------*/
2140
2141/* Release udc structures */
2142static void fsl_udc_release(struct device *dev)
2143{
2144 complete(udc_controller->done);
2145 dma_free_coherent(dev, udc_controller->ep_qh_size,
2146 udc_controller->ep_qh, udc_controller->ep_qh_dma);
2147 kfree(udc_controller);
2148}
2149
2150/******************************************************************
2151 Internal structure setup functions
2152*******************************************************************/
2153/*------------------------------------------------------------------
2154 * init resource for globle controller
2155 * Return the udc handle on success or NULL on failure
2156 ------------------------------------------------------------------*/
4365831d
LY		 2157static int __init struct_udc_setup(struct fsl_udc *udc,
2158 struct platform_device *pdev)
b504882d 2159{
b504882d
LY		 2160 struct fsl_usb2_platform_data *pdata;
2161 size_t size;
2162
b504882d
LY		 2163 pdata = pdev->dev.platform_data;
2164 udc->phy_mode = pdata->phy_mode;
b504882d
LY		 2165
2166 udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2167 if (!udc->eps) {
2168 ERR("malloc fsl_ep failed\n");
4365831d 2169 return -1;
b504882d
LY		 2170 }
2171
2172 /* initialized QHs, take care of alignment */
2173 size = udc->max_ep * sizeof(struct ep_queue_head);
2174 if (size < QH_ALIGNMENT)
2175 size = QH_ALIGNMENT;
2176 else if ((size % QH_ALIGNMENT) != 0) {
2177 size += QH_ALIGNMENT + 1;
2178 size &= ~(QH_ALIGNMENT - 1);
2179 }
2180 udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2181 &udc->ep_qh_dma, GFP_KERNEL);
2182 if (!udc->ep_qh) {
2183 ERR("malloc QHs for udc failed\n");
2184 kfree(udc->eps);
4365831d 2185 return -1;
b504882d
LY		 2186 }
2187
2188 udc->ep_qh_size = size;
2189
2190 /* Initialize ep0 status request structure */
2191 /* FIXME: fsl_alloc_request() ignores ep argument */
2192 udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2193 struct fsl_req, req);
2194 /* allocate a small amount of memory to get valid address */
2195 udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2196 udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2197
2198 udc->resume_state = USB_STATE_NOTATTACHED;
2199 udc->usb_state = USB_STATE_POWERED;
2200 udc->ep0_dir = 0;
2201 udc->remote_wakeup = 0; /* default to 0 on reset */
2202 spin_lock_init(&udc->lock);
2203
4365831d 2204 return 0;
b504882d
LY		 2205}
2206
2207/*----------------------------------------------------------------
2208 * Setup the fsl_ep struct for eps
2209 * Link fsl_ep->ep to gadget->ep_list
2210 * ep0out is not used so do nothing here
2211 * ep0in should be taken care
2212 *--------------------------------------------------------------*/
2213static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2214 char *name, int link)
2215{
2216 struct fsl_ep *ep = &udc->eps[index];
2217
2218 ep->udc = udc;
2219 strcpy(ep->name, name);
2220 ep->ep.name = ep->name;
2221
2222 ep->ep.ops = &fsl_ep_ops;
2223 ep->stopped = 0;
2224
2225 /* for ep0: maxP defined in desc
2226 * for other eps, maxP is set by epautoconfig() called by gadget layer
2227 */
2228 ep->ep.maxpacket = (unsigned short) ~0;
2229
2230 /* the queue lists any req for this ep */
2231 INIT_LIST_HEAD(&ep->queue);
2232
2233 /* gagdet.ep_list used for ep_autoconfig so no ep0 */
2234 if (link)
2235 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2236 ep->gadget = &udc->gadget;
2237 ep->qh = &udc->ep_qh[index];
2238
2239 return 0;
2240}
2241
2242/* Driver probe function
4365831d
LY		 2243 * all intialization operations implemented here except enabling usb_intr reg
2244 * board setup should have been done in the platform code
b504882d
LY		 2245 */
2246static int __init fsl_udc_probe(struct platform_device *pdev)
2247{
2248 struct resource *res;
2249 int ret = -ENODEV;
2250 unsigned int i;
4365831d 2251 u32 dccparams;
b504882d
LY		 2252
2253 if (strcmp(pdev->name, driver_name)) {
2254 VDBG("Wrong device\n");
2255 return -ENODEV;
2256 }
2257
4365831d
LY		 2258 udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
2259 if (udc_controller == NULL) {
2260 ERR("malloc udc failed\n");
b504882d
LY		 2261 return -ENOMEM;
2262 }
2263
2264 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
4365831d
LY		 2265 if (!res) {
2266 kfree(udc_controller);
b504882d 2267 return -ENXIO;
4365831d 2268 }
b504882d
LY		 2269
2270 if (!request_mem_region(res->start, res->end - res->start + 1,
2271 driver_name)) {
2272 ERR("request mem region for %s failed \n", pdev->name);
4365831d 2273 kfree(udc_controller);
b504882d
LY		 2274 return -EBUSY;
2275 }
2276
2277 dr_regs = ioremap(res->start, res->end - res->start + 1);
2278 if (!dr_regs) {
2279 ret = -ENOMEM;
2280 goto err1;
2281 }
2282
2283 usb_sys_regs = (struct usb_sys_interface *)
2284 ((u32)dr_regs + USB_DR_SYS_OFFSET);
2285
4365831d
LY		 2286 /* Read Device Controller Capability Parameters register */
2287 dccparams = fsl_readl(&dr_regs->dccparams);
2288 if (!(dccparams & DCCPARAMS_DC)) {
2289 ERR("This SOC doesn't support device role\n");
2290 ret = -ENODEV;
2291 goto err2;
2292 }
2293 /* Get max device endpoints */
2294 /* DEN is bidirectional ep number, max_ep doubles the number */
2295 udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
2296
b504882d
LY		 2297 udc_controller->irq = platform_get_irq(pdev, 0);
2298 if (!udc_controller->irq) {
2299 ret = -ENODEV;
2300 goto err2;
2301 }
2302
37b5453d 2303 ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
b504882d
LY		 2304 driver_name, udc_controller);
2305 if (ret != 0) {
2306 ERR("cannot request irq %d err %d \n",
2307 udc_controller->irq, ret);
2308 goto err2;
2309 }
2310
4365831d
LY		 2311 /* Initialize the udc structure including QH member and other member */
2312 if (struct_udc_setup(udc_controller, pdev)) {
2313 ERR("Can't initialize udc data structure\n");
2314 ret = -ENOMEM;
2315 goto err3;
2316 }
2317
b504882d
LY		 2318 /* initialize usb hw reg except for regs for EP,
2319 * leave usbintr reg untouched */
2320 dr_controller_setup(udc_controller);
2321
2322 /* Setup gadget structure */
2323 udc_controller->gadget.ops = &fsl_gadget_ops;
2324 udc_controller->gadget.is_dualspeed = 1;
2325 udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2326 INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2327 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2328 udc_controller->gadget.name = driver_name;
2329
2330 /* Setup gadget.dev and register with kernel */
0031a06e 2331 dev_set_name(&udc_controller->gadget.dev, "gadget");
b504882d
LY		 2332 udc_controller->gadget.dev.release = fsl_udc_release;
2333 udc_controller->gadget.dev.parent = &pdev->dev;
2334 ret = device_register(&udc_controller->gadget.dev);
2335 if (ret < 0)
2336 goto err3;
2337
2338 /* setup QH and epctrl for ep0 */
2339 ep0_setup(udc_controller);
2340
2341 /* setup udc->eps[] for ep0 */
2342 struct_ep_setup(udc_controller, 0, "ep0", 0);
2343 /* for ep0: the desc defined here;
2344 * for other eps, gadget layer called ep_enable with defined desc
2345 */
2346 udc_controller->eps[0].desc = &fsl_ep0_desc;
2347 udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD;
2348
2349 /* setup the udc->eps[] for non-control endpoints and link
2350 * to gadget.ep_list */
2351 for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
2352 char name[14];
2353
2354 sprintf(name, "ep%dout", i);
2355 struct_ep_setup(udc_controller, i * 2, name, 1);
2356 sprintf(name, "ep%din", i);
2357 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
2358 }
2359
2360 /* use dma_pool for TD management */
2361 udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
2362 sizeof(struct ep_td_struct),
2363 DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
2364 if (udc_controller->td_pool == NULL) {
2365 ret = -ENOMEM;
2366 goto err4;
2367 }
2368 create_proc_file();
2369 return 0;
2370
2371err4:
2372 device_unregister(&udc_controller->gadget.dev);
2373err3:
2374 free_irq(udc_controller->irq, udc_controller);
2375err2:
2376 iounmap(dr_regs);
2377err1:
2378 release_mem_region(res->start, res->end - res->start + 1);
4365831d 2379 kfree(udc_controller);
b504882d
LY		 2380 return ret;
2381}
2382
2383/* Driver removal function
2384 * Free resources and finish pending transactions
2385 */
2386static int __exit fsl_udc_remove(struct platform_device *pdev)
2387{
2388 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2389
2390 DECLARE_COMPLETION(done);
2391
2392 if (!udc_controller)
2393 return -ENODEV;
2394 udc_controller->done = &done;
2395
2396 /* DR has been stopped in usb_gadget_unregister_driver() */
2397 remove_proc_file();
2398
2399 /* Free allocated memory */
2400 kfree(udc_controller->status_req->req.buf);
2401 kfree(udc_controller->status_req);
2402 kfree(udc_controller->eps);
2403
2404 dma_pool_destroy(udc_controller->td_pool);
2405 free_irq(udc_controller->irq, udc_controller);
2406 iounmap(dr_regs);
2407 release_mem_region(res->start, res->end - res->start + 1);
2408
2409 device_unregister(&udc_controller->gadget.dev);
2410 /* free udc --wait for the release() finished */
2411 wait_for_completion(&done);
2412
2413 return 0;
2414}
2415
2416/*-----------------------------------------------------------------
2417 * Modify Power management attributes
2418 * Used by OTG statemachine to disable gadget temporarily
2419 -----------------------------------------------------------------*/
2420static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
2421{
2422 dr_controller_stop(udc_controller);
2423 return 0;
2424}
2425
2426/*-----------------------------------------------------------------
2427 * Invoked on USB resume. May be called in_interrupt.
2428 * Here we start the DR controller and enable the irq
2429 *-----------------------------------------------------------------*/
2430static int fsl_udc_resume(struct platform_device *pdev)
2431{
2432 /* Enable DR irq reg and set controller Run */
2433 if (udc_controller->stopped) {
2434 dr_controller_setup(udc_controller);
2435 dr_controller_run(udc_controller);
2436 }
2437 udc_controller->usb_state = USB_STATE_ATTACHED;
2438 udc_controller->ep0_state = WAIT_FOR_SETUP;
2439 udc_controller->ep0_dir = 0;
2440 return 0;
2441}
2442
2443/*-------------------------------------------------------------------------
2444 Register entry point for the peripheral controller driver
2445--------------------------------------------------------------------------*/
2446
2447static struct platform_driver udc_driver = {
2448 .remove = __exit_p(fsl_udc_remove),
2449 /* these suspend and resume are not usb suspend and resume */
2450 .suspend = fsl_udc_suspend,
2451 .resume = fsl_udc_resume,
2452 .driver = {
2453 .name = (char *)driver_name,
2454 .owner = THIS_MODULE,
2455 },
2456};
2457
2458static int __init udc_init(void)
2459{
2460 printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION);
2461 return platform_driver_probe(&udc_driver, fsl_udc_probe);
2462}
2463
2464module_init(udc_init);
2465
2466static void __exit udc_exit(void)
2467{
2468 platform_driver_unregister(&udc_driver);
2469 printk("%s unregistered \n", driver_desc);
2470}
2471
2472module_exit(udc_exit);
2473
2474MODULE_DESCRIPTION(DRIVER_DESC);
2475MODULE_AUTHOR(DRIVER_AUTHOR);
2476MODULE_LICENSE("GPL");
f34c32f1 2477MODULE_ALIAS("platform:fsl-usb2-udc");
kernel source for telekom puls (alcatel/mediatek)