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USB: ci13xxx_udc: fix logic to mark request dma addresses as invalid
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / gadget / ci13xxx_udc.c
CommitLineData
aa69a809
DL		 1/*
2 * ci13xxx_udc.c - MIPS USB IP core family device controller
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/*
14 * Description: MIPS USB IP core family device controller
15 * Currently it only supports IP part number CI13412
16 *
17 * This driver is composed of several blocks:
18 * - HW: hardware interface
19 * - DBG: debug facilities (optional)
20 * - UTIL: utilities
21 * - ISR: interrupts handling
22 * - ENDPT: endpoint operations (Gadget API)
23 * - GADGET: gadget operations (Gadget API)
24 * - BUS: bus glue code, bus abstraction layer
aa69a809
DL		 25 *
26 * Compile Options
27 * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
28 * - STALL_IN: non-empty bulk-in pipes cannot be halted
29 * if defined mass storage compliance succeeds but with warnings
30 * => case 4: Hi > Dn
31 * => case 5: Hi > Di
32 * => case 8: Hi <> Do
33 * if undefined usbtest 13 fails
34 * - TRACE: enable function tracing (depends on DEBUG)
35 *
36 * Main Features
37 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
38 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
39 * - Normal & LPM support
40 *
41 * USBTEST Report
42 * - OK: 0-12, 13 (STALL_IN defined) & 14
43 * - Not Supported: 15 & 16 (ISO)
44 *
45 * TODO List
46 * - OTG
47 * - Isochronous & Interrupt Traffic
48 * - Handle requests which spawns into several TDs
49 * - GET_STATUS(device) - always reports 0
50 * - Gadget API (majority of optional features)
51 * - Suspend & Remote Wakeup
52 */
36825a2d 53#include <linux/delay.h>
aa69a809
DL		 54#include <linux/device.h>
55#include <linux/dmapool.h>
56#include <linux/dma-mapping.h>
57#include <linux/init.h>
58#include <linux/interrupt.h>
aa69a809
DL		 59#include <linux/io.h>
60#include <linux/irq.h>
61#include <linux/kernel.h>
5a0e3ad6 62#include <linux/slab.h>
c036019e 63#include <linux/pm_runtime.h>
aa69a809
DL		 64#include <linux/usb/ch9.h>
65#include <linux/usb/gadget.h>
f01ef574 66#include <linux/usb/otg.h>
aa69a809
DL		 67
68#include "ci13xxx_udc.h"
69
70
71/******************************************************************************
72 * DEFINE
73 *****************************************************************************/
954aad8c
MG		 74
75#define DMA_ADDR_INVALID (~(dma_addr_t)0)
76
aa69a809
DL		 77/* ctrl register bank access */
78static DEFINE_SPINLOCK(udc_lock);
79
aa69a809
DL		 80/* control endpoint description */
81static const struct usb_endpoint_descriptor
ca9cfea0 82ctrl_endpt_out_desc = {
aa69a809
DL		 83 .bLength = USB_DT_ENDPOINT_SIZE,
84 .bDescriptorType = USB_DT_ENDPOINT,
85
ca9cfea0
PK		 86 .bEndpointAddress = USB_DIR_OUT,
87 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
88 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
89};
90
91static const struct usb_endpoint_descriptor
92ctrl_endpt_in_desc = {
93 .bLength = USB_DT_ENDPOINT_SIZE,
94 .bDescriptorType = USB_DT_ENDPOINT,
95
96 .bEndpointAddress = USB_DIR_IN,
aa69a809
DL		 97 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
98 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
99};
100
101/* UDC descriptor */
102static struct ci13xxx *_udc;
103
104/* Interrupt statistics */
105#define ISR_MASK 0x1F
106static struct {
107 u32 test;
108 u32 ui;
109 u32 uei;
110 u32 pci;
111 u32 uri;
112 u32 sli;
113 u32 none;
114 struct {
115 u32 cnt;
116 u32 buf[ISR_MASK+1];
117 u32 idx;
118 } hndl;
119} isr_statistics;
120
121/**
122 * ffs_nr: find first (least significant) bit set
123 * @x: the word to search
124 *
125 * This function returns bit number (instead of position)
126 */
127static int ffs_nr(u32 x)
128{
129 int n = ffs(x);
130
131 return n ? n-1 : 32;
132}
133
134/******************************************************************************
135 * HW block
136 *****************************************************************************/
137/* register bank descriptor */
138static struct {
139 unsigned lpm; /* is LPM? */
140 void __iomem *abs; /* bus map offset */
141 void __iomem *cap; /* bus map offset + CAP offset + CAP data */
142 size_t size; /* bank size */
143} hw_bank;
144
f01ef574
PK		 145/* MSM specific */
146#define ABS_AHBBURST (0x0090UL)
147#define ABS_AHBMODE (0x0098UL)
aa69a809
DL		 148/* UDC register map */
149#define ABS_CAPLENGTH (0x100UL)
150#define ABS_HCCPARAMS (0x108UL)
151#define ABS_DCCPARAMS (0x124UL)
152#define ABS_TESTMODE (hw_bank.lpm ? 0x0FCUL : 0x138UL)
153/* offset to CAPLENTGH (addr + data) */
154#define CAP_USBCMD (0x000UL)
155#define CAP_USBSTS (0x004UL)
156#define CAP_USBINTR (0x008UL)
157#define CAP_DEVICEADDR (0x014UL)
158#define CAP_ENDPTLISTADDR (0x018UL)
159#define CAP_PORTSC (0x044UL)
f23e649b 160#define CAP_DEVLC (0x084UL)
aa69a809
DL		 161#define CAP_USBMODE (hw_bank.lpm ? 0x0C8UL : 0x068UL)
162#define CAP_ENDPTSETUPSTAT (hw_bank.lpm ? 0x0D8UL : 0x06CUL)
163#define CAP_ENDPTPRIME (hw_bank.lpm ? 0x0DCUL : 0x070UL)
164#define CAP_ENDPTFLUSH (hw_bank.lpm ? 0x0E0UL : 0x074UL)
165#define CAP_ENDPTSTAT (hw_bank.lpm ? 0x0E4UL : 0x078UL)
166#define CAP_ENDPTCOMPLETE (hw_bank.lpm ? 0x0E8UL : 0x07CUL)
167#define CAP_ENDPTCTRL (hw_bank.lpm ? 0x0ECUL : 0x080UL)
168#define CAP_LAST (hw_bank.lpm ? 0x12CUL : 0x0C0UL)
169
170/* maximum number of enpoints: valid only after hw_device_reset() */
171static unsigned hw_ep_max;
172
173/**
174 * hw_ep_bit: calculates the bit number
175 * @num: endpoint number
176 * @dir: endpoint direction
177 *
178 * This function returns bit number
179 */
180static inline int hw_ep_bit(int num, int dir)
181{
182 return num + (dir ? 16 : 0);
183}
184
185/**
186 * hw_aread: reads from register bitfield
187 * @addr: address relative to bus map
188 * @mask: bitfield mask
189 *
190 * This function returns register bitfield data
191 */
192static u32 hw_aread(u32 addr, u32 mask)
193{
194 return ioread32(addr + hw_bank.abs) & mask;
195}
196
197/**
198 * hw_awrite: writes to register bitfield
199 * @addr: address relative to bus map
200 * @mask: bitfield mask
201 * @data: new data
202 */
203static void hw_awrite(u32 addr, u32 mask, u32 data)
204{
205 iowrite32(hw_aread(addr, ~mask) | (data & mask),
206 addr + hw_bank.abs);
207}
208
209/**
210 * hw_cread: reads from register bitfield
211 * @addr: address relative to CAP offset plus content
212 * @mask: bitfield mask
213 *
214 * This function returns register bitfield data
215 */
216static u32 hw_cread(u32 addr, u32 mask)
217{
218 return ioread32(addr + hw_bank.cap) & mask;
219}
220
221/**
222 * hw_cwrite: writes to register bitfield
223 * @addr: address relative to CAP offset plus content
224 * @mask: bitfield mask
225 * @data: new data
226 */
227static void hw_cwrite(u32 addr, u32 mask, u32 data)
228{
229 iowrite32(hw_cread(addr, ~mask) | (data & mask),
230 addr + hw_bank.cap);
231}
232
233/**
234 * hw_ctest_and_clear: tests & clears register bitfield
235 * @addr: address relative to CAP offset plus content
236 * @mask: bitfield mask
237 *
238 * This function returns register bitfield data
239 */
240static u32 hw_ctest_and_clear(u32 addr, u32 mask)
241{
242 u32 reg = hw_cread(addr, mask);
243
244 iowrite32(reg, addr + hw_bank.cap);
245 return reg;
246}
247
248/**
249 * hw_ctest_and_write: tests & writes register bitfield
250 * @addr: address relative to CAP offset plus content
251 * @mask: bitfield mask
252 * @data: new data
253 *
254 * This function returns register bitfield data
255 */
256static u32 hw_ctest_and_write(u32 addr, u32 mask, u32 data)
257{
258 u32 reg = hw_cread(addr, ~0);
259
260 iowrite32((reg & ~mask) | (data & mask), addr + hw_bank.cap);
261 return (reg & mask) >> ffs_nr(mask);
262}
263
f01ef574 264static int hw_device_init(void __iomem *base)
aa69a809
DL		 265{
266 u32 reg;
267
268 /* bank is a module variable */
269 hw_bank.abs = base;
270
271 hw_bank.cap = hw_bank.abs;
272 hw_bank.cap += ABS_CAPLENGTH;
273 hw_bank.cap += ioread8(hw_bank.cap);
274
275 reg = hw_aread(ABS_HCCPARAMS, HCCPARAMS_LEN) >> ffs_nr(HCCPARAMS_LEN);
276 hw_bank.lpm = reg;
277 hw_bank.size = hw_bank.cap - hw_bank.abs;
278 hw_bank.size += CAP_LAST;
279 hw_bank.size /= sizeof(u32);
280
f01ef574 281 reg = hw_aread(ABS_DCCPARAMS, DCCPARAMS_DEN) >> ffs_nr(DCCPARAMS_DEN);
ca9cfea0 282 hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
f01ef574 283
ca9cfea0
PK		 284 if (hw_ep_max == 0 || hw_ep_max > ENDPT_MAX)
285 return -ENODEV;
f01ef574
PK		 286
287 /* setup lock mode ? */
288
289 /* ENDPTSETUPSTAT is '0' by default */
290
291 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
292
293 return 0;
294}
295/**
296 * hw_device_reset: resets chip (execute without interruption)
297 * @base: register base address
298 *
299 * This function returns an error code
300 */
301static int hw_device_reset(struct ci13xxx *udc)
302{
aa69a809
DL		 303 /* should flush & stop before reset */
304 hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0);
305 hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
306
307 hw_cwrite(CAP_USBCMD, USBCMD_RST, USBCMD_RST);
308 while (hw_cread(CAP_USBCMD, USBCMD_RST))
309 udelay(10); /* not RTOS friendly */
310
f01ef574
PK		 311
312 if (udc->udc_driver->notify_event)
313 udc->udc_driver->notify_event(udc,
314 CI13XXX_CONTROLLER_RESET_EVENT);
315
8c2387a7 316 if (udc->udc_driver->flags & CI13XXX_DISABLE_STREAMING)
f01ef574
PK		 317 hw_cwrite(CAP_USBMODE, USBMODE_SDIS, USBMODE_SDIS);
318
aa69a809
DL		 319 /* USBMODE should be configured step by step */
320 hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
321 hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_DEVICE);
322 hw_cwrite(CAP_USBMODE, USBMODE_SLOM, USBMODE_SLOM); /* HW >= 2.3 */
323
324 if (hw_cread(CAP_USBMODE, USBMODE_CM) != USBMODE_CM_DEVICE) {
325 pr_err("cannot enter in device mode");
326 pr_err("lpm = %i", hw_bank.lpm);
327 return -ENODEV;
328 }
329
aa69a809
DL		 330 return 0;
331}
332
333/**
334 * hw_device_state: enables/disables interrupts & starts/stops device (execute
335 * without interruption)
336 * @dma: 0 => disable, !0 => enable and set dma engine
337 *
338 * This function returns an error code
339 */
340static int hw_device_state(u32 dma)
341{
342 if (dma) {
343 hw_cwrite(CAP_ENDPTLISTADDR, ~0, dma);
344 /* interrupt, error, port change, reset, sleep/suspend */
345 hw_cwrite(CAP_USBINTR, ~0,
346 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
347 hw_cwrite(CAP_USBCMD, USBCMD_RS, USBCMD_RS);
348 } else {
349 hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
350 hw_cwrite(CAP_USBINTR, ~0, 0);
351 }
352 return 0;
353}
354
355/**
356 * hw_ep_flush: flush endpoint fifo (execute without interruption)
357 * @num: endpoint number
358 * @dir: endpoint direction
359 *
360 * This function returns an error code
361 */
362static int hw_ep_flush(int num, int dir)
363{
364 int n = hw_ep_bit(num, dir);
365
366 do {
367 /* flush any pending transfer */
368 hw_cwrite(CAP_ENDPTFLUSH, BIT(n), BIT(n));
369 while (hw_cread(CAP_ENDPTFLUSH, BIT(n)))
370 cpu_relax();
371 } while (hw_cread(CAP_ENDPTSTAT, BIT(n)));
372
373 return 0;
374}
375
376/**
377 * hw_ep_disable: disables endpoint (execute without interruption)
378 * @num: endpoint number
379 * @dir: endpoint direction
380 *
381 * This function returns an error code
382 */
383static int hw_ep_disable(int num, int dir)
384{
385 hw_ep_flush(num, dir);
386 hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32),
387 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
388 return 0;
389}
390
391/**
392 * hw_ep_enable: enables endpoint (execute without interruption)
393 * @num: endpoint number
394 * @dir: endpoint direction
395 * @type: endpoint type
396 *
397 * This function returns an error code
398 */
399static int hw_ep_enable(int num, int dir, int type)
400{
401 u32 mask, data;
402
403 if (dir) {
404 mask = ENDPTCTRL_TXT; /* type */
405 data = type << ffs_nr(mask);
406
407 mask |= ENDPTCTRL_TXS; /* unstall */
408 mask |= ENDPTCTRL_TXR; /* reset data toggle */
409 data |= ENDPTCTRL_TXR;
410 mask |= ENDPTCTRL_TXE; /* enable */
411 data |= ENDPTCTRL_TXE;
412 } else {
413 mask = ENDPTCTRL_RXT; /* type */
414 data = type << ffs_nr(mask);
415
416 mask |= ENDPTCTRL_RXS; /* unstall */
417 mask |= ENDPTCTRL_RXR; /* reset data toggle */
418 data |= ENDPTCTRL_RXR;
419 mask |= ENDPTCTRL_RXE; /* enable */
420 data |= ENDPTCTRL_RXE;
421 }
422 hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32), mask, data);
423 return 0;
424}
425
426/**
427 * hw_ep_get_halt: return endpoint halt status
428 * @num: endpoint number
429 * @dir: endpoint direction
430 *
431 * This function returns 1 if endpoint halted
432 */
433static int hw_ep_get_halt(int num, int dir)
434{
435 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
436
437 return hw_cread(CAP_ENDPTCTRL + num * sizeof(u32), mask) ? 1 : 0;
438}
439
aa69a809
DL		 440/**
441 * hw_test_and_clear_setup_status: test & clear setup status (execute without
442 * interruption)
443 * @n: bit number (endpoint)
444 *
445 * This function returns setup status
446 */
447static int hw_test_and_clear_setup_status(int n)
448{
449 return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT, BIT(n));
450}
451
452/**
453 * hw_ep_prime: primes endpoint (execute without interruption)
454 * @num: endpoint number
455 * @dir: endpoint direction
456 * @is_ctrl: true if control endpoint
457 *
458 * This function returns an error code
459 */
460static int hw_ep_prime(int num, int dir, int is_ctrl)
461{
462 int n = hw_ep_bit(num, dir);
463
aa69a809
DL		 464 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
465 return -EAGAIN;
466
467 hw_cwrite(CAP_ENDPTPRIME, BIT(n), BIT(n));
468
469 while (hw_cread(CAP_ENDPTPRIME, BIT(n)))
470 cpu_relax();
471 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
472 return -EAGAIN;
473
474 /* status shoult be tested according with manual but it doesn't work */
475 return 0;
476}
477
478/**
479 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
480 * without interruption)
481 * @num: endpoint number
482 * @dir: endpoint direction
483 * @value: true => stall, false => unstall
484 *
485 * This function returns an error code
486 */
487static int hw_ep_set_halt(int num, int dir, int value)
488{
489 if (value != 0 && value != 1)
490 return -EINVAL;
491
492 do {
493 u32 addr = CAP_ENDPTCTRL + num * sizeof(u32);
494 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
495 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
496
497 /* data toggle - reserved for EP0 but it's in ESS */
498 hw_cwrite(addr, mask_xs|mask_xr, value ? mask_xs : mask_xr);
499
500 } while (value != hw_ep_get_halt(num, dir));
501
502 return 0;
503}
504
505/**
506 * hw_intr_clear: disables interrupt & clears interrupt status (execute without
507 * interruption)
508 * @n: interrupt bit
509 *
510 * This function returns an error code
511 */
512static int hw_intr_clear(int n)
513{
514 if (n >= REG_BITS)
515 return -EINVAL;
516
517 hw_cwrite(CAP_USBINTR, BIT(n), 0);
518 hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
519 return 0;
520}
521
522/**
523 * hw_intr_force: enables interrupt & forces interrupt status (execute without
524 * interruption)
525 * @n: interrupt bit
526 *
527 * This function returns an error code
528 */
529static int hw_intr_force(int n)
530{
531 if (n >= REG_BITS)
532 return -EINVAL;
533
534 hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, TESTMODE_FORCE);
535 hw_cwrite(CAP_USBINTR, BIT(n), BIT(n));
536 hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
537 hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, 0);
538 return 0;
539}
540
541/**
542 * hw_is_port_high_speed: test if port is high speed
543 *
544 * This function returns true if high speed port
545 */
546static int hw_port_is_high_speed(void)
547{
548 return hw_bank.lpm ? hw_cread(CAP_DEVLC, DEVLC_PSPD) :
549 hw_cread(CAP_PORTSC, PORTSC_HSP);
550}
551
552/**
553 * hw_port_test_get: reads port test mode value
554 *
555 * This function returns port test mode value
556 */
557static u8 hw_port_test_get(void)
558{
559 return hw_cread(CAP_PORTSC, PORTSC_PTC) >> ffs_nr(PORTSC_PTC);
560}
561
562/**
563 * hw_port_test_set: writes port test mode (execute without interruption)
564 * @mode: new value
565 *
566 * This function returns an error code
567 */
568static int hw_port_test_set(u8 mode)
569{
570 const u8 TEST_MODE_MAX = 7;
571
572 if (mode > TEST_MODE_MAX)
573 return -EINVAL;
574
575 hw_cwrite(CAP_PORTSC, PORTSC_PTC, mode << ffs_nr(PORTSC_PTC));
576 return 0;
577}
578
579/**
580 * hw_read_intr_enable: returns interrupt enable register
581 *
582 * This function returns register data
583 */
584static u32 hw_read_intr_enable(void)
585{
586 return hw_cread(CAP_USBINTR, ~0);
587}
588
589/**
590 * hw_read_intr_status: returns interrupt status register
591 *
592 * This function returns register data
593 */
594static u32 hw_read_intr_status(void)
595{
596 return hw_cread(CAP_USBSTS, ~0);
597}
598
599/**
600 * hw_register_read: reads all device registers (execute without interruption)
601 * @buf: destination buffer
602 * @size: buffer size
603 *
604 * This function returns number of registers read
605 */
606static size_t hw_register_read(u32 *buf, size_t size)
607{
608 unsigned i;
609
610 if (size > hw_bank.size)
611 size = hw_bank.size;
612
613 for (i = 0; i < size; i++)
614 buf[i] = hw_aread(i * sizeof(u32), ~0);
615
616 return size;
617}
618
619/**
620 * hw_register_write: writes to register
621 * @addr: register address
622 * @data: register value
623 *
624 * This function returns an error code
625 */
626static int hw_register_write(u16 addr, u32 data)
627{
628 /* align */
629 addr /= sizeof(u32);
630
631 if (addr >= hw_bank.size)
632 return -EINVAL;
633
634 /* align */
635 addr *= sizeof(u32);
636
637 hw_awrite(addr, ~0, data);
638 return 0;
639}
640
641/**
642 * hw_test_and_clear_complete: test & clear complete status (execute without
643 * interruption)
644 * @n: bit number (endpoint)
645 *
646 * This function returns complete status
647 */
648static int hw_test_and_clear_complete(int n)
649{
650 return hw_ctest_and_clear(CAP_ENDPTCOMPLETE, BIT(n));
651}
652
653/**
654 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
655 * without interruption)
656 *
657 * This function returns active interrutps
658 */
659static u32 hw_test_and_clear_intr_active(void)
660{
661 u32 reg = hw_read_intr_status() & hw_read_intr_enable();
662
663 hw_cwrite(CAP_USBSTS, ~0, reg);
664 return reg;
665}
666
667/**
668 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
669 * interruption)
670 *
671 * This function returns guard value
672 */
673static int hw_test_and_clear_setup_guard(void)
674{
675 return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, 0);
676}
677
678/**
679 * hw_test_and_set_setup_guard: test & set setup guard (execute without
680 * interruption)
681 *
682 * This function returns guard value
683 */
684static int hw_test_and_set_setup_guard(void)
685{
686 return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
687}
688
689/**
690 * hw_usb_set_address: configures USB address (execute without interruption)
691 * @value: new USB address
692 *
693 * This function returns an error code
694 */
695static int hw_usb_set_address(u8 value)
696{
697 /* advance */
698 hw_cwrite(CAP_DEVICEADDR, DEVICEADDR_USBADR | DEVICEADDR_USBADRA,
699 value << ffs_nr(DEVICEADDR_USBADR) | DEVICEADDR_USBADRA);
700 return 0;
701}
702
703/**
704 * hw_usb_reset: restart device after a bus reset (execute without
705 * interruption)
706 *
707 * This function returns an error code
708 */
709static int hw_usb_reset(void)
710{
711 hw_usb_set_address(0);
712
713 /* ESS flushes only at end?!? */
714 hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0); /* flush all EPs */
715
716 /* clear setup token semaphores */
717 hw_cwrite(CAP_ENDPTSETUPSTAT, 0, 0); /* writes its content */
718
719 /* clear complete status */
720 hw_cwrite(CAP_ENDPTCOMPLETE, 0, 0); /* writes its content */
721
722 /* wait until all bits cleared */
723 while (hw_cread(CAP_ENDPTPRIME, ~0))
724 udelay(10); /* not RTOS friendly */
725
726 /* reset all endpoints ? */
727
728 /* reset internal status and wait for further instructions
729 no need to verify the port reset status (ESS does it) */
730
731 return 0;
732}
733
734/******************************************************************************
735 * DBG block
736 *****************************************************************************/
737/**
738 * show_device: prints information about device capabilities and status
739 *
740 * Check "device.h" for details
741 */
742static ssize_t show_device(struct device *dev, struct device_attribute *attr,
743 char *buf)
744{
745 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
746 struct usb_gadget *gadget = &udc->gadget;
747 int n = 0;
748
749 dbg_trace("[%s] %p\n", __func__, buf);
750 if (attr == NULL || buf == NULL) {
751 dev_err(dev, "[%s] EINVAL\n", __func__);
752 return 0;
753 }
754
755 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
756 gadget->speed);
757 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
758 gadget->is_dualspeed);
759 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
760 gadget->is_otg);
761 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
762 gadget->is_a_peripheral);
763 n += scnprintf(buf + n, PAGE_SIZE - n, "b_hnp_enable = %d\n",
764 gadget->b_hnp_enable);
765 n += scnprintf(buf + n, PAGE_SIZE - n, "a_hnp_support = %d\n",
766 gadget->a_hnp_support);
767 n += scnprintf(buf + n, PAGE_SIZE - n, "a_alt_hnp_support = %d\n",
768 gadget->a_alt_hnp_support);
769 n += scnprintf(buf + n, PAGE_SIZE - n, "name = %s\n",
770 (gadget->name ? gadget->name : ""));
771
772 return n;
773}
774static DEVICE_ATTR(device, S_IRUSR, show_device, NULL);
775
776/**
777 * show_driver: prints information about attached gadget (if any)
778 *
779 * Check "device.h" for details
780 */
781static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
782 char *buf)
783{
784 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
785 struct usb_gadget_driver *driver = udc->driver;
786 int n = 0;
787
788 dbg_trace("[%s] %p\n", __func__, buf);
789 if (attr == NULL || buf == NULL) {
790 dev_err(dev, "[%s] EINVAL\n", __func__);
791 return 0;
792 }
793
794 if (driver == NULL)
795 return scnprintf(buf, PAGE_SIZE,
796 "There is no gadget attached!\n");
797
798 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
799 (driver->function ? driver->function : ""));
800 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
801 driver->speed);
802
803 return n;
804}
805static DEVICE_ATTR(driver, S_IRUSR, show_driver, NULL);
806
807/* Maximum event message length */
808#define DBG_DATA_MSG 64UL
809
810/* Maximum event messages */
811#define DBG_DATA_MAX 128UL
812
813/* Event buffer descriptor */
814static struct {
815 char (buf[DBG_DATA_MAX])[DBG_DATA_MSG]; /* buffer */
816 unsigned idx; /* index */
817 unsigned tty; /* print to console? */
818 rwlock_t lck; /* lock */
819} dbg_data = {
820 .idx = 0,
821 .tty = 0,
822 .lck = __RW_LOCK_UNLOCKED(lck)
823};
824
825/**
826 * dbg_dec: decrements debug event index
827 * @idx: buffer index
828 */
829static void dbg_dec(unsigned *idx)
830{
831 *idx = (*idx - 1) & (DBG_DATA_MAX-1);
832}
833
834/**
835 * dbg_inc: increments debug event index
836 * @idx: buffer index
837 */
838static void dbg_inc(unsigned *idx)
839{
840 *idx = (*idx + 1) & (DBG_DATA_MAX-1);
841}
842
843/**
844 * dbg_print: prints the common part of the event
845 * @addr: endpoint address
846 * @name: event name
847 * @status: status
848 * @extra: extra information
849 */
850static void dbg_print(u8 addr, const char *name, int status, const char *extra)
851{
852 struct timeval tval;
853 unsigned int stamp;
854 unsigned long flags;
855
856 write_lock_irqsave(&dbg_data.lck, flags);
857
858 do_gettimeofday(&tval);
859 stamp = tval.tv_sec & 0xFFFF; /* 2^32 = 4294967296. Limit to 4096s */
860 stamp = stamp * 1000000 + tval.tv_usec;
861
862 scnprintf(dbg_data.buf[dbg_data.idx], DBG_DATA_MSG,
0f91349b 863 "%04X\t? %02X %-7.7s %4i ?\t%s\n",
aa69a809
DL		 864 stamp, addr, name, status, extra);
865
866 dbg_inc(&dbg_data.idx);
867
868 write_unlock_irqrestore(&dbg_data.lck, flags);
869
870 if (dbg_data.tty != 0)
0f91349b 871 pr_notice("%04X\t? %02X %-7.7s %4i ?\t%s\n",
aa69a809
DL		 872 stamp, addr, name, status, extra);
873}
874
875/**
876 * dbg_done: prints a DONE event
877 * @addr: endpoint address
878 * @td: transfer descriptor
879 * @status: status
880 */
881static void dbg_done(u8 addr, const u32 token, int status)
882{
883 char msg[DBG_DATA_MSG];
884
885 scnprintf(msg, sizeof(msg), "%d %02X",
886 (int)(token & TD_TOTAL_BYTES) >> ffs_nr(TD_TOTAL_BYTES),
887 (int)(token & TD_STATUS) >> ffs_nr(TD_STATUS));
888 dbg_print(addr, "DONE", status, msg);
889}
890
891/**
892 * dbg_event: prints a generic event
893 * @addr: endpoint address
894 * @name: event name
895 * @status: status
896 */
897static void dbg_event(u8 addr, const char *name, int status)
898{
899 if (name != NULL)
900 dbg_print(addr, name, status, "");
901}
902
903/*
904 * dbg_queue: prints a QUEUE event
905 * @addr: endpoint address
906 * @req: USB request
907 * @status: status
908 */
909static void dbg_queue(u8 addr, const struct usb_request *req, int status)
910{
911 char msg[DBG_DATA_MSG];
912
913 if (req != NULL) {
914 scnprintf(msg, sizeof(msg),
915 "%d %d", !req->no_interrupt, req->length);
916 dbg_print(addr, "QUEUE", status, msg);
917 }
918}
919
920/**
921 * dbg_setup: prints a SETUP event
922 * @addr: endpoint address
923 * @req: setup request
924 */
925static void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
926{
927 char msg[DBG_DATA_MSG];
928
929 if (req != NULL) {
930 scnprintf(msg, sizeof(msg),
931 "%02X %02X %04X %04X %d", req->bRequestType,
932 req->bRequest, le16_to_cpu(req->wValue),
933 le16_to_cpu(req->wIndex), le16_to_cpu(req->wLength));
934 dbg_print(addr, "SETUP", 0, msg);
935 }
936}
937
938/**
939 * show_events: displays the event buffer
940 *
941 * Check "device.h" for details
942 */
943static ssize_t show_events(struct device *dev, struct device_attribute *attr,
944 char *buf)
945{
946 unsigned long flags;
947 unsigned i, j, n = 0;
948
949 dbg_trace("[%s] %p\n", __func__, buf);
950 if (attr == NULL || buf == NULL) {
951 dev_err(dev, "[%s] EINVAL\n", __func__);
952 return 0;
953 }
954
955 read_lock_irqsave(&dbg_data.lck, flags);
956
957 i = dbg_data.idx;
958 for (dbg_dec(&i); i != dbg_data.idx; dbg_dec(&i)) {
959 n += strlen(dbg_data.buf[i]);
960 if (n >= PAGE_SIZE) {
961 n -= strlen(dbg_data.buf[i]);
962 break;
963 }
964 }
965 for (j = 0, dbg_inc(&i); j < n; dbg_inc(&i))
966 j += scnprintf(buf + j, PAGE_SIZE - j,
967 "%s", dbg_data.buf[i]);
968
969 read_unlock_irqrestore(&dbg_data.lck, flags);
970
971 return n;
972}
973
974/**
975 * store_events: configure if events are going to be also printed to console
976 *
977 * Check "device.h" for details
978 */
979static ssize_t store_events(struct device *dev, struct device_attribute *attr,
980 const char *buf, size_t count)
981{
982 unsigned tty;
983
984 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
985 if (attr == NULL || buf == NULL) {
986 dev_err(dev, "[%s] EINVAL\n", __func__);
987 goto done;
988 }
989
990 if (sscanf(buf, "%u", &tty) != 1 || tty > 1) {
991 dev_err(dev, "<1|0>: enable|disable console log\n");
992 goto done;
993 }
994
995 dbg_data.tty = tty;
996 dev_info(dev, "tty = %u", dbg_data.tty);
997
998 done:
999 return count;
1000}
1001static DEVICE_ATTR(events, S_IRUSR | S_IWUSR, show_events, store_events);
1002
1003/**
1004 * show_inters: interrupt status, enable status and historic
1005 *
1006 * Check "device.h" for details
1007 */
1008static ssize_t show_inters(struct device *dev, struct device_attribute *attr,
1009 char *buf)
1010{
1011 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1012 unsigned long flags;
1013 u32 intr;
1014 unsigned i, j, n = 0;
1015
1016 dbg_trace("[%s] %p\n", __func__, buf);
1017 if (attr == NULL || buf == NULL) {
1018 dev_err(dev, "[%s] EINVAL\n", __func__);
1019 return 0;
1020 }
1021
1022 spin_lock_irqsave(udc->lock, flags);
1023
1024 n += scnprintf(buf + n, PAGE_SIZE - n,
1025 "status = %08x\n", hw_read_intr_status());
1026 n += scnprintf(buf + n, PAGE_SIZE - n,
1027 "enable = %08x\n", hw_read_intr_enable());
1028
1029 n += scnprintf(buf + n, PAGE_SIZE - n, "*test = %d\n",
1030 isr_statistics.test);
0f91349b 1031 n += scnprintf(buf + n, PAGE_SIZE - n, "? ui = %d\n",
aa69a809 1032 isr_statistics.ui);
0f91349b 1033 n += scnprintf(buf + n, PAGE_SIZE - n, "? uei = %d\n",
aa69a809 1034 isr_statistics.uei);
0f91349b 1035 n += scnprintf(buf + n, PAGE_SIZE - n, "? pci = %d\n",
aa69a809 1036 isr_statistics.pci);
0f91349b 1037 n += scnprintf(buf + n, PAGE_SIZE - n, "? uri = %d\n",
aa69a809 1038 isr_statistics.uri);
0f91349b 1039 n += scnprintf(buf + n, PAGE_SIZE - n, "? sli = %d\n",
aa69a809
DL		 1040 isr_statistics.sli);
1041 n += scnprintf(buf + n, PAGE_SIZE - n, "*none = %d\n",
1042 isr_statistics.none);
1043 n += scnprintf(buf + n, PAGE_SIZE - n, "*hndl = %d\n",
1044 isr_statistics.hndl.cnt);
1045
1046 for (i = isr_statistics.hndl.idx, j = 0; j <= ISR_MASK; j++, i++) {
1047 i &= ISR_MASK;
1048 intr = isr_statistics.hndl.buf[i];
1049
1050 if (USBi_UI & intr)
1051 n += scnprintf(buf + n, PAGE_SIZE - n, "ui ");
1052 intr &= ~USBi_UI;
1053 if (USBi_UEI & intr)
1054 n += scnprintf(buf + n, PAGE_SIZE - n, "uei ");
1055 intr &= ~USBi_UEI;
1056 if (USBi_PCI & intr)
1057 n += scnprintf(buf + n, PAGE_SIZE - n, "pci ");
1058 intr &= ~USBi_PCI;
1059 if (USBi_URI & intr)
1060 n += scnprintf(buf + n, PAGE_SIZE - n, "uri ");
1061 intr &= ~USBi_URI;
1062 if (USBi_SLI & intr)
1063 n += scnprintf(buf + n, PAGE_SIZE - n, "sli ");
1064 intr &= ~USBi_SLI;
1065 if (intr)
1066 n += scnprintf(buf + n, PAGE_SIZE - n, "??? ");
1067 if (isr_statistics.hndl.buf[i])
1068 n += scnprintf(buf + n, PAGE_SIZE - n, "\n");
1069 }
1070
1071 spin_unlock_irqrestore(udc->lock, flags);
1072
1073 return n;
1074}
1075
1076/**
1077 * store_inters: enable & force or disable an individual interrutps
1078 * (to be used for test purposes only)
1079 *
1080 * Check "device.h" for details
1081 */
1082static ssize_t store_inters(struct device *dev, struct device_attribute *attr,
1083 const char *buf, size_t count)
1084{
1085 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1086 unsigned long flags;
1087 unsigned en, bit;
1088
1089 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1090 if (attr == NULL || buf == NULL) {
1091 dev_err(dev, "[%s] EINVAL\n", __func__);
1092 goto done;
1093 }
1094
1095 if (sscanf(buf, "%u %u", &en, &bit) != 2 || en > 1) {
1096 dev_err(dev, "<1|0> <bit>: enable|disable interrupt");
1097 goto done;
1098 }
1099
1100 spin_lock_irqsave(udc->lock, flags);
1101 if (en) {
1102 if (hw_intr_force(bit))
1103 dev_err(dev, "invalid bit number\n");
1104 else
1105 isr_statistics.test++;
1106 } else {
1107 if (hw_intr_clear(bit))
1108 dev_err(dev, "invalid bit number\n");
1109 }
1110 spin_unlock_irqrestore(udc->lock, flags);
1111
1112 done:
1113 return count;
1114}
1115static DEVICE_ATTR(inters, S_IRUSR | S_IWUSR, show_inters, store_inters);
1116
1117/**
1118 * show_port_test: reads port test mode
1119 *
1120 * Check "device.h" for details
1121 */
1122static ssize_t show_port_test(struct device *dev,
1123 struct device_attribute *attr, char *buf)
1124{
1125 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1126 unsigned long flags;
1127 unsigned mode;
1128
1129 dbg_trace("[%s] %p\n", __func__, buf);
1130 if (attr == NULL || buf == NULL) {
1131 dev_err(dev, "[%s] EINVAL\n", __func__);
1132 return 0;
1133 }
1134
1135 spin_lock_irqsave(udc->lock, flags);
1136 mode = hw_port_test_get();
1137 spin_unlock_irqrestore(udc->lock, flags);
1138
1139 return scnprintf(buf, PAGE_SIZE, "mode = %u\n", mode);
1140}
1141
1142/**
1143 * store_port_test: writes port test mode
1144 *
1145 * Check "device.h" for details
1146 */
1147static ssize_t store_port_test(struct device *dev,
1148 struct device_attribute *attr,
1149 const char *buf, size_t count)
1150{
1151 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1152 unsigned long flags;
1153 unsigned mode;
1154
1155 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1156 if (attr == NULL || buf == NULL) {
1157 dev_err(dev, "[%s] EINVAL\n", __func__);
1158 goto done;
1159 }
1160
1161 if (sscanf(buf, "%u", &mode) != 1) {
1162 dev_err(dev, "<mode>: set port test mode");
1163 goto done;
1164 }
1165
1166 spin_lock_irqsave(udc->lock, flags);
1167 if (hw_port_test_set(mode))
1168 dev_err(dev, "invalid mode\n");
1169 spin_unlock_irqrestore(udc->lock, flags);
1170
1171 done:
1172 return count;
1173}
1174static DEVICE_ATTR(port_test, S_IRUSR | S_IWUSR,
1175 show_port_test, store_port_test);
1176
1177/**
1178 * show_qheads: DMA contents of all queue heads
1179 *
1180 * Check "device.h" for details
1181 */
1182static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
1183 char *buf)
1184{
1185 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1186 unsigned long flags;
1187 unsigned i, j, n = 0;
1188
1189 dbg_trace("[%s] %p\n", __func__, buf);
1190 if (attr == NULL || buf == NULL) {
1191 dev_err(dev, "[%s] EINVAL\n", __func__);
1192 return 0;
1193 }
1194
1195 spin_lock_irqsave(udc->lock, flags);
ca9cfea0
PK		 1196 for (i = 0; i < hw_ep_max/2; i++) {
1197 struct ci13xxx_ep *mEpRx = &udc->ci13xxx_ep[i];
1198 struct ci13xxx_ep *mEpTx = &udc->ci13xxx_ep[i + hw_ep_max/2];
aa69a809
DL		 1199 n += scnprintf(buf + n, PAGE_SIZE - n,
1200 "EP=%02i: RX=%08X TX=%08X\n",
ca9cfea0 1201 i, (u32)mEpRx->qh.dma, (u32)mEpTx->qh.dma);
aa69a809
DL		 1202 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
1203 n += scnprintf(buf + n, PAGE_SIZE - n,
1204 " %04X: %08X %08X\n", j,
ca9cfea0
PK		 1205 *((u32 *)mEpRx->qh.ptr + j),
1206 *((u32 *)mEpTx->qh.ptr + j));
aa69a809
DL		 1207 }
1208 }
1209 spin_unlock_irqrestore(udc->lock, flags);
1210
1211 return n;
1212}
1213static DEVICE_ATTR(qheads, S_IRUSR, show_qheads, NULL);
1214
1215/**
1216 * show_registers: dumps all registers
1217 *
1218 * Check "device.h" for details
1219 */
c2b65f84 1220#define DUMP_ENTRIES 512
aa69a809
DL		 1221static ssize_t show_registers(struct device *dev,
1222 struct device_attribute *attr, char *buf)
1223{
1224 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1225 unsigned long flags;
c2b65f84 1226 u32 *dump;
aa69a809
DL		 1227 unsigned i, k, n = 0;
1228
1229 dbg_trace("[%s] %p\n", __func__, buf);
1230 if (attr == NULL || buf == NULL) {
1231 dev_err(dev, "[%s] EINVAL\n", __func__);
1232 return 0;
1233 }
1234
c2b65f84
SAS		 1235 dump = kmalloc(sizeof(u32) * DUMP_ENTRIES, GFP_KERNEL);
1236 if (!dump) {
1237 dev_err(dev, "%s: out of memory\n", __func__);
1238 return 0;
1239 }
1240
aa69a809 1241 spin_lock_irqsave(udc->lock, flags);
c2b65f84 1242 k = hw_register_read(dump, DUMP_ENTRIES);
aa69a809
DL		 1243 spin_unlock_irqrestore(udc->lock, flags);
1244
1245 for (i = 0; i < k; i++) {
1246 n += scnprintf(buf + n, PAGE_SIZE - n,
1247 "reg[0x%04X] = 0x%08X\n",
1248 i * (unsigned)sizeof(u32), dump[i]);
1249 }
c2b65f84 1250 kfree(dump);
aa69a809
DL		 1251
1252 return n;
1253}
1254
1255/**
1256 * store_registers: writes value to register address
1257 *
1258 * Check "device.h" for details
1259 */
1260static ssize_t store_registers(struct device *dev,
1261 struct device_attribute *attr,
1262 const char *buf, size_t count)
1263{
1264 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1265 unsigned long addr, data, flags;
1266
1267 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1268 if (attr == NULL || buf == NULL) {
1269 dev_err(dev, "[%s] EINVAL\n", __func__);
1270 goto done;
1271 }
1272
1273 if (sscanf(buf, "%li %li", &addr, &data) != 2) {
1274 dev_err(dev, "<addr> <data>: write data to register address");
1275 goto done;
1276 }
1277
1278 spin_lock_irqsave(udc->lock, flags);
1279 if (hw_register_write(addr, data))
1280 dev_err(dev, "invalid address range\n");
1281 spin_unlock_irqrestore(udc->lock, flags);
1282
1283 done:
1284 return count;
1285}
1286static DEVICE_ATTR(registers, S_IRUSR | S_IWUSR,
1287 show_registers, store_registers);
1288
1289/**
1290 * show_requests: DMA contents of all requests currently queued (all endpts)
1291 *
1292 * Check "device.h" for details
1293 */
1294static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
1295 char *buf)
1296{
1297 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1298 unsigned long flags;
1299 struct list_head *ptr = NULL;
1300 struct ci13xxx_req *req = NULL;
ca9cfea0 1301 unsigned i, j, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
aa69a809
DL		 1302
1303 dbg_trace("[%s] %p\n", __func__, buf);
1304 if (attr == NULL || buf == NULL) {
1305 dev_err(dev, "[%s] EINVAL\n", __func__);
1306 return 0;
1307 }
1308
1309 spin_lock_irqsave(udc->lock, flags);
1310 for (i = 0; i < hw_ep_max; i++)
ca9cfea0
PK		 1311 list_for_each(ptr, &udc->ci13xxx_ep[i].qh.queue)
1312 {
1313 req = list_entry(ptr, struct ci13xxx_req, queue);
aa69a809 1314
ca9cfea0
PK		 1315 n += scnprintf(buf + n, PAGE_SIZE - n,
1316 "EP=%02i: TD=%08X %s\n",
1317 i % hw_ep_max/2, (u32)req->dma,
1318 ((i < hw_ep_max/2) ? "RX" : "TX"));
1319
1320 for (j = 0; j < qSize; j++)
aa69a809 1321 n += scnprintf(buf + n, PAGE_SIZE - n,
ca9cfea0
PK		 1322 " %04X: %08X\n", j,
1323 *((u32 *)req->ptr + j));
1324 }
aa69a809
DL		 1325 spin_unlock_irqrestore(udc->lock, flags);
1326
1327 return n;
1328}
1329static DEVICE_ATTR(requests, S_IRUSR, show_requests, NULL);
1330
1331/**
1332 * dbg_create_files: initializes the attribute interface
1333 * @dev: device
1334 *
1335 * This function returns an error code
1336 */
1337__maybe_unused static int dbg_create_files(struct device *dev)
1338{
1339 int retval = 0;
1340
1341 if (dev == NULL)
1342 return -EINVAL;
1343 retval = device_create_file(dev, &dev_attr_device);
1344 if (retval)
1345 goto done;
1346 retval = device_create_file(dev, &dev_attr_driver);
1347 if (retval)
1348 goto rm_device;
1349 retval = device_create_file(dev, &dev_attr_events);
1350 if (retval)
1351 goto rm_driver;
1352 retval = device_create_file(dev, &dev_attr_inters);
1353 if (retval)
1354 goto rm_events;
1355 retval = device_create_file(dev, &dev_attr_port_test);
1356 if (retval)
1357 goto rm_inters;
1358 retval = device_create_file(dev, &dev_attr_qheads);
1359 if (retval)
1360 goto rm_port_test;
1361 retval = device_create_file(dev, &dev_attr_registers);
1362 if (retval)
1363 goto rm_qheads;
1364 retval = device_create_file(dev, &dev_attr_requests);
1365 if (retval)
1366 goto rm_registers;
1367 return 0;
1368
1369 rm_registers:
1370 device_remove_file(dev, &dev_attr_registers);
1371 rm_qheads:
1372 device_remove_file(dev, &dev_attr_qheads);
1373 rm_port_test:
1374 device_remove_file(dev, &dev_attr_port_test);
1375 rm_inters:
1376 device_remove_file(dev, &dev_attr_inters);
1377 rm_events:
1378 device_remove_file(dev, &dev_attr_events);
1379 rm_driver:
1380 device_remove_file(dev, &dev_attr_driver);
1381 rm_device:
1382 device_remove_file(dev, &dev_attr_device);
1383 done:
1384 return retval;
1385}
1386
1387/**
1388 * dbg_remove_files: destroys the attribute interface
1389 * @dev: device
1390 *
1391 * This function returns an error code
1392 */
1393__maybe_unused static int dbg_remove_files(struct device *dev)
1394{
1395 if (dev == NULL)
1396 return -EINVAL;
1397 device_remove_file(dev, &dev_attr_requests);
1398 device_remove_file(dev, &dev_attr_registers);
1399 device_remove_file(dev, &dev_attr_qheads);
1400 device_remove_file(dev, &dev_attr_port_test);
1401 device_remove_file(dev, &dev_attr_inters);
1402 device_remove_file(dev, &dev_attr_events);
1403 device_remove_file(dev, &dev_attr_driver);
1404 device_remove_file(dev, &dev_attr_device);
1405 return 0;
1406}
1407
1408/******************************************************************************
1409 * UTIL block
1410 *****************************************************************************/
1411/**
1412 * _usb_addr: calculates endpoint address from direction & number
1413 * @ep: endpoint
1414 */
1415static inline u8 _usb_addr(struct ci13xxx_ep *ep)
1416{
1417 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
1418}
1419
1420/**
1421 * _hardware_queue: configures a request at hardware level
1422 * @gadget: gadget
1423 * @mEp: endpoint
1424 *
1425 * This function returns an error code
1426 */
1427static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1428{
1429 unsigned i;
0e6ca199
PK		 1430 int ret = 0;
1431 unsigned length = mReq->req.length;
aa69a809
DL		 1432
1433 trace("%p, %p", mEp, mReq);
1434
1435 /* don't queue twice */
1436 if (mReq->req.status == -EALREADY)
1437 return -EALREADY;
1438
aa69a809 1439 mReq->req.status = -EALREADY;
954aad8c 1440 if (length && mReq->req.dma == DMA_ADDR_INVALID) {
aa69a809
DL		 1441 mReq->req.dma = \
1442 dma_map_single(mEp->device, mReq->req.buf,
0e6ca199
PK		 1443 length, mEp->dir ? DMA_TO_DEVICE :
1444 DMA_FROM_DEVICE);
aa69a809
DL		 1445 if (mReq->req.dma == 0)
1446 return -ENOMEM;
1447
1448 mReq->map = 1;
1449 }
1450
0e6ca199
PK		 1451 if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
1452 mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
1453 &mReq->zdma);
1454 if (mReq->zptr == NULL) {
1455 if (mReq->map) {
1456 dma_unmap_single(mEp->device, mReq->req.dma,
1457 length, mEp->dir ? DMA_TO_DEVICE :
1458 DMA_FROM_DEVICE);
954aad8c 1459 mReq->req.dma = DMA_ADDR_INVALID;
0e6ca199
PK		 1460 mReq->map = 0;
1461 }
1462 return -ENOMEM;
1463 }
1464 memset(mReq->zptr, 0, sizeof(*mReq->zptr));
1465 mReq->zptr->next = TD_TERMINATE;
1466 mReq->zptr->token = TD_STATUS_ACTIVE;
1467 if (!mReq->req.no_interrupt)
1468 mReq->zptr->token |= TD_IOC;
1469 }
aa69a809
DL		 1470 /*
1471 * TD configuration
1472 * TODO - handle requests which spawns into several TDs
1473 */
1474 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
0e6ca199 1475 mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
aa69a809 1476 mReq->ptr->token &= TD_TOTAL_BYTES;
aa69a809 1477 mReq->ptr->token |= TD_STATUS_ACTIVE;
0e6ca199
PK		 1478 if (mReq->zptr) {
1479 mReq->ptr->next = mReq->zdma;
1480 } else {
1481 mReq->ptr->next = TD_TERMINATE;
1482 if (!mReq->req.no_interrupt)
1483 mReq->ptr->token |= TD_IOC;
1484 }
aa69a809
DL		 1485 mReq->ptr->page[0] = mReq->req.dma;
1486 for (i = 1; i < 5; i++)
1487 mReq->ptr->page[i] =
0a313c4d 1488 (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
aa69a809 1489
0e6ca199
PK		 1490 if (!list_empty(&mEp->qh.queue)) {
1491 struct ci13xxx_req *mReqPrev;
1492 int n = hw_ep_bit(mEp->num, mEp->dir);
1493 int tmp_stat;
1494
1495 mReqPrev = list_entry(mEp->qh.queue.prev,
1496 struct ci13xxx_req, queue);
1497 if (mReqPrev->zptr)
1498 mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
1499 else
1500 mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
1501 wmb();
1502 if (hw_cread(CAP_ENDPTPRIME, BIT(n)))
1503 goto done;
1504 do {
1505 hw_cwrite(CAP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
1506 tmp_stat = hw_cread(CAP_ENDPTSTAT, BIT(n));
1507 } while (!hw_cread(CAP_USBCMD, USBCMD_ATDTW));
1508 hw_cwrite(CAP_USBCMD, USBCMD_ATDTW, 0);
1509 if (tmp_stat)
1510 goto done;
1511 }
1512
1513 /* QH configuration */
ca9cfea0
PK		 1514 mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
1515 mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
0e6ca199 1516 mEp->qh.ptr->cap |= QH_ZLT;
aa69a809
DL		 1517
1518 wmb(); /* synchronize before ep prime */
1519
0e6ca199 1520 ret = hw_ep_prime(mEp->num, mEp->dir,
aa69a809 1521 mEp->type == USB_ENDPOINT_XFER_CONTROL);
0e6ca199
PK		 1522done:
1523 return ret;
aa69a809
DL		 1524}
1525
1526/**
1527 * _hardware_dequeue: handles a request at hardware level
1528 * @gadget: gadget
1529 * @mEp: endpoint
1530 *
1531 * This function returns an error code
1532 */
1533static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1534{
1535 trace("%p, %p", mEp, mReq);
1536
1537 if (mReq->req.status != -EALREADY)
1538 return -EINVAL;
1539
0e6ca199
PK		 1540 if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
1541 return -EBUSY;
1542
1543 if (mReq->zptr) {
1544 if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
1545 return -EBUSY;
1546 dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
1547 mReq->zptr = NULL;
1548 }
aa69a809
DL		 1549
1550 mReq->req.status = 0;
1551
1552 if (mReq->map) {
1553 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
1554 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
954aad8c 1555 mReq->req.dma = DMA_ADDR_INVALID;
aa69a809
DL		 1556 mReq->map = 0;
1557 }
1558
1559 mReq->req.status = mReq->ptr->token & TD_STATUS;
0e6ca199 1560 if ((TD_STATUS_HALTED & mReq->req.status) != 0)
aa69a809
DL		 1561 mReq->req.status = -1;
1562 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
1563 mReq->req.status = -1;
1564 else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
1565 mReq->req.status = -1;
1566
1567 mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
1568 mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
1569 mReq->req.actual = mReq->req.length - mReq->req.actual;
1570 mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
1571
1572 return mReq->req.actual;
1573}
1574
1575/**
1576 * _ep_nuke: dequeues all endpoint requests
1577 * @mEp: endpoint
1578 *
1579 * This function returns an error code
1580 * Caller must hold lock
1581 */
1582static int _ep_nuke(struct ci13xxx_ep *mEp)
1583__releases(mEp->lock)
1584__acquires(mEp->lock)
1585{
1586 trace("%p", mEp);
1587
1588 if (mEp == NULL)
1589 return -EINVAL;
1590
1591 hw_ep_flush(mEp->num, mEp->dir);
1592
ca9cfea0 1593 while (!list_empty(&mEp->qh.queue)) {
aa69a809
DL		 1594
1595 /* pop oldest request */
1596 struct ci13xxx_req *mReq = \
ca9cfea0 1597 list_entry(mEp->qh.queue.next,
aa69a809
DL		 1598 struct ci13xxx_req, queue);
1599 list_del_init(&mReq->queue);
1600 mReq->req.status = -ESHUTDOWN;
1601
7c25a826 1602 if (mReq->req.complete != NULL) {
aa69a809
DL		 1603 spin_unlock(mEp->lock);
1604 mReq->req.complete(&mEp->ep, &mReq->req);
1605 spin_lock(mEp->lock);
1606 }
1607 }
1608 return 0;
1609}
1610
1611/**
1612 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
1613 * @gadget: gadget
1614 *
1615 * This function returns an error code
1616 * Caller must hold lock
1617 */
1618static int _gadget_stop_activity(struct usb_gadget *gadget)
aa69a809
DL		 1619{
1620 struct usb_ep *ep;
1621 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
e2b61c1d 1622 unsigned long flags;
aa69a809
DL		 1623
1624 trace("%p", gadget);
1625
1626 if (gadget == NULL)
1627 return -EINVAL;
1628
e2b61c1d
PK		 1629 spin_lock_irqsave(udc->lock, flags);
1630 udc->gadget.speed = USB_SPEED_UNKNOWN;
1631 udc->remote_wakeup = 0;
1632 udc->suspended = 0;
1633 spin_unlock_irqrestore(udc->lock, flags);
1634
aa69a809
DL		 1635 /* flush all endpoints */
1636 gadget_for_each_ep(ep, gadget) {
1637 usb_ep_fifo_flush(ep);
1638 }
ca9cfea0
PK		 1639 usb_ep_fifo_flush(&udc->ep0out.ep);
1640 usb_ep_fifo_flush(&udc->ep0in.ep);
aa69a809
DL		 1641
1642 udc->driver->disconnect(gadget);
1643
1644 /* make sure to disable all endpoints */
1645 gadget_for_each_ep(ep, gadget) {
1646 usb_ep_disable(ep);
1647 }
aa69a809 1648
ca9cfea0
PK		 1649 if (udc->status != NULL) {
1650 usb_ep_free_request(&udc->ep0in.ep, udc->status);
1651 udc->status = NULL;
aa69a809
DL		 1652 }
1653
aa69a809
DL		 1654 return 0;
1655}
1656
1657/******************************************************************************
1658 * ISR block
1659 *****************************************************************************/
1660/**
1661 * isr_reset_handler: USB reset interrupt handler
1662 * @udc: UDC device
1663 *
1664 * This function resets USB engine after a bus reset occurred
1665 */
1666static void isr_reset_handler(struct ci13xxx *udc)
1667__releases(udc->lock)
1668__acquires(udc->lock)
1669{
aa69a809
DL		 1670 int retval;
1671
1672 trace("%p", udc);
1673
1674 if (udc == NULL) {
1675 err("EINVAL");
1676 return;
1677 }
1678
1679 dbg_event(0xFF, "BUS RST", 0);
1680
f01ef574 1681 spin_unlock(udc->lock);
aa69a809
DL		 1682 retval = _gadget_stop_activity(&udc->gadget);
1683 if (retval)
1684 goto done;
1685
1686 retval = hw_usb_reset();
1687 if (retval)
1688 goto done;
1689
ac1aa6a2
A		 1690 udc->status = usb_ep_alloc_request(&udc->ep0in.ep, GFP_ATOMIC);
1691 if (udc->status == NULL)
1692 retval = -ENOMEM;
ca9cfea0 1693
aa69a809
DL		 1694 spin_lock(udc->lock);
1695
1696 done:
1697 if (retval)
1698 err("error: %i", retval);
1699}
1700
1701/**
1702 * isr_get_status_complete: get_status request complete function
1703 * @ep: endpoint
1704 * @req: request handled
1705 *
1706 * Caller must release lock
1707 */
1708static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
1709{
1710 trace("%p, %p", ep, req);
1711
1712 if (ep == NULL || req == NULL) {
1713 err("EINVAL");
1714 return;
1715 }
1716
1717 kfree(req->buf);
1718 usb_ep_free_request(ep, req);
1719}
1720
1721/**
1722 * isr_get_status_response: get_status request response
ca9cfea0 1723 * @udc: udc struct
aa69a809
DL		 1724 * @setup: setup request packet
1725 *
1726 * This function returns an error code
1727 */
ca9cfea0 1728static int isr_get_status_response(struct ci13xxx *udc,
aa69a809
DL		 1729 struct usb_ctrlrequest *setup)
1730__releases(mEp->lock)
1731__acquires(mEp->lock)
1732{
ca9cfea0 1733 struct ci13xxx_ep *mEp = &udc->ep0in;
aa69a809
DL		 1734 struct usb_request *req = NULL;
1735 gfp_t gfp_flags = GFP_ATOMIC;
1736 int dir, num, retval;
1737
1738 trace("%p, %p", mEp, setup);
1739
1740 if (mEp == NULL || setup == NULL)
1741 return -EINVAL;
1742
1743 spin_unlock(mEp->lock);
1744 req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
1745 spin_lock(mEp->lock);
1746 if (req == NULL)
1747 return -ENOMEM;
1748
1749 req->complete = isr_get_status_complete;
1750 req->length = 2;
1751 req->buf = kzalloc(req->length, gfp_flags);
1752 if (req->buf == NULL) {
1753 retval = -ENOMEM;
1754 goto err_free_req;
1755 }
1756
1757 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
e2b61c1d
PK		 1758 /* Assume that device is bus powered for now. */
1759 *((u16 *)req->buf) = _udc->remote_wakeup << 1;
aa69a809
DL		 1760 retval = 0;
1761 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1762 == USB_RECIP_ENDPOINT) {
1763 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1764 TX : RX;
1765 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1766 *((u16 *)req->buf) = hw_ep_get_halt(num, dir);
1767 }
1768 /* else do nothing; reserved for future use */
1769
1770 spin_unlock(mEp->lock);
1771 retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
1772 spin_lock(mEp->lock);
1773 if (retval)
1774 goto err_free_buf;
1775
1776 return 0;
1777
1778 err_free_buf:
1779 kfree(req->buf);
1780 err_free_req:
1781 spin_unlock(mEp->lock);
1782 usb_ep_free_request(&mEp->ep, req);
1783 spin_lock(mEp->lock);
1784 return retval;
1785}
1786
541cace8
PK		 1787/**
1788 * isr_setup_status_complete: setup_status request complete function
1789 * @ep: endpoint
1790 * @req: request handled
1791 *
1792 * Caller must release lock. Put the port in test mode if test mode
1793 * feature is selected.
1794 */
1795static void
1796isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1797{
1798 struct ci13xxx *udc = req->context;
1799 unsigned long flags;
1800
1801 trace("%p, %p", ep, req);
1802
1803 spin_lock_irqsave(udc->lock, flags);
1804 if (udc->test_mode)
1805 hw_port_test_set(udc->test_mode);
1806 spin_unlock_irqrestore(udc->lock, flags);
1807}
1808
aa69a809
DL		 1809/**
1810 * isr_setup_status_phase: queues the status phase of a setup transation
ca9cfea0 1811 * @udc: udc struct
aa69a809
DL		 1812 *
1813 * This function returns an error code
1814 */
ca9cfea0 1815static int isr_setup_status_phase(struct ci13xxx *udc)
aa69a809
DL		 1816__releases(mEp->lock)
1817__acquires(mEp->lock)
1818{
1819 int retval;
ca9cfea0 1820 struct ci13xxx_ep *mEp;
aa69a809 1821
ca9cfea0 1822 trace("%p", udc);
aa69a809 1823
ca9cfea0 1824 mEp = (udc->ep0_dir == TX) ? &udc->ep0out : &udc->ep0in;
541cace8
PK		 1825 udc->status->context = udc;
1826 udc->status->complete = isr_setup_status_complete;
aa69a809
DL		 1827
1828 spin_unlock(mEp->lock);
ca9cfea0 1829 retval = usb_ep_queue(&mEp->ep, udc->status, GFP_ATOMIC);
aa69a809
DL		 1830 spin_lock(mEp->lock);
1831
1832 return retval;
1833}
1834
1835/**
1836 * isr_tr_complete_low: transaction complete low level handler
1837 * @mEp: endpoint
1838 *
1839 * This function returns an error code
1840 * Caller must hold lock
1841 */
1842static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
1843__releases(mEp->lock)
1844__acquires(mEp->lock)
1845{
0e6ca199 1846 struct ci13xxx_req *mReq, *mReqTemp;
76cd9cfb 1847 struct ci13xxx_ep *mEpTemp = mEp;
986b11b8 1848 int uninitialized_var(retval);
aa69a809
DL		 1849
1850 trace("%p", mEp);
1851
ca9cfea0 1852 if (list_empty(&mEp->qh.queue))
aa69a809
DL		 1853 return -EINVAL;
1854
0e6ca199
PK		 1855 list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
1856 queue) {
1857 retval = _hardware_dequeue(mEp, mReq);
1858 if (retval < 0)
1859 break;
1860 list_del_init(&mReq->queue);
1861 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
1862 if (mReq->req.complete != NULL) {
1863 spin_unlock(mEp->lock);
76cd9cfb
PK		 1864 if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
1865 mReq->req.length)
1866 mEpTemp = &_udc->ep0in;
1867 mReq->req.complete(&mEpTemp->ep, &mReq->req);
0e6ca199
PK		 1868 spin_lock(mEp->lock);
1869 }
d9bb9c18
AL		 1870 }
1871
ef907482 1872 if (retval == -EBUSY)
0e6ca199
PK		 1873 retval = 0;
1874 if (retval < 0)
1875 dbg_event(_usb_addr(mEp), "DONE", retval);
aa69a809 1876
aa69a809
DL		 1877 return retval;
1878}
1879
1880/**
1881 * isr_tr_complete_handler: transaction complete interrupt handler
1882 * @udc: UDC descriptor
1883 *
1884 * This function handles traffic events
1885 */
1886static void isr_tr_complete_handler(struct ci13xxx *udc)
1887__releases(udc->lock)
1888__acquires(udc->lock)
1889{
1890 unsigned i;
541cace8 1891 u8 tmode = 0;
aa69a809
DL		 1892
1893 trace("%p", udc);
1894
1895 if (udc == NULL) {
1896 err("EINVAL");
1897 return;
1898 }
1899
1900 for (i = 0; i < hw_ep_max; i++) {
1901 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
4c5212b7 1902 int type, num, dir, err = -EINVAL;
aa69a809
DL		 1903 struct usb_ctrlrequest req;
1904
aa69a809
DL		 1905 if (mEp->desc == NULL)
1906 continue; /* not configured */
1907
ca9cfea0 1908 if (hw_test_and_clear_complete(i)) {
aa69a809
DL		 1909 err = isr_tr_complete_low(mEp);
1910 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1911 if (err > 0) /* needs status phase */
ca9cfea0 1912 err = isr_setup_status_phase(udc);
aa69a809
DL		 1913 if (err < 0) {
1914 dbg_event(_usb_addr(mEp),
1915 "ERROR", err);
1916 spin_unlock(udc->lock);
1917 if (usb_ep_set_halt(&mEp->ep))
1918 err("error: ep_set_halt");
1919 spin_lock(udc->lock);
1920 }
1921 }
1922 }
1923
1924 if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
1925 !hw_test_and_clear_setup_status(i))
1926 continue;
1927
1928 if (i != 0) {
1929 warn("ctrl traffic received at endpoint");
1930 continue;
1931 }
1932
ca9cfea0
PK		 1933 /*
1934 * Flush data and handshake transactions of previous
1935 * setup packet.
1936 */
1937 _ep_nuke(&udc->ep0out);
1938 _ep_nuke(&udc->ep0in);
1939
aa69a809
DL		 1940 /* read_setup_packet */
1941 do {
1942 hw_test_and_set_setup_guard();
ca9cfea0 1943 memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
aa69a809
DL		 1944 } while (!hw_test_and_clear_setup_guard());
1945
1946 type = req.bRequestType;
1947
ca9cfea0 1948 udc->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
aa69a809
DL		 1949
1950 dbg_setup(_usb_addr(mEp), &req);
1951
1952 switch (req.bRequest) {
1953 case USB_REQ_CLEAR_FEATURE:
e2b61c1d
PK		 1954 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1955 le16_to_cpu(req.wValue) ==
1956 USB_ENDPOINT_HALT) {
1957 if (req.wLength != 0)
1958 break;
1959 num = le16_to_cpu(req.wIndex);
4c5212b7 1960 dir = num & USB_ENDPOINT_DIR_MASK;
e2b61c1d 1961 num &= USB_ENDPOINT_NUMBER_MASK;
4c5212b7
PK		 1962 if (dir) /* TX */
1963 num += hw_ep_max/2;
e2b61c1d
PK		 1964 if (!udc->ci13xxx_ep[num].wedge) {
1965 spin_unlock(udc->lock);
1966 err = usb_ep_clear_halt(
1967 &udc->ci13xxx_ep[num].ep);
1968 spin_lock(udc->lock);
1969 if (err)
1970 break;
1971 }
1972 err = isr_setup_status_phase(udc);
1973 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1974 le16_to_cpu(req.wValue) ==
1975 USB_DEVICE_REMOTE_WAKEUP) {
1976 if (req.wLength != 0)
aa69a809 1977 break;
e2b61c1d
PK		 1978 udc->remote_wakeup = 0;
1979 err = isr_setup_status_phase(udc);
1980 } else {
1981 goto delegate;
aa69a809 1982 }
aa69a809
DL		 1983 break;
1984 case USB_REQ_GET_STATUS:
1985 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1986 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1987 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1988 goto delegate;
1989 if (le16_to_cpu(req.wLength) != 2 ||
1990 le16_to_cpu(req.wValue) != 0)
1991 break;
ca9cfea0 1992 err = isr_get_status_response(udc, &req);
aa69a809
DL		 1993 break;
1994 case USB_REQ_SET_ADDRESS:
1995 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1996 goto delegate;
1997 if (le16_to_cpu(req.wLength) != 0 ||
1998 le16_to_cpu(req.wIndex) != 0)
1999 break;
2000 err = hw_usb_set_address((u8)le16_to_cpu(req.wValue));
2001 if (err)
2002 break;
ca9cfea0 2003 err = isr_setup_status_phase(udc);
aa69a809
DL		 2004 break;
2005 case USB_REQ_SET_FEATURE:
e2b61c1d
PK		 2006 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
2007 le16_to_cpu(req.wValue) ==
2008 USB_ENDPOINT_HALT) {
2009 if (req.wLength != 0)
2010 break;
2011 num = le16_to_cpu(req.wIndex);
4c5212b7 2012 dir = num & USB_ENDPOINT_DIR_MASK;
e2b61c1d 2013 num &= USB_ENDPOINT_NUMBER_MASK;
4c5212b7
PK		 2014 if (dir) /* TX */
2015 num += hw_ep_max/2;
aa69a809 2016
e2b61c1d
PK		 2017 spin_unlock(udc->lock);
2018 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
2019 spin_lock(udc->lock);
2020 if (!err)
541cace8
PK		 2021 isr_setup_status_phase(udc);
2022 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
e2b61c1d
PK		 2023 if (req.wLength != 0)
2024 break;
541cace8
PK		 2025 switch (le16_to_cpu(req.wValue)) {
2026 case USB_DEVICE_REMOTE_WAKEUP:
2027 udc->remote_wakeup = 1;
2028 err = isr_setup_status_phase(udc);
2029 break;
2030 case USB_DEVICE_TEST_MODE:
2031 tmode = le16_to_cpu(req.wIndex) >> 8;
2032 switch (tmode) {
2033 case TEST_J:
2034 case TEST_K:
2035 case TEST_SE0_NAK:
2036 case TEST_PACKET:
2037 case TEST_FORCE_EN:
2038 udc->test_mode = tmode;
2039 err = isr_setup_status_phase(
2040 udc);
2041 break;
2042 default:
2043 break;
2044 }
2045 default:
2046 goto delegate;
2047 }
e2b61c1d
PK		 2048 } else {
2049 goto delegate;
2050 }
aa69a809
DL		 2051 break;
2052 default:
2053delegate:
2054 if (req.wLength == 0) /* no data phase */
ca9cfea0 2055 udc->ep0_dir = TX;
aa69a809
DL		 2056
2057 spin_unlock(udc->lock);
2058 err = udc->driver->setup(&udc->gadget, &req);
2059 spin_lock(udc->lock);
2060 break;
2061 }
2062
2063 if (err < 0) {
2064 dbg_event(_usb_addr(mEp), "ERROR", err);
2065
2066 spin_unlock(udc->lock);
2067 if (usb_ep_set_halt(&mEp->ep))
2068 err("error: ep_set_halt");
2069 spin_lock(udc->lock);
2070 }
2071 }
2072}
2073
2074/******************************************************************************
2075 * ENDPT block
2076 *****************************************************************************/
2077/**
2078 * ep_enable: configure endpoint, making it usable
2079 *
2080 * Check usb_ep_enable() at "usb_gadget.h" for details
2081 */
2082static int ep_enable(struct usb_ep *ep,
2083 const struct usb_endpoint_descriptor *desc)
2084{
2085 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
ca9cfea0 2086 int retval = 0;
aa69a809
DL		 2087 unsigned long flags;
2088
2089 trace("%p, %p", ep, desc);
2090
2091 if (ep == NULL || desc == NULL)
2092 return -EINVAL;
2093
2094 spin_lock_irqsave(mEp->lock, flags);
2095
2096 /* only internal SW should enable ctrl endpts */
2097
2098 mEp->desc = desc;
2099
ca9cfea0 2100 if (!list_empty(&mEp->qh.queue))
aa69a809
DL		 2101 warn("enabling a non-empty endpoint!");
2102
15739bb5
MK		 2103 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
2104 mEp->num = usb_endpoint_num(desc);
2105 mEp->type = usb_endpoint_type(desc);
aa69a809 2106
29cc8897 2107 mEp->ep.maxpacket = usb_endpoint_maxp(desc);
aa69a809 2108
ca9cfea0 2109 dbg_event(_usb_addr(mEp), "ENABLE", 0);
aa69a809 2110
ca9cfea0 2111 mEp->qh.ptr->cap = 0;
aa69a809 2112
ca9cfea0
PK		 2113 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2114 mEp->qh.ptr->cap |= QH_IOS;
2115 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
2116 mEp->qh.ptr->cap &= ~QH_MULT;
2117 else
2118 mEp->qh.ptr->cap &= ~QH_ZLT;
aa69a809 2119
ca9cfea0
PK		 2120 mEp->qh.ptr->cap |=
2121 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
2122 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
aa69a809 2123
ac1aa6a2
A		 2124 /*
2125 * Enable endpoints in the HW other than ep0 as ep0
2126 * is always enabled
2127 */
2128 if (mEp->num)
2129 retval |= hw_ep_enable(mEp->num, mEp->dir, mEp->type);
aa69a809
DL		 2130
2131 spin_unlock_irqrestore(mEp->lock, flags);
2132 return retval;
2133}
2134
2135/**
2136 * ep_disable: endpoint is no longer usable
2137 *
2138 * Check usb_ep_disable() at "usb_gadget.h" for details
2139 */
2140static int ep_disable(struct usb_ep *ep)
2141{
2142 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2143 int direction, retval = 0;
2144 unsigned long flags;
2145
2146 trace("%p", ep);
2147
2148 if (ep == NULL)
2149 return -EINVAL;
2150 else if (mEp->desc == NULL)
2151 return -EBUSY;
2152
2153 spin_lock_irqsave(mEp->lock, flags);
2154
2155 /* only internal SW should disable ctrl endpts */
2156
2157 direction = mEp->dir;
2158 do {
2159 dbg_event(_usb_addr(mEp), "DISABLE", 0);
2160
2161 retval |= _ep_nuke(mEp);
2162 retval |= hw_ep_disable(mEp->num, mEp->dir);
2163
2164 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2165 mEp->dir = (mEp->dir == TX) ? RX : TX;
2166
2167 } while (mEp->dir != direction);
2168
2169 mEp->desc = NULL;
2170
2171 spin_unlock_irqrestore(mEp->lock, flags);
2172 return retval;
2173}
2174
2175/**
2176 * ep_alloc_request: allocate a request object to use with this endpoint
2177 *
2178 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
2179 */
2180static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
2181{
2182 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2183 struct ci13xxx_req *mReq = NULL;
aa69a809
DL		 2184
2185 trace("%p, %i", ep, gfp_flags);
2186
2187 if (ep == NULL) {
2188 err("EINVAL");
2189 return NULL;
2190 }
2191
aa69a809
DL		 2192 mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
2193 if (mReq != NULL) {
2194 INIT_LIST_HEAD(&mReq->queue);
954aad8c 2195 mReq->req.dma = DMA_ADDR_INVALID;
aa69a809
DL		 2196
2197 mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
2198 &mReq->dma);
2199 if (mReq->ptr == NULL) {
2200 kfree(mReq);
2201 mReq = NULL;
2202 }
2203 }
2204
2205 dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
2206
aa69a809
DL		 2207 return (mReq == NULL) ? NULL : &mReq->req;
2208}
2209
2210/**
2211 * ep_free_request: frees a request object
2212 *
2213 * Check usb_ep_free_request() at "usb_gadget.h" for details
2214 */
2215static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
2216{
2217 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2218 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2219 unsigned long flags;
2220
2221 trace("%p, %p", ep, req);
2222
2223 if (ep == NULL || req == NULL) {
2224 err("EINVAL");
2225 return;
2226 } else if (!list_empty(&mReq->queue)) {
2227 err("EBUSY");
2228 return;
2229 }
2230
2231 spin_lock_irqsave(mEp->lock, flags);
2232
2233 if (mReq->ptr)
2234 dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
2235 kfree(mReq);
2236
2237 dbg_event(_usb_addr(mEp), "FREE", 0);
2238
2239 spin_unlock_irqrestore(mEp->lock, flags);
2240}
2241
2242/**
2243 * ep_queue: queues (submits) an I/O request to an endpoint
2244 *
2245 * Check usb_ep_queue()* at usb_gadget.h" for details
2246 */
2247static int ep_queue(struct usb_ep *ep, struct usb_request *req,
2248 gfp_t __maybe_unused gfp_flags)
2249{
2250 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2251 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2252 int retval = 0;
2253 unsigned long flags;
2254
2255 trace("%p, %p, %X", ep, req, gfp_flags);
2256
2257 if (ep == NULL || req == NULL || mEp->desc == NULL)
2258 return -EINVAL;
2259
2260 spin_lock_irqsave(mEp->lock, flags);
2261
76cd9cfb
PK		 2262 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
2263 if (req->length)
2264 mEp = (_udc->ep0_dir == RX) ?
2265 &_udc->ep0out : &_udc->ep0in;
2266 if (!list_empty(&mEp->qh.queue)) {
2267 _ep_nuke(mEp);
2268 retval = -EOVERFLOW;
2269 warn("endpoint ctrl %X nuked", _usb_addr(mEp));
2270 }
aa69a809
DL		 2271 }
2272
2273 /* first nuke then test link, e.g. previous status has not sent */
2274 if (!list_empty(&mReq->queue)) {
2275 retval = -EBUSY;
2276 err("request already in queue");
2277 goto done;
2278 }
2279
0a313c4d
AL		 2280 if (req->length > (4 * CI13XXX_PAGE_SIZE)) {
2281 req->length = (4 * CI13XXX_PAGE_SIZE);
aa69a809
DL		 2282 retval = -EMSGSIZE;
2283 warn("request length truncated");
2284 }
2285
2286 dbg_queue(_usb_addr(mEp), req, retval);
2287
2288 /* push request */
2289 mReq->req.status = -EINPROGRESS;
2290 mReq->req.actual = 0;
aa69a809 2291
0e6ca199 2292 retval = _hardware_enqueue(mEp, mReq);
d9bb9c18
AL		 2293
2294 if (retval == -EALREADY) {
aa69a809
DL		 2295 dbg_event(_usb_addr(mEp), "QUEUE", retval);
2296 retval = 0;
2297 }
0e6ca199
PK		 2298 if (!retval)
2299 list_add_tail(&mReq->queue, &mEp->qh.queue);
aa69a809
DL		 2300
2301 done:
2302 spin_unlock_irqrestore(mEp->lock, flags);
2303 return retval;
2304}
2305
2306/**
2307 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
2308 *
2309 * Check usb_ep_dequeue() at "usb_gadget.h" for details
2310 */
2311static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
2312{
2313 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2314 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2315 unsigned long flags;
2316
2317 trace("%p, %p", ep, req);
2318
0e6ca199
PK		 2319 if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
2320 mEp->desc == NULL || list_empty(&mReq->queue) ||
2321 list_empty(&mEp->qh.queue))
aa69a809
DL		 2322 return -EINVAL;
2323
2324 spin_lock_irqsave(mEp->lock, flags);
2325
2326 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
2327
0e6ca199 2328 hw_ep_flush(mEp->num, mEp->dir);
aa69a809
DL		 2329
2330 /* pop request */
2331 list_del_init(&mReq->queue);
0e6ca199
PK		 2332 if (mReq->map) {
2333 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
2334 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
954aad8c 2335 mReq->req.dma = DMA_ADDR_INVALID;
0e6ca199
PK		 2336 mReq->map = 0;
2337 }
aa69a809
DL		 2338 req->status = -ECONNRESET;
2339
7c25a826 2340 if (mReq->req.complete != NULL) {
aa69a809
DL		 2341 spin_unlock(mEp->lock);
2342 mReq->req.complete(&mEp->ep, &mReq->req);
2343 spin_lock(mEp->lock);
2344 }
2345
2346 spin_unlock_irqrestore(mEp->lock, flags);
2347 return 0;
2348}
2349
2350/**
2351 * ep_set_halt: sets the endpoint halt feature
2352 *
2353 * Check usb_ep_set_halt() at "usb_gadget.h" for details
2354 */
2355static int ep_set_halt(struct usb_ep *ep, int value)
2356{
2357 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2358 int direction, retval = 0;
2359 unsigned long flags;
2360
2361 trace("%p, %i", ep, value);
2362
2363 if (ep == NULL || mEp->desc == NULL)
2364 return -EINVAL;
2365
2366 spin_lock_irqsave(mEp->lock, flags);
2367
2368#ifndef STALL_IN
2369 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2370 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
ca9cfea0 2371 !list_empty(&mEp->qh.queue)) {
aa69a809
DL		 2372 spin_unlock_irqrestore(mEp->lock, flags);
2373 return -EAGAIN;
2374 }
2375#endif
2376
2377 direction = mEp->dir;
2378 do {
2379 dbg_event(_usb_addr(mEp), "HALT", value);
2380 retval |= hw_ep_set_halt(mEp->num, mEp->dir, value);
2381
2382 if (!value)
2383 mEp->wedge = 0;
2384
2385 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2386 mEp->dir = (mEp->dir == TX) ? RX : TX;
2387
2388 } while (mEp->dir != direction);
2389
2390 spin_unlock_irqrestore(mEp->lock, flags);
2391 return retval;
2392}
2393
2394/**
2395 * ep_set_wedge: sets the halt feature and ignores clear requests
2396 *
2397 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
2398 */
2399static int ep_set_wedge(struct usb_ep *ep)
2400{
2401 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2402 unsigned long flags;
2403
2404 trace("%p", ep);
2405
2406 if (ep == NULL || mEp->desc == NULL)
2407 return -EINVAL;
2408
2409 spin_lock_irqsave(mEp->lock, flags);
2410
2411 dbg_event(_usb_addr(mEp), "WEDGE", 0);
2412 mEp->wedge = 1;
2413
2414 spin_unlock_irqrestore(mEp->lock, flags);
2415
2416 return usb_ep_set_halt(ep);
2417}
2418
2419/**
2420 * ep_fifo_flush: flushes contents of a fifo
2421 *
2422 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
2423 */
2424static void ep_fifo_flush(struct usb_ep *ep)
2425{
2426 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2427 unsigned long flags;
2428
2429 trace("%p", ep);
2430
2431 if (ep == NULL) {
2432 err("%02X: -EINVAL", _usb_addr(mEp));
2433 return;
2434 }
2435
2436 spin_lock_irqsave(mEp->lock, flags);
2437
2438 dbg_event(_usb_addr(mEp), "FFLUSH", 0);
2439 hw_ep_flush(mEp->num, mEp->dir);
2440
2441 spin_unlock_irqrestore(mEp->lock, flags);
2442}
2443
2444/**
2445 * Endpoint-specific part of the API to the USB controller hardware
2446 * Check "usb_gadget.h" for details
2447 */
2448static const struct usb_ep_ops usb_ep_ops = {
2449 .enable = ep_enable,
2450 .disable = ep_disable,
2451 .alloc_request = ep_alloc_request,
2452 .free_request = ep_free_request,
2453 .queue = ep_queue,
2454 .dequeue = ep_dequeue,
2455 .set_halt = ep_set_halt,
2456 .set_wedge = ep_set_wedge,
2457 .fifo_flush = ep_fifo_flush,
2458};
2459
2460/******************************************************************************
2461 * GADGET block
2462 *****************************************************************************/
f01ef574
PK		 2463static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
2464{
2465 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2466 unsigned long flags;
2467 int gadget_ready = 0;
2468
2469 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS))
2470 return -EOPNOTSUPP;
2471
2472 spin_lock_irqsave(udc->lock, flags);
2473 udc->vbus_active = is_active;
2474 if (udc->driver)
2475 gadget_ready = 1;
2476 spin_unlock_irqrestore(udc->lock, flags);
2477
2478 if (gadget_ready) {
2479 if (is_active) {
c036019e 2480 pm_runtime_get_sync(&_gadget->dev);
f01ef574 2481 hw_device_reset(udc);
ca9cfea0 2482 hw_device_state(udc->ep0out.qh.dma);
f01ef574
PK		 2483 } else {
2484 hw_device_state(0);
2485 if (udc->udc_driver->notify_event)
2486 udc->udc_driver->notify_event(udc,
2487 CI13XXX_CONTROLLER_STOPPED_EVENT);
2488 _gadget_stop_activity(&udc->gadget);
c036019e 2489 pm_runtime_put_sync(&_gadget->dev);
f01ef574
PK		 2490 }
2491 }
2492
2493 return 0;
2494}
2495
e2b61c1d
PK		 2496static int ci13xxx_wakeup(struct usb_gadget *_gadget)
2497{
2498 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2499 unsigned long flags;
2500 int ret = 0;
2501
2502 trace();
2503
2504 spin_lock_irqsave(udc->lock, flags);
2505 if (!udc->remote_wakeup) {
2506 ret = -EOPNOTSUPP;
2507 dbg_trace("remote wakeup feature is not enabled\n");
2508 goto out;
2509 }
2510 if (!hw_cread(CAP_PORTSC, PORTSC_SUSP)) {
2511 ret = -EINVAL;
2512 dbg_trace("port is not suspended\n");
2513 goto out;
2514 }
2515 hw_cwrite(CAP_PORTSC, PORTSC_FPR, PORTSC_FPR);
2516out:
2517 spin_unlock_irqrestore(udc->lock, flags);
2518 return ret;
2519}
2520
d860852e
PK		 2521static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
2522{
2523 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2524
2525 if (udc->transceiver)
2526 return otg_set_power(udc->transceiver, mA);
2527 return -ENOTSUPP;
2528}
2529
0f91349b
SAS		 2530static int ci13xxx_start(struct usb_gadget_driver *driver,
2531 int (*bind)(struct usb_gadget *));
2532static int ci13xxx_stop(struct usb_gadget_driver *driver);
aa69a809
DL		 2533/**
2534 * Device operations part of the API to the USB controller hardware,
2535 * which don't involve endpoints (or i/o)
2536 * Check "usb_gadget.h" for details
2537 */
f01ef574
PK		 2538static const struct usb_gadget_ops usb_gadget_ops = {
2539 .vbus_session = ci13xxx_vbus_session,
e2b61c1d 2540 .wakeup = ci13xxx_wakeup,
d860852e 2541 .vbus_draw = ci13xxx_vbus_draw,
0f91349b
SAS		 2542 .start = ci13xxx_start,
2543 .stop = ci13xxx_stop,
f01ef574 2544};
aa69a809
DL		 2545
2546/**
0f91349b 2547 * ci13xxx_start: register a gadget driver
b0fca50f
UKK		 2548 * @driver: the driver being registered
2549 * @bind: the driver's bind callback
aa69a809 2550 *
0f91349b 2551 * Check ci13xxx_start() at <linux/usb/gadget.h> for details.
b0fca50f 2552 * Interrupts are enabled here.
aa69a809 2553 */
0f91349b 2554static int ci13xxx_start(struct usb_gadget_driver *driver,
b0fca50f 2555 int (*bind)(struct usb_gadget *))
aa69a809
DL		 2556{
2557 struct ci13xxx *udc = _udc;
ca9cfea0
PK		 2558 unsigned long flags;
2559 int i, j;
aa69a809
DL		 2560 int retval = -ENOMEM;
2561
2562 trace("%p", driver);
2563
2564 if (driver == NULL ||
b0fca50f 2565 bind == NULL ||
aa69a809
DL		 2566 driver->setup == NULL ||
2567 driver->disconnect == NULL ||
2568 driver->suspend == NULL ||
2569 driver->resume == NULL)
2570 return -EINVAL;
2571 else if (udc == NULL)
2572 return -ENODEV;
2573 else if (udc->driver != NULL)
2574 return -EBUSY;
2575
2576 /* alloc resources */
2577 udc->qh_pool = dma_pool_create("ci13xxx_qh", &udc->gadget.dev,
2578 sizeof(struct ci13xxx_qh),
0a313c4d 2579 64, CI13XXX_PAGE_SIZE);
aa69a809
DL		 2580 if (udc->qh_pool == NULL)
2581 return -ENOMEM;
2582
2583 udc->td_pool = dma_pool_create("ci13xxx_td", &udc->gadget.dev,
2584 sizeof(struct ci13xxx_td),
0a313c4d 2585 64, CI13XXX_PAGE_SIZE);
aa69a809
DL		 2586 if (udc->td_pool == NULL) {
2587 dma_pool_destroy(udc->qh_pool);
2588 udc->qh_pool = NULL;
2589 return -ENOMEM;
2590 }
2591
2592 spin_lock_irqsave(udc->lock, flags);
2593
2594 info("hw_ep_max = %d", hw_ep_max);
2595
aa69a809
DL		 2596 udc->gadget.dev.driver = NULL;
2597
2598 retval = 0;
ca9cfea0
PK		 2599 for (i = 0; i < hw_ep_max/2; i++) {
2600 for (j = RX; j <= TX; j++) {
2601 int k = i + j * hw_ep_max/2;
2602 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[k];
aa69a809 2603
ca9cfea0
PK		 2604 scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
2605 (j == TX) ? "in" : "out");
aa69a809 2606
ca9cfea0
PK		 2607 mEp->lock = udc->lock;
2608 mEp->device = &udc->gadget.dev;
2609 mEp->td_pool = udc->td_pool;
aa69a809 2610
ca9cfea0
PK		 2611 mEp->ep.name = mEp->name;
2612 mEp->ep.ops = &usb_ep_ops;
2613 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
aa69a809 2614
ca9cfea0 2615 INIT_LIST_HEAD(&mEp->qh.queue);
0a91efa2 2616 spin_unlock_irqrestore(udc->lock, flags);
ca9cfea0
PK		 2617 mEp->qh.ptr = dma_pool_alloc(udc->qh_pool, GFP_KERNEL,
2618 &mEp->qh.dma);
0a91efa2 2619 spin_lock_irqsave(udc->lock, flags);
ca9cfea0 2620 if (mEp->qh.ptr == NULL)
aa69a809
DL		 2621 retval = -ENOMEM;
2622 else
ca9cfea0
PK		 2623 memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
2624
2625 /* skip ep0 out and in endpoints */
2626 if (i == 0)
2627 continue;
2628
aa69a809 2629 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
ca9cfea0 2630 }
aa69a809
DL		 2631 }
2632 if (retval)
2633 goto done;
ac1aa6a2 2634 spin_unlock_irqrestore(udc->lock, flags);
877c1f54
FB		 2635 udc->ep0out.ep.desc = &ctrl_endpt_out_desc;
2636 retval = usb_ep_enable(&udc->ep0out.ep);
ac1aa6a2
A		 2637 if (retval)
2638 return retval;
877c1f54
FB		 2639
2640 udc->ep0in.ep.desc = &ctrl_endpt_in_desc;
2641 retval = usb_ep_enable(&udc->ep0in.ep);
ac1aa6a2
A		 2642 if (retval)
2643 return retval;
2644 spin_lock_irqsave(udc->lock, flags);
aa69a809 2645
ca9cfea0 2646 udc->gadget.ep0 = &udc->ep0in.ep;
aa69a809
DL		 2647 /* bind gadget */
2648 driver->driver.bus = NULL;
aa69a809
DL		 2649 udc->gadget.dev.driver = &driver->driver;
2650
2651 spin_unlock_irqrestore(udc->lock, flags);
b0fca50f 2652 retval = bind(&udc->gadget); /* MAY SLEEP */
aa69a809
DL		 2653 spin_lock_irqsave(udc->lock, flags);
2654
2655 if (retval) {
aa69a809
DL		 2656 udc->gadget.dev.driver = NULL;
2657 goto done;
2658 }
2659
49d3df53 2660 udc->driver = driver;
c036019e 2661 pm_runtime_get_sync(&udc->gadget.dev);
f01ef574
PK		 2662 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
2663 if (udc->vbus_active) {
2664 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED)
2665 hw_device_reset(udc);
2666 } else {
c036019e 2667 pm_runtime_put_sync(&udc->gadget.dev);
f01ef574
PK		 2668 goto done;
2669 }
2670 }
2671
ca9cfea0 2672 retval = hw_device_state(udc->ep0out.qh.dma);
c036019e
PK		 2673 if (retval)
2674 pm_runtime_put_sync(&udc->gadget.dev);
aa69a809
DL		 2675
2676 done:
2677 spin_unlock_irqrestore(udc->lock, flags);
aa69a809
DL		 2678 return retval;
2679}
aa69a809
DL		 2680
2681/**
0f91349b 2682 * ci13xxx_stop: unregister a gadget driver
aa69a809
DL		 2683 *
2684 * Check usb_gadget_unregister_driver() at "usb_gadget.h" for details
2685 */
0f91349b 2686static int ci13xxx_stop(struct usb_gadget_driver *driver)
aa69a809
DL		 2687{
2688 struct ci13xxx *udc = _udc;
ca9cfea0 2689 unsigned long i, flags;
aa69a809
DL		 2690
2691 trace("%p", driver);
2692
2693 if (driver == NULL ||
aa69a809
DL		 2694 driver->unbind == NULL ||
2695 driver->setup == NULL ||
2696 driver->disconnect == NULL ||
2697 driver->suspend == NULL ||
2698 driver->resume == NULL ||
2699 driver != udc->driver)
2700 return -EINVAL;
2701
2702 spin_lock_irqsave(udc->lock, flags);
2703
f01ef574
PK		 2704 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) ||
2705 udc->vbus_active) {
2706 hw_device_state(0);
2707 if (udc->udc_driver->notify_event)
2708 udc->udc_driver->notify_event(udc,
2709 CI13XXX_CONTROLLER_STOPPED_EVENT);
aa69a809 2710 _gadget_stop_activity(&udc->gadget);
c036019e 2711 pm_runtime_put(&udc->gadget.dev);
f01ef574 2712 }
aa69a809 2713
f01ef574
PK		 2714 /* unbind gadget */
2715 spin_unlock_irqrestore(udc->lock, flags);
2716 driver->unbind(&udc->gadget); /* MAY SLEEP */
2717 spin_lock_irqsave(udc->lock, flags);
aa69a809 2718
f01ef574 2719 udc->gadget.dev.driver = NULL;
aa69a809
DL		 2720
2721 /* free resources */
2722 for (i = 0; i < hw_ep_max; i++) {
2723 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
2724
ca9cfea0 2725 if (!list_empty(&mEp->ep.ep_list))
aa69a809
DL		 2726 list_del_init(&mEp->ep.ep_list);
2727
ca9cfea0
PK		 2728 if (mEp->qh.ptr != NULL)
2729 dma_pool_free(udc->qh_pool, mEp->qh.ptr, mEp->qh.dma);
aa69a809
DL		 2730 }
2731
ca9cfea0 2732 udc->gadget.ep0 = NULL;
aa69a809
DL		 2733 udc->driver = NULL;
2734
2735 spin_unlock_irqrestore(udc->lock, flags);
2736
2737 if (udc->td_pool != NULL) {
2738 dma_pool_destroy(udc->td_pool);
2739 udc->td_pool = NULL;
2740 }
2741 if (udc->qh_pool != NULL) {
2742 dma_pool_destroy(udc->qh_pool);
2743 udc->qh_pool = NULL;
2744 }
2745
2746 return 0;
2747}
aa69a809
DL		 2748
2749/******************************************************************************
2750 * BUS block
2751 *****************************************************************************/
2752/**
2753 * udc_irq: global interrupt handler
2754 *
2755 * This function returns IRQ_HANDLED if the IRQ has been handled
2756 * It locks access to registers
2757 */
2758static irqreturn_t udc_irq(void)
2759{
2760 struct ci13xxx *udc = _udc;
2761 irqreturn_t retval;
2762 u32 intr;
2763
2764 trace();
2765
2766 if (udc == NULL) {
2767 err("ENODEV");
2768 return IRQ_HANDLED;
2769 }
2770
2771 spin_lock(udc->lock);
f01ef574
PK		 2772
2773 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED) {
2774 if (hw_cread(CAP_USBMODE, USBMODE_CM) !=
2775 USBMODE_CM_DEVICE) {
2776 spin_unlock(udc->lock);
2777 return IRQ_NONE;
2778 }
2779 }
aa69a809
DL		 2780 intr = hw_test_and_clear_intr_active();
2781 if (intr) {
2782 isr_statistics.hndl.buf[isr_statistics.hndl.idx++] = intr;
2783 isr_statistics.hndl.idx &= ISR_MASK;
2784 isr_statistics.hndl.cnt++;
2785
2786 /* order defines priority - do NOT change it */
2787 if (USBi_URI & intr) {
2788 isr_statistics.uri++;
2789 isr_reset_handler(udc);
2790 }
2791 if (USBi_PCI & intr) {
2792 isr_statistics.pci++;
2793 udc->gadget.speed = hw_port_is_high_speed() ?
2794 USB_SPEED_HIGH : USB_SPEED_FULL;
e2b61c1d
PK		 2795 if (udc->suspended) {
2796 spin_unlock(udc->lock);
2797 udc->driver->resume(&udc->gadget);
2798 spin_lock(udc->lock);
2799 udc->suspended = 0;
2800 }
aa69a809
DL		 2801 }
2802 if (USBi_UEI & intr)
2803 isr_statistics.uei++;
2804 if (USBi_UI & intr) {
2805 isr_statistics.ui++;
2806 isr_tr_complete_handler(udc);
2807 }
e2b61c1d
PK		 2808 if (USBi_SLI & intr) {
2809 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
2810 udc->suspended = 1;
2811 spin_unlock(udc->lock);
2812 udc->driver->suspend(&udc->gadget);
2813 spin_lock(udc->lock);
2814 }
aa69a809 2815 isr_statistics.sli++;
e2b61c1d 2816 }
aa69a809
DL		 2817 retval = IRQ_HANDLED;
2818 } else {
2819 isr_statistics.none++;
2820 retval = IRQ_NONE;
2821 }
2822 spin_unlock(udc->lock);
2823
2824 return retval;
2825}
2826
2827/**
2828 * udc_release: driver release function
2829 * @dev: device
2830 *
2831 * Currently does nothing
2832 */
2833static void udc_release(struct device *dev)
2834{
2835 trace("%p", dev);
2836
2837 if (dev == NULL)
2838 err("EINVAL");
2839}
2840
2841/**
2842 * udc_probe: parent probe must call this to initialize UDC
2843 * @dev: parent device
2844 * @regs: registers base address
2845 * @name: driver name
2846 *
2847 * This function returns an error code
2848 * No interrupts active, the IRQ has not been requested yet
2849 * Kernel assumes 32-bit DMA operations by default, no need to dma_set_mask
2850 */
f01ef574
PK		 2851static int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
2852 void __iomem *regs)
aa69a809
DL		 2853{
2854 struct ci13xxx *udc;
2855 int retval = 0;
2856
2857 trace("%p, %p, %p", dev, regs, name);
2858
f01ef574
PK		 2859 if (dev == NULL || regs == NULL || driver == NULL ||
2860 driver->name == NULL)
aa69a809
DL		 2861 return -EINVAL;
2862
2863 udc = kzalloc(sizeof(struct ci13xxx), GFP_KERNEL);
2864 if (udc == NULL)
2865 return -ENOMEM;
2866
2867 udc->lock = &udc_lock;
f01ef574
PK		 2868 udc->regs = regs;
2869 udc->udc_driver = driver;
aa69a809 2870
f01ef574 2871 udc->gadget.ops = &usb_gadget_ops;
aa69a809
DL		 2872 udc->gadget.speed = USB_SPEED_UNKNOWN;
2873 udc->gadget.is_dualspeed = 1;
2874 udc->gadget.is_otg = 0;
f01ef574 2875 udc->gadget.name = driver->name;
aa69a809
DL		 2876
2877 INIT_LIST_HEAD(&udc->gadget.ep_list);
2878 udc->gadget.ep0 = NULL;
2879
5df58524 2880 dev_set_name(&udc->gadget.dev, "gadget");
aa69a809 2881 udc->gadget.dev.dma_mask = dev->dma_mask;
61948ee4 2882 udc->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
aa69a809
DL		 2883 udc->gadget.dev.parent = dev;
2884 udc->gadget.dev.release = udc_release;
2885
f01ef574
PK		 2886 retval = hw_device_init(regs);
2887 if (retval < 0)
2888 goto free_udc;
2889
2890 udc->transceiver = otg_get_transceiver();
2891
2892 if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
2893 if (udc->transceiver == NULL) {
2894 retval = -ENODEV;
2895 goto free_udc;
2896 }
2897 }
2898
2899 if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
2900 retval = hw_device_reset(udc);
2901 if (retval)
2902 goto put_transceiver;
2903 }
2904
aa69a809 2905 retval = device_register(&udc->gadget.dev);
f01ef574
PK		 2906 if (retval) {
2907 put_device(&udc->gadget.dev);
2908 goto put_transceiver;
2909 }
aa69a809
DL		 2910
2911#ifdef CONFIG_USB_GADGET_DEBUG_FILES
2912 retval = dbg_create_files(&udc->gadget.dev);
2913#endif
f01ef574
PK		 2914 if (retval)
2915 goto unreg_device;
2916
2917 if (udc->transceiver) {
2918 retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
2919 if (retval)
2920 goto remove_dbg;
aa69a809 2921 }
0f91349b
SAS		 2922
2923 retval = usb_add_gadget_udc(dev, &udc->gadget);
2924 if (retval)
2925 goto remove_trans;
2926
c036019e
PK		 2927 pm_runtime_no_callbacks(&udc->gadget.dev);
2928 pm_runtime_enable(&udc->gadget.dev);
aa69a809
DL		 2929
2930 _udc = udc;
2931 return retval;
2932
0f91349b
SAS		 2933remove_trans:
2934 if (udc->transceiver) {
2935 otg_set_peripheral(udc->transceiver, &udc->gadget);
2936 otg_put_transceiver(udc->transceiver);
2937 }
2938
aa69a809 2939 err("error = %i", retval);
f01ef574
PK		 2940remove_dbg:
2941#ifdef CONFIG_USB_GADGET_DEBUG_FILES
2942 dbg_remove_files(&udc->gadget.dev);
2943#endif
2944unreg_device:
2945 device_unregister(&udc->gadget.dev);
2946put_transceiver:
2947 if (udc->transceiver)
2948 otg_put_transceiver(udc->transceiver);
2949free_udc:
aa69a809
DL		 2950 kfree(udc);
2951 _udc = NULL;
2952 return retval;
2953}
2954
2955/**
2956 * udc_remove: parent remove must call this to remove UDC
2957 *
2958 * No interrupts active, the IRQ has been released
2959 */
2960static void udc_remove(void)
2961{
2962 struct ci13xxx *udc = _udc;
2963
2964 if (udc == NULL) {
2965 err("EINVAL");
2966 return;
2967 }
0f91349b 2968 usb_del_gadget_udc(&udc->gadget);
aa69a809 2969
f01ef574
PK		 2970 if (udc->transceiver) {
2971 otg_set_peripheral(udc->transceiver, &udc->gadget);
2972 otg_put_transceiver(udc->transceiver);
2973 }
aa69a809
DL		 2974#ifdef CONFIG_USB_GADGET_DEBUG_FILES
2975 dbg_remove_files(&udc->gadget.dev);
2976#endif
2977 device_unregister(&udc->gadget.dev);
2978
2979 kfree(udc);
2980 _udc = NULL;
2981}
kernel source for telekom puls (alcatel/mediatek)