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[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / tty / moxa.c
CommitLineData
1da177e4
LT		 1/*****************************************************************************/
2/*
3 * moxa.c -- MOXA Intellio family multiport serial driver.
4 *
b9705b60
JS		 5 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com).
6 * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
1da177e4
LT		 7 *
8 * This code is loosely based on the Linux serial driver, written by
9 * Linus Torvalds, Theodore T'so and others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
1da177e4
LT		 15 */
16
17/*
18 * MOXA Intellio Series Driver
19 * for : LINUX
20 * date : 1999/1/7
21 * version : 5.1
22 */
23
1da177e4
LT		 24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/mm.h>
27#include <linux/ioport.h>
28#include <linux/errno.h>
03718234 29#include <linux/firmware.h>
1da177e4
LT		 30#include <linux/signal.h>
31#include <linux/sched.h>
32#include <linux/timer.h>
33#include <linux/interrupt.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/major.h>
37#include <linux/string.h>
38#include <linux/fcntl.h>
39#include <linux/ptrace.h>
40#include <linux/serial.h>
41#include <linux/tty_driver.h>
42#include <linux/delay.h>
43#include <linux/pci.h>
44#include <linux/init.h>
45#include <linux/bitops.h>
5a0e3ad6 46#include <linux/slab.h>
5a3c6b25 47#include <linux/ratelimit.h>
1da177e4 48
1da177e4
LT		 49#include <asm/io.h>
50#include <asm/uaccess.h>
51
03718234
JS		 52#include "moxa.h"
53
b9705b60 54#define MOXA_VERSION "6.0k"
1da177e4 55
03718234
JS		 56#define MOXA_FW_HDRLEN 32
57
11324edd 58#define MOXAMAJOR 172
1da177e4 59
11324edd 60#define MAX_BOARDS 4 /* Don't change this value */
1da177e4 61#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
11324edd 62#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
1da177e4 63
08d01c79
JS		 64#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
65 (brd)->boardType == MOXA_BOARD_C320_PCI)
66
1da177e4
LT		 67/*
68 * Define the Moxa PCI vendor and device IDs.
69 */
11324edd
JS		 70#define MOXA_BUS_TYPE_ISA 0
71#define MOXA_BUS_TYPE_PCI 1
1da177e4 72
1da177e4
LT		 73enum {
74 MOXA_BOARD_C218_PCI = 1,
75 MOXA_BOARD_C218_ISA,
76 MOXA_BOARD_C320_PCI,
77 MOXA_BOARD_C320_ISA,
78 MOXA_BOARD_CP204J,
79};
80
81static char *moxa_brdname[] =
82{
83 "C218 Turbo PCI series",
84 "C218 Turbo ISA series",
85 "C320 Turbo PCI series",
86 "C320 Turbo ISA series",
87 "CP-204J series",
88};
89
90#ifdef CONFIG_PCI
91static struct pci_device_id moxa_pcibrds[] = {
5ebb4078
JS		 92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
93 .driver_data = MOXA_BOARD_C218_PCI },
94 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
95 .driver_data = MOXA_BOARD_C320_PCI },
96 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
97 .driver_data = MOXA_BOARD_CP204J },
1da177e4
LT		 98 { 0 }
99};
100MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
101#endif /* CONFIG_PCI */
102
03718234
JS		 103struct moxa_port;
104
8f8ecbad 105static struct moxa_board_conf {
1da177e4
LT		 106 int boardType;
107 int numPorts;
1da177e4 108 int busType;
8f8ecbad 109
810ab09b 110 unsigned int ready;
8f8ecbad 111
03718234
JS		 112 struct moxa_port *ports;
113
8f8ecbad
JS		 114 void __iomem *basemem;
115 void __iomem *intNdx;
116 void __iomem *intPend;
117 void __iomem *intTable;
118} moxa_boards[MAX_BOARDS];
119
120struct mxser_mstatus {
121 tcflag_t cflag;
122 int cts;
123 int dsr;
124 int ri;
125 int dcd;
9dff89cd 126};
1da177e4 127
8f8ecbad
JS		 128struct moxaq_str {
129 int inq;
130 int outq;
131};
1da177e4 132
8f8ecbad 133struct moxa_port {
9de6a51f 134 struct tty_port port;
b4173f45 135 struct moxa_board_conf *board;
7bcf97d1
JS		 136 void __iomem *tableAddr;
137
1da177e4 138 int type;
1da177e4 139 int cflag;
7bcf97d1 140 unsigned long statusflags;
1da177e4 141
8482bcd5 142 u8 DCDState; /* Protected by the port lock */
7bcf97d1
JS		 143 u8 lineCtrl;
144 u8 lowChkFlag;
8f8ecbad 145};
1da177e4 146
74d7d97b
JS		 147struct mon_str {
148 int tick;
149 int rxcnt[MAX_PORTS];
150 int txcnt[MAX_PORTS];
151};
152
1da177e4 153/* statusflags */
a808ac0c
AC		 154#define TXSTOPPED 1
155#define LOWWAIT 2
156#define EMPTYWAIT 3
1da177e4 157
1da177e4
LT		 158#define SERIAL_DO_RESTART
159
1da177e4
LT		 160#define WAKEUP_CHARS 256
161
1da177e4 162static int ttymajor = MOXAMAJOR;
74d7d97b
JS		 163static struct mon_str moxaLog;
164static unsigned int moxaFuncTout = HZ / 2;
7bcf97d1 165static unsigned int moxaLowWaterChk;
a8f5cda0 166static DEFINE_MUTEX(moxa_openlock);
e8c62103 167static DEFINE_SPINLOCK(moxa_lock);
c6fc826e 168
d353eca4
JS		 169static unsigned long baseaddr[MAX_BOARDS];
170static unsigned int type[MAX_BOARDS];
171static unsigned int numports[MAX_BOARDS];
1da177e4
LT		 172
173MODULE_AUTHOR("William Chen");
174MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
175MODULE_LICENSE("GPL");
e6c4ef98
BH		 176MODULE_FIRMWARE("c218tunx.cod");
177MODULE_FIRMWARE("cp204unx.cod");
178MODULE_FIRMWARE("c320tunx.cod");
c6fc826e 179
d353eca4
JS		 180module_param_array(type, uint, NULL, 0);
181MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
182module_param_array(baseaddr, ulong, NULL, 0);
183MODULE_PARM_DESC(baseaddr, "base address");
184module_param_array(numports, uint, NULL, 0);
185MODULE_PARM_DESC(numports, "numports (ignored for C218)");
c6fc826e 186
1da177e4 187module_param(ttymajor, int, 0);
1da177e4 188
1da177e4
LT		 189/*
190 * static functions:
191 */
1da177e4
LT		 192static int moxa_open(struct tty_struct *, struct file *);
193static void moxa_close(struct tty_struct *, struct file *);
194static int moxa_write(struct tty_struct *, const unsigned char *, int);
195static int moxa_write_room(struct tty_struct *);
196static void moxa_flush_buffer(struct tty_struct *);
197static int moxa_chars_in_buffer(struct tty_struct *);
606d099c 198static void moxa_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT		 199static void moxa_stop(struct tty_struct *);
200static void moxa_start(struct tty_struct *);
201static void moxa_hangup(struct tty_struct *);
60b33c13 202static int moxa_tiocmget(struct tty_struct *tty);
20b9d177 203static int moxa_tiocmset(struct tty_struct *tty,
1da177e4
LT		 204 unsigned int set, unsigned int clear);
205static void moxa_poll(unsigned long);
db1acaa6 206static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
f176178b 207static void moxa_shutdown(struct tty_port *);
31f35939 208static int moxa_carrier_raised(struct tty_port *);
f176178b 209static void moxa_dtr_rts(struct tty_port *, int);
1da177e4
LT		 210/*
211 * moxa board interface functions:
212 */
b4173f45
JS		 213static void MoxaPortEnable(struct moxa_port *);
214static void MoxaPortDisable(struct moxa_port *);
215static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
216static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
217static void MoxaPortLineCtrl(struct moxa_port *, int, int);
218static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
219static int MoxaPortLineStatus(struct moxa_port *);
b4173f45 220static void MoxaPortFlushData(struct moxa_port *, int);
d450b5a0 221static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
7bcf97d1 222static int MoxaPortReadData(struct moxa_port *);
b4173f45
JS		 223static int MoxaPortTxQueue(struct moxa_port *);
224static int MoxaPortRxQueue(struct moxa_port *);
225static int MoxaPortTxFree(struct moxa_port *);
226static void MoxaPortTxDisable(struct moxa_port *);
227static void MoxaPortTxEnable(struct moxa_port *);
8f8ecbad
JS		 228static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
229static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
b4173f45 230static void MoxaSetFifo(struct moxa_port *port, int enable);
1da177e4 231
74d7d97b
JS		 232/*
233 * I/O functions
234 */
235
a808ac0c
AC		 236static DEFINE_SPINLOCK(moxafunc_lock);
237
74d7d97b
JS		 238static void moxa_wait_finish(void __iomem *ofsAddr)
239{
240 unsigned long end = jiffies + moxaFuncTout;
241
242 while (readw(ofsAddr + FuncCode) != 0)
243 if (time_after(jiffies, end))
244 return;
5a3c6b25
MZ		 245 if (readw(ofsAddr + FuncCode) != 0)
246 printk_ratelimited(KERN_WARNING "moxa function expired\n");
74d7d97b
JS		 247}
248
eaa95a8d 249static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
74d7d97b 250{
f5c5a36d
AC		 251 unsigned long flags;
252 spin_lock_irqsave(&moxafunc_lock, flags);
74d7d97b
JS		 253 writew(arg, ofsAddr + FuncArg);
254 writew(cmd, ofsAddr + FuncCode);
255 moxa_wait_finish(ofsAddr);
f5c5a36d
AC		 256 spin_unlock_irqrestore(&moxafunc_lock, flags);
257}
258
259static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
260{
261 unsigned long flags;
262 u16 ret;
263 spin_lock_irqsave(&moxafunc_lock, flags);
264 writew(arg, ofsAddr + FuncArg);
265 writew(cmd, ofsAddr + FuncCode);
266 moxa_wait_finish(ofsAddr);
267 ret = readw(ofsAddr + FuncArg);
268 spin_unlock_irqrestore(&moxafunc_lock, flags);
269 return ret;
74d7d97b
JS		 270}
271
7bcf97d1
JS		 272static void moxa_low_water_check(void __iomem *ofsAddr)
273{
274 u16 rptr, wptr, mask, len;
275
276 if (readb(ofsAddr + FlagStat) & Xoff_state) {
277 rptr = readw(ofsAddr + RXrptr);
278 wptr = readw(ofsAddr + RXwptr);
279 mask = readw(ofsAddr + RX_mask);
280 len = (wptr - rptr) & mask;
281 if (len <= Low_water)
282 moxafunc(ofsAddr, FC_SendXon, 0);
283 }
284}
285
74d7d97b
JS		 286/*
287 * TTY operations
288 */
289
6caa76b7 290static int moxa_ioctl(struct tty_struct *tty,
74d7d97b
JS		 291 unsigned int cmd, unsigned long arg)
292{
293 struct moxa_port *ch = tty->driver_data;
294 void __user *argp = (void __user *)arg;
a8f5cda0 295 int status, ret = 0;
74d7d97b
JS		 296
297 if (tty->index == MAX_PORTS) {
298 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
299 cmd != MOXA_GETMSTATUS)
300 return -EINVAL;
301 } else if (!ch)
302 return -ENODEV;
303
304 switch (cmd) {
305 case MOXA_GETDATACOUNT:
306 moxaLog.tick = jiffies;
a8f5cda0
JS		 307 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
308 ret = -EFAULT;
309 break;
74d7d97b
JS		 310 case MOXA_FLUSH_QUEUE:
311 MoxaPortFlushData(ch, arg);
a8f5cda0 312 break;
74d7d97b
JS		 313 case MOXA_GET_IOQUEUE: {
314 struct moxaq_str __user *argm = argp;
315 struct moxaq_str tmp;
316 struct moxa_port *p;
317 unsigned int i, j;
318
319 for (i = 0; i < MAX_BOARDS; i++) {
320 p = moxa_boards[i].ports;
321 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
322 memset(&tmp, 0, sizeof(tmp));
e8c62103 323 spin_lock_bh(&moxa_lock);
74d7d97b
JS		 324 if (moxa_boards[i].ready) {
325 tmp.inq = MoxaPortRxQueue(p);
326 tmp.outq = MoxaPortTxQueue(p);
327 }
e8c62103
AC		 328 spin_unlock_bh(&moxa_lock);
329 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS		 330 return -EFAULT;
331 }
332 }
a8f5cda0 333 break;
74d7d97b
JS		 334 } case MOXA_GET_OQUEUE:
335 status = MoxaPortTxQueue(ch);
a8f5cda0
JS		 336 ret = put_user(status, (unsigned long __user *)argp);
337 break;
74d7d97b
JS		 338 case MOXA_GET_IQUEUE:
339 status = MoxaPortRxQueue(ch);
a8f5cda0
JS		 340 ret = put_user(status, (unsigned long __user *)argp);
341 break;
74d7d97b
JS		 342 case MOXA_GETMSTATUS: {
343 struct mxser_mstatus __user *argm = argp;
344 struct mxser_mstatus tmp;
345 struct moxa_port *p;
346 unsigned int i, j;
347
348 for (i = 0; i < MAX_BOARDS; i++) {
349 p = moxa_boards[i].ports;
350 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
d450b5a0 351 struct tty_struct *ttyp;
74d7d97b 352 memset(&tmp, 0, sizeof(tmp));
e8c62103
AC		 353 spin_lock_bh(&moxa_lock);
354 if (!moxa_boards[i].ready) {
355 spin_unlock_bh(&moxa_lock);
74d7d97b 356 goto copy;
e8c62103 357 }
74d7d97b
JS		 358
359 status = MoxaPortLineStatus(p);
e8c62103
AC		 360 spin_unlock_bh(&moxa_lock);
361
74d7d97b
JS		 362 if (status & 1)
363 tmp.cts = 1;
364 if (status & 2)
365 tmp.dsr = 1;
366 if (status & 4)
367 tmp.dcd = 1;
368
d450b5a0
AC		 369 ttyp = tty_port_tty_get(&p->port);
370 if (!ttyp || !ttyp->termios)
74d7d97b
JS		 371 tmp.cflag = p->cflag;
372 else
d450b5a0 373 tmp.cflag = ttyp->termios->c_cflag;
df43daaa 374 tty_kref_put(ttyp);
74d7d97b 375copy:
e8c62103 376 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS		 377 return -EFAULT;
378 }
379 }
a8f5cda0 380 break;
74d7d97b
JS		 381 }
382 case TIOCGSERIAL:
a808ac0c 383 mutex_lock(&ch->port.mutex);
a8f5cda0 384 ret = moxa_get_serial_info(ch, argp);
a808ac0c 385 mutex_unlock(&ch->port.mutex);
a8f5cda0 386 break;
74d7d97b 387 case TIOCSSERIAL:
a808ac0c 388 mutex_lock(&ch->port.mutex);
a8f5cda0 389 ret = moxa_set_serial_info(ch, argp);
a808ac0c 390 mutex_unlock(&ch->port.mutex);
a8f5cda0
JS		 391 break;
392 default:
393 ret = -ENOIOCTLCMD;
74d7d97b 394 }
a8f5cda0 395 return ret;
74d7d97b
JS		 396}
397
9e98966c 398static int moxa_break_ctl(struct tty_struct *tty, int state)
74d7d97b
JS		 399{
400 struct moxa_port *port = tty->driver_data;
401
402 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
403 Magic_code);
9e98966c 404 return 0;
74d7d97b
JS		 405}
406
b68e31d0 407static const struct tty_operations moxa_ops = {
1da177e4
LT		 408 .open = moxa_open,
409 .close = moxa_close,
410 .write = moxa_write,
411 .write_room = moxa_write_room,
412 .flush_buffer = moxa_flush_buffer,
413 .chars_in_buffer = moxa_chars_in_buffer,
1da177e4 414 .ioctl = moxa_ioctl,
1da177e4
LT		 415 .set_termios = moxa_set_termios,
416 .stop = moxa_stop,
417 .start = moxa_start,
418 .hangup = moxa_hangup,
74d7d97b 419 .break_ctl = moxa_break_ctl,
1da177e4
LT		 420 .tiocmget = moxa_tiocmget,
421 .tiocmset = moxa_tiocmset,
422};
423
31f35939
AC		 424static const struct tty_port_operations moxa_port_ops = {
425 .carrier_raised = moxa_carrier_raised,
f176178b
AC		 426 .dtr_rts = moxa_dtr_rts,
427 .shutdown = moxa_shutdown,
31f35939
AC		 428};
429
aa7e5221 430static struct tty_driver *moxaDriver;
aa7e5221 431static DEFINE_TIMER(moxaTimer, moxa_poll, 0, 0);
33f0f88f 432
74d7d97b
JS		 433/*
434 * HW init
435 */
436
03718234
JS		 437static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
438{
439 switch (brd->boardType) {
440 case MOXA_BOARD_C218_ISA:
441 case MOXA_BOARD_C218_PCI:
442 if (model != 1)
443 goto err;
444 break;
445 case MOXA_BOARD_CP204J:
446 if (model != 3)
447 goto err;
448 break;
449 default:
450 if (model != 2)
451 goto err;
452 break;
453 }
454 return 0;
455err:
456 return -EINVAL;
457}
458
459static int moxa_check_fw(const void *ptr)
460{
461 const __le16 *lptr = ptr;
462
463 if (*lptr != cpu_to_le16(0x7980))
464 return -EINVAL;
465
466 return 0;
467}
468
469static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
470 size_t len)
471{
472 void __iomem *baseAddr = brd->basemem;
473 u16 tmp;
474
475 writeb(HW_reset, baseAddr + Control_reg); /* reset */
476 msleep(10);
477 memset_io(baseAddr, 0, 4096);
478 memcpy_toio(baseAddr, buf, len); /* download BIOS */
479 writeb(0, baseAddr + Control_reg); /* restart */
480
481 msleep(2000);
482
483 switch (brd->boardType) {
484 case MOXA_BOARD_C218_ISA:
485 case MOXA_BOARD_C218_PCI:
486 tmp = readw(baseAddr + C218_key);
487 if (tmp != C218_KeyCode)
488 goto err;
489 break;
490 case MOXA_BOARD_CP204J:
491 tmp = readw(baseAddr + C218_key);
492 if (tmp != CP204J_KeyCode)
493 goto err;
494 break;
495 default:
496 tmp = readw(baseAddr + C320_key);
497 if (tmp != C320_KeyCode)
498 goto err;
499 tmp = readw(baseAddr + C320_status);
500 if (tmp != STS_init) {
eaa95a8d 501 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
03718234
JS		 502 "module not found\n");
503 return -EIO;
504 }
505 break;
506 }
507
508 return 0;
509err:
eaa95a8d 510 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
03718234
JS		 511 return -EIO;
512}
513
514static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
515 size_t len)
516{
517 void __iomem *baseAddr = brd->basemem;
518
519 if (len < 7168) {
eaa95a8d 520 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
03718234
JS		 521 return -EINVAL;
522 }
523
524 writew(len - 7168 - 2, baseAddr + C320bapi_len);
525 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
526 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
527 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
528 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
529
530 return 0;
531}
532
5292bcd3 533static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
03718234
JS		 534 size_t len)
535{
536 void __iomem *baseAddr = brd->basemem;
b46f69cd 537 const __le16 *uptr = ptr;
03718234 538 size_t wlen, len2, j;
5292bcd3 539 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
08d01c79 540 unsigned int i, retry;
03718234
JS		 541 u16 usum, keycode;
542
5292bcd3
JS		 543 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
544 C218_KeyCode;
03718234 545
5292bcd3
JS		 546 switch (brd->boardType) {
547 case MOXA_BOARD_CP204J:
548 case MOXA_BOARD_C218_ISA:
549 case MOXA_BOARD_C218_PCI:
550 key = C218_key;
551 loadbuf = C218_LoadBuf;
552 loadlen = C218DLoad_len;
553 checksum = C218check_sum;
554 checksum_ok = C218chksum_ok;
555 break;
556 default:
557 key = C320_key;
558 keycode = C320_KeyCode;
559 loadbuf = C320_LoadBuf;
560 loadlen = C320DLoad_len;
561 checksum = C320check_sum;
562 checksum_ok = C320chksum_ok;
563 break;
03718234 564 }
03718234
JS		 565
566 usum = 0;
567 wlen = len >> 1;
568 for (i = 0; i < wlen; i++)
569 usum += le16_to_cpu(uptr[i]);
570 retry = 0;
571 do {
572 wlen = len >> 1;
573 j = 0;
574 while (wlen) {
575 len2 = (wlen > 2048) ? 2048 : wlen;
576 wlen -= len2;
5292bcd3 577 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
03718234 578 j += len2 << 1;
5292bcd3
JS		 579
580 writew(len2, baseAddr + loadlen);
581 writew(0, baseAddr + key);
582 for (i = 0; i < 100; i++) {
583 if (readw(baseAddr + key) == keycode)
03718234
JS		 584 break;
585 msleep(10);
586 }
5292bcd3 587 if (readw(baseAddr + key) != keycode)
03718234
JS		 588 return -EIO;
589 }
5292bcd3
JS		 590 writew(0, baseAddr + loadlen);
591 writew(usum, baseAddr + checksum);
592 writew(0, baseAddr + key);
593 for (i = 0; i < 100; i++) {
594 if (readw(baseAddr + key) == keycode)
03718234
JS		 595 break;
596 msleep(10);
597 }
598 retry++;
5292bcd3
JS		 599 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
600 if (readb(baseAddr + checksum_ok) != 1)
03718234
JS		 601 return -EIO;
602
5292bcd3 603 writew(0, baseAddr + key);
03718234
JS		 604 for (i = 0; i < 600; i++) {
605 if (readw(baseAddr + Magic_no) == Magic_code)
606 break;
607 msleep(10);
608 }
609 if (readw(baseAddr + Magic_no) != Magic_code)
610 return -EIO;
611
08d01c79 612 if (MOXA_IS_320(brd)) {
5292bcd3
JS		 613 if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
614 writew(0x3800, baseAddr + TMS320_PORT1);
615 writew(0x3900, baseAddr + TMS320_PORT2);
616 writew(28499, baseAddr + TMS320_CLOCK);
617 } else {
618 writew(0x3200, baseAddr + TMS320_PORT1);
619 writew(0x3400, baseAddr + TMS320_PORT2);
620 writew(19999, baseAddr + TMS320_CLOCK);
621 }
03718234
JS		 622 }
623 writew(1, baseAddr + Disable_IRQ);
624 writew(0, baseAddr + Magic_no);
625 for (i = 0; i < 500; i++) {
626 if (readw(baseAddr + Magic_no) == Magic_code)
627 break;
628 msleep(10);
629 }
630 if (readw(baseAddr + Magic_no) != Magic_code)
631 return -EIO;
632
08d01c79 633 if (MOXA_IS_320(brd)) {
5292bcd3
JS		 634 j = readw(baseAddr + Module_cnt);
635 if (j <= 0)
636 return -EIO;
637 brd->numPorts = j * 8;
638 writew(j, baseAddr + Module_no);
639 writew(0, baseAddr + Magic_no);
640 for (i = 0; i < 600; i++) {
641 if (readw(baseAddr + Magic_no) == Magic_code)
642 break;
643 msleep(10);
644 }
645 if (readw(baseAddr + Magic_no) != Magic_code)
646 return -EIO;
03718234 647 }
03718234
JS		 648 brd->intNdx = baseAddr + IRQindex;
649 brd->intPend = baseAddr + IRQpending;
650 brd->intTable = baseAddr + IRQtable;
651
652 return 0;
653}
654
655static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
656 size_t len)
657{
658 void __iomem *ofsAddr, *baseAddr = brd->basemem;
659 struct moxa_port *port;
660 int retval, i;
661
662 if (len % 2) {
eaa95a8d 663 printk(KERN_ERR "MOXA: bios length is not even\n");
03718234
JS		 664 return -EINVAL;
665 }
666
5292bcd3
JS		 667 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
668 if (retval)
669 return retval;
670
03718234
JS		 671 switch (brd->boardType) {
672 case MOXA_BOARD_C218_ISA:
673 case MOXA_BOARD_C218_PCI:
674 case MOXA_BOARD_CP204J:
03718234
JS		 675 port = brd->ports;
676 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 677 port->board = brd;
03718234
JS		 678 port->DCDState = 0;
679 port->tableAddr = baseAddr + Extern_table +
680 Extern_size * i;
681 ofsAddr = port->tableAddr;
682 writew(C218rx_mask, ofsAddr + RX_mask);
683 writew(C218tx_mask, ofsAddr + TX_mask);
684 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
685 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
686
687 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
688 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
689
690 }
691 break;
692 default:
03718234
JS		 693 port = brd->ports;
694 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 695 port->board = brd;
03718234
JS		 696 port->DCDState = 0;
697 port->tableAddr = baseAddr + Extern_table +
698 Extern_size * i;
699 ofsAddr = port->tableAddr;
700 switch (brd->numPorts) {
701 case 8:
702 writew(C320p8rx_mask, ofsAddr + RX_mask);
703 writew(C320p8tx_mask, ofsAddr + TX_mask);
704 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
705 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
706 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
707 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
708
709 break;
710 case 16:
711 writew(C320p16rx_mask, ofsAddr + RX_mask);
712 writew(C320p16tx_mask, ofsAddr + TX_mask);
713 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
714 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
715 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
716 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
717 break;
718
719 case 24:
720 writew(C320p24rx_mask, ofsAddr + RX_mask);
721 writew(C320p24tx_mask, ofsAddr + TX_mask);
722 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
723 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
724 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
725 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
726 break;
727 case 32:
728 writew(C320p32rx_mask, ofsAddr + RX_mask);
729 writew(C320p32tx_mask, ofsAddr + TX_mask);
730 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
731 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
732 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
733 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
734 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
735 break;
736 }
737 }
738 break;
739 }
03718234
JS		 740 return 0;
741}
742
743static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
744{
2bca76e8 745 const void *ptr = fw->data;
03718234
JS		 746 char rsn[64];
747 u16 lens[5];
748 size_t len;
749 unsigned int a, lenp, lencnt;
750 int ret = -EINVAL;
751 struct {
752 __le32 magic; /* 0x34303430 */
753 u8 reserved1[2];
754 u8 type; /* UNIX = 3 */
755 u8 model; /* C218T=1, C320T=2, CP204=3 */
756 u8 reserved2[8];
757 __le16 len[5];
2bca76e8 758 } const *hdr = ptr;
03718234
JS		 759
760 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
761
762 if (fw->size < MOXA_FW_HDRLEN) {
763 strcpy(rsn, "too short (even header won't fit)");
764 goto err;
765 }
766 if (hdr->magic != cpu_to_le32(0x30343034)) {
767 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
768 goto err;
769 }
770 if (hdr->type != 3) {
771 sprintf(rsn, "not for linux, type is %u", hdr->type);
772 goto err;
773 }
774 if (moxa_check_fw_model(brd, hdr->model)) {
775 sprintf(rsn, "not for this card, model is %u", hdr->model);
776 goto err;
777 }
778
779 len = MOXA_FW_HDRLEN;
780 lencnt = hdr->model == 2 ? 5 : 3;
781 for (a = 0; a < ARRAY_SIZE(lens); a++) {
782 lens[a] = le16_to_cpu(hdr->len[a]);
783 if (lens[a] && len + lens[a] <= fw->size &&
784 moxa_check_fw(&fw->data[len]))
eaa95a8d 785 printk(KERN_WARNING "MOXA firmware: unexpected input "
03718234
JS		 786 "at offset %u, but going on\n", (u32)len);
787 if (!lens[a] && a < lencnt) {
788 sprintf(rsn, "too few entries in fw file");
789 goto err;
790 }
791 len += lens[a];
792 }
793
794 if (len != fw->size) {
795 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
796 (u32)len);
797 goto err;
798 }
799
800 ptr += MOXA_FW_HDRLEN;
801 lenp = 0; /* bios */
802
803 strcpy(rsn, "read above");
804
805 ret = moxa_load_bios(brd, ptr, lens[lenp]);
806 if (ret)
807 goto err;
808
809 /* we skip the tty section (lens[1]), since we don't need it */
810 ptr += lens[lenp] + lens[lenp + 1];
811 lenp += 2; /* comm */
812
813 if (hdr->model == 2) {
814 ret = moxa_load_320b(brd, ptr, lens[lenp]);
815 if (ret)
816 goto err;
817 /* skip another tty */
818 ptr += lens[lenp] + lens[lenp + 1];
819 lenp += 2;
820 }
821
822 ret = moxa_load_code(brd, ptr, lens[lenp]);
823 if (ret)
824 goto err;
825
826 return 0;
827err:
828 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
829 return ret;
830}
831
832static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
833{
834 const struct firmware *fw;
835 const char *file;
810ab09b
JS		 836 struct moxa_port *p;
837 unsigned int i;
03718234
JS		 838 int ret;
839
810ab09b
JS		 840 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
841 GFP_KERNEL);
842 if (brd->ports == NULL) {
843 printk(KERN_ERR "cannot allocate memory for ports\n");
844 ret = -ENOMEM;
845 goto err;
846 }
847
848 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
44b7d1b3 849 tty_port_init(&p->port);
31f35939 850 p->port.ops = &moxa_port_ops;
810ab09b 851 p->type = PORT_16550A;
810ab09b 852 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
810ab09b
JS		 853 }
854
03718234
JS		 855 switch (brd->boardType) {
856 case MOXA_BOARD_C218_ISA:
857 case MOXA_BOARD_C218_PCI:
858 file = "c218tunx.cod";
859 break;
860 case MOXA_BOARD_CP204J:
861 file = "cp204unx.cod";
862 break;
863 default:
864 file = "c320tunx.cod";
865 break;
866 }
867
868 ret = request_firmware(&fw, file, dev);
869 if (ret) {
ec09cd56
JS		 870 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
871 "you've placed '%s' file into your firmware "
872 "loader directory (e.g. /lib/firmware)\n",
873 file);
810ab09b 874 goto err_free;
03718234
JS		 875 }
876
877 ret = moxa_load_fw(brd, fw);
878
879 release_firmware(fw);
810ab09b
JS		 880
881 if (ret)
882 goto err_free;
883
2a541341 884 spin_lock_bh(&moxa_lock);
810ab09b 885 brd->ready = 1;
0bcc4caa
JS		 886 if (!timer_pending(&moxaTimer))
887 mod_timer(&moxaTimer, jiffies + HZ / 50);
2a541341 888 spin_unlock_bh(&moxa_lock);
0bcc4caa 889
810ab09b
JS		 890 return 0;
891err_free:
892 kfree(brd->ports);
893err:
03718234
JS		 894 return ret;
895}
896
810ab09b
JS		 897static void moxa_board_deinit(struct moxa_board_conf *brd)
898{
a8f5cda0
JS		 899 unsigned int a, opened;
900
901 mutex_lock(&moxa_openlock);
7bcf97d1 902 spin_lock_bh(&moxa_lock);
810ab09b 903 brd->ready = 0;
7bcf97d1 904 spin_unlock_bh(&moxa_lock);
a8f5cda0
JS		 905
906 /* pci hot-un-plug support */
907 for (a = 0; a < brd->numPorts; a++)
d450b5a0
AC		 908 if (brd->ports[a].port.flags & ASYNC_INITIALIZED) {
909 struct tty_struct *tty = tty_port_tty_get(
910 &brd->ports[a].port);
911 if (tty) {
912 tty_hangup(tty);
913 tty_kref_put(tty);
914 }
915 }
a8f5cda0
JS		 916 while (1) {
917 opened = 0;
918 for (a = 0; a < brd->numPorts; a++)
9de6a51f 919 if (brd->ports[a].port.flags & ASYNC_INITIALIZED)
a8f5cda0
JS		 920 opened++;
921 mutex_unlock(&moxa_openlock);
922 if (!opened)
923 break;
924 msleep(50);
925 mutex_lock(&moxa_openlock);
926 }
927
810ab09b
JS		 928 iounmap(brd->basemem);
929 brd->basemem = NULL;
930 kfree(brd->ports);
931}
932
1da177e4 933#ifdef CONFIG_PCI
9cde5bf0
JS		 934static int __devinit moxa_pci_probe(struct pci_dev *pdev,
935 const struct pci_device_id *ent)
1da177e4 936{
9cde5bf0
JS		 937 struct moxa_board_conf *board;
938 unsigned int i;
939 int board_type = ent->driver_data;
940 int retval;
941
942 retval = pci_enable_device(pdev);
7aeb95da
JS		 943 if (retval) {
944 dev_err(&pdev->dev, "can't enable pci device\n");
9cde5bf0 945 goto err;
7aeb95da 946 }
9cde5bf0
JS		 947
948 for (i = 0; i < MAX_BOARDS; i++)
949 if (moxa_boards[i].basemem == NULL)
950 break;
951
952 retval = -ENODEV;
953 if (i >= MAX_BOARDS) {
7aeb95da 954 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
9cde5bf0
JS		 955 "found. Board is ignored.\n", MAX_BOARDS);
956 goto err;
957 }
958
959 board = &moxa_boards[i];
e46a5e3f
JS		 960
961 retval = pci_request_region(pdev, 2, "moxa-base");
962 if (retval) {
963 dev_err(&pdev->dev, "can't request pci region 2\n");
964 goto err;
965 }
966
24cb2335 967 board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000);
7aeb95da
JS		 968 if (board->basemem == NULL) {
969 dev_err(&pdev->dev, "can't remap io space 2\n");
e46a5e3f 970 goto err_reg;
7aeb95da 971 }
9cde5bf0 972
1da177e4
LT		 973 board->boardType = board_type;
974 switch (board_type) {
975 case MOXA_BOARD_C218_ISA:
976 case MOXA_BOARD_C218_PCI:
977 board->numPorts = 8;
978 break;
979
980 case MOXA_BOARD_CP204J:
981 board->numPorts = 4;
982 break;
983 default:
984 board->numPorts = 0;
985 break;
986 }
987 board->busType = MOXA_BUS_TYPE_PCI;
a784bf7c 988
03718234
JS		 989 retval = moxa_init_board(board, &pdev->dev);
990 if (retval)
991 goto err_base;
992
9cde5bf0 993 pci_set_drvdata(pdev, board);
1da177e4 994
bb9f910a
JS		 995 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
996 moxa_brdname[board_type - 1], board->numPorts);
997
eaa95a8d 998 return 0;
03718234
JS		 999err_base:
1000 iounmap(board->basemem);
1001 board->basemem = NULL;
e46a5e3f
JS		 1002err_reg:
1003 pci_release_region(pdev, 2);
9cde5bf0
JS		 1004err:
1005 return retval;
1006}
1007
1008static void __devexit moxa_pci_remove(struct pci_dev *pdev)
1009{
1010 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1011
810ab09b
JS		 1012 moxa_board_deinit(brd);
1013
e46a5e3f 1014 pci_release_region(pdev, 2);
1da177e4 1015}
a784bf7c
JS		 1016
1017static struct pci_driver moxa_pci_driver = {
1018 .name = "moxa",
1019 .id_table = moxa_pcibrds,
1020 .probe = moxa_pci_probe,
1021 .remove = __devexit_p(moxa_pci_remove)
1022};
1da177e4
LT		 1023#endif /* CONFIG_PCI */
1024
1025static int __init moxa_init(void)
1026{
810ab09b 1027 unsigned int isabrds = 0;
d353eca4 1028 int retval = 0;
c6fc826e
RM		 1029 struct moxa_board_conf *brd = moxa_boards;
1030 unsigned int i;
1da177e4 1031
7aeb95da
JS		 1032 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1033 MOXA_VERSION);
1da177e4
LT		 1034 moxaDriver = alloc_tty_driver(MAX_PORTS + 1);
1035 if (!moxaDriver)
1036 return -ENOMEM;
1037
9b4e3b13 1038 moxaDriver->name = "ttyMX";
1da177e4
LT		 1039 moxaDriver->major = ttymajor;
1040 moxaDriver->minor_start = 0;
1041 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1042 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1043 moxaDriver->init_termios = tty_std_termios;
1da177e4 1044 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
606d099c
AC		 1045 moxaDriver->init_termios.c_ispeed = 9600;
1046 moxaDriver->init_termios.c_ospeed = 9600;
1da177e4
LT		 1047 moxaDriver->flags = TTY_DRIVER_REAL_RAW;
1048 tty_set_operations(moxaDriver, &moxa_ops);
1049
1da177e4 1050 if (tty_register_driver(moxaDriver)) {
eaa95a8d 1051 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1da177e4
LT		 1052 put_tty_driver(moxaDriver);
1053 return -1;
1054 }
1da177e4 1055
d353eca4 1056 /* Find the boards defined from module args. */
c6fc826e 1057
1da177e4 1058 for (i = 0; i < MAX_BOARDS; i++) {
d353eca4
JS		 1059 if (!baseaddr[i])
1060 break;
1061 if (type[i] == MOXA_BOARD_C218_ISA ||
1062 type[i] == MOXA_BOARD_C320_ISA) {
7aeb95da 1063 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
d353eca4
JS		 1064 isabrds + 1, moxa_brdname[type[i] - 1],
1065 baseaddr[i]);
1066 brd->boardType = type[i];
1067 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1068 numports[i];
1069 brd->busType = MOXA_BUS_TYPE_ISA;
24cb2335 1070 brd->basemem = ioremap_nocache(baseaddr[i], 0x4000);
d353eca4 1071 if (!brd->basemem) {
eaa95a8d 1072 printk(KERN_ERR "MOXA: can't remap %lx\n",
d353eca4 1073 baseaddr[i]);
1da177e4
LT		 1074 continue;
1075 }
03718234
JS		 1076 if (moxa_init_board(brd, NULL)) {
1077 iounmap(brd->basemem);
1078 brd->basemem = NULL;
1079 continue;
1080 }
d353eca4 1081
bb9f910a
JS		 1082 printk(KERN_INFO "MOXA isa board found at 0x%.8lu and "
1083 "ready (%u ports, firmware loaded)\n",
1084 baseaddr[i], brd->numPorts);
1085
d353eca4
JS		 1086 brd++;
1087 isabrds++;
1da177e4
LT		 1088 }
1089 }
a784bf7c 1090
1da177e4 1091#ifdef CONFIG_PCI
a784bf7c
JS		 1092 retval = pci_register_driver(&moxa_pci_driver);
1093 if (retval) {
eaa95a8d 1094 printk(KERN_ERR "Can't register MOXA pci driver!\n");
d353eca4 1095 if (isabrds)
a784bf7c 1096 retval = 0;
1da177e4
LT		 1097 }
1098#endif
a784bf7c 1099
a784bf7c 1100 return retval;
1da177e4
LT		 1101}
1102
1103static void __exit moxa_exit(void)
1104{
eaa95a8d 1105 unsigned int i;
1da177e4 1106
9cde5bf0 1107#ifdef CONFIG_PCI
a784bf7c 1108 pci_unregister_driver(&moxa_pci_driver);
9cde5bf0 1109#endif
a784bf7c 1110
810ab09b
JS		 1111 for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1112 if (moxa_boards[i].ready)
1113 moxa_board_deinit(&moxa_boards[i]);
2a541341
JS		 1114
1115 del_timer_sync(&moxaTimer);
1116
1117 if (tty_unregister_driver(moxaDriver))
1118 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1119 "serial driver\n");
1120 put_tty_driver(moxaDriver);
1da177e4
LT		 1121}
1122
1123module_init(moxa_init);
1124module_exit(moxa_exit);
1125
f176178b 1126static void moxa_shutdown(struct tty_port *port)
a8f5cda0 1127{
f176178b
AC		 1128 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1129 MoxaPortDisable(ch);
a8f5cda0 1130 MoxaPortFlushData(ch, 2);
a8f5cda0
JS		 1131}
1132
31f35939
AC		 1133static int moxa_carrier_raised(struct tty_port *port)
1134{
1135 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1136 int dcd;
1137
8482bcd5 1138 spin_lock_irq(&port->lock);
31f35939 1139 dcd = ch->DCDState;
8482bcd5 1140 spin_unlock_irq(&port->lock);
31f35939
AC		 1141 return dcd;
1142}
1143
f176178b 1144static void moxa_dtr_rts(struct tty_port *port, int onoff)
a8f5cda0 1145{
f176178b
AC		 1146 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1147 MoxaPortLineCtrl(ch, onoff, onoff);
a8f5cda0
JS		 1148}
1149
f176178b 1150
1da177e4
LT		 1151static int moxa_open(struct tty_struct *tty, struct file *filp)
1152{
810ab09b 1153 struct moxa_board_conf *brd;
8f8ecbad 1154 struct moxa_port *ch;
1da177e4 1155 int port;
1da177e4 1156
11324edd 1157 port = tty->index;
1da177e4 1158 if (port == MAX_PORTS) {
74d7d97b 1159 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1da177e4 1160 }
a8f5cda0
JS		 1161 if (mutex_lock_interruptible(&moxa_openlock))
1162 return -ERESTARTSYS;
810ab09b 1163 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
a8f5cda0
JS		 1164 if (!brd->ready) {
1165 mutex_unlock(&moxa_openlock);
810ab09b 1166 return -ENODEV;
a8f5cda0 1167 }
1da177e4 1168
f0e85277
DE		 1169 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1170 mutex_unlock(&moxa_openlock);
1171 return -ENODEV;
1172 }
1173
810ab09b 1174 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
9de6a51f 1175 ch->port.count++;
1da177e4 1176 tty->driver_data = ch;
d450b5a0 1177 tty_port_tty_set(&ch->port, tty);
f176178b 1178 mutex_lock(&ch->port.mutex);
9de6a51f 1179 if (!(ch->port.flags & ASYNC_INITIALIZED)) {
1da177e4 1180 ch->statusflags = 0;
db1acaa6 1181 moxa_set_tty_param(tty, tty->termios);
b4173f45
JS		 1182 MoxaPortLineCtrl(ch, 1, 1);
1183 MoxaPortEnable(ch);
a8f5cda0 1184 MoxaSetFifo(ch, ch->type == PORT_16550A);
9de6a51f 1185 ch->port.flags |= ASYNC_INITIALIZED;
1da177e4 1186 }
f176178b 1187 mutex_unlock(&ch->port.mutex);
a8f5cda0 1188 mutex_unlock(&moxa_openlock);
1da177e4 1189
7c31bdb6 1190 return tty_port_block_til_ready(&ch->port, tty, filp);
1da177e4
LT		 1191}
1192
1193static void moxa_close(struct tty_struct *tty, struct file *filp)
1194{
f176178b 1195 struct moxa_port *ch = tty->driver_data;
1da177e4 1196 ch->cflag = tty->termios->c_cflag;
f176178b 1197 tty_port_close(&ch->port, tty, filp);
1da177e4
LT		 1198}
1199
1200static int moxa_write(struct tty_struct *tty,
1201 const unsigned char *buf, int count)
1202{
b4173f45 1203 struct moxa_port *ch = tty->driver_data;
0ad7c9af 1204 unsigned long flags;
b4173f45 1205 int len;
1da177e4 1206
1da177e4 1207 if (ch == NULL)
b4173f45 1208 return 0;
33f0f88f 1209
0ad7c9af 1210 spin_lock_irqsave(&moxa_lock, flags);
d450b5a0 1211 len = MoxaPortWriteData(tty, buf, count);
0ad7c9af 1212 spin_unlock_irqrestore(&moxa_lock, flags);
1da177e4 1213
a808ac0c 1214 set_bit(LOWWAIT, &ch->statusflags);
eaa95a8d 1215 return len;
1da177e4
LT		 1216}
1217
1218static int moxa_write_room(struct tty_struct *tty)
1219{
8f8ecbad 1220 struct moxa_port *ch;
1da177e4
LT		 1221
1222 if (tty->stopped)
eaa95a8d 1223 return 0;
b4173f45 1224 ch = tty->driver_data;
1da177e4 1225 if (ch == NULL)
eaa95a8d 1226 return 0;
b4173f45 1227 return MoxaPortTxFree(ch);
1da177e4
LT		 1228}
1229
1230static void moxa_flush_buffer(struct tty_struct *tty)
1231{
b4173f45 1232 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1233
1234 if (ch == NULL)
1235 return;
b4173f45 1236 MoxaPortFlushData(ch, 1);
1da177e4
LT		 1237 tty_wakeup(tty);
1238}
1239
1240static int moxa_chars_in_buffer(struct tty_struct *tty)
1241{
b4173f45 1242 struct moxa_port *ch = tty->driver_data;
1da177e4 1243 int chars;
1da177e4 1244
b4173f45 1245 chars = MoxaPortTxQueue(ch);
f710ebd7 1246 if (chars)
1da177e4
LT		 1247 /*
1248 * Make it possible to wakeup anything waiting for output
1249 * in tty_ioctl.c, etc.
1250 */
f710ebd7 1251 set_bit(EMPTYWAIT, &ch->statusflags);
eaa95a8d 1252 return chars;
1da177e4
LT		 1253}
1254
60b33c13 1255static int moxa_tiocmget(struct tty_struct *tty)
1da177e4 1256{
8482bcd5 1257 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1258 int flag = 0, dtr, rts;
1259
b4173f45 1260 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT		 1261 if (dtr)
1262 flag |= TIOCM_DTR;
1263 if (rts)
1264 flag |= TIOCM_RTS;
b4173f45 1265 dtr = MoxaPortLineStatus(ch);
1da177e4
LT		 1266 if (dtr & 1)
1267 flag |= TIOCM_CTS;
1268 if (dtr & 2)
1269 flag |= TIOCM_DSR;
1270 if (dtr & 4)
1271 flag |= TIOCM_CD;
1272 return flag;
1273}
1274
20b9d177 1275static int moxa_tiocmset(struct tty_struct *tty,
1da177e4
LT		 1276 unsigned int set, unsigned int clear)
1277{
a8f5cda0 1278 struct moxa_port *ch;
1da177e4
LT		 1279 int dtr, rts;
1280
a8f5cda0
JS		 1281 mutex_lock(&moxa_openlock);
1282 ch = tty->driver_data;
1283 if (!ch) {
1284 mutex_unlock(&moxa_openlock);
74d7d97b 1285 return -EINVAL;
a8f5cda0 1286 }
1da177e4 1287
b4173f45 1288 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT		 1289 if (set & TIOCM_RTS)
1290 rts = 1;
1291 if (set & TIOCM_DTR)
1292 dtr = 1;
1293 if (clear & TIOCM_RTS)
1294 rts = 0;
1295 if (clear & TIOCM_DTR)
1296 dtr = 0;
b4173f45 1297 MoxaPortLineCtrl(ch, dtr, rts);
a8f5cda0 1298 mutex_unlock(&moxa_openlock);
1da177e4
LT		 1299 return 0;
1300}
1301
1da177e4 1302static void moxa_set_termios(struct tty_struct *tty,
eaa95a8d 1303 struct ktermios *old_termios)
1da177e4 1304{
eaa95a8d 1305 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1306
1307 if (ch == NULL)
1308 return;
db1acaa6 1309 moxa_set_tty_param(tty, old_termios);
eaa95a8d 1310 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
9de6a51f 1311 wake_up_interruptible(&ch->port.open_wait);
1da177e4
LT		 1312}
1313
1314static void moxa_stop(struct tty_struct *tty)
1315{
eaa95a8d 1316 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1317
1318 if (ch == NULL)
1319 return;
b4173f45 1320 MoxaPortTxDisable(ch);
a808ac0c 1321 set_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT		 1322}
1323
1324
1325static void moxa_start(struct tty_struct *tty)
1326{
eaa95a8d 1327 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1328
1329 if (ch == NULL)
1330 return;
1331
58112dfb 1332 if (!test_bit(TXSTOPPED, &ch->statusflags))
1da177e4
LT		 1333 return;
1334
b4173f45 1335 MoxaPortTxEnable(ch);
a808ac0c 1336 clear_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT		 1337}
1338
1339static void moxa_hangup(struct tty_struct *tty)
1340{
a808ac0c 1341 struct moxa_port *ch = tty->driver_data;
f176178b 1342 tty_port_hangup(&ch->port);
1da177e4
LT		 1343}
1344
7bcf97d1 1345static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1da177e4 1346{
d450b5a0 1347 struct tty_struct *tty;
8482bcd5 1348 unsigned long flags;
7bcf97d1 1349 dcd = !!dcd;
1da177e4 1350
8482bcd5 1351 spin_lock_irqsave(&p->port.lock, flags);
d450b5a0 1352 if (dcd != p->DCDState) {
8482bcd5
AC		 1353 p->DCDState = dcd;
1354 spin_unlock_irqrestore(&p->port.lock, flags);
d450b5a0
AC		 1355 tty = tty_port_tty_get(&p->port);
1356 if (tty && C_CLOCAL(tty) && !dcd)
1357 tty_hangup(tty);
1358 tty_kref_put(tty);
7bcf97d1 1359 }
8482bcd5
AC		 1360 else
1361 spin_unlock_irqrestore(&p->port.lock, flags);
7bcf97d1 1362}
1da177e4 1363
7bcf97d1
JS		 1364static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1365 u16 __iomem *ip)
1366{
d450b5a0 1367 struct tty_struct *tty = tty_port_tty_get(&p->port);
7bcf97d1 1368 void __iomem *ofsAddr;
9de6a51f 1369 unsigned int inited = p->port.flags & ASYNC_INITIALIZED;
7bcf97d1
JS		 1370 u16 intr;
1371
1372 if (tty) {
a808ac0c 1373 if (test_bit(EMPTYWAIT, &p->statusflags) &&
7bcf97d1 1374 MoxaPortTxQueue(p) == 0) {
a808ac0c 1375 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1
JS		 1376 tty_wakeup(tty);
1377 }
a808ac0c 1378 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
7bcf97d1 1379 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
a808ac0c 1380 clear_bit(LOWWAIT, &p->statusflags);
7bcf97d1
JS		 1381 tty_wakeup(tty);
1382 }
1383
f9b412a8 1384 if (inited && !test_bit(TTY_THROTTLED, &tty->flags) &&
7bcf97d1
JS		 1385 MoxaPortRxQueue(p) > 0) { /* RX */
1386 MoxaPortReadData(p);
1387 tty_schedule_flip(tty);
1388 }
1389 } else {
a808ac0c 1390 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1 1391 MoxaPortFlushData(p, 0); /* flush RX */
1da177e4 1392 }
0bcc4caa 1393
7bcf97d1 1394 if (!handle) /* nothing else to do */
0e0fd7d7 1395 goto put;
7bcf97d1
JS		 1396
1397 intr = readw(ip); /* port irq status */
1398 if (intr == 0)
0e0fd7d7 1399 goto put;
7bcf97d1
JS		 1400
1401 writew(0, ip); /* ACK port */
1402 ofsAddr = p->tableAddr;
1403 if (intr & IntrTx) /* disable tx intr */
1404 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1405 ofsAddr + HostStat);
1406
1407 if (!inited)
0e0fd7d7 1408 goto put;
7bcf97d1
JS		 1409
1410 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
1411 tty_insert_flip_char(tty, 0, TTY_BREAK);
1412 tty_schedule_flip(tty);
1413 }
1414
1415 if (intr & IntrLine)
1416 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
0e0fd7d7
JS		 1417put:
1418 tty_kref_put(tty);
7bcf97d1
JS		 1419
1420 return 0;
1421}
1422
1423static void moxa_poll(unsigned long ignored)
1424{
1425 struct moxa_board_conf *brd;
1426 u16 __iomem *ip;
2a541341 1427 unsigned int card, port, served = 0;
7bcf97d1
JS		 1428
1429 spin_lock(&moxa_lock);
1da177e4 1430 for (card = 0; card < MAX_BOARDS; card++) {
7bcf97d1
JS		 1431 brd = &moxa_boards[card];
1432 if (!brd->ready)
1da177e4 1433 continue;
7bcf97d1 1434
2a541341
JS		 1435 served++;
1436
7bcf97d1
JS		 1437 ip = NULL;
1438 if (readb(brd->intPend) == 0xff)
1439 ip = brd->intTable + readb(brd->intNdx);
1440
1441 for (port = 0; port < brd->numPorts; port++)
1442 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1443
1444 if (ip)
1445 writeb(0, brd->intPend); /* ACK */
1446
1447 if (moxaLowWaterChk) {
1448 struct moxa_port *p = brd->ports;
1449 for (port = 0; port < brd->numPorts; port++, p++)
1450 if (p->lowChkFlag) {
1451 p->lowChkFlag = 0;
1452 moxa_low_water_check(p->tableAddr);
1da177e4 1453 }
1da177e4
LT		 1454 }
1455 }
7bcf97d1 1456 moxaLowWaterChk = 0;
1da177e4 1457
2a541341
JS		 1458 if (served)
1459 mod_timer(&moxaTimer, jiffies + HZ / 50);
1460 spin_unlock(&moxa_lock);
1da177e4
LT		 1461}
1462
1463/******************************************************************************/
1464
db1acaa6 1465static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1466{
eaa95a8d
JS		 1467 register struct ktermios *ts = tty->termios;
1468 struct moxa_port *ch = tty->driver_data;
db1acaa6 1469 int rts, cts, txflow, rxflow, xany, baud;
1da177e4 1470
1da177e4
LT		 1471 rts = cts = txflow = rxflow = xany = 0;
1472 if (ts->c_cflag & CRTSCTS)
1473 rts = cts = 1;
1474 if (ts->c_iflag & IXON)
1475 txflow = 1;
1476 if (ts->c_iflag & IXOFF)
1477 rxflow = 1;
1478 if (ts->c_iflag & IXANY)
1479 xany = 1;
db1acaa6
AC		 1480
1481 /* Clear the features we don't support */
1482 ts->c_cflag &= ~CMSPAR;
b4173f45
JS		 1483 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1484 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
db1acaa6
AC		 1485 if (baud == -1)
1486 baud = tty_termios_baud_rate(old_termios);
1487 /* Not put the baud rate into the termios data */
1488 tty_encode_baud_rate(tty, baud, baud);
1da177e4
LT		 1489}
1490
1da177e4
LT		 1491/*****************************************************************************
1492 * Driver level functions: *
1da177e4 1493 *****************************************************************************/
1da177e4 1494
b4173f45 1495static void MoxaPortFlushData(struct moxa_port *port, int mode)
1da177e4
LT		 1496{
1497 void __iomem *ofsAddr;
eaa95a8d 1498 if (mode < 0 || mode > 2)
1da177e4 1499 return;
b4173f45 1500 ofsAddr = port->tableAddr;
1da177e4
LT		 1501 moxafunc(ofsAddr, FC_FlushQueue, mode);
1502 if (mode != 1) {
b4173f45 1503 port->lowChkFlag = 0;
6f56b658 1504 moxa_low_water_check(ofsAddr);
1da177e4
LT		 1505 }
1506}
1507
1da177e4
LT		 1508/*
1509 * Moxa Port Number Description:
1510 *
1511 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1512 * the port number using in MOXA driver functions will be 0 to 31 for
1513 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1514 * to 127 for fourth. For example, if you setup three MOXA boards,
1515 * first board is C218, second board is C320-16 and third board is
1516 * C320-32. The port number of first board (C218 - 8 ports) is from
1517 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1518 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1519 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1520 * 127 will be invalid.
1521 *
1522 *
1523 * Moxa Functions Description:
1524 *
1525 * Function 1: Driver initialization routine, this routine must be
1526 * called when initialized driver.
1527 * Syntax:
1528 * void MoxaDriverInit();
1529 *
1530 *
1531 * Function 2: Moxa driver private IOCTL command processing.
1532 * Syntax:
1533 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1534 *
1535 * unsigned int cmd : IOCTL command
1536 * unsigned long arg : IOCTL argument
1537 * int port : port number (0 - 127)
1538 *
1539 * return: 0 (OK)
1540 * -EINVAL
1541 * -ENOIOCTLCMD
1542 *
1543 *
1da177e4
LT		 1544 * Function 6: Enable this port to start Tx/Rx data.
1545 * Syntax:
1546 * void MoxaPortEnable(int port);
1547 * int port : port number (0 - 127)
1548 *
1549 *
1550 * Function 7: Disable this port
1551 * Syntax:
1552 * void MoxaPortDisable(int port);
1553 * int port : port number (0 - 127)
1554 *
1555 *
1da177e4
LT		 1556 * Function 10: Setting baud rate of this port.
1557 * Syntax:
08d01c79 1558 * speed_t MoxaPortSetBaud(int port, speed_t baud);
1da177e4
LT		 1559 * int port : port number (0 - 127)
1560 * long baud : baud rate (50 - 115200)
1561 *
1562 * return: 0 : this port is invalid or baud < 50
1563 * 50 - 115200 : the real baud rate set to the port, if
1564 * the argument baud is large than maximun
1565 * available baud rate, the real setting
1566 * baud rate will be the maximun baud rate.
1567 *
1568 *
1da177e4
LT		 1569 * Function 12: Configure the port.
1570 * Syntax:
606d099c 1571 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1da177e4 1572 * int port : port number (0 - 127)
606d099c 1573 * struct ktermios * termio : termio structure pointer
c7bce309 1574 * speed_t baud : baud rate
1da177e4
LT		 1575 *
1576 * return: -1 : this port is invalid or termio == NULL
1577 * 0 : setting O.K.
1578 *
1579 *
1580 * Function 13: Get the DTR/RTS state of this port.
1581 * Syntax:
1582 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1583 * int port : port number (0 - 127)
1584 * int * dtrState : pointer to INT to receive the current DTR
1585 * state. (if NULL, this function will not
1586 * write to this address)
1587 * int * rtsState : pointer to INT to receive the current RTS
1588 * state. (if NULL, this function will not
1589 * write to this address)
1590 *
1591 * return: -1 : this port is invalid
1592 * 0 : O.K.
1593 *
1594 *
1595 * Function 14: Setting the DTR/RTS output state of this port.
1596 * Syntax:
1597 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1598 * int port : port number (0 - 127)
1599 * int dtrState : DTR output state (0: off, 1: on)
1600 * int rtsState : RTS output state (0: off, 1: on)
1601 *
1602 *
1603 * Function 15: Setting the flow control of this port.
1604 * Syntax:
1605 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1606 * int txFlow,int xany);
1607 * int port : port number (0 - 127)
1608 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1609 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1610 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1611 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1612 * int xany : S/W XANY flow control (0: no, 1: yes)
1613 *
1614 *
1615 * Function 16: Get ths line status of this port
1616 * Syntax:
1617 * int MoxaPortLineStatus(int port);
1618 * int port : port number (0 - 127)
1619 *
1620 * return: Bit 0 - CTS state (0: off, 1: on)
1621 * Bit 1 - DSR state (0: off, 1: on)
1622 * Bit 2 - DCD state (0: off, 1: on)
1623 *
1624 *
1da177e4
LT		 1625 * Function 19: Flush the Rx/Tx buffer data of this port.
1626 * Syntax:
1627 * void MoxaPortFlushData(int port, int mode);
1628 * int port : port number (0 - 127)
1629 * int mode
1630 * 0 : flush the Rx buffer
1631 * 1 : flush the Tx buffer
1632 * 2 : flush the Rx and Tx buffer
1633 *
1634 *
1635 * Function 20: Write data.
1636 * Syntax:
1637 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1638 * int port : port number (0 - 127)
1639 * unsigned char * buffer : pointer to write data buffer.
1640 * int length : write data length
1641 *
1642 * return: 0 - length : real write data length
1643 *
1644 *
1645 * Function 21: Read data.
1646 * Syntax:
33f0f88f 1647 * int MoxaPortReadData(int port, struct tty_struct *tty);
1da177e4 1648 * int port : port number (0 - 127)
33f0f88f 1649 * struct tty_struct *tty : tty for data
1da177e4
LT		 1650 *
1651 * return: 0 - length : real read data length
1652 *
1653 *
1da177e4
LT		 1654 * Function 24: Get the Tx buffer current queued data bytes
1655 * Syntax:
1656 * int MoxaPortTxQueue(int port);
1657 * int port : port number (0 - 127)
1658 *
1659 * return: .. : Tx buffer current queued data bytes
1660 *
1661 *
1662 * Function 25: Get the Tx buffer current free space
1663 * Syntax:
1664 * int MoxaPortTxFree(int port);
1665 * int port : port number (0 - 127)
1666 *
1667 * return: .. : Tx buffer current free space
1668 *
1669 *
1670 * Function 26: Get the Rx buffer current queued data bytes
1671 * Syntax:
1672 * int MoxaPortRxQueue(int port);
1673 * int port : port number (0 - 127)
1674 *
1675 * return: .. : Rx buffer current queued data bytes
1676 *
1677 *
1da177e4
LT		 1678 * Function 28: Disable port data transmission.
1679 * Syntax:
1680 * void MoxaPortTxDisable(int port);
1681 * int port : port number (0 - 127)
1682 *
1683 *
1684 * Function 29: Enable port data transmission.
1685 * Syntax:
1686 * void MoxaPortTxEnable(int port);
1687 * int port : port number (0 - 127)
1688 *
1689 *
1da177e4
LT		 1690 * Function 31: Get the received BREAK signal count and reset it.
1691 * Syntax:
1692 * int MoxaPortResetBrkCnt(int port);
1693 * int port : port number (0 - 127)
1694 *
1695 * return: 0 - .. : BREAK signal count
1696 *
1697 *
1da177e4 1698 */
1da177e4 1699
b4173f45 1700static void MoxaPortEnable(struct moxa_port *port)
1da177e4
LT		 1701{
1702 void __iomem *ofsAddr;
eaa95a8d 1703 u16 lowwater = 512;
1da177e4 1704
b4173f45 1705 ofsAddr = port->tableAddr;
1da177e4 1706 writew(lowwater, ofsAddr + Low_water);
08d01c79 1707 if (MOXA_IS_320(port->board))
1da177e4 1708 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
eaa95a8d
JS		 1709 else
1710 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1711 ofsAddr + HostStat);
1da177e4
LT		 1712
1713 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1714 moxafunc(ofsAddr, FC_FlushQueue, 2);
1715
1716 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1717 MoxaPortLineStatus(port);
1718}
1719
b4173f45 1720static void MoxaPortDisable(struct moxa_port *port)
1da177e4 1721{
b4173f45 1722 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT		 1723
1724 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1725 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1726 writew(0, ofsAddr + HostStat);
1727 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1728}
1729
08d01c79 1730static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1da177e4 1731{
08d01c79
JS		 1732 void __iomem *ofsAddr = port->tableAddr;
1733 unsigned int clock, val;
1734 speed_t max;
1da177e4 1735
08d01c79
JS		 1736 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1737 if (baud < 50)
eaa95a8d 1738 return 0;
1da177e4
LT		 1739 if (baud > max)
1740 baud = max;
08d01c79 1741 clock = 921600;
1da177e4
LT		 1742 val = clock / baud;
1743 moxafunc(ofsAddr, FC_SetBaud, val);
1744 baud = clock / val;
eaa95a8d 1745 return baud;
1da177e4
LT		 1746}
1747
b4173f45
JS		 1748static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1749 speed_t baud)
1da177e4
LT		 1750{
1751 void __iomem *ofsAddr;
1da177e4
LT		 1752 tcflag_t mode = 0;
1753
b4173f45 1754 ofsAddr = port->tableAddr;
1da177e4
LT		 1755
1756 mode = termio->c_cflag & CSIZE;
1757 if (mode == CS5)
1758 mode = MX_CS5;
1759 else if (mode == CS6)
1760 mode = MX_CS6;
1761 else if (mode == CS7)
1762 mode = MX_CS7;
1763 else if (mode == CS8)
1764 mode = MX_CS8;
1765
1766 if (termio->c_cflag & CSTOPB) {
1767 if (mode == MX_CS5)
1768 mode |= MX_STOP15;
1769 else
1770 mode |= MX_STOP2;
1771 } else
1772 mode |= MX_STOP1;
1773
1774 if (termio->c_cflag & PARENB) {
1775 if (termio->c_cflag & PARODD)
1776 mode |= MX_PARODD;
1777 else
1778 mode |= MX_PAREVEN;
1779 } else
1780 mode |= MX_PARNONE;
1781
eaa95a8d 1782 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1da177e4 1783
08d01c79
JS		 1784 if (MOXA_IS_320(port->board) && baud >= 921600)
1785 return -1;
1786
db1acaa6 1787 baud = MoxaPortSetBaud(port, baud);
1da177e4
LT		 1788
1789 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
f5c5a36d 1790 spin_lock_irq(&moxafunc_lock);
1da177e4
LT		 1791 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1792 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1793 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
6f56b658 1794 moxa_wait_finish(ofsAddr);
a808ac0c 1795 spin_unlock_irq(&moxafunc_lock);
1da177e4
LT		 1796
1797 }
eaa95a8d 1798 return baud;
1da177e4
LT		 1799}
1800
b4173f45
JS		 1801static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1802 int *rtsState)
1da177e4 1803{
b4173f45
JS		 1804 if (dtrState)
1805 *dtrState = !!(port->lineCtrl & DTR_ON);
1806 if (rtsState)
1807 *rtsState = !!(port->lineCtrl & RTS_ON);
1808
eaa95a8d 1809 return 0;
1da177e4
LT		 1810}
1811
b4173f45 1812static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1da177e4 1813{
eaa95a8d 1814 u8 mode = 0;
1da177e4 1815
1da177e4
LT		 1816 if (dtr)
1817 mode |= DTR_ON;
1818 if (rts)
1819 mode |= RTS_ON;
b4173f45
JS		 1820 port->lineCtrl = mode;
1821 moxafunc(port->tableAddr, FC_LineControl, mode);
1da177e4
LT		 1822}
1823
b4173f45
JS		 1824static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1825 int txflow, int rxflow, int txany)
1da177e4 1826{
b4173f45 1827 int mode = 0;
1da177e4 1828
1da177e4
LT		 1829 if (rts)
1830 mode |= RTS_FlowCtl;
1831 if (cts)
1832 mode |= CTS_FlowCtl;
1833 if (txflow)
1834 mode |= Tx_FlowCtl;
1835 if (rxflow)
1836 mode |= Rx_FlowCtl;
1837 if (txany)
1838 mode |= IXM_IXANY;
b4173f45 1839 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1da177e4
LT		 1840}
1841
b4173f45 1842static int MoxaPortLineStatus(struct moxa_port *port)
1da177e4
LT		 1843{
1844 void __iomem *ofsAddr;
1845 int val;
1846
b4173f45 1847 ofsAddr = port->tableAddr;
f5c5a36d
AC		 1848 if (MOXA_IS_320(port->board))
1849 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1850 else
1da177e4 1851 val = readw(ofsAddr + FlagStat) >> 4;
1da177e4 1852 val &= 0x0B;
7bcf97d1 1853 if (val & 8)
1da177e4 1854 val |= 4;
7bcf97d1 1855 moxa_new_dcdstate(port, val & 8);
1da177e4 1856 val &= 7;
7bcf97d1 1857 return val;
1da177e4
LT		 1858}
1859
d450b5a0 1860static int MoxaPortWriteData(struct tty_struct *tty,
2108eba5 1861 const unsigned char *buffer, int len)
1da177e4 1862{
d450b5a0 1863 struct moxa_port *port = tty->driver_data;
1da177e4 1864 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS		 1865 unsigned int c, total;
1866 u16 head, tail, tx_mask, spage, epage;
1867 u16 pageno, pageofs, bufhead;
1da177e4 1868
b4173f45
JS		 1869 ofsAddr = port->tableAddr;
1870 baseAddr = port->board->basemem;
1da177e4
LT		 1871 tx_mask = readw(ofsAddr + TX_mask);
1872 spage = readw(ofsAddr + Page_txb);
1873 epage = readw(ofsAddr + EndPage_txb);
1874 tail = readw(ofsAddr + TXwptr);
1875 head = readw(ofsAddr + TXrptr);
2108eba5 1876 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1da177e4
LT		 1877 if (c > len)
1878 c = len;
9de6a51f 1879 moxaLog.txcnt[port->port.tty->index] += c;
1da177e4
LT		 1880 total = c;
1881 if (spage == epage) {
1882 bufhead = readw(ofsAddr + Ofs_txb);
1883 writew(spage, baseAddr + Control_reg);
1884 while (c > 0) {
1885 if (head > tail)
1886 len = head - tail - 1;
1887 else
1888 len = tx_mask + 1 - tail;
1889 len = (c > len) ? len : c;
1890 ofs = baseAddr + DynPage_addr + bufhead + tail;
2108eba5
JS		 1891 memcpy_toio(ofs, buffer, len);
1892 buffer += len;
1da177e4
LT		 1893 tail = (tail + len) & tx_mask;
1894 c -= len;
1895 }
1da177e4 1896 } else {
1da177e4
LT		 1897 pageno = spage + (tail >> 13);
1898 pageofs = tail & Page_mask;
2108eba5
JS		 1899 while (c > 0) {
1900 len = Page_size - pageofs;
1901 if (len > c)
1902 len = c;
1da177e4
LT		 1903 writeb(pageno, baseAddr + Control_reg);
1904 ofs = baseAddr + DynPage_addr + pageofs;
2108eba5
JS		 1905 memcpy_toio(ofs, buffer, len);
1906 buffer += len;
1da177e4
LT		 1907 if (++pageno == epage)
1908 pageno = spage;
1909 pageofs = 0;
2108eba5
JS		 1910 c -= len;
1911 }
1912 tail = (tail + total) & tx_mask;
1da177e4 1913 }
2108eba5 1914 writew(tail, ofsAddr + TXwptr);
1da177e4 1915 writeb(1, ofsAddr + CD180TXirq); /* start to send */
2108eba5 1916 return total;
1da177e4
LT		 1917}
1918
7bcf97d1 1919static int MoxaPortReadData(struct moxa_port *port)
1da177e4 1920{
9de6a51f 1921 struct tty_struct *tty = port->port.tty;
2108eba5 1922 unsigned char *dst;
1da177e4 1923 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS		 1924 unsigned int count, len, total;
1925 u16 tail, rx_mask, spage, epage;
1926 u16 pageno, pageofs, bufhead, head;
1da177e4 1927
b4173f45
JS		 1928 ofsAddr = port->tableAddr;
1929 baseAddr = port->board->basemem;
1da177e4
LT		 1930 head = readw(ofsAddr + RXrptr);
1931 tail = readw(ofsAddr + RXwptr);
1932 rx_mask = readw(ofsAddr + RX_mask);
1933 spage = readw(ofsAddr + Page_rxb);
1934 epage = readw(ofsAddr + EndPage_rxb);
2108eba5 1935 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1da177e4 1936 if (count == 0)
33f0f88f 1937 return 0;
1da177e4 1938
33f0f88f 1939 total = count;
7bcf97d1 1940 moxaLog.rxcnt[tty->index] += total;
1da177e4
LT		 1941 if (spage == epage) {
1942 bufhead = readw(ofsAddr + Ofs_rxb);
1943 writew(spage, baseAddr + Control_reg);
1944 while (count > 0) {
1da177e4 1945 ofs = baseAddr + DynPage_addr + bufhead + head;
2108eba5
JS		 1946 len = (tail >= head) ? (tail - head) :
1947 (rx_mask + 1 - head);
1948 len = tty_prepare_flip_string(tty, &dst,
1949 min(len, count));
1950 memcpy_fromio(dst, ofs, len);
1da177e4
LT		 1951 head = (head + len) & rx_mask;
1952 count -= len;
1953 }
1da177e4 1954 } else {
1da177e4
LT		 1955 pageno = spage + (head >> 13);
1956 pageofs = head & Page_mask;
2108eba5 1957 while (count > 0) {
1da177e4
LT		 1958 writew(pageno, baseAddr + Control_reg);
1959 ofs = baseAddr + DynPage_addr + pageofs;
2108eba5
JS		 1960 len = tty_prepare_flip_string(tty, &dst,
1961 min(Page_size - pageofs, count));
1962 memcpy_fromio(dst, ofs, len);
1963
1964 count -= len;
1965 pageofs = (pageofs + len) & Page_mask;
1966 if (pageofs == 0 && ++pageno == epage)
1da177e4 1967 pageno = spage;
2108eba5
JS		 1968 }
1969 head = (head + total) & rx_mask;
1da177e4 1970 }
2108eba5
JS		 1971 writew(head, ofsAddr + RXrptr);
1972 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1da177e4 1973 moxaLowWaterChk = 1;
b4173f45 1974 port->lowChkFlag = 1;
1da177e4 1975 }
2108eba5 1976 return total;
1da177e4
LT		 1977}
1978
1979
b4173f45 1980static int MoxaPortTxQueue(struct moxa_port *port)
1da177e4 1981{
b4173f45 1982 void __iomem *ofsAddr = port->tableAddr;
2108eba5 1983 u16 rptr, wptr, mask;
1da177e4 1984
1da177e4
LT		 1985 rptr = readw(ofsAddr + TXrptr);
1986 wptr = readw(ofsAddr + TXwptr);
1987 mask = readw(ofsAddr + TX_mask);
2108eba5 1988 return (wptr - rptr) & mask;
1da177e4
LT		 1989}
1990
b4173f45 1991static int MoxaPortTxFree(struct moxa_port *port)
1da177e4 1992{
b4173f45 1993 void __iomem *ofsAddr = port->tableAddr;
2108eba5 1994 u16 rptr, wptr, mask;
1da177e4 1995
1da177e4
LT		 1996 rptr = readw(ofsAddr + TXrptr);
1997 wptr = readw(ofsAddr + TXwptr);
1998 mask = readw(ofsAddr + TX_mask);
2108eba5 1999 return mask - ((wptr - rptr) & mask);
1da177e4
LT		 2000}
2001
b4173f45 2002static int MoxaPortRxQueue(struct moxa_port *port)
1da177e4 2003{
b4173f45 2004 void __iomem *ofsAddr = port->tableAddr;
2108eba5 2005 u16 rptr, wptr, mask;
1da177e4 2006
1da177e4
LT		 2007 rptr = readw(ofsAddr + RXrptr);
2008 wptr = readw(ofsAddr + RXwptr);
2009 mask = readw(ofsAddr + RX_mask);
2108eba5 2010 return (wptr - rptr) & mask;
1da177e4
LT		 2011}
2012
b4173f45 2013static void MoxaPortTxDisable(struct moxa_port *port)
1da177e4 2014{
b4173f45 2015 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
1da177e4
LT		 2016}
2017
b4173f45 2018static void MoxaPortTxEnable(struct moxa_port *port)
1da177e4 2019{
b4173f45 2020 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
1da177e4
LT		 2021}
2022
8f8ecbad 2023static int moxa_get_serial_info(struct moxa_port *info,
eaa95a8d 2024 struct serial_struct __user *retinfo)
1da177e4 2025{
eaa95a8d
JS		 2026 struct serial_struct tmp = {
2027 .type = info->type,
9de6a51f
AC		 2028 .line = info->port.tty->index,
2029 .flags = info->port.flags,
eaa95a8d 2030 .baud_base = 921600,
44b7d1b3 2031 .close_delay = info->port.close_delay
eaa95a8d
JS		 2032 };
2033 return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
1da177e4
LT		 2034}
2035
2036
8f8ecbad 2037static int moxa_set_serial_info(struct moxa_port *info,
eaa95a8d 2038 struct serial_struct __user *new_info)
1da177e4
LT		 2039{
2040 struct serial_struct new_serial;
2041
eaa95a8d 2042 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1da177e4
LT		 2043 return -EFAULT;
2044
eaa95a8d
JS		 2045 if (new_serial.irq != 0 || new_serial.port != 0 ||
2046 new_serial.custom_divisor != 0 ||
2047 new_serial.baud_base != 921600)
2048 return -EPERM;
1da177e4
LT		 2049
2050 if (!capable(CAP_SYS_ADMIN)) {
2051 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
9de6a51f 2052 (info->port.flags & ~ASYNC_USR_MASK)))
eaa95a8d
JS		 2053 return -EPERM;
2054 } else
44b7d1b3 2055 info->port.close_delay = new_serial.close_delay * HZ / 100;
1da177e4
LT		 2056
2057 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
9de6a51f 2058 new_serial.flags |= (info->port.flags & ASYNC_FLAGS);
1da177e4 2059
eaa95a8d 2060 MoxaSetFifo(info, new_serial.type == PORT_16550A);
1da177e4
LT		 2061
2062 info->type = new_serial.type;
eaa95a8d 2063 return 0;
1da177e4
LT		 2064}
2065
2066
2067
2068/*****************************************************************************
2069 * Static local functions: *
2070 *****************************************************************************/
1da177e4 2071
b4173f45 2072static void MoxaSetFifo(struct moxa_port *port, int enable)
1da177e4 2073{
b4173f45 2074 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT		 2075
2076 if (!enable) {
2077 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2078 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2079 } else {
2080 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2081 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2082 }
2083}
kernel source for telekom puls (alcatel/mediatek)