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Staging: silicom: remove S_IWOTH from proc declaration
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / xgifb / XGI_main_26.c
CommitLineData
d7636e0b 1/*
2 * XG20, XG21, XG40, XG42 frame buffer device
3 * for Linux kernels 2.5.x, 2.6.x
4 * Base on TW's sis fbdev code.
5 */
6
96c66042
SH		 7#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8
d7636e0b 9#include <linux/module.h>
d7636e0b 10
d7636e0b 11#ifdef CONFIG_MTRR
12#include <asm/mtrr.h>
13#endif
14
d7636e0b 15#include "XGI_main.h"
d542af50 16#include "vb_init.h"
d7636e0b 17#include "vb_util.h"
d542af50 18#include "vb_setmode.h"
d7636e0b 19
d7636e0b 20#define Index_CR_GPIO_Reg1 0x48
d7636e0b 21#define Index_CR_GPIO_Reg3 0x4a
22
23#define GPIOG_EN (1<<6)
d7636e0b 24#define GPIOG_READ (1<<1)
d7636e0b 25
2d2c880f 26static char *forcecrt2type;
dfbdf805 27static char *mode;
c3228308 28static int vesa = -1;
7548a83e 29static unsigned int refresh_rate;
dfbdf805 30
d7636e0b 31/* -------------------- Macro definitions ---------------------------- */
32
96cd1f8b 33#ifdef DEBUG
d7636e0b 34static void dumpVGAReg(void)
35{
b654f878
PS		 36 u8 i, reg;
37
b6e2dc39 38 xgifb_reg_set(XGISR, 0x05, 0x86);
b654f878
PS		 39
40 for (i = 0; i < 0x4f; i++) {
7e119b75 41 reg = xgifb_reg_get(XGISR, i);
be25aef0
MG		 42 pr_debug("o 3c4 %x\n", i);
43 pr_debug("i 3c5 => %x\n", reg);
b654f878
PS		 44 }
45
46 for (i = 0; i < 0xF0; i++) {
7e119b75 47 reg = xgifb_reg_get(XGICR, i);
be25aef0
MG		 48 pr_debug("o 3d4 %x\n", i);
49 pr_debug("i 3d5 => %x\n", reg);
b654f878 50 }
d7636e0b 51}
52#else
b654f878
PS		 53static inline void dumpVGAReg(void)
54{
55}
d7636e0b 56#endif
57
d7636e0b 58/* --------------- Hardware Access Routines -------------------------- */
59
b654f878
PS		 60static int XGIfb_mode_rate_to_dclock(struct vb_device_info *XGI_Pr,
61 struct xgi_hw_device_info *HwDeviceExtension,
62 unsigned char modeno, unsigned char rateindex)
d7636e0b 63{
b654f878
PS		 64 unsigned short ModeNo = modeno;
65 unsigned short ModeIdIndex = 0, ClockIndex = 0;
66 unsigned short RefreshRateTableIndex = 0;
b654f878 67 int Clock;
b654f878 68 InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr);
d7636e0b 69
aca03bcc
AK		 70 XGI_SearchModeID(ModeNo, &ModeIdIndex, XGI_Pr);
71
b654f878
PS		 72 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
73 ModeIdIndex, XGI_Pr);
d7636e0b 74
b654f878 75 ClockIndex = XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
b654f878
PS		 76
77 Clock = XGI_Pr->VCLKData[ClockIndex].CLOCK * 1000;
d7636e0b 78
b654f878 79 return Clock;
d7636e0b 80}
81
b654f878
PS		 82static int XGIfb_mode_rate_to_ddata(struct vb_device_info *XGI_Pr,
83 struct xgi_hw_device_info *HwDeviceExtension,
84 unsigned char modeno, unsigned char rateindex,
85 u32 *left_margin, u32 *right_margin, u32 *upper_margin,
86 u32 *lower_margin, u32 *hsync_len, u32 *vsync_len, u32 *sync,
87 u32 *vmode)
d7636e0b 88{
b654f878 89 unsigned short ModeNo = modeno;
051ff1bb 90 unsigned short ModeIdIndex, index = 0;
b654f878
PS		 91 unsigned short RefreshRateTableIndex = 0;
92
93 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
94 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
95 unsigned char sr_data, cr_data, cr_data2;
96 unsigned long cr_data3;
97 int A, B, C, D, E, F, temp, j;
b654f878 98 InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr);
051ff1bb
AK		 99 if (!XGI_SearchModeID(ModeNo, &ModeIdIndex, XGI_Pr))
100 return 0;
b654f878
PS		 101 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
102 ModeIdIndex, XGI_Pr);
b654f878 103 index = XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
d7636e0b 104
b654f878 105 sr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[5];
d7636e0b 106
b654f878 107 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[0];
d7636e0b 108
b654f878
PS		 109 /* Horizontal total */
110 HT = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8);
111 A = HT + 5;
d7636e0b 112
b654f878
PS		 113 HDE = (XGI_Pr->RefIndex[RefreshRateTableIndex].XRes >> 3) - 1;
114 E = HDE + 1;
d7636e0b 115
b654f878 116 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[3];
d7636e0b 117
b654f878
PS		 118 /* Horizontal retrace (=sync) start */
119 HRS = (cr_data & 0xff) | ((unsigned short) (sr_data & 0xC0) << 2);
120 F = HRS - E - 3;
d7636e0b 121
b654f878 122 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[1];
d7636e0b 123
b654f878
PS		 124 /* Horizontal blank start */
125 HBS = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x30) << 4);
d7636e0b 126
b654f878 127 sr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[6];
d7636e0b 128
b654f878 129 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[2];
d7636e0b 130
b654f878 131 cr_data2 = XGI_Pr->XGINEWUB_CRT1Table[index].CR[4];
d7636e0b 132
b654f878
PS		 133 /* Horizontal blank end */
134 HBE = (cr_data & 0x1f) | ((unsigned short) (cr_data2 & 0x80) >> 2)
135 | ((unsigned short) (sr_data & 0x03) << 6);
d7636e0b 136
b654f878
PS		 137 /* Horizontal retrace (=sync) end */
138 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
d7636e0b 139
b654f878
PS		 140 temp = HBE - ((E - 1) & 255);
141 B = (temp > 0) ? temp : (temp + 256);
d7636e0b 142
b654f878
PS		 143 temp = HRE - ((E + F + 3) & 63);
144 C = (temp > 0) ? temp : (temp + 64);
d7636e0b 145
b654f878 146 D = B - F - C;
d7636e0b 147
b654f878
PS		 148 *left_margin = D * 8;
149 *right_margin = F * 8;
150 *hsync_len = C * 8;
d7636e0b 151
b654f878 152 sr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[14];
d7636e0b 153
b654f878 154 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[8];
d7636e0b 155
b654f878 156 cr_data2 = XGI_Pr->XGINEWUB_CRT1Table[index].CR[9];
d7636e0b 157
b654f878
PS		 158 /* Vertical total */
159 VT = (cr_data & 0xFF) | ((unsigned short) (cr_data2 & 0x01) << 8)
160 | ((unsigned short) (cr_data2 & 0x20) << 4)
161 | ((unsigned short) (sr_data & 0x01) << 10);
162 A = VT + 2;
d7636e0b 163
b654f878
PS		 164 VDE = XGI_Pr->RefIndex[RefreshRateTableIndex].YRes - 1;
165 E = VDE + 1;
d7636e0b 166
b654f878 167 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[10];
d7636e0b 168
b654f878
PS		 169 /* Vertical retrace (=sync) start */
170 VRS = (cr_data & 0xff) | ((unsigned short) (cr_data2 & 0x04) << 6)
171 | ((unsigned short) (cr_data2 & 0x80) << 2)
172 | ((unsigned short) (sr_data & 0x08) << 7);
173 F = VRS + 1 - E;
d7636e0b 174
b654f878 175 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[12];
d7636e0b 176
b654f878 177 cr_data3 = (XGI_Pr->XGINEWUB_CRT1Table[index].CR[14] & 0x80) << 5;
d7636e0b 178
b654f878
PS		 179 /* Vertical blank start */
180 VBS = (cr_data & 0xff) | ((unsigned short) (cr_data2 & 0x08) << 5)
181 | ((unsigned short) (cr_data3 & 0x20) << 4)
182 | ((unsigned short) (sr_data & 0x04) << 8);
d7636e0b 183
b654f878 184 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[13];
d7636e0b 185
b654f878
PS		 186 /* Vertical blank end */
187 VBE = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x10) << 4);
188 temp = VBE - ((E - 1) & 511);
189 B = (temp > 0) ? temp : (temp + 512);
d7636e0b 190
b654f878 191 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[11];
d7636e0b 192
b654f878
PS		 193 /* Vertical retrace (=sync) end */
194 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
195 temp = VRE - ((E + F - 1) & 31);
196 C = (temp > 0) ? temp : (temp + 32);
d7636e0b 197
b654f878 198 D = B - F - C;
d7636e0b 199
b654f878
PS		 200 *upper_margin = D;
201 *lower_margin = F;
202 *vsync_len = C;
d7636e0b 203
b654f878
PS		 204 if (XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000)
205 *sync &= ~FB_SYNC_VERT_HIGH_ACT;
206 else
207 *sync |= FB_SYNC_VERT_HIGH_ACT;
d7636e0b 208
b654f878
PS		 209 if (XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000)
210 *sync &= ~FB_SYNC_HOR_HIGH_ACT;
211 else
212 *sync |= FB_SYNC_HOR_HIGH_ACT;
d7636e0b 213
b654f878
PS		 214 *vmode = FB_VMODE_NONINTERLACED;
215 if (XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080)
216 *vmode = FB_VMODE_INTERLACED;
217 else {
218 j = 0;
219 while (XGI_Pr->EModeIDTable[j].Ext_ModeID != 0xff) {
a12c27c5
KT		 220 if (XGI_Pr->EModeIDTable[j].Ext_ModeID ==
221 XGI_Pr->RefIndex[RefreshRateTableIndex].ModeID) {
222 if (XGI_Pr->EModeIDTable[j].Ext_ModeFlag &
223 DoubleScanMode) {
b654f878
PS		 224 *vmode = FB_VMODE_DOUBLE;
225 }
226 break;
227 }
228 j++;
229 }
230 }
d7636e0b 231
b654f878
PS		 232 return 1;
233}
d7636e0b 234
8922967e 235static void XGIRegInit(struct vb_device_info *XGI_Pr, unsigned long BaseAddr)
d7636e0b 236{
b654f878
PS		 237 XGI_Pr->P3c4 = BaseAddr + 0x14;
238 XGI_Pr->P3d4 = BaseAddr + 0x24;
239 XGI_Pr->P3c0 = BaseAddr + 0x10;
240 XGI_Pr->P3ce = BaseAddr + 0x1e;
241 XGI_Pr->P3c2 = BaseAddr + 0x12;
242 XGI_Pr->P3ca = BaseAddr + 0x1a;
243 XGI_Pr->P3c6 = BaseAddr + 0x16;
244 XGI_Pr->P3c7 = BaseAddr + 0x17;
245 XGI_Pr->P3c8 = BaseAddr + 0x18;
246 XGI_Pr->P3c9 = BaseAddr + 0x19;
247 XGI_Pr->P3da = BaseAddr + 0x2A;
a12c27c5 248 /* Digital video interface registers (LCD) */
6896b94e 249 XGI_Pr->Part1Port = BaseAddr + SIS_CRT2_PORT_04;
a12c27c5 250 /* 301 TV Encoder registers */
6896b94e 251 XGI_Pr->Part2Port = BaseAddr + SIS_CRT2_PORT_10;
a12c27c5 252 /* 301 Macrovision registers */
6896b94e 253 XGI_Pr->Part3Port = BaseAddr + SIS_CRT2_PORT_12;
a12c27c5 254 /* 301 VGA2 (and LCD) registers */
6896b94e 255 XGI_Pr->Part4Port = BaseAddr + SIS_CRT2_PORT_14;
a12c27c5 256 /* 301 palette address port registers */
6896b94e 257 XGI_Pr->Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
d7636e0b 258
259}
260
d7636e0b 261/* ------------------ Internal helper routines ----------------- */
262
fab04b97 263static int XGIfb_GetXG21DefaultLVDSModeIdx(struct xgifb_video_info *xgifb_info)
c4fa7dfe 264{
791fef1b
MG		 265 int i = 0;
266
267 while ((XGIbios_mode[i].mode_no != 0)
268 && (XGIbios_mode[i].xres <= xgifb_info->lvds_data.LVDSHDE)) {
269 if ((XGIbios_mode[i].xres == xgifb_info->lvds_data.LVDSHDE)
270 && (XGIbios_mode[i].yres == xgifb_info->lvds_data.LVDSVDE)
271 && (XGIbios_mode[i].bpp == 8)) {
272 return i;
c4fa7dfe 273 }
791fef1b 274 i++;
c4fa7dfe 275 }
c4fa7dfe 276
791fef1b 277 return -1;
c4fa7dfe
AK		 278}
279
ccf265ad
AK		 280static void XGIfb_search_mode(struct xgifb_video_info *xgifb_info,
281 const char *name)
d7636e0b 282{
f9e5de0f
AK		 283 unsigned int xres;
284 unsigned int yres;
285 unsigned int bpp;
286 int i;
d7636e0b 287
f9e5de0f
AK		 288 if (sscanf(name, "%ux%ux%u", &xres, &yres, &bpp) != 3)
289 goto invalid_mode;
290
291 if (bpp == 24)
292 bpp = 32; /* That's for people who mix up color and fb depth. */
293
294 for (i = 0; XGIbios_mode[i].mode_no != 0; i++)
295 if (XGIbios_mode[i].xres == xres &&
296 XGIbios_mode[i].yres == yres &&
297 XGIbios_mode[i].bpp == bpp) {
ccf265ad 298 xgifb_info->mode_idx = i;
f9e5de0f 299 return;
d7636e0b 300 }
f9e5de0f
AK		 301invalid_mode:
302 pr_info("Invalid mode '%s'\n", name);
d7636e0b 303}
304
ccf265ad
AK		 305static void XGIfb_search_vesamode(struct xgifb_video_info *xgifb_info,
306 unsigned int vesamode)
d7636e0b 307{
4362f5be 308 int i = 0;
d7636e0b 309
c3228308
AK		 310 if (vesamode == 0)
311 goto invalid;
d7636e0b 312
b654f878 313 vesamode &= 0x1dff; /* Clean VESA mode number from other flags */
d7636e0b 314
b654f878 315 while (XGIbios_mode[i].mode_no != 0) {
a12c27c5
KT		 316 if ((XGIbios_mode[i].vesa_mode_no_1 == vesamode) ||
317 (XGIbios_mode[i].vesa_mode_no_2 == vesamode)) {
ccf265ad 318 xgifb_info->mode_idx = i;
4362f5be 319 return;
d7636e0b 320 }
321 i++;
322 }
c3228308
AK		 323
324invalid:
4362f5be 325 pr_info("Invalid VESA mode 0x%x'\n", vesamode);
d7636e0b 326}
327
fd26d420 328static int XGIfb_validate_mode(struct xgifb_video_info *xgifb_info, int myindex)
d7636e0b 329{
b654f878 330 u16 xres, yres;
fd26d420 331 struct xgi_hw_device_info *hw_info = &xgifb_info->hw_info;
b654f878 332
fd26d420 333 if (xgifb_info->chip == XG21) {
289ea524 334 if (xgifb_info->display2 == XGIFB_DISP_LCD) {
fab04b97
AK		 335 xres = xgifb_info->lvds_data.LVDSHDE;
336 yres = xgifb_info->lvds_data.LVDSVDE;
b654f878
PS		 337 if (XGIbios_mode[myindex].xres > xres)
338 return -1;
339 if (XGIbios_mode[myindex].yres > yres)
340 return -1;
a12c27c5
KT		 341 if ((XGIbios_mode[myindex].xres < xres) &&
342 (XGIbios_mode[myindex].yres < yres)) {
b654f878
PS		 343 if (XGIbios_mode[myindex].bpp > 8)
344 return -1;
345 }
346
347 }
348 return myindex;
349
d7636e0b 350 }
b654f878
PS		 351
352 /* FIXME: for now, all is valid on XG27 */
fd26d420 353 if (xgifb_info->chip == XG27)
b654f878
PS		 354 return myindex;
355
356 if (!(XGIbios_mode[myindex].chipset & MD_XGI315))
357 return -1;
358
289ea524
AK		 359 switch (xgifb_info->display2) {
360 case XGIFB_DISP_LCD:
c62f2e46 361 switch (hw_info->ulCRT2LCDType) {
b654f878
PS		 362 case LCD_640x480:
363 xres = 640;
364 yres = 480;
d7636e0b 365 break;
b654f878
PS		 366 case LCD_800x600:
367 xres = 800;
368 yres = 600;
d7636e0b 369 break;
b654f878
PS		 370 case LCD_1024x600:
371 xres = 1024;
372 yres = 600;
d7636e0b 373 break;
b654f878
PS		 374 case LCD_1024x768:
375 xres = 1024;
376 yres = 768;
d7636e0b 377 break;
b654f878
PS		 378 case LCD_1152x768:
379 xres = 1152;
380 yres = 768;
d7636e0b 381 break;
b654f878
PS		 382 case LCD_1280x960:
383 xres = 1280;
384 yres = 960;
d7636e0b 385 break;
b654f878
PS		 386 case LCD_1280x768:
387 xres = 1280;
388 yres = 768;
d7636e0b 389 break;
b654f878
PS		 390 case LCD_1280x1024:
391 xres = 1280;
392 yres = 1024;
d7636e0b 393 break;
b654f878
PS		 394 case LCD_1400x1050:
395 xres = 1400;
396 yres = 1050;
d7636e0b 397 break;
b654f878
PS		 398 case LCD_1600x1200:
399 xres = 1600;
400 yres = 1200;
401 break;
b654f878
PS		 402 default:
403 xres = 0;
404 yres = 0;
405 break;
406 }
407 if (XGIbios_mode[myindex].xres > xres)
408 return -1;
409 if (XGIbios_mode[myindex].yres > yres)
410 return -1;
c62f2e46
AK		 411 if ((hw_info->ulExternalChip == 0x01) || /* LVDS */
412 (hw_info->ulExternalChip == 0x05)) { /* LVDS+Chrontel */
b654f878
PS		 413 switch (XGIbios_mode[myindex].xres) {
414 case 512:
415 if (XGIbios_mode[myindex].yres != 512)
416 return -1;
c62f2e46 417 if (hw_info->ulCRT2LCDType == LCD_1024x600)
b654f878
PS		 418 return -1;
419 break;
420 case 640:
421 if ((XGIbios_mode[myindex].yres != 400)
422 && (XGIbios_mode[myindex].yres
423 != 480))
424 return -1;
425 break;
426 case 800:
427 if (XGIbios_mode[myindex].yres != 600)
428 return -1;
429 break;
430 case 1024:
a12c27c5
KT		 431 if ((XGIbios_mode[myindex].yres != 600) &&
432 (XGIbios_mode[myindex].yres != 768))
b654f878 433 return -1;
a12c27c5 434 if ((XGIbios_mode[myindex].yres == 600) &&
c62f2e46 435 (hw_info->ulCRT2LCDType != LCD_1024x600))
b654f878
PS		 436 return -1;
437 break;
438 case 1152:
439 if ((XGIbios_mode[myindex].yres) != 768)
440 return -1;
c62f2e46 441 if (hw_info->ulCRT2LCDType != LCD_1152x768)
b654f878
PS		 442 return -1;
443 break;
444 case 1280:
a12c27c5
KT		 445 if ((XGIbios_mode[myindex].yres != 768) &&
446 (XGIbios_mode[myindex].yres != 1024))
b654f878 447 return -1;
a12c27c5 448 if ((XGIbios_mode[myindex].yres == 768) &&
c62f2e46 449 (hw_info->ulCRT2LCDType != LCD_1280x768))
b654f878
PS		 450 return -1;
451 break;
452 case 1400:
453 if (XGIbios_mode[myindex].yres != 1050)
454 return -1;
455 break;
456 case 1600:
457 if (XGIbios_mode[myindex].yres != 1200)
458 return -1;
459 break;
460 default:
461 return -1;
d7636e0b 462 }
b654f878
PS		 463 } else {
464 switch (XGIbios_mode[myindex].xres) {
465 case 512:
466 if (XGIbios_mode[myindex].yres != 512)
467 return -1;
468 break;
469 case 640:
a12c27c5
KT		 470 if ((XGIbios_mode[myindex].yres != 400) &&
471 (XGIbios_mode[myindex].yres != 480))
b654f878
PS		 472 return -1;
473 break;
474 case 800:
475 if (XGIbios_mode[myindex].yres != 600)
476 return -1;
477 break;
478 case 1024:
479 if (XGIbios_mode[myindex].yres != 768)
480 return -1;
481 break;
482 case 1280:
a12c27c5
KT		 483 if ((XGIbios_mode[myindex].yres != 960) &&
484 (XGIbios_mode[myindex].yres != 1024))
b654f878
PS		 485 return -1;
486 if (XGIbios_mode[myindex].yres == 960) {
c62f2e46 487 if (hw_info->ulCRT2LCDType ==
a12c27c5 488 LCD_1400x1050)
b654f878
PS		 489 return -1;
490 }
491 break;
492 case 1400:
493 if (XGIbios_mode[myindex].yres != 1050)
494 return -1;
495 break;
496 case 1600:
497 if (XGIbios_mode[myindex].yres != 1200)
498 return -1;
499 break;
500 default:
501 return -1;
d7636e0b 502 }
503 }
d7636e0b 504 break;
289ea524 505 case XGIFB_DISP_TV:
b654f878
PS		 506 switch (XGIbios_mode[myindex].xres) {
507 case 512:
508 case 640:
509 case 800:
510 break;
511 case 720:
fd26d420 512 if (xgifb_info->TV_type == TVMODE_NTSC) {
b654f878
PS		 513 if (XGIbios_mode[myindex].yres != 480)
514 return -1;
fd26d420 515 } else if (xgifb_info->TV_type == TVMODE_PAL) {
b654f878
PS		 516 if (XGIbios_mode[myindex].yres != 576)
517 return -1;
d7636e0b 518 }
949eb0ae 519 /* LVDS/CHRONTEL does not support 720 */
fd26d420
AK		 520 if (xgifb_info->hasVB == HASVB_LVDS_CHRONTEL ||
521 xgifb_info->hasVB == HASVB_CHRONTEL) {
b654f878
PS		 522 return -1;
523 }
524 break;
525 case 1024:
fd26d420 526 if (xgifb_info->TV_type == TVMODE_NTSC) {
b654f878
PS		 527 if (XGIbios_mode[myindex].bpp == 32)
528 return -1;
529 }
b654f878
PS		 530 break;
531 default:
532 return -1;
d7636e0b 533 }
534 break;
289ea524 535 case XGIFB_DISP_CRT:
b654f878
PS		 536 if (XGIbios_mode[myindex].xres > 1280)
537 return -1;
538 break;
289ea524
AK		 539 case XGIFB_DISP_NONE:
540 break;
d7636e0b 541 }
b654f878 542 return myindex;
d7636e0b 543
544}
545
546static void XGIfb_search_crt2type(const char *name)
547{
548 int i = 0;
549
b654f878 550 if (name == NULL)
d7636e0b 551 return;
552
b654f878 553 while (XGI_crt2type[i].type_no != -1) {
d7636e0b 554 if (!strcmp(name, XGI_crt2type[i].name)) {
555 XGIfb_crt2type = XGI_crt2type[i].type_no;
556 XGIfb_tvplug = XGI_crt2type[i].tvplug_no;
557 break;
558 }
559 i++;
560 }
b654f878 561 if (XGIfb_crt2type < 0)
4a6b1518 562 pr_info("Invalid CRT2 type: %s\n", name);
d7636e0b 563}
564
fd26d420
AK		 565static u8 XGIfb_search_refresh_rate(struct xgifb_video_info *xgifb_info,
566 unsigned int rate)
d7636e0b 567{
568 u16 xres, yres;
569 int i = 0;
570
ccf265ad
AK		 571 xres = XGIbios_mode[xgifb_info->mode_idx].xres;
572 yres = XGIbios_mode[xgifb_info->mode_idx].yres;
d7636e0b 573
5aa55d9f 574 xgifb_info->rate_idx = 0;
d7636e0b 575 while ((XGIfb_vrate[i].idx != 0) && (XGIfb_vrate[i].xres <= xres)) {
a12c27c5
KT		 576 if ((XGIfb_vrate[i].xres == xres) &&
577 (XGIfb_vrate[i].yres == yres)) {
d7636e0b 578 if (XGIfb_vrate[i].refresh == rate) {
5aa55d9f 579 xgifb_info->rate_idx = XGIfb_vrate[i].idx;
d7636e0b 580 break;
581 } else if (XGIfb_vrate[i].refresh > rate) {
582 if ((XGIfb_vrate[i].refresh - rate) <= 3) {
be25aef0 583 pr_debug("Adjusting rate from %d up to %d\n",
d56b4c3d 584 rate, XGIfb_vrate[i].refresh);
5aa55d9f
AK		 585 xgifb_info->rate_idx =
586 XGIfb_vrate[i].idx;
fd26d420 587 xgifb_info->refresh_rate =
a12c27c5 588 XGIfb_vrate[i].refresh;
b654f878
PS		 589 } else if (((rate - XGIfb_vrate[i - 1].refresh)
590 <= 2) && (XGIfb_vrate[i].idx
591 != 1)) {
be25aef0 592 pr_debug("Adjusting rate from %d down to %d\n",
3bcc2460
MG		 593 rate,
594 XGIfb_vrate[i-1].refresh);
5aa55d9f
AK		 595 xgifb_info->rate_idx =
596 XGIfb_vrate[i - 1].idx;
fd26d420 597 xgifb_info->refresh_rate =
a12c27c5 598 XGIfb_vrate[i - 1].refresh;
d7636e0b 599 }
600 break;
b654f878 601 } else if ((rate - XGIfb_vrate[i].refresh) <= 2) {
be25aef0 602 pr_debug("Adjusting rate from %d down to %d\n",
d56b4c3d 603 rate, XGIfb_vrate[i].refresh);
5aa55d9f 604 xgifb_info->rate_idx = XGIfb_vrate[i].idx;
b654f878
PS		 605 break;
606 }
d7636e0b 607 }
608 i++;
609 }
5aa55d9f
AK		 610 if (xgifb_info->rate_idx > 0) {
611 return xgifb_info->rate_idx;
d7636e0b 612 } else {
4a6b1518 613 pr_info("Unsupported rate %d for %dx%d\n",
a12c27c5 614 rate, xres, yres);
d7636e0b 615 return 0;
616 }
617}
618
619static void XGIfb_search_tvstd(const char *name)
620{
621 int i = 0;
622
b654f878 623 if (name == NULL)
d7636e0b 624 return;
625
626 while (XGI_tvtype[i].type_no != -1) {
627 if (!strcmp(name, XGI_tvtype[i].name)) {
628 XGIfb_tvmode = XGI_tvtype[i].type_no;
629 break;
630 }
631 i++;
632 }
633}
634
d7636e0b 635/* ----------- FBDev related routines for all series ----------- */
636
fd26d420
AK		 637static void XGIfb_bpp_to_var(struct xgifb_video_info *xgifb_info,
638 struct fb_var_screeninfo *var)
d7636e0b 639{
b654f878
PS		 640 switch (var->bits_per_pixel) {
641 case 8:
642 var->red.offset = var->green.offset = var->blue.offset = 0;
d7636e0b 643 var->red.length = var->green.length = var->blue.length = 6;
fd26d420 644 xgifb_info->video_cmap_len = 256;
d7636e0b 645 break;
b654f878 646 case 16:
d7636e0b 647 var->red.offset = 11;
648 var->red.length = 5;
649 var->green.offset = 5;
650 var->green.length = 6;
651 var->blue.offset = 0;
652 var->blue.length = 5;
653 var->transp.offset = 0;
654 var->transp.length = 0;
fd26d420 655 xgifb_info->video_cmap_len = 16;
d7636e0b 656 break;
b654f878 657 case 32:
d7636e0b 658 var->red.offset = 16;
659 var->red.length = 8;
660 var->green.offset = 8;
661 var->green.length = 8;
662 var->blue.offset = 0;
663 var->blue.length = 8;
664 var->transp.offset = 24;
665 var->transp.length = 8;
fd26d420 666 xgifb_info->video_cmap_len = 16;
d7636e0b 667 break;
668 }
669}
670
c4fa7dfe 671/* --------------------- SetMode routines ------------------------- */
d7636e0b 672
fd26d420 673static void XGIfb_pre_setmode(struct xgifb_video_info *xgifb_info)
c4fa7dfe
AK		 674{
675 u8 cr30 = 0, cr31 = 0;
d7636e0b 676
c4fa7dfe
AK		 677 cr31 = xgifb_reg_get(XGICR, 0x31);
678 cr31 &= ~0x60;
d7636e0b 679
289ea524
AK		 680 switch (xgifb_info->display2) {
681 case XGIFB_DISP_CRT:
fc39dcb7
PH		 682 cr30 = (SIS_VB_OUTPUT_CRT2 | SIS_SIMULTANEOUS_VIEW_ENABLE);
683 cr31 |= SIS_DRIVER_MODE;
c4fa7dfe 684 break;
289ea524 685 case XGIFB_DISP_LCD:
fc39dcb7
PH		 686 cr30 = (SIS_VB_OUTPUT_LCD | SIS_SIMULTANEOUS_VIEW_ENABLE);
687 cr31 |= SIS_DRIVER_MODE;
c4fa7dfe 688 break;
289ea524 689 case XGIFB_DISP_TV:
fd26d420 690 if (xgifb_info->TV_type == TVMODE_HIVISION)
fc39dcb7
PH		 691 cr30 = (SIS_VB_OUTPUT_HIVISION
692 | SIS_SIMULTANEOUS_VIEW_ENABLE);
fd26d420 693 else if (xgifb_info->TV_plug == TVPLUG_SVIDEO)
fc39dcb7
PH		 694 cr30 = (SIS_VB_OUTPUT_SVIDEO
695 | SIS_SIMULTANEOUS_VIEW_ENABLE);
fd26d420 696 else if (xgifb_info->TV_plug == TVPLUG_COMPOSITE)
fc39dcb7
PH		 697 cr30 = (SIS_VB_OUTPUT_COMPOSITE
698 | SIS_SIMULTANEOUS_VIEW_ENABLE);
fd26d420 699 else if (xgifb_info->TV_plug == TVPLUG_SCART)
fc39dcb7
PH		 700 cr30 = (SIS_VB_OUTPUT_SCART
701 | SIS_SIMULTANEOUS_VIEW_ENABLE);
702 cr31 |= SIS_DRIVER_MODE;
d7636e0b 703
fd26d420 704 if (XGIfb_tvmode == 1 || xgifb_info->TV_type == TVMODE_PAL)
c4fa7dfe
AK		 705 cr31 |= 0x01;
706 else
707 cr31 &= ~0x01;
708 break;
709 default: /* disable CRT2 */
710 cr30 = 0x00;
fc39dcb7 711 cr31 |= (SIS_DRIVER_MODE | SIS_VB_OUTPUT_DISABLE);
d7636e0b 712 }
713
c4fa7dfe
AK		 714 xgifb_reg_set(XGICR, IND_XGI_SCRATCH_REG_CR30, cr30);
715 xgifb_reg_set(XGICR, IND_XGI_SCRATCH_REG_CR31, cr31);
5aa55d9f
AK		 716 xgifb_reg_set(XGICR, IND_XGI_SCRATCH_REG_CR33,
717 (xgifb_info->rate_idx & 0x0F));
c4fa7dfe 718}
d7636e0b 719
fd26d420 720static void XGIfb_post_setmode(struct xgifb_video_info *xgifb_info)
c4fa7dfe
AK		 721{
722 u8 reg;
723 unsigned char doit = 1;
949eb0ae 724
fd26d420 725 if (xgifb_info->video_bpp == 8) {
949eb0ae
MG		 726 /*
727 * We can't switch off CRT1 on LVDS/Chrontel
728 * in 8bpp Modes
729 */
fd26d420
AK		 730 if ((xgifb_info->hasVB == HASVB_LVDS) ||
731 (xgifb_info->hasVB == HASVB_LVDS_CHRONTEL)) {
c4fa7dfe
AK		 732 doit = 0;
733 }
949eb0ae
MG		 734 /*
735 * We can't switch off CRT1 on 301B-DH
736 * in 8bpp Modes if using LCD
737 */
289ea524 738 if (xgifb_info->display2 == XGIFB_DISP_LCD)
c4fa7dfe 739 doit = 0;
d7636e0b 740 }
741
949eb0ae 742 /* We can't switch off CRT1 if bridge is in slave mode */
fd26d420 743 if (xgifb_info->hasVB != HASVB_NONE) {
c4fa7dfe 744 reg = xgifb_reg_get(XGIPART1, 0x00);
d7636e0b 745
c4fa7dfe
AK		 746 if ((reg & 0x50) == 0x10)
747 doit = 0;
d7636e0b 748
c4fa7dfe
AK		 749 } else {
750 XGIfb_crt1off = 0;
d7636e0b 751 }
752
c4fa7dfe
AK		 753 reg = xgifb_reg_get(XGICR, 0x17);
754 if ((XGIfb_crt1off) && (doit))
755 reg &= ~0x80;
d7636e0b 756 else
c4fa7dfe
AK		 757 reg |= 0x80;
758 xgifb_reg_set(XGICR, 0x17, reg);
d7636e0b 759
fc39dcb7 760 xgifb_reg_and(XGISR, IND_SIS_RAMDAC_CONTROL, ~0x04);
d7636e0b 761
289ea524
AK		 762 if (xgifb_info->display2 == XGIFB_DISP_TV &&
763 xgifb_info->hasVB == HASVB_301) {
d7636e0b 764
c4fa7dfe 765 reg = xgifb_reg_get(XGIPART4, 0x01);
d7636e0b 766
c4fa7dfe 767 if (reg < 0xB0) { /* Set filter for XGI301 */
84a6c46e
AK		 768 int filter_tb;
769
fd26d420 770 switch (xgifb_info->video_width) {
c4fa7dfe 771 case 320:
fd26d420 772 filter_tb = (xgifb_info->TV_type ==
a12c27c5 773 TVMODE_NTSC) ? 4 : 12;
c4fa7dfe
AK		 774 break;
775 case 640:
fd26d420 776 filter_tb = (xgifb_info->TV_type ==
a12c27c5 777 TVMODE_NTSC) ? 5 : 13;
c4fa7dfe
AK		 778 break;
779 case 720:
fd26d420 780 filter_tb = (xgifb_info->TV_type ==
a12c27c5 781 TVMODE_NTSC) ? 6 : 14;
c4fa7dfe
AK		 782 break;
783 case 800:
fd26d420 784 filter_tb = (xgifb_info->TV_type ==
a12c27c5 785 TVMODE_NTSC) ? 7 : 15;
c4fa7dfe
AK		 786 break;
787 default:
84a6c46e 788 filter_tb = 0;
c4fa7dfe
AK		 789 filter = -1;
790 break;
791 }
39f10bf1 792 xgifb_reg_or(XGIPART1,
fc39dcb7 793 SIS_CRT2_WENABLE_315,
39f10bf1 794 0x01);
d7636e0b 795
fd26d420 796 if (xgifb_info->TV_type == TVMODE_NTSC) {
d7636e0b 797
c4fa7dfe 798 xgifb_reg_and(XGIPART2, 0x3a, 0x1f);
d7636e0b 799
fd26d420 800 if (xgifb_info->TV_plug == TVPLUG_SVIDEO) {
c4fa7dfe
AK		 801
802 xgifb_reg_and(XGIPART2, 0x30, 0xdf);
803
fd26d420 804 } else if (xgifb_info->TV_plug
c4fa7dfe
AK		 805 == TVPLUG_COMPOSITE) {
806
807 xgifb_reg_or(XGIPART2, 0x30, 0x20);
808
fd26d420 809 switch (xgifb_info->video_width) {
c4fa7dfe 810 case 640:
a12c27c5
KT		 811 xgifb_reg_set(XGIPART2,
812 0x35,
813 0xEB);
814 xgifb_reg_set(XGIPART2,
815 0x36,
816 0x04);
817 xgifb_reg_set(XGIPART2,
818 0x37,
819 0x25);
820 xgifb_reg_set(XGIPART2,
821 0x38,
822 0x18);
c4fa7dfe
AK		 823 break;
824 case 720:
a12c27c5
KT		 825 xgifb_reg_set(XGIPART2,
826 0x35,
827 0xEE);
828 xgifb_reg_set(XGIPART2,
829 0x36,
830 0x0C);
831 xgifb_reg_set(XGIPART2,
832 0x37,
833 0x22);
834 xgifb_reg_set(XGIPART2,
835 0x38,
836 0x08);
c4fa7dfe
AK		 837 break;
838 case 800:
a12c27c5
KT		 839 xgifb_reg_set(XGIPART2,
840 0x35,
841 0xEB);
842 xgifb_reg_set(XGIPART2,
843 0x36,
844 0x15);
845 xgifb_reg_set(XGIPART2,
846 0x37,
847 0x25);
848 xgifb_reg_set(XGIPART2,
849 0x38,
850 0xF6);
c4fa7dfe
AK		 851 break;
852 }
853 }
854
fd26d420 855 } else if (xgifb_info->TV_type == TVMODE_PAL) {
c4fa7dfe
AK		 856
857 xgifb_reg_and(XGIPART2, 0x3A, 0x1F);
858
fd26d420 859 if (xgifb_info->TV_plug == TVPLUG_SVIDEO) {
c4fa7dfe
AK		 860
861 xgifb_reg_and(XGIPART2, 0x30, 0xDF);
862
fd26d420 863 } else if (xgifb_info->TV_plug
c4fa7dfe
AK		 864 == TVPLUG_COMPOSITE) {
865
866 xgifb_reg_or(XGIPART2, 0x30, 0x20);
867
fd26d420 868 switch (xgifb_info->video_width) {
c4fa7dfe 869 case 640:
a12c27c5
KT		 870 xgifb_reg_set(XGIPART2,
871 0x35,
872 0xF1);
873 xgifb_reg_set(XGIPART2,
874 0x36,
875 0xF7);
876 xgifb_reg_set(XGIPART2,
877 0x37,
878 0x1F);
879 xgifb_reg_set(XGIPART2,
880 0x38,
881 0x32);
c4fa7dfe
AK		 882 break;
883 case 720:
a12c27c5
KT		 884 xgifb_reg_set(XGIPART2,
885 0x35,
886 0xF3);
887 xgifb_reg_set(XGIPART2,
888 0x36,
889 0x00);
890 xgifb_reg_set(XGIPART2,
891 0x37,
892 0x1D);
893 xgifb_reg_set(XGIPART2,
894 0x38,
895 0x20);
c4fa7dfe
AK		 896 break;
897 case 800:
a12c27c5
KT		 898 xgifb_reg_set(XGIPART2,
899 0x35,
900 0xFC);
901 xgifb_reg_set(XGIPART2,
902 0x36,
903 0xFB);
904 xgifb_reg_set(XGIPART2,
905 0x37,
906 0x14);
907 xgifb_reg_set(XGIPART2,
908 0x38,
909 0x2A);
c4fa7dfe
AK		 910 break;
911 }
912 }
913 }
914
915 if ((filter >= 0) && (filter <= 7)) {
977310bb 916 pr_debug("FilterTable[%d]-%d: %*ph\n",
d56b4c3d 917 filter_tb, filter,
977310bb
AS		 918 4, XGI_TV_filter[filter_tb].
919 filter[filter]);
c4fa7dfe 920 xgifb_reg_set(
a12c27c5
KT		 921 XGIPART2,
922 0x35,
923 (XGI_TV_filter[filter_tb].
924 filter[filter][0]));
c4fa7dfe 925 xgifb_reg_set(
a12c27c5
KT		 926 XGIPART2,
927 0x36,
928 (XGI_TV_filter[filter_tb].
929 filter[filter][1]));
c4fa7dfe 930 xgifb_reg_set(
a12c27c5
KT		 931 XGIPART2,
932 0x37,
933 (XGI_TV_filter[filter_tb].
934 filter[filter][2]));
c4fa7dfe 935 xgifb_reg_set(
a12c27c5
KT		 936 XGIPART2,
937 0x38,
938 (XGI_TV_filter[filter_tb].
939 filter[filter][3]));
c4fa7dfe 940 }
c4fa7dfe 941 }
c4fa7dfe 942 }
c4fa7dfe
AK		 943}
944
945static int XGIfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
946 struct fb_info *info)
947{
fd26d420
AK		 948 struct xgifb_video_info *xgifb_info = info->par;
949 struct xgi_hw_device_info *hw_info = &xgifb_info->hw_info;
c4fa7dfe
AK		 950 unsigned int htotal = var->left_margin + var->xres + var->right_margin
951 + var->hsync_len;
952 unsigned int vtotal = var->upper_margin + var->yres + var->lower_margin
953 + var->vsync_len;
954#if defined(__powerpc__)
ef23b210 955 u8 cr_data;
c4fa7dfe
AK		 956#endif
957 unsigned int drate = 0, hrate = 0;
958 int found_mode = 0;
959 int old_mode;
c4fa7dfe 960
c4fa7dfe
AK		 961 info->var.xres_virtual = var->xres_virtual;
962 info->var.yres_virtual = var->yres_virtual;
963 info->var.bits_per_pixel = var->bits_per_pixel;
964
965 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED)
966 vtotal <<= 1;
967 else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
968 vtotal <<= 2;
c4fa7dfe
AK		 969
970 if (!htotal || !vtotal) {
be25aef0 971 pr_debug("Invalid 'var' information\n");
c4fa7dfe 972 return -EINVAL;
4a6b1518 973 } pr_debug("var->pixclock=%d, htotal=%d, vtotal=%d\n",
c4fa7dfe
AK		 974 var->pixclock, htotal, vtotal);
975
976 if (var->pixclock && htotal && vtotal) {
977 drate = 1000000000 / var->pixclock;
978 hrate = (drate * 1000) / htotal;
fd26d420 979 xgifb_info->refresh_rate = (unsigned int) (hrate * 2
c4fa7dfe
AK		 980 / vtotal);
981 } else {
fd26d420 982 xgifb_info->refresh_rate = 60;
c4fa7dfe
AK		 983 }
984
4a6b1518 985 pr_debug("Change mode to %dx%dx%d-%dHz\n",
a12c27c5
KT		 986 var->xres,
987 var->yres,
988 var->bits_per_pixel,
fd26d420 989 xgifb_info->refresh_rate);
c4fa7dfe 990
ccf265ad
AK		 991 old_mode = xgifb_info->mode_idx;
992 xgifb_info->mode_idx = 0;
c4fa7dfe 993
ccf265ad
AK		 994 while ((XGIbios_mode[xgifb_info->mode_idx].mode_no != 0) &&
995 (XGIbios_mode[xgifb_info->mode_idx].xres <= var->xres)) {
996 if ((XGIbios_mode[xgifb_info->mode_idx].xres == var->xres) &&
997 (XGIbios_mode[xgifb_info->mode_idx].yres == var->yres) &&
998 (XGIbios_mode[xgifb_info->mode_idx].bpp
c4fa7dfe 999 == var->bits_per_pixel)) {
c4fa7dfe
AK		 1000 found_mode = 1;
1001 break;
1002 }
ccf265ad 1003 xgifb_info->mode_idx++;
c4fa7dfe
AK		 1004 }
1005
1006 if (found_mode)
ccf265ad
AK		 1007 xgifb_info->mode_idx = XGIfb_validate_mode(xgifb_info,
1008 xgifb_info->mode_idx);
c4fa7dfe 1009 else
ccf265ad 1010 xgifb_info->mode_idx = -1;
c4fa7dfe 1011
ccf265ad 1012 if (xgifb_info->mode_idx < 0) {
4a6b1518 1013 pr_err("Mode %dx%dx%d not supported\n",
a12c27c5 1014 var->xres, var->yres, var->bits_per_pixel);
ccf265ad 1015 xgifb_info->mode_idx = old_mode;
c4fa7dfe
AK		 1016 return -EINVAL;
1017 }
1018
fd26d420
AK		 1019 if (XGIfb_search_refresh_rate(xgifb_info,
1020 xgifb_info->refresh_rate) == 0) {
f47f12d6 1021 xgifb_info->rate_idx = 1;
fd26d420 1022 xgifb_info->refresh_rate = 60;
c4fa7dfe
AK		 1023 }
1024
1025 if (isactive) {
1026
fd26d420 1027 XGIfb_pre_setmode(xgifb_info);
fab04b97 1028 if (XGISetModeNew(xgifb_info, hw_info,
ccf265ad
AK		 1029 XGIbios_mode[xgifb_info->mode_idx].mode_no)
1030 == 0) {
4a6b1518 1031 pr_err("Setting mode[0x%x] failed\n",
ccf265ad 1032 XGIbios_mode[xgifb_info->mode_idx].mode_no);
c4fa7dfe
AK		 1033 return -EINVAL;
1034 }
1035 info->fix.line_length = ((info->var.xres_virtual
1036 * info->var.bits_per_pixel) >> 6);
1037
fc39dcb7 1038 xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
c4fa7dfe
AK		 1039
1040 xgifb_reg_set(XGICR, 0x13, (info->fix.line_length & 0x00ff));
a12c27c5
KT		 1041 xgifb_reg_set(XGISR,
1042 0x0E,
1043 (info->fix.line_length & 0xff00) >> 8);
c4fa7dfe 1044
fd26d420 1045 XGIfb_post_setmode(xgifb_info);
c4fa7dfe 1046
be25aef0 1047 pr_debug("Set new mode: %dx%dx%d-%d\n",
d56b4c3d
MG		 1048 XGIbios_mode[xgifb_info->mode_idx].xres,
1049 XGIbios_mode[xgifb_info->mode_idx].yres,
1050 XGIbios_mode[xgifb_info->mode_idx].bpp,
1051 xgifb_info->refresh_rate);
fd26d420 1052
ccf265ad 1053 xgifb_info->video_bpp = XGIbios_mode[xgifb_info->mode_idx].bpp;
fd26d420 1054 xgifb_info->video_vwidth = info->var.xres_virtual;
ccf265ad
AK		 1055 xgifb_info->video_width =
1056 XGIbios_mode[xgifb_info->mode_idx].xres;
fd26d420 1057 xgifb_info->video_vheight = info->var.yres_virtual;
ccf265ad
AK		 1058 xgifb_info->video_height =
1059 XGIbios_mode[xgifb_info->mode_idx].yres;
fd26d420
AK		 1060 xgifb_info->org_x = xgifb_info->org_y = 0;
1061 xgifb_info->video_linelength = info->var.xres_virtual
1062 * (xgifb_info->video_bpp >> 3);
1063 switch (xgifb_info->video_bpp) {
c4fa7dfe 1064 case 8:
fd26d420
AK		 1065 xgifb_info->DstColor = 0x0000;
1066 xgifb_info->XGI310_AccelDepth = 0x00000000;
1067 xgifb_info->video_cmap_len = 256;
c4fa7dfe
AK		 1068#if defined(__powerpc__)
1069 cr_data = xgifb_reg_get(XGICR, 0x4D);
1070 xgifb_reg_set(XGICR, 0x4D, (cr_data & 0xE0));
1071#endif
1072 break;
1073 case 16:
fd26d420
AK		 1074 xgifb_info->DstColor = 0x8000;
1075 xgifb_info->XGI310_AccelDepth = 0x00010000;
d7636e0b 1076#if defined(__powerpc__)
7e119b75 1077 cr_data = xgifb_reg_get(XGICR, 0x4D);
b6e2dc39 1078 xgifb_reg_set(XGICR, 0x4D, ((cr_data & 0xE0) | 0x0B));
d7636e0b 1079#endif
fd26d420 1080 xgifb_info->video_cmap_len = 16;
b654f878
PS		 1081 break;
1082 case 32:
fd26d420
AK		 1083 xgifb_info->DstColor = 0xC000;
1084 xgifb_info->XGI310_AccelDepth = 0x00020000;
1085 xgifb_info->video_cmap_len = 16;
d7636e0b 1086#if defined(__powerpc__)
7e119b75 1087 cr_data = xgifb_reg_get(XGICR, 0x4D);
b6e2dc39 1088 xgifb_reg_set(XGICR, 0x4D, ((cr_data & 0xE0) | 0x15));
d7636e0b 1089#endif
b654f878
PS		 1090 break;
1091 default:
fd26d420 1092 xgifb_info->video_cmap_len = 16;
be25aef0 1093 pr_err("Unsupported depth %d\n",
fd26d420 1094 xgifb_info->video_bpp);
b654f878
PS		 1095 break;
1096 }
d7636e0b 1097 }
fd26d420 1098 XGIfb_bpp_to_var(xgifb_info, var); /*update ARGB info*/
d7636e0b 1099
1100 dumpVGAReg();
1101 return 0;
1102}
1103
0d5c6ca3 1104static int XGIfb_pan_var(struct fb_var_screeninfo *var, struct fb_info *info)
d7636e0b 1105{
acff987d 1106 struct xgifb_video_info *xgifb_info = info->par;
d7636e0b 1107 unsigned int base;
1108
0d5c6ca3 1109 base = var->yoffset * info->var.xres_virtual + var->xoffset;
d7636e0b 1110
b654f878 1111 /* calculate base bpp dep. */
0d5c6ca3 1112 switch (info->var.bits_per_pixel) {
b654f878
PS		 1113 case 16:
1114 base >>= 1;
1115 break;
d7636e0b 1116 case 32:
b654f878 1117 break;
d7636e0b 1118 case 8:
b654f878
PS		 1119 default:
1120 base >>= 2;
1121 break;
1122 }
d7636e0b 1123
fc39dcb7 1124 xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
d7636e0b 1125
b6e2dc39
AK		 1126 xgifb_reg_set(XGICR, 0x0D, base & 0xFF);
1127 xgifb_reg_set(XGICR, 0x0C, (base >> 8) & 0xFF);
1128 xgifb_reg_set(XGISR, 0x0D, (base >> 16) & 0xFF);
1129 xgifb_reg_set(XGISR, 0x37, (base >> 24) & 0x03);
65283d42 1130 xgifb_reg_and_or(XGISR, 0x37, 0xDF, (base >> 21) & 0x04);
d7636e0b 1131
289ea524 1132 if (xgifb_info->display2 != XGIFB_DISP_NONE) {
fc39dcb7 1133 xgifb_reg_or(XGIPART1, SIS_CRT2_WENABLE_315, 0x01);
b6e2dc39
AK		 1134 xgifb_reg_set(XGIPART1, 0x06, (base & 0xFF));
1135 xgifb_reg_set(XGIPART1, 0x05, ((base >> 8) & 0xFF));
1136 xgifb_reg_set(XGIPART1, 0x04, ((base >> 16) & 0xFF));
a12c27c5
KT		 1137 xgifb_reg_and_or(XGIPART1,
1138 0x02,
1139 0x7F,
1140 ((base >> 24) & 0x01) << 7);
b654f878 1141 }
d7636e0b 1142 return 0;
1143}
d7636e0b 1144
d7636e0b 1145static int XGIfb_open(struct fb_info *info, int user)
1146{
b654f878 1147 return 0;
d7636e0b 1148}
1149
1150static int XGIfb_release(struct fb_info *info, int user)
1151{
b654f878 1152 return 0;
d7636e0b 1153}
1154
1155static int XGIfb_get_cmap_len(const struct fb_var_screeninfo *var)
1156{
1157 int rc = 16;
1158
b654f878 1159 switch (var->bits_per_pixel) {
d7636e0b 1160 case 8:
1161 rc = 256;
1162 break;
1163 case 16:
1164 rc = 16;
1165 break;
1166 case 32:
1167 rc = 16;
1168 break;
1169 }
1170 return rc;
1171}
1172
b654f878
PS		 1173static int XGIfb_setcolreg(unsigned regno, unsigned red, unsigned green,
1174 unsigned blue, unsigned transp, struct fb_info *info)
d7636e0b 1175{
fd26d420
AK		 1176 struct xgifb_video_info *xgifb_info = info->par;
1177
d7636e0b 1178 if (regno >= XGIfb_get_cmap_len(&info->var))
1179 return 1;
1180
1181 switch (info->var.bits_per_pixel) {
1182 case 8:
e3d5ceb0
AK		 1183 outb(regno, XGIDACA);
1184 outb((red >> 10), XGIDACD);
1185 outb((green >> 10), XGIDACD);
1186 outb((blue >> 10), XGIDACD);
289ea524 1187 if (xgifb_info->display2 != XGIFB_DISP_NONE) {
e3d5ceb0
AK		 1188 outb(regno, XGIDAC2A);
1189 outb((red >> 8), XGIDAC2D);
1190 outb((green >> 8), XGIDAC2D);
1191 outb((blue >> 8), XGIDAC2D);
d7636e0b 1192 }
1193 break;
1194 case 16:
b654f878
PS		 1195 ((u32 *) (info->pseudo_palette))[regno] = ((red & 0xf800))
1196 | ((green & 0xfc00) >> 5) | ((blue & 0xf800)
1197 >> 11);
d7636e0b 1198 break;
1199 case 32:
1200 red >>= 8;
1201 green >>= 8;
1202 blue >>= 8;
b654f878
PS		 1203 ((u32 *) (info->pseudo_palette))[regno] = (red << 16) | (green
1204 << 8) | (blue);
d7636e0b 1205 break;
1206 }
1207 return 0;
1208}
1209
c4fa7dfe
AK		 1210/* ----------- FBDev related routines for all series ---------- */
1211
1212static int XGIfb_get_fix(struct fb_fix_screeninfo *fix, int con,
1213 struct fb_info *info)
1214{
fd26d420
AK		 1215 struct xgifb_video_info *xgifb_info = info->par;
1216
c4fa7dfe
AK		 1217 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
1218
176f7842
PH		 1219 strncpy(fix->id, "XGI", sizeof(fix->id) - 1);
1220
95649c42
PH		 1221 /* if register_framebuffer has been called, we must lock */
1222 if (atomic_read(&info->count))
1223 mutex_lock(&info->mm_lock);
c4fa7dfe 1224
95649c42 1225 fix->smem_start = xgifb_info->video_base;
fd26d420 1226 fix->smem_len = xgifb_info->video_size;
c4fa7dfe 1227
95649c42
PH		 1228 /* if register_framebuffer has been called, we can unlock */
1229 if (atomic_read(&info->count))
1230 mutex_unlock(&info->mm_lock);
1231
de351ba6 1232 fix->type = FB_TYPE_PACKED_PIXELS;
c4fa7dfe 1233 fix->type_aux = 0;
fd26d420 1234 if (xgifb_info->video_bpp == 8)
c4fa7dfe
AK		 1235 fix->visual = FB_VISUAL_PSEUDOCOLOR;
1236 else
1237 fix->visual = FB_VISUAL_DIRECTCOLOR;
1238 fix->xpanstep = 0;
c4fa7dfe
AK		 1239 if (XGIfb_ypan)
1240 fix->ypanstep = 1;
c4fa7dfe 1241 fix->ywrapstep = 0;
fd26d420
AK		 1242 fix->line_length = xgifb_info->video_linelength;
1243 fix->mmio_start = xgifb_info->mmio_base;
1244 fix->mmio_len = xgifb_info->mmio_size;
fc39dcb7 1245 fix->accel = FB_ACCEL_SIS_XABRE;
c4fa7dfe 1246
c4fa7dfe
AK		 1247 return 0;
1248}
1249
d7636e0b 1250static int XGIfb_set_par(struct fb_info *info)
1251{
1252 int err;
1253
b654f878
PS		 1254 err = XGIfb_do_set_var(&info->var, 1, info);
1255 if (err)
d7636e0b 1256 return err;
d7636e0b 1257 XGIfb_get_fix(&info->fix, -1, info);
d7636e0b 1258 return 0;
1259}
1260
b654f878 1261static int XGIfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
d7636e0b 1262{
fd26d420 1263 struct xgifb_video_info *xgifb_info = info->par;
b654f878
PS		 1264 unsigned int htotal = var->left_margin + var->xres + var->right_margin
1265 + var->hsync_len;
d7636e0b 1266 unsigned int vtotal = 0;
1267 unsigned int drate = 0, hrate = 0;
1268 int found_mode = 0;
1269 int refresh_rate, search_idx;
1270
b654f878
PS		 1271 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) {
1272 vtotal = var->upper_margin + var->yres + var->lower_margin
1273 + var->vsync_len;
d7636e0b 1274 vtotal <<= 1;
b654f878
PS		 1275 } else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
1276 vtotal = var->upper_margin + var->yres + var->lower_margin
1277 + var->vsync_len;
d7636e0b 1278 vtotal <<= 2;
b654f878
PS		 1279 } else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
1280 vtotal = var->upper_margin + (var->yres / 2)
1281 + var->lower_margin + var->vsync_len;
1282 } else
1283 vtotal = var->upper_margin + var->yres + var->lower_margin
1284 + var->vsync_len;
d7636e0b 1285
47cee13d 1286 if (!(htotal) || !(vtotal)) {
be25aef0 1287 pr_debug("No valid timing data\n");
47cee13d
MG		 1288 return -EINVAL;
1289 }
d7636e0b 1290
b654f878
PS		 1291 if (var->pixclock && htotal && vtotal) {
1292 drate = 1000000000 / var->pixclock;
1293 hrate = (drate * 1000) / htotal;
fd26d420 1294 xgifb_info->refresh_rate =
a12c27c5 1295 (unsigned int) (hrate * 2 / vtotal);
4a6b1518 1296 pr_debug(
b654f878
PS		 1297 "%s: pixclock = %d ,htotal=%d, vtotal=%d\n"
1298 "%s: drate=%d, hrate=%d, refresh_rate=%d\n",
1299 __func__, var->pixclock, htotal, vtotal,
fd26d420 1300 __func__, drate, hrate, xgifb_info->refresh_rate);
b654f878 1301 } else {
fd26d420 1302 xgifb_info->refresh_rate = 60;
b654f878 1303 }
d7636e0b 1304
949eb0ae 1305 /* Calculation wrong for 1024x600 - force it to 60Hz */
b654f878
PS		 1306 if ((var->xres == 1024) && (var->yres == 600))
1307 refresh_rate = 60;
d7636e0b 1308
1309 search_idx = 0;
b654f878
PS		 1310 while ((XGIbios_mode[search_idx].mode_no != 0) &&
1311 (XGIbios_mode[search_idx].xres <= var->xres)) {
1312 if ((XGIbios_mode[search_idx].xres == var->xres) &&
1313 (XGIbios_mode[search_idx].yres == var->yres) &&
1314 (XGIbios_mode[search_idx].bpp == var->bits_per_pixel)) {
fd26d420 1315 if (XGIfb_validate_mode(xgifb_info, search_idx) > 0) {
b654f878
PS		 1316 found_mode = 1;
1317 break;
1318 }
1319 }
d7636e0b 1320 search_idx++;
1321 }
1322
b654f878 1323 if (!found_mode) {
d7636e0b 1324
4a6b1518 1325 pr_err("%dx%dx%d is no valid mode\n",
d7636e0b 1326 var->xres, var->yres, var->bits_per_pixel);
b654f878
PS		 1327 search_idx = 0;
1328 while (XGIbios_mode[search_idx].mode_no != 0) {
b654f878 1329 if ((var->xres <= XGIbios_mode[search_idx].xres) &&
a12c27c5
KT		 1330 (var->yres <= XGIbios_mode[search_idx].yres) &&
1331 (var->bits_per_pixel ==
1332 XGIbios_mode[search_idx].bpp)) {
fd26d420
AK		 1333 if (XGIfb_validate_mode(xgifb_info,
1334 search_idx) > 0) {
b654f878
PS		 1335 found_mode = 1;
1336 break;
1337 }
1338 }
1339 search_idx++;
1340 }
1341 if (found_mode) {
d7636e0b 1342 var->xres = XGIbios_mode[search_idx].xres;
b654f878 1343 var->yres = XGIbios_mode[search_idx].yres;
4a6b1518 1344 pr_debug("Adapted to mode %dx%dx%d\n",
b654f878 1345 var->xres, var->yres, var->bits_per_pixel);
d7636e0b 1346
1347 } else {
4a6b1518 1348 pr_err("Failed to find similar mode to %dx%dx%d\n",
d7636e0b 1349 var->xres, var->yres, var->bits_per_pixel);
b654f878 1350 return -EINVAL;
d7636e0b 1351 }
1352 }
1353
d7636e0b 1354 /* Adapt RGB settings */
fd26d420 1355 XGIfb_bpp_to_var(xgifb_info, var);
d7636e0b 1356
1357 /* Sanity check for offsets */
1358 if (var->xoffset < 0)
1359 var->xoffset = 0;
1360 if (var->yoffset < 0)
1361 var->yoffset = 0;
1362
b654f878
PS		 1363 if (!XGIfb_ypan) {
1364 if (var->xres != var->xres_virtual)
1365 var->xres_virtual = var->xres;
1366 if (var->yres != var->yres_virtual)
d7636e0b 1367 var->yres_virtual = var->yres;
949eb0ae 1368 }
d7636e0b 1369
1370 /* Truncate offsets to maximum if too high */
1371 if (var->xoffset > var->xres_virtual - var->xres)
1372 var->xoffset = var->xres_virtual - var->xres - 1;
1373
1374 if (var->yoffset > var->yres_virtual - var->yres)
1375 var->yoffset = var->yres_virtual - var->yres - 1;
1376
1377 /* Set everything else to 0 */
1378 var->red.msb_right =
b654f878
PS		 1379 var->green.msb_right =
1380 var->blue.msb_right =
1381 var->transp.offset = var->transp.length = var->transp.msb_right = 0;
d7636e0b 1382
d7636e0b 1383 return 0;
1384}
1385
b654f878
PS		 1386static int XGIfb_pan_display(struct fb_var_screeninfo *var,
1387 struct fb_info *info)
d7636e0b 1388{
1389 int err;
1390
0d5c6ca3 1391 if (var->xoffset > (info->var.xres_virtual - info->var.xres))
d7636e0b 1392 return -EINVAL;
0d5c6ca3 1393 if (var->yoffset > (info->var.yres_virtual - info->var.yres))
d7636e0b 1394 return -EINVAL;
1395
1396 if (var->vmode & FB_VMODE_YWRAP) {
b654f878
PS		 1397 if (var->yoffset < 0 || var->yoffset >= info->var.yres_virtual
1398 || var->xoffset)
1399 return -EINVAL;
d3ae5762 1400 } else if (var->xoffset + info->var.xres > info->var.xres_virtual
b654f878 1401 || var->yoffset + info->var.yres
d3ae5762
AK		 1402 > info->var.yres_virtual) {
1403 return -EINVAL;
d7636e0b 1404 }
0d5c6ca3 1405 err = XGIfb_pan_var(var, info);
b654f878
PS		 1406 if (err < 0)
1407 return err;
d7636e0b 1408
1409 info->var.xoffset = var->xoffset;
1410 info->var.yoffset = var->yoffset;
1411 if (var->vmode & FB_VMODE_YWRAP)
1412 info->var.vmode |= FB_VMODE_YWRAP;
1413 else
1414 info->var.vmode &= ~FB_VMODE_YWRAP;
1415
d7636e0b 1416 return 0;
1417}
d7636e0b 1418
d7636e0b 1419static int XGIfb_blank(int blank, struct fb_info *info)
1420{
f2df8c09 1421 struct xgifb_video_info *xgifb_info = info->par;
d7636e0b 1422 u8 reg;
1423
7e119b75 1424 reg = xgifb_reg_get(XGICR, 0x17);
d7636e0b 1425
b654f878 1426 if (blank > 0)
d7636e0b 1427 reg &= 0x7f;
1428 else
1429 reg |= 0x80;
1430
b6e2dc39
AK		 1431 xgifb_reg_set(XGICR, 0x17, reg);
1432 xgifb_reg_set(XGISR, 0x00, 0x01); /* Synchronous Reset */
1433 xgifb_reg_set(XGISR, 0x00, 0x03); /* End Reset */
b654f878 1434 return 0;
d7636e0b 1435}
1436
d7636e0b 1437static struct fb_ops XGIfb_ops = {
b654f878
PS		 1438 .owner = THIS_MODULE,
1439 .fb_open = XGIfb_open,
1440 .fb_release = XGIfb_release,
d7636e0b 1441 .fb_check_var = XGIfb_check_var,
b654f878 1442 .fb_set_par = XGIfb_set_par,
d7636e0b 1443 .fb_setcolreg = XGIfb_setcolreg,
b654f878 1444 .fb_pan_display = XGIfb_pan_display,
b654f878 1445 .fb_blank = XGIfb_blank,
1b402967 1446 .fb_fillrect = cfb_fillrect,
85c3c562 1447 .fb_copyarea = cfb_copyarea,
d7636e0b 1448 .fb_imageblit = cfb_imageblit,
d7636e0b 1449};
1450
1451/* ---------------- Chip generation dependent routines ---------------- */
1452
d7636e0b 1453/* for XGI 315/550/650/740/330 */
1454
fd26d420 1455static int XGIfb_get_dram_size(struct xgifb_video_info *xgifb_info)
d7636e0b 1456{
1457
b654f878
PS		 1458 u8 ChannelNum, tmp;
1459 u8 reg = 0;
d7636e0b 1460
1461 /* xorg driver sets 32MB * 1 channel */
fd26d420 1462 if (xgifb_info->chip == XG27)
fc39dcb7 1463 xgifb_reg_set(XGISR, IND_SIS_DRAM_SIZE, 0x51);
d7636e0b 1464
fc39dcb7 1465 reg = xgifb_reg_get(XGISR, IND_SIS_DRAM_SIZE);
b654f878
PS		 1466 switch ((reg & XGI_DRAM_SIZE_MASK) >> 4) {
1467 case XGI_DRAM_SIZE_1MB:
fd26d420 1468 xgifb_info->video_size = 0x100000;
b654f878
PS		 1469 break;
1470 case XGI_DRAM_SIZE_2MB:
fd26d420 1471 xgifb_info->video_size = 0x200000;
b654f878
PS		 1472 break;
1473 case XGI_DRAM_SIZE_4MB:
fd26d420 1474 xgifb_info->video_size = 0x400000;
b654f878
PS		 1475 break;
1476 case XGI_DRAM_SIZE_8MB:
fd26d420 1477 xgifb_info->video_size = 0x800000;
b654f878
PS		 1478 break;
1479 case XGI_DRAM_SIZE_16MB:
fd26d420 1480 xgifb_info->video_size = 0x1000000;
b654f878
PS		 1481 break;
1482 case XGI_DRAM_SIZE_32MB:
fd26d420 1483 xgifb_info->video_size = 0x2000000;
b654f878
PS		 1484 break;
1485 case XGI_DRAM_SIZE_64MB:
fd26d420 1486 xgifb_info->video_size = 0x4000000;
b654f878
PS		 1487 break;
1488 case XGI_DRAM_SIZE_128MB:
fd26d420 1489 xgifb_info->video_size = 0x8000000;
b654f878
PS		 1490 break;
1491 case XGI_DRAM_SIZE_256MB:
fd26d420 1492 xgifb_info->video_size = 0x10000000;
b654f878
PS		 1493 break;
1494 default:
1495 return -1;
1496 }
d7636e0b 1497
b654f878 1498 tmp = (reg & 0x0c) >> 2;
fd26d420 1499 switch (xgifb_info->chip) {
b654f878
PS		 1500 case XG20:
1501 case XG21:
1502 case XG27:
1503 ChannelNum = 1;
1504 break;
d7636e0b 1505
b654f878
PS		 1506 case XG42:
1507 if (reg & 0x04)
1508 ChannelNum = 2;
1509 else
1510 ChannelNum = 1;
1511 break;
d7636e0b 1512
b654f878
PS		 1513 case XG40:
1514 default:
1515 if (tmp == 2)
1516 ChannelNum = 2;
1517 else if (tmp == 3)
1518 ChannelNum = 3;
1519 else
1520 ChannelNum = 1;
1521 break;
1522 }
1523
fd26d420 1524 xgifb_info->video_size = xgifb_info->video_size * ChannelNum;
b654f878 1525
4a6b1518 1526 pr_info("SR14=%x DramSzie %x ChannelNum %x\n",
a12c27c5 1527 reg,
fd26d420 1528 xgifb_info->video_size, ChannelNum);
b654f878 1529 return 0;
d7636e0b 1530
1531}
1532
fd26d420 1533static void XGIfb_detect_VB(struct xgifb_video_info *xgifb_info)
d7636e0b 1534{
b654f878 1535 u8 cr32, temp = 0;
d7636e0b 1536
fd26d420 1537 xgifb_info->TV_plug = xgifb_info->TV_type = 0;
d7636e0b 1538
7e119b75 1539 cr32 = xgifb_reg_get(XGICR, IND_XGI_SCRATCH_REG_CR32);
d7636e0b 1540
fc39dcb7 1541 if ((cr32 & SIS_CRT1) && !XGIfb_crt1off)
d7636e0b 1542 XGIfb_crt1off = 0;
1543 else {
1544 if (cr32 & 0x5F)
1545 XGIfb_crt1off = 1;
1546 else
1547 XGIfb_crt1off = 0;
1548 }
1549
25aa75f1 1550 if (!xgifb_info->display2_force) {
fc39dcb7 1551 if (cr32 & SIS_VB_TV)
25aa75f1 1552 xgifb_info->display2 = XGIFB_DISP_TV;
fc39dcb7 1553 else if (cr32 & SIS_VB_LCD)
25aa75f1 1554 xgifb_info->display2 = XGIFB_DISP_LCD;
fc39dcb7 1555 else if (cr32 & SIS_VB_CRT2)
25aa75f1
AK		 1556 xgifb_info->display2 = XGIFB_DISP_CRT;
1557 else
1558 xgifb_info->display2 = XGIFB_DISP_NONE;
1559 }
d7636e0b 1560
b654f878 1561 if (XGIfb_tvplug != -1)
949eb0ae 1562 /* Override with option */
fd26d420 1563 xgifb_info->TV_plug = XGIfb_tvplug;
fc39dcb7 1564 else if (cr32 & SIS_VB_HIVISION) {
fd26d420
AK		 1565 xgifb_info->TV_type = TVMODE_HIVISION;
1566 xgifb_info->TV_plug = TVPLUG_SVIDEO;
fc39dcb7 1567 } else if (cr32 & SIS_VB_SVIDEO)
fd26d420 1568 xgifb_info->TV_plug = TVPLUG_SVIDEO;
fc39dcb7 1569 else if (cr32 & SIS_VB_COMPOSITE)
fd26d420 1570 xgifb_info->TV_plug = TVPLUG_COMPOSITE;
fc39dcb7 1571 else if (cr32 & SIS_VB_SCART)
fd26d420 1572 xgifb_info->TV_plug = TVPLUG_SCART;
d7636e0b 1573
fd26d420 1574 if (xgifb_info->TV_type == 0) {
7e119b75 1575 temp = xgifb_reg_get(XGICR, 0x38);
ebe7846d 1576 if (temp & 0x10)
fd26d420 1577 xgifb_info->TV_type = TVMODE_PAL;
ebe7846d 1578 else
fd26d420 1579 xgifb_info->TV_type = TVMODE_NTSC;
d7636e0b 1580 }
1581
949eb0ae 1582 /* Copy forceCRT1 option to CRT1off if option is given */
b654f878
PS		 1583 if (XGIfb_forcecrt1 != -1) {
1584 if (XGIfb_forcecrt1)
1585 XGIfb_crt1off = 0;
1586 else
1587 XGIfb_crt1off = 1;
1588 }
d7636e0b 1589}
1590
fd26d420 1591static int XGIfb_has_VB(struct xgifb_video_info *xgifb_info)
d7636e0b 1592{
1593 u8 vb_chipid;
1594
7e119b75 1595 vb_chipid = xgifb_reg_get(XGIPART4, 0x00);
d7636e0b 1596 switch (vb_chipid) {
b654f878 1597 case 0x01:
fd26d420 1598 xgifb_info->hasVB = HASVB_301;
d7636e0b 1599 break;
b654f878 1600 case 0x02:
fd26d420 1601 xgifb_info->hasVB = HASVB_302;
d7636e0b 1602 break;
b654f878 1603 default:
fd26d420 1604 xgifb_info->hasVB = HASVB_NONE;
dda08c59 1605 return 0;
d7636e0b 1606 }
dda08c59 1607 return 1;
d7636e0b 1608}
1609
fd26d420 1610static void XGIfb_get_VB_type(struct xgifb_video_info *xgifb_info)
c4fa7dfe
AK		 1611{
1612 u8 reg;
1613
fd26d420 1614 if (!XGIfb_has_VB(xgifb_info)) {
c4fa7dfe 1615 reg = xgifb_reg_get(XGICR, IND_XGI_SCRATCH_REG_CR37);
fc39dcb7
PH		 1616 switch ((reg & SIS_EXTERNAL_CHIP_MASK) >> 1) {
1617 case SIS_EXTERNAL_CHIP_LVDS:
fd26d420 1618 xgifb_info->hasVB = HASVB_LVDS;
c4fa7dfe 1619 break;
fc39dcb7 1620 case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL:
fd26d420 1621 xgifb_info->hasVB = HASVB_LVDS_CHRONTEL;
c4fa7dfe
AK		 1622 break;
1623 default:
1624 break;
1625 }
1626 }
1627}
1628
d27c6bc9
AK		 1629static int __init xgifb_optval(char *fullopt, int validx)
1630{
1631 unsigned long lres;
1632
1633 if (kstrtoul(fullopt + validx, 0, &lres) < 0 || lres > INT_MAX) {
be25aef0 1634 pr_err("Invalid value for option: %s\n", fullopt);
d27c6bc9
AK		 1635 return 0;
1636 }
1637 return lres;
1638}
1639
032abf7b 1640static int __init XGIfb_setup(char *options)
d7636e0b 1641{
1642 char *this_opt;
1643
d7636e0b 1644 if (!options || !*options)
1645 return 0;
1646
be25aef0 1647 pr_info("Options: %s\n", options);
79bea04c 1648
b654f878 1649 while ((this_opt = strsep(&options, ",")) != NULL) {
d7636e0b 1650
b654f878
PS		 1651 if (!*this_opt)
1652 continue;
d7636e0b 1653
1654 if (!strncmp(this_opt, "mode:", 5)) {
dfbdf805 1655 mode = this_opt + 5;
d7636e0b 1656 } else if (!strncmp(this_opt, "vesa:", 5)) {
dfbdf805 1657 vesa = xgifb_optval(this_opt, 5);
d7636e0b 1658 } else if (!strncmp(this_opt, "vrate:", 6)) {
7548a83e 1659 refresh_rate = xgifb_optval(this_opt, 6);
d7636e0b 1660 } else if (!strncmp(this_opt, "rate:", 5)) {
7548a83e 1661 refresh_rate = xgifb_optval(this_opt, 5);
d7636e0b 1662 } else if (!strncmp(this_opt, "crt1off", 7)) {
1663 XGIfb_crt1off = 1;
1664 } else if (!strncmp(this_opt, "filter:", 7)) {
d27c6bc9 1665 filter = xgifb_optval(this_opt, 7);
d7636e0b 1666 } else if (!strncmp(this_opt, "forcecrt2type:", 14)) {
1667 XGIfb_search_crt2type(this_opt + 14);
1668 } else if (!strncmp(this_opt, "forcecrt1:", 10)) {
d27c6bc9 1669 XGIfb_forcecrt1 = xgifb_optval(this_opt, 10);
b654f878
PS		 1670 } else if (!strncmp(this_opt, "tvmode:", 7)) {
1671 XGIfb_search_tvstd(this_opt + 7);
1672 } else if (!strncmp(this_opt, "tvstandard:", 11)) {
d7636e0b 1673 XGIfb_search_tvstd(this_opt + 7);
b654f878 1674 } else if (!strncmp(this_opt, "dstn", 4)) {
d7636e0b 1675 enable_dstn = 1;
949eb0ae 1676 /* DSTN overrules forcecrt2type */
289ea524 1677 XGIfb_crt2type = XGIFB_DISP_LCD;
d7636e0b 1678 } else if (!strncmp(this_opt, "noypan", 6)) {
b654f878 1679 XGIfb_ypan = 0;
d7636e0b 1680 } else {
dfbdf805 1681 mode = this_opt;
d7636e0b 1682 }
d7636e0b 1683 }
d7636e0b 1684 return 0;
1685}
d7636e0b 1686
8922967e 1687static int __devinit xgifb_probe(struct pci_dev *pdev,
b654f878 1688 const struct pci_device_id *ent)
d7636e0b 1689{
b654f878
PS		 1690 u8 reg, reg1;
1691 u8 CR48, CR38;
bb292234 1692 int ret;
19c1e88e 1693 struct fb_info *fb_info;
fcbdda90
AK		 1694 struct xgifb_video_info *xgifb_info;
1695 struct xgi_hw_device_info *hw_info;
bb292234 1696
fcbdda90 1697 fb_info = framebuffer_alloc(sizeof(*xgifb_info), &pdev->dev);
b654f878
PS		 1698 if (!fb_info)
1699 return -ENOMEM;
1700
fcbdda90
AK		 1701 xgifb_info = fb_info->par;
1702 hw_info = &xgifb_info->hw_info;
fd26d420
AK		 1703 xgifb_info->fb_info = fb_info;
1704 xgifb_info->chip_id = pdev->device;
a12c27c5
KT		 1705 pci_read_config_byte(pdev,
1706 PCI_REVISION_ID,
fd26d420
AK		 1707 &xgifb_info->revision_id);
1708 hw_info->jChipRevision = xgifb_info->revision_id;
1709
1710 xgifb_info->pcibus = pdev->bus->number;
1711 xgifb_info->pcislot = PCI_SLOT(pdev->devfn);
1712 xgifb_info->pcifunc = PCI_FUNC(pdev->devfn);
1713 xgifb_info->subsysvendor = pdev->subsystem_vendor;
1714 xgifb_info->subsysdevice = pdev->subsystem_device;
1715
1716 xgifb_info->video_base = pci_resource_start(pdev, 0);
1717 xgifb_info->mmio_base = pci_resource_start(pdev, 1);
1718 xgifb_info->mmio_size = pci_resource_len(pdev, 1);
1719 xgifb_info->vga_base = pci_resource_start(pdev, 2) + 0x30;
19185703
MG		 1720 dev_info(&pdev->dev, "Relocate IO address: %Lx [%08lx]\n",
1721 (u64) pci_resource_start(pdev, 2),
1722 xgifb_info->vga_base);
b654f878 1723
bb292234
AK		 1724 if (pci_enable_device(pdev)) {
1725 ret = -EIO;
1726 goto error;
1727 }
b654f878 1728
25aa75f1
AK		 1729 if (XGIfb_crt2type != -1) {
1730 xgifb_info->display2 = XGIfb_crt2type;
1731 xgifb_info->display2_force = true;
1732 }
1733
9a801f25 1734 XGIRegInit(&xgifb_info->dev_info, xgifb_info->vga_base);
b654f878 1735
fc39dcb7
PH		 1736 xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
1737 reg1 = xgifb_reg_get(XGISR, IND_SIS_PASSWORD);
b654f878
PS		 1738
1739 if (reg1 != 0xa1) { /*I/O error */
be25aef0 1740 dev_err(&pdev->dev, "I/O error\n");
bb292234 1741 ret = -EIO;
05e06036 1742 goto error_disable;
b654f878 1743 }
d7636e0b 1744
fd26d420 1745 switch (xgifb_info->chip_id) {
fc39dcb7 1746 case PCI_DEVICE_ID_XGI_20:
e67f4d4d 1747 xgifb_reg_or(XGICR, Index_CR_GPIO_Reg3, GPIOG_EN);
7e119b75 1748 CR48 = xgifb_reg_get(XGICR, Index_CR_GPIO_Reg1);
d7636e0b 1749 if (CR48&GPIOG_READ)
fd26d420 1750 xgifb_info->chip = XG21;
d7636e0b 1751 else
fd26d420 1752 xgifb_info->chip = XG20;
d7636e0b 1753 break;
fc39dcb7 1754 case PCI_DEVICE_ID_XGI_40:
fd26d420 1755 xgifb_info->chip = XG40;
d7636e0b 1756 break;
fc39dcb7 1757 case PCI_DEVICE_ID_XGI_42:
fd26d420 1758 xgifb_info->chip = XG42;
d7636e0b 1759 break;
fc39dcb7 1760 case PCI_DEVICE_ID_XGI_27:
fd26d420 1761 xgifb_info->chip = XG27;
d7636e0b 1762 break;
b654f878 1763 default:
bb292234 1764 ret = -ENODEV;
05e06036 1765 goto error_disable;
d7636e0b 1766 }
1767
19185703 1768 dev_info(&pdev->dev, "chipid = %x\n", xgifb_info->chip);
fd26d420 1769 hw_info->jChipType = xgifb_info->chip;
d7636e0b 1770
fd26d420 1771 if (XGIfb_get_dram_size(xgifb_info)) {
19185703
MG		 1772 dev_err(&pdev->dev,
1773 "Fatal error: Unable to determine RAM size.\n");
bb292234 1774 ret = -ENODEV;
05e06036 1775 goto error_disable;
b654f878 1776 }
d7636e0b 1777
e1521a16
AK		 1778 /* Enable PCI_LINEAR_ADDRESSING and MMIO_ENABLE */
1779 xgifb_reg_or(XGISR,
fc39dcb7
PH		 1780 IND_SIS_PCI_ADDRESS_SET,
1781 (SIS_PCI_ADDR_ENABLE | SIS_MEM_MAP_IO_ENABLE));
e1521a16 1782 /* Enable 2D accelerator engine */
fc39dcb7 1783 xgifb_reg_or(XGISR, IND_SIS_MODULE_ENABLE, SIS_ENABLE_2D);
d7636e0b 1784
fd26d420 1785 hw_info->ulVideoMemorySize = xgifb_info->video_size;
d7636e0b 1786
fd26d420
AK		 1787 if (!request_mem_region(xgifb_info->video_base,
1788 xgifb_info->video_size,
a12c27c5 1789 "XGIfb FB")) {
be25aef0 1790 dev_err(&pdev->dev, "Unable request memory size %x\n",
fd26d420 1791 xgifb_info->video_size);
19185703
MG		 1792 dev_err(&pdev->dev,
1793 "Fatal error: Unable to reserve frame buffer memory. "
1794 "Is there another framebuffer driver active?\n");
bb292234 1795 ret = -ENODEV;
05e06036 1796 goto error_disable;
d7636e0b 1797 }
d7636e0b 1798
fd26d420
AK		 1799 if (!request_mem_region(xgifb_info->mmio_base,
1800 xgifb_info->mmio_size,
1b3909e5 1801 "XGIfb MMIO")) {
19185703
MG		 1802 dev_err(&pdev->dev,
1803 "Fatal error: Unable to reserve MMIO region\n");
bb292234 1804 ret = -ENODEV;
5c0ef2ac 1805 goto error_0;
b654f878 1806 }
d7636e0b 1807
fd26d420
AK		 1808 xgifb_info->video_vbase = hw_info->pjVideoMemoryAddress =
1809 ioremap(xgifb_info->video_base, xgifb_info->video_size);
1810 xgifb_info->mmio_vbase = ioremap(xgifb_info->mmio_base,
1811 xgifb_info->mmio_size);
d7636e0b 1812
19185703
MG		 1813 dev_info(&pdev->dev,
1814 "Framebuffer at 0x%Lx, mapped to 0x%p, size %dk\n",
1815 (u64) xgifb_info->video_base,
1816 xgifb_info->video_vbase,
1817 xgifb_info->video_size / 1024);
d7636e0b 1818
19185703
MG		 1819 dev_info(&pdev->dev,
1820 "MMIO at 0x%Lx, mapped to 0x%p, size %ldk\n",
1821 (u64) xgifb_info->mmio_base, xgifb_info->mmio_vbase,
1822 xgifb_info->mmio_size / 1024);
4a6b1518 1823
fcbdda90 1824 pci_set_drvdata(pdev, xgifb_info);
4a6b1518 1825 if (!XGIInitNew(pdev))
19185703 1826 dev_err(&pdev->dev, "XGIInitNew() failed!\n");
b654f878 1827
fd26d420 1828 xgifb_info->mtrr = (unsigned int) 0;
b654f878 1829
fd26d420
AK		 1830 xgifb_info->hasVB = HASVB_NONE;
1831 if ((xgifb_info->chip == XG20) ||
1832 (xgifb_info->chip == XG27)) {
1833 xgifb_info->hasVB = HASVB_NONE;
1834 } else if (xgifb_info->chip == XG21) {
e1521a16 1835 CR38 = xgifb_reg_get(XGICR, 0x38);
cae9a7be 1836 if ((CR38&0xE0) == 0xC0)
289ea524 1837 xgifb_info->display2 = XGIFB_DISP_LCD;
cae9a7be 1838 else if ((CR38&0xE0) == 0x60)
fd26d420 1839 xgifb_info->hasVB = HASVB_CHRONTEL;
cae9a7be 1840 else
fd26d420 1841 xgifb_info->hasVB = HASVB_NONE;
e1521a16 1842 } else {
fd26d420 1843 XGIfb_get_VB_type(xgifb_info);
e1521a16 1844 }
d7636e0b 1845
c62f2e46 1846 hw_info->ujVBChipID = VB_CHIP_UNKNOWN;
d7636e0b 1847
c62f2e46 1848 hw_info->ulExternalChip = 0;
d7636e0b 1849
fd26d420 1850 switch (xgifb_info->hasVB) {
e1521a16
AK		 1851 case HASVB_301:
1852 reg = xgifb_reg_get(XGIPART4, 0x01);
1853 if (reg >= 0xE0) {
c62f2e46 1854 hw_info->ujVBChipID = VB_CHIP_302LV;
19185703
MG		 1855 dev_info(&pdev->dev,
1856 "XGI302LV bridge detected (revision 0x%02x)\n",
1857 reg);
e1521a16 1858 } else if (reg >= 0xD0) {
c62f2e46 1859 hw_info->ujVBChipID = VB_CHIP_301LV;
19185703
MG		 1860 dev_info(&pdev->dev,
1861 "XGI301LV bridge detected (revision 0x%02x)\n",
1862 reg);
949eb0ae 1863 } else {
c62f2e46 1864 hw_info->ujVBChipID = VB_CHIP_301;
19185703 1865 dev_info(&pdev->dev, "XGI301 bridge detected\n");
e1521a16
AK		 1866 }
1867 break;
1868 case HASVB_302:
1869 reg = xgifb_reg_get(XGIPART4, 0x01);
1870 if (reg >= 0xE0) {
c62f2e46 1871 hw_info->ujVBChipID = VB_CHIP_302LV;
19185703
MG		 1872 dev_info(&pdev->dev,
1873 "XGI302LV bridge detected (revision 0x%02x)\n",
1874 reg);
e1521a16 1875 } else if (reg >= 0xD0) {
c62f2e46 1876 hw_info->ujVBChipID = VB_CHIP_301LV;
19185703
MG		 1877 dev_info(&pdev->dev,
1878 "XGI302LV bridge detected (revision 0x%02x)\n",
1879 reg);
e1521a16
AK		 1880 } else if (reg >= 0xB0) {
1881 reg1 = xgifb_reg_get(XGIPART4, 0x23);
d7636e0b 1882
c62f2e46 1883 hw_info->ujVBChipID = VB_CHIP_302B;
d7636e0b 1884
d7636e0b 1885 } else {
c62f2e46 1886 hw_info->ujVBChipID = VB_CHIP_302;
19185703 1887 dev_info(&pdev->dev, "XGI302 bridge detected\n");
d7636e0b 1888 }
e1521a16
AK		 1889 break;
1890 case HASVB_LVDS:
c62f2e46 1891 hw_info->ulExternalChip = 0x1;
19185703 1892 dev_info(&pdev->dev, "LVDS transmitter detected\n");
e1521a16
AK		 1893 break;
1894 case HASVB_TRUMPION:
c62f2e46 1895 hw_info->ulExternalChip = 0x2;
19185703 1896 dev_info(&pdev->dev, "Trumpion Zurac LVDS scaler detected\n");
e1521a16
AK		 1897 break;
1898 case HASVB_CHRONTEL:
c62f2e46 1899 hw_info->ulExternalChip = 0x4;
19185703 1900 dev_info(&pdev->dev, "Chrontel TV encoder detected\n");
e1521a16
AK		 1901 break;
1902 case HASVB_LVDS_CHRONTEL:
c62f2e46 1903 hw_info->ulExternalChip = 0x5;
19185703
MG		 1904 dev_info(&pdev->dev,
1905 "LVDS transmitter and Chrontel TV encoder detected\n");
e1521a16
AK		 1906 break;
1907 default:
19185703 1908 dev_info(&pdev->dev, "No or unknown bridge type detected\n");
e1521a16
AK		 1909 break;
1910 }
d7636e0b 1911
fd26d420
AK		 1912 if (xgifb_info->hasVB != HASVB_NONE)
1913 XGIfb_detect_VB(xgifb_info);
25aa75f1
AK		 1914 else if (xgifb_info->chip != XG21)
1915 xgifb_info->display2 = XGIFB_DISP_NONE;
b654f878 1916
289ea524 1917 if (xgifb_info->display2 == XGIFB_DISP_LCD) {
e1521a16
AK		 1918 if (!enable_dstn) {
1919 reg = xgifb_reg_get(XGICR, IND_XGI_LCD_PANEL);
1920 reg &= 0x0f;
c62f2e46 1921 hw_info->ulCRT2LCDType = XGI310paneltype[reg];
d7636e0b 1922 }
e1521a16 1923 }
d7636e0b 1924
ccf265ad
AK		 1925 xgifb_info->mode_idx = -1;
1926
dfbdf805 1927 if (mode)
ccf265ad 1928 XGIfb_search_mode(xgifb_info, mode);
dfbdf805 1929 else if (vesa != -1)
ccf265ad 1930 XGIfb_search_vesamode(xgifb_info, vesa);
dfbdf805 1931
ccf265ad
AK		 1932 if (xgifb_info->mode_idx >= 0)
1933 xgifb_info->mode_idx =
1934 XGIfb_validate_mode(xgifb_info, xgifb_info->mode_idx);
d7636e0b 1935
ccf265ad 1936 if (xgifb_info->mode_idx < 0) {
289ea524 1937 if (xgifb_info->display2 == XGIFB_DISP_LCD &&
fd26d420 1938 xgifb_info->chip == XG21)
ccf265ad 1939 xgifb_info->mode_idx =
fab04b97 1940 XGIfb_GetXG21DefaultLVDSModeIdx(xgifb_info);
c8bec1f0 1941 else
ccf265ad 1942 xgifb_info->mode_idx = DEFAULT_MODE;
e1521a16 1943 }
d7636e0b 1944
ccf265ad 1945 if (xgifb_info->mode_idx < 0) {
be25aef0 1946 dev_err(&pdev->dev, "No supported video mode found\n");
de736dbb
AK		 1947 goto error_1;
1948 }
1949
949eb0ae 1950 /* set default refresh rate */
fd26d420
AK		 1951 xgifb_info->refresh_rate = refresh_rate;
1952 if (xgifb_info->refresh_rate == 0)
1953 xgifb_info->refresh_rate = 60;
1954 if (XGIfb_search_refresh_rate(xgifb_info,
1955 xgifb_info->refresh_rate) == 0) {
f47f12d6 1956 xgifb_info->rate_idx = 1;
fd26d420 1957 xgifb_info->refresh_rate = 60;
e1521a16
AK		 1958 }
1959
ccf265ad 1960 xgifb_info->video_bpp = XGIbios_mode[xgifb_info->mode_idx].bpp;
fd26d420
AK		 1961 xgifb_info->video_vwidth =
1962 xgifb_info->video_width =
ccf265ad 1963 XGIbios_mode[xgifb_info->mode_idx].xres;
fd26d420
AK		 1964 xgifb_info->video_vheight =
1965 xgifb_info->video_height =
ccf265ad 1966 XGIbios_mode[xgifb_info->mode_idx].yres;
fd26d420
AK		 1967 xgifb_info->org_x = xgifb_info->org_y = 0;
1968 xgifb_info->video_linelength =
1969 xgifb_info->video_width *
1970 (xgifb_info->video_bpp >> 3);
1971 switch (xgifb_info->video_bpp) {
e1521a16 1972 case 8:
fd26d420
AK		 1973 xgifb_info->DstColor = 0x0000;
1974 xgifb_info->XGI310_AccelDepth = 0x00000000;
1975 xgifb_info->video_cmap_len = 256;
e1521a16
AK		 1976 break;
1977 case 16:
fd26d420
AK		 1978 xgifb_info->DstColor = 0x8000;
1979 xgifb_info->XGI310_AccelDepth = 0x00010000;
1980 xgifb_info->video_cmap_len = 16;
e1521a16
AK		 1981 break;
1982 case 32:
fd26d420
AK		 1983 xgifb_info->DstColor = 0xC000;
1984 xgifb_info->XGI310_AccelDepth = 0x00020000;
1985 xgifb_info->video_cmap_len = 16;
e1521a16
AK		 1986 break;
1987 default:
fd26d420 1988 xgifb_info->video_cmap_len = 16;
4a6b1518 1989 pr_info("Unsupported depth %d\n",
fd26d420 1990 xgifb_info->video_bpp);
e1521a16
AK		 1991 break;
1992 }
1993
4a6b1518 1994 pr_info("Default mode is %dx%dx%d (%dHz)\n",
fd26d420
AK		 1995 xgifb_info->video_width,
1996 xgifb_info->video_height,
1997 xgifb_info->video_bpp,
1998 xgifb_info->refresh_rate);
e1521a16 1999
e9865d47
AK		 2000 fb_info->var.red.length = 8;
2001 fb_info->var.green.length = 8;
2002 fb_info->var.blue.length = 8;
2003 fb_info->var.activate = FB_ACTIVATE_NOW;
2004 fb_info->var.height = -1;
2005 fb_info->var.width = -1;
2006 fb_info->var.vmode = FB_VMODE_NONINTERLACED;
2007 fb_info->var.xres = xgifb_info->video_width;
2008 fb_info->var.xres_virtual = xgifb_info->video_width;
2009 fb_info->var.yres = xgifb_info->video_height;
2010 fb_info->var.yres_virtual = xgifb_info->video_height;
2011 fb_info->var.bits_per_pixel = xgifb_info->video_bpp;
2012
2013 XGIfb_bpp_to_var(xgifb_info, &fb_info->var);
2014
2015 fb_info->var.pixclock = (u32) (1000000000 /
f2df8c09
AK		 2016 XGIfb_mode_rate_to_dclock(&xgifb_info->dev_info,
2017 hw_info,
ccf265ad 2018 XGIbios_mode[xgifb_info->mode_idx].mode_no,
5aa55d9f 2019 xgifb_info->rate_idx));
e1521a16 2020
f2df8c09 2021 if (XGIfb_mode_rate_to_ddata(&xgifb_info->dev_info, hw_info,
5aa55d9f
AK		 2022 XGIbios_mode[xgifb_info->mode_idx].mode_no,
2023 xgifb_info->rate_idx,
e9865d47
AK		 2024 &fb_info->var.left_margin,
2025 &fb_info->var.right_margin,
2026 &fb_info->var.upper_margin,
2027 &fb_info->var.lower_margin,
2028 &fb_info->var.hsync_len,
2029 &fb_info->var.vsync_len,
2030 &fb_info->var.sync,
2031 &fb_info->var.vmode)) {
2032
2033 if ((fb_info->var.vmode & FB_VMODE_MASK) ==
e1521a16 2034 FB_VMODE_INTERLACED) {
e9865d47
AK		 2035 fb_info->var.yres <<= 1;
2036 fb_info->var.yres_virtual <<= 1;
2037 } else if ((fb_info->var.vmode & FB_VMODE_MASK) ==
e1521a16 2038 FB_VMODE_DOUBLE) {
e9865d47
AK		 2039 fb_info->var.pixclock >>= 1;
2040 fb_info->var.yres >>= 1;
2041 fb_info->var.yres_virtual >>= 1;
b654f878 2042 }
d7636e0b 2043
e1521a16
AK		 2044 }
2045
2046 fb_info->flags = FBINFO_FLAG_DEFAULT;
fd26d420 2047 fb_info->screen_base = xgifb_info->video_vbase;
e1521a16
AK		 2048 fb_info->fbops = &XGIfb_ops;
2049 XGIfb_get_fix(&fb_info->fix, -1, fb_info);
76cabaa4 2050 fb_info->pseudo_palette = xgifb_info->pseudo_palette;
d7636e0b 2051
e1521a16 2052 fb_alloc_cmap(&fb_info->cmap, 256 , 0);
d7636e0b 2053
d7636e0b 2054#ifdef CONFIG_MTRR
fd26d420
AK		 2055 xgifb_info->mtrr = mtrr_add(xgifb_info->video_base,
2056 xgifb_info->video_size, MTRR_TYPE_WRCOMB, 1);
2057 if (xgifb_info->mtrr >= 0)
be25aef0 2058 dev_info(&pdev->dev, "Added MTRR\n");
d7636e0b 2059#endif
2060
e1521a16
AK		 2061 if (register_framebuffer(fb_info) < 0) {
2062 ret = -EINVAL;
3028474c 2063 goto error_mtrr;
e1521a16 2064 }
d7636e0b 2065
d7636e0b 2066 dumpVGAReg();
2067
2068 return 0;
bb292234 2069
3028474c
AK		 2070error_mtrr:
2071#ifdef CONFIG_MTRR
fd26d420
AK		 2072 if (xgifb_info->mtrr >= 0)
2073 mtrr_del(xgifb_info->mtrr, xgifb_info->video_base,
2074 xgifb_info->video_size);
3028474c 2075#endif /* CONFIG_MTRR */
5c0ef2ac 2076error_1:
fd26d420
AK		 2077 iounmap(xgifb_info->mmio_vbase);
2078 iounmap(xgifb_info->video_vbase);
2079 release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size);
5c0ef2ac 2080error_0:
fd26d420 2081 release_mem_region(xgifb_info->video_base, xgifb_info->video_size);
05e06036
MG		 2082error_disable:
2083 pci_disable_device(pdev);
bb292234
AK		 2084error:
2085 framebuffer_release(fb_info);
2086 return ret;
d7636e0b 2087}
2088
d7636e0b 2089/*****************************************************/
2090/* PCI DEVICE HANDLING */
2091/*****************************************************/
2092
2093static void __devexit xgifb_remove(struct pci_dev *pdev)
2094{
ab886ff8 2095 struct xgifb_video_info *xgifb_info = pci_get_drvdata(pdev);
19c1e88e 2096 struct fb_info *fb_info = xgifb_info->fb_info;
54301b5c 2097
b654f878 2098 unregister_framebuffer(fb_info);
3028474c 2099#ifdef CONFIG_MTRR
54301b5c
AK		 2100 if (xgifb_info->mtrr >= 0)
2101 mtrr_del(xgifb_info->mtrr, xgifb_info->video_base,
2102 xgifb_info->video_size);
3028474c 2103#endif /* CONFIG_MTRR */
54301b5c
AK		 2104 iounmap(xgifb_info->mmio_vbase);
2105 iounmap(xgifb_info->video_vbase);
2106 release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size);
2107 release_mem_region(xgifb_info->video_base, xgifb_info->video_size);
bf55b483 2108 pci_disable_device(pdev);
b654f878 2109 framebuffer_release(fb_info);
d7636e0b 2110 pci_set_drvdata(pdev, NULL);
45dcfaf1 2111}
d7636e0b 2112
2113static struct pci_driver xgifb_driver = {
b654f878
PS		 2114 .name = "xgifb",
2115 .id_table = xgifb_pci_table,
2116 .probe = xgifb_probe,
2117 .remove = __devexit_p(xgifb_remove)
d7636e0b 2118};
2119
d7636e0b 2120
d7636e0b 2121
2122/*****************************************************/
2123/* MODULE */
2124/*****************************************************/
2125
d7636e0b 2126module_param(mode, charp, 0);
d049053e 2127MODULE_PARM_DESC(mode,
560e8788
MG		 2128 "Selects the desired default display mode in the format XxYxDepth "
2129 "(eg. 1024x768x16).");
2d2c880f 2130
d049053e 2131module_param(forcecrt2type, charp, 0);
2d2c880f 2132MODULE_PARM_DESC(forcecrt2type,
560e8788
MG		 2133 "Force the second display output type. Possible values are NONE, "
2134 "LCD, TV, VGA, SVIDEO or COMPOSITE.");
d7636e0b 2135
d049053e 2136module_param(vesa, int, 0);
d7636e0b 2137MODULE_PARM_DESC(vesa,
560e8788
MG		 2138 "Selects the desired default display mode by VESA mode number "
2139 "(eg. 0x117).");
d7636e0b 2140
d049053e 2141module_param(filter, int, 0);
d7636e0b 2142MODULE_PARM_DESC(filter,
560e8788
MG		 2143 "Selects TV flicker filter type (only for systems with a SiS301 video bridge). "
2144 "Possible values 0-7. Default: [no filter]).");
d049053e
MG		 2145
2146static int __init xgifb_init(void)
2147{
2148 char *option = NULL;
2149
2150 if (forcecrt2type != NULL)
2151 XGIfb_search_crt2type(forcecrt2type);
2152 if (fb_get_options("xgifb", &option))
2153 return -ENODEV;
2154 XGIfb_setup(option);
2155
2156 return pci_register_driver(&xgifb_driver);
2157}
d7636e0b 2158
d7636e0b 2159static void __exit xgifb_remove_module(void)
2160{
2161 pci_unregister_driver(&xgifb_driver);
4a6b1518 2162 pr_debug("Module unloaded\n");
d7636e0b 2163}
2164
d049053e
MG		 2165MODULE_DESCRIPTION("Z7 Z9 Z9S Z11 framebuffer device driver");
2166MODULE_LICENSE("GPL");
2167MODULE_AUTHOR("XGITECH , Others");
2168module_init(xgifb_init);
d7636e0b 2169module_exit(xgifb_remove_module);
kernel source for telekom puls (alcatel/mediatek)