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00b3ed16 GKH |
1 | /* hfa384x.h |
2 | * | |
3 | * Defines the constants and data structures for the hfa384x | |
4 | * | |
5 | * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved. | |
6 | * -------------------------------------------------------------------- | |
7 | * | |
8 | * linux-wlan | |
9 | * | |
10 | * The contents of this file are subject to the Mozilla Public | |
11 | * License Version 1.1 (the "License"); you may not use this file | |
12 | * except in compliance with the License. You may obtain a copy of | |
13 | * the License at http://www.mozilla.org/MPL/ | |
14 | * | |
15 | * Software distributed under the License is distributed on an "AS | |
16 | * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or | |
17 | * implied. See the License for the specific language governing | |
18 | * rights and limitations under the License. | |
19 | * | |
20 | * Alternatively, the contents of this file may be used under the | |
21 | * terms of the GNU Public License version 2 (the "GPL"), in which | |
22 | * case the provisions of the GPL are applicable instead of the | |
23 | * above. If you wish to allow the use of your version of this file | |
24 | * only under the terms of the GPL and not to allow others to use | |
25 | * your version of this file under the MPL, indicate your decision | |
26 | * by deleting the provisions above and replace them with the notice | |
27 | * and other provisions required by the GPL. If you do not delete | |
28 | * the provisions above, a recipient may use your version of this | |
29 | * file under either the MPL or the GPL. | |
30 | * | |
31 | * -------------------------------------------------------------------- | |
32 | * | |
33 | * Inquiries regarding the linux-wlan Open Source project can be | |
34 | * made directly to: | |
35 | * | |
36 | * AbsoluteValue Systems Inc. | |
37 | * info@linux-wlan.com | |
38 | * http://www.linux-wlan.com | |
39 | * | |
40 | * -------------------------------------------------------------------- | |
41 | * | |
42 | * Portions of the development of this software were funded by | |
43 | * Intersil Corporation as part of PRISM(R) chipset product development. | |
44 | * | |
45 | * -------------------------------------------------------------------- | |
46 | * | |
47 | * [Implementation and usage notes] | |
48 | * | |
49 | * [References] | |
50 | * CW10 Programmer's Manual v1.5 | |
51 | * IEEE 802.11 D10.0 | |
52 | * | |
53 | * -------------------------------------------------------------------- | |
54 | */ | |
55 | ||
56 | #ifndef _HFA384x_H | |
57 | #define _HFA384x_H | |
58 | ||
59 | /*=============================================================*/ | |
60 | #define HFA384x_FIRMWARE_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) | |
61 | ||
62 | #define HFA384x_LEVEL_TO_dBm(v) (0x100 + (v) * 100 / 255 - 100) | |
63 | ||
28b17a4b MM |
64 | #include <linux/if_ether.h> |
65 | ||
00b3ed16 GKH |
66 | /*------ Constants --------------------------------------------*/ |
67 | /*--- Mins & Maxs -----------------------------------*/ | |
aaad4303 SP |
68 | #define HFA384x_CMD_ALLOC_LEN_MIN ((u16)4) |
69 | #define HFA384x_CMD_ALLOC_LEN_MAX ((u16)2400) | |
70 | #define HFA384x_BAP_DATALEN_MAX ((u16)4096) | |
71 | #define HFA384x_BAP_OFFSET_MAX ((u16)4096) | |
72 | #define HFA384x_PORTID_MAX ((u16)7) | |
73 | #define HFA384x_NUMPORTS_MAX ((u16)(HFA384x_PORTID_MAX+1)) | |
74 | #define HFA384x_PDR_LEN_MAX ((u16)512) /* in bytes, from EK */ | |
75 | #define HFA384x_PDA_RECS_MAX ((u16)200) /* a guess */ | |
76 | #define HFA384x_PDA_LEN_MAX ((u16)1024) /* in bytes, from EK */ | |
77 | #define HFA384x_SCANRESULT_MAX ((u16)31) | |
78 | #define HFA384x_HSCANRESULT_MAX ((u16)31) | |
79 | #define HFA384x_CHINFORESULT_MAX ((u16)16) | |
00b3ed16 GKH |
80 | #define HFA384x_DRVR_FIDSTACKLEN_MAX (10) |
81 | #define HFA384x_DRVR_TXBUF_MAX (sizeof(hfa384x_tx_frame_t) + \ | |
82 | WLAN_DATA_MAXLEN - \ | |
83 | WLAN_WEP_IV_LEN - \ | |
84 | WLAN_WEP_ICV_LEN + 2) | |
85 | #define HFA384x_DRVR_MAGIC (0x4a2d) | |
86 | #define HFA384x_INFODATA_MAXLEN (sizeof(hfa384x_infodata_t)) | |
87 | #define HFA384x_INFOFRM_MAXLEN (sizeof(hfa384x_InfFrame_t)) | |
88 | #define HFA384x_RID_GUESSING_MAXLEN 2048 /* I'm not really sure */ | |
89 | #define HFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN | |
90 | #define HFA384x_USB_RWMEM_MAXLEN 2048 | |
91 | ||
92 | /*--- Support Constants -----------------------------*/ | |
aaad4303 SP |
93 | #define HFA384x_BAP_PROC ((u16)0) |
94 | #define HFA384x_BAP_int ((u16)1) | |
95 | #define HFA384x_PORTTYPE_IBSS ((u16)0) | |
96 | #define HFA384x_PORTTYPE_BSS ((u16)1) | |
97 | #define HFA384x_PORTTYPE_WDS ((u16)2) | |
98 | #define HFA384x_PORTTYPE_PSUEDOIBSS ((u16)3) | |
99 | #define HFA384x_PORTTYPE_HOSTAP ((u16)6) | |
100 | #define HFA384x_WEPFLAGS_PRIVINVOKED ((u16)BIT0) | |
101 | #define HFA384x_WEPFLAGS_EXCLUDE ((u16)BIT1) | |
102 | #define HFA384x_WEPFLAGS_DISABLE_TXCRYPT ((u16)BIT4) | |
103 | #define HFA384x_WEPFLAGS_DISABLE_RXCRYPT ((u16)BIT7) | |
104 | #define HFA384x_WEPFLAGS_DISALLOW_MIXED ((u16)BIT11) | |
105 | #define HFA384x_WEPFLAGS_IV_intERVAL1 ((u16)0) | |
106 | #define HFA384x_WEPFLAGS_IV_intERVAL10 ((u16)BIT5) | |
107 | #define HFA384x_WEPFLAGS_IV_intERVAL50 ((u16)BIT6) | |
108 | #define HFA384x_WEPFLAGS_IV_intERVAL100 ((u16)(BIT5 | BIT6)) | |
109 | #define HFA384x_WEPFLAGS_FIRMWARE_WPA ((u16)BIT8) | |
110 | #define HFA384x_WEPFLAGS_HOST_MIC ((u16)BIT9) | |
111 | #define HFA384x_ROAMMODE_FWSCAN_FWROAM ((u16)1) | |
112 | #define HFA384x_ROAMMODE_FWSCAN_HOSTROAM ((u16)2) | |
113 | #define HFA384x_ROAMMODE_HOSTSCAN_HOSTROAM ((u16)3) | |
114 | #define HFA384x_PORTSTATUS_DISABLED ((u16)1) | |
115 | #define HFA384x_PORTSTATUS_INITSRCH ((u16)2) | |
116 | #define HFA384x_PORTSTATUS_CONN_IBSS ((u16)3) | |
117 | #define HFA384x_PORTSTATUS_CONN_ESS ((u16)4) | |
118 | #define HFA384x_PORTSTATUS_OOR_ESS ((u16)5) | |
119 | #define HFA384x_PORTSTATUS_CONN_WDS ((u16)6) | |
120 | #define HFA384x_PORTSTATUS_HOSTAP ((u16)8) | |
121 | #define HFA384x_RATEBIT_1 ((u16)1) | |
122 | #define HFA384x_RATEBIT_2 ((u16)2) | |
123 | #define HFA384x_RATEBIT_5dot5 ((u16)4) | |
124 | #define HFA384x_RATEBIT_11 ((u16)8) | |
00b3ed16 GKH |
125 | |
126 | /*--- Just some symbolic names for legibility -------*/ | |
aaad4303 SP |
127 | #define HFA384x_TXCMD_NORECL ((u16)0) |
128 | #define HFA384x_TXCMD_RECL ((u16)1) | |
00b3ed16 GKH |
129 | |
130 | /*--- MAC Internal memory constants and macros ------*/ | |
131 | /* masks and macros used to manipulate MAC internal memory addresses. */ | |
132 | /* MAC internal memory addresses are 23 bit quantities. The MAC uses | |
133 | * a paged address space where the upper 16 bits are the page number | |
134 | * and the lower 7 bits are the offset. There are various Host API | |
135 | * elements that require two 16-bit quantities to specify a MAC | |
136 | * internal memory address. Unfortunately, some of the API's use a | |
137 | * page/offset format where the offset value is JUST the lower seven | |
138 | * bits and the page is the remaining 16 bits. Some of the API's | |
139 | * assume that the 23 bit address has been split at the 16th bit. We | |
140 | * refer to these two formats as AUX format and CMD format. The | |
141 | * macros below help handle some of this. | |
142 | */ | |
143 | ||
144 | /* Handy constant */ | |
aaad4303 | 145 | #define HFA384x_ADDR_AUX_OFF_MAX ((u16)0x007f) |
00b3ed16 GKH |
146 | |
147 | /* Mask bits for discarding unwanted pieces in a flat address */ | |
148 | #define HFA384x_ADDR_FLAT_AUX_PAGE_MASK (0x007fff80) | |
149 | #define HFA384x_ADDR_FLAT_AUX_OFF_MASK (0x0000007f) | |
150 | #define HFA384x_ADDR_FLAT_CMD_PAGE_MASK (0xffff0000) | |
151 | #define HFA384x_ADDR_FLAT_CMD_OFF_MASK (0x0000ffff) | |
152 | ||
153 | /* Mask bits for discarding unwanted pieces in AUX format 16-bit address parts */ | |
154 | #define HFA384x_ADDR_AUX_PAGE_MASK (0xffff) | |
155 | #define HFA384x_ADDR_AUX_OFF_MASK (0x007f) | |
156 | ||
157 | /* Mask bits for discarding unwanted pieces in CMD format 16-bit address parts */ | |
158 | #define HFA384x_ADDR_CMD_PAGE_MASK (0x007f) | |
159 | #define HFA384x_ADDR_CMD_OFF_MASK (0xffff) | |
160 | ||
161 | /* Make a 32-bit flat address from AUX format 16-bit page and offset */ | |
162 | #define HFA384x_ADDR_AUX_MKFLAT(p,o) \ | |
aaad4303 SP |
163 | (((u32)(((u16)(p))&HFA384x_ADDR_AUX_PAGE_MASK)) <<7) | \ |
164 | ((u32)(((u16)(o))&HFA384x_ADDR_AUX_OFF_MASK)) | |
00b3ed16 GKH |
165 | |
166 | /* Make a 32-bit flat address from CMD format 16-bit page and offset */ | |
167 | #define HFA384x_ADDR_CMD_MKFLAT(p,o) \ | |
aaad4303 SP |
168 | (((u32)(((u16)(p))&HFA384x_ADDR_CMD_PAGE_MASK)) <<16) | \ |
169 | ((u32)(((u16)(o))&HFA384x_ADDR_CMD_OFF_MASK)) | |
00b3ed16 GKH |
170 | |
171 | /* Make AUX format offset and page from a 32-bit flat address */ | |
172 | #define HFA384x_ADDR_AUX_MKPAGE(f) \ | |
aaad4303 | 173 | ((u16)((((u32)(f))&HFA384x_ADDR_FLAT_AUX_PAGE_MASK)>>7)) |
00b3ed16 | 174 | #define HFA384x_ADDR_AUX_MKOFF(f) \ |
aaad4303 | 175 | ((u16)(((u32)(f))&HFA384x_ADDR_FLAT_AUX_OFF_MASK)) |
00b3ed16 GKH |
176 | |
177 | /* Make CMD format offset and page from a 32-bit flat address */ | |
178 | #define HFA384x_ADDR_CMD_MKPAGE(f) \ | |
aaad4303 | 179 | ((u16)((((u32)(f))&HFA384x_ADDR_FLAT_CMD_PAGE_MASK)>>16)) |
00b3ed16 | 180 | #define HFA384x_ADDR_CMD_MKOFF(f) \ |
aaad4303 | 181 | ((u16)(((u32)(f))&HFA384x_ADDR_FLAT_CMD_OFF_MASK)) |
00b3ed16 GKH |
182 | |
183 | /*--- Aux register masks/tests ----------------------*/ | |
184 | /* Some of the upper bits of the AUX offset register are used to */ | |
185 | /* select address space. */ | |
186 | #define HFA384x_AUX_CTL_EXTDS (0x00) | |
187 | #define HFA384x_AUX_CTL_NV (0x01) | |
188 | #define HFA384x_AUX_CTL_PHY (0x02) | |
189 | #define HFA384x_AUX_CTL_ICSRAM (0x03) | |
190 | ||
191 | /* Make AUX register offset and page values from a flat address */ | |
192 | #define HFA384x_AUX_MKOFF(f, c) \ | |
aaad4303 | 193 | (HFA384x_ADDR_AUX_MKOFF(f) | (((u16)(c))<<12)) |
00b3ed16 GKH |
194 | #define HFA384x_AUX_MKPAGE(f) HFA384x_ADDR_AUX_MKPAGE(f) |
195 | ||
196 | ||
197 | /*--- Controller Memory addresses -------------------*/ | |
198 | #define HFA3842_PDA_BASE (0x007f0000UL) | |
199 | #define HFA3841_PDA_BASE (0x003f0000UL) | |
200 | #define HFA3841_PDA_BOGUS_BASE (0x00390000UL) | |
201 | ||
202 | /*--- Driver Download states -----------------------*/ | |
203 | #define HFA384x_DLSTATE_DISABLED 0 | |
204 | #define HFA384x_DLSTATE_RAMENABLED 1 | |
205 | #define HFA384x_DLSTATE_FLASHENABLED 2 | |
206 | #define HFA384x_DLSTATE_FLASHWRITTEN 3 | |
207 | #define HFA384x_DLSTATE_FLASHWRITEPENDING 4 | |
208 | #define HFA384x_DLSTATE_GENESIS 5 | |
209 | ||
00b3ed16 GKH |
210 | #define HFA384x_CMD_OFF (0x00) |
211 | #define HFA384x_PARAM0_OFF (0x04) | |
212 | #define HFA384x_PARAM1_OFF (0x08) | |
213 | #define HFA384x_PARAM2_OFF (0x0c) | |
214 | #define HFA384x_STATUS_OFF (0x10) | |
215 | #define HFA384x_RESP0_OFF (0x14) | |
216 | #define HFA384x_RESP1_OFF (0x18) | |
217 | #define HFA384x_RESP2_OFF (0x1c) | |
218 | #define HFA384x_INFOFID_OFF (0x20) | |
219 | #define HFA384x_RXFID_OFF (0x40) | |
220 | #define HFA384x_ALLOCFID_OFF (0x44) | |
221 | #define HFA384x_TXCOMPLFID_OFF (0x48) | |
222 | #define HFA384x_SELECT0_OFF (0x30) | |
223 | #define HFA384x_OFFSET0_OFF (0x38) | |
224 | #define HFA384x_DATA0_OFF (0x6c) | |
225 | #define HFA384x_SELECT1_OFF (0x34) | |
226 | #define HFA384x_OFFSET1_OFF (0x3c) | |
227 | #define HFA384x_DATA1_OFF (0x70) | |
228 | #define HFA384x_EVSTAT_OFF (0x60) | |
aaad4303 | 229 | #define HFA384x_intEN_OFF (0x64) |
00b3ed16 GKH |
230 | #define HFA384x_EVACK_OFF (0x68) |
231 | #define HFA384x_CONTROL_OFF (0x28) | |
232 | #define HFA384x_SWSUPPORT0_OFF (0x50) | |
233 | #define HFA384x_SWSUPPORT1_OFF (0x54) | |
234 | #define HFA384x_SWSUPPORT2_OFF (0x58) | |
235 | #define HFA384x_AUXPAGE_OFF (0x74) | |
236 | #define HFA384x_AUXOFFSET_OFF (0x78) | |
237 | #define HFA384x_AUXDATA_OFF (0x7c) | |
238 | #define HFA384x_PCICOR_OFF (0x4c) | |
239 | #define HFA384x_PCIHCR_OFF (0x5c) | |
240 | #define HFA384x_PCI_M0_ADDRH_OFF (0x80) | |
241 | #define HFA384x_PCI_M0_ADDRL_OFF (0x84) | |
242 | #define HFA384x_PCI_M0_LEN_OFF (0x88) | |
243 | #define HFA384x_PCI_M0_CTL_OFF (0x8c) | |
244 | #define HFA384x_PCI_STATUS_OFF (0x98) | |
245 | #define HFA384x_PCI_M1_ADDRH_OFF (0xa0) | |
246 | #define HFA384x_PCI_M1_ADDRL_OFF (0xa4) | |
247 | #define HFA384x_PCI_M1_LEN_OFF (0xa8) | |
248 | #define HFA384x_PCI_M1_CTL_OFF (0xac) | |
249 | ||
00b3ed16 | 250 | /*--- Register Field Masks --------------------------*/ |
aaad4303 SP |
251 | #define HFA384x_CMD_BUSY ((u16)BIT15) |
252 | #define HFA384x_CMD_AINFO ((u16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8)) | |
253 | #define HFA384x_CMD_MACPORT ((u16)(BIT10 | BIT9 | BIT8)) | |
254 | #define HFA384x_CMD_RECL ((u16)BIT8) | |
255 | #define HFA384x_CMD_WRITE ((u16)BIT8) | |
256 | #define HFA384x_CMD_PROGMODE ((u16)(BIT9 | BIT8)) | |
257 | #define HFA384x_CMD_CMDCODE ((u16)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)) | |
258 | ||
259 | #define HFA384x_STATUS_RESULT ((u16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8)) | |
260 | #define HFA384x_STATUS_CMDCODE ((u16)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)) | |
261 | ||
262 | #define HFA384x_OFFSET_BUSY ((u16)BIT15) | |
263 | #define HFA384x_OFFSET_ERR ((u16)BIT14) | |
264 | #define HFA384x_OFFSET_DATAOFF ((u16)(BIT11 | BIT10 | BIT9 | BIT8 | BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1)) | |
265 | ||
266 | #define HFA384x_EVSTAT_TICK ((u16)BIT15) | |
267 | #define HFA384x_EVSTAT_WTERR ((u16)BIT14) | |
268 | #define HFA384x_EVSTAT_INFDROP ((u16)BIT13) | |
269 | #define HFA384x_EVSTAT_INFO ((u16)BIT7) | |
270 | #define HFA384x_EVSTAT_DTIM ((u16)BIT5) | |
271 | #define HFA384x_EVSTAT_CMD ((u16)BIT4) | |
272 | #define HFA384x_EVSTAT_ALLOC ((u16)BIT3) | |
273 | #define HFA384x_EVSTAT_TXEXC ((u16)BIT2) | |
274 | #define HFA384x_EVSTAT_TX ((u16)BIT1) | |
275 | #define HFA384x_EVSTAT_RX ((u16)BIT0) | |
276 | ||
277 | #define HFA384x_int_BAP_OP (HFA384x_EVSTAT_INFO|HFA384x_EVSTAT_RX|HFA384x_EVSTAT_TX|HFA384x_EVSTAT_TXEXC) | |
278 | ||
279 | #define HFA384x_int_NORMAL (HFA384x_EVSTAT_INFO|HFA384x_EVSTAT_RX|HFA384x_EVSTAT_TX|HFA384x_EVSTAT_TXEXC|HFA384x_EVSTAT_INFDROP|HFA384x_EVSTAT_ALLOC|HFA384x_EVSTAT_DTIM) | |
280 | ||
281 | #define HFA384x_intEN_TICK ((u16)BIT15) | |
282 | #define HFA384x_intEN_WTERR ((u16)BIT14) | |
283 | #define HFA384x_intEN_INFDROP ((u16)BIT13) | |
284 | #define HFA384x_intEN_INFO ((u16)BIT7) | |
285 | #define HFA384x_intEN_DTIM ((u16)BIT5) | |
286 | #define HFA384x_intEN_CMD ((u16)BIT4) | |
287 | #define HFA384x_intEN_ALLOC ((u16)BIT3) | |
288 | #define HFA384x_intEN_TXEXC ((u16)BIT2) | |
289 | #define HFA384x_intEN_TX ((u16)BIT1) | |
290 | #define HFA384x_intEN_RX ((u16)BIT0) | |
291 | ||
292 | #define HFA384x_EVACK_TICK ((u16)BIT15) | |
293 | #define HFA384x_EVACK_WTERR ((u16)BIT14) | |
294 | #define HFA384x_EVACK_INFDROP ((u16)BIT13) | |
295 | #define HFA384x_EVACK_INFO ((u16)BIT7) | |
296 | #define HFA384x_EVACK_DTIM ((u16)BIT5) | |
297 | #define HFA384x_EVACK_CMD ((u16)BIT4) | |
298 | #define HFA384x_EVACK_ALLOC ((u16)BIT3) | |
299 | #define HFA384x_EVACK_TXEXC ((u16)BIT2) | |
300 | #define HFA384x_EVACK_TX ((u16)BIT1) | |
301 | #define HFA384x_EVACK_RX ((u16)BIT0) | |
302 | ||
303 | #define HFA384x_CONTROL_AUXEN ((u16)(BIT15 | BIT14)) | |
00b3ed16 GKH |
304 | |
305 | ||
306 | /*--- Command Code Constants --------------------------*/ | |
307 | /*--- Controller Commands --------------------------*/ | |
aaad4303 SP |
308 | #define HFA384x_CMDCODE_INIT ((u16)0x00) |
309 | #define HFA384x_CMDCODE_ENABLE ((u16)0x01) | |
310 | #define HFA384x_CMDCODE_DISABLE ((u16)0x02) | |
311 | #define HFA384x_CMDCODE_DIAG ((u16)0x03) | |
00b3ed16 GKH |
312 | |
313 | /*--- Buffer Mgmt Commands --------------------------*/ | |
aaad4303 SP |
314 | #define HFA384x_CMDCODE_ALLOC ((u16)0x0A) |
315 | #define HFA384x_CMDCODE_TX ((u16)0x0B) | |
316 | #define HFA384x_CMDCODE_CLRPRST ((u16)0x12) | |
00b3ed16 GKH |
317 | |
318 | /*--- Regulate Commands --------------------------*/ | |
aaad4303 SP |
319 | #define HFA384x_CMDCODE_NOTIFY ((u16)0x10) |
320 | #define HFA384x_CMDCODE_INQ ((u16)0x11) | |
00b3ed16 GKH |
321 | |
322 | /*--- Configure Commands --------------------------*/ | |
aaad4303 SP |
323 | #define HFA384x_CMDCODE_ACCESS ((u16)0x21) |
324 | #define HFA384x_CMDCODE_DOWNLD ((u16)0x22) | |
00b3ed16 GKH |
325 | |
326 | /*--- Debugging Commands -----------------------------*/ | |
aaad4303 SP |
327 | #define HFA384x_CMDCODE_MONITOR ((u16)(0x38)) |
328 | #define HFA384x_MONITOR_ENABLE ((u16)(0x0b)) | |
329 | #define HFA384x_MONITOR_DISABLE ((u16)(0x0f)) | |
00b3ed16 GKH |
330 | |
331 | /*--- Result Codes --------------------------*/ | |
aaad4303 SP |
332 | #define HFA384x_SUCCESS ((u16)(0x00)) |
333 | #define HFA384x_CARD_FAIL ((u16)(0x01)) | |
334 | #define HFA384x_NO_BUFF ((u16)(0x05)) | |
335 | #define HFA384x_CMD_ERR ((u16)(0x7F)) | |
00b3ed16 GKH |
336 | |
337 | /*--- Programming Modes -------------------------- | |
338 | MODE 0: Disable programming | |
339 | MODE 1: Enable volatile memory programming | |
340 | MODE 2: Enable non-volatile memory programming | |
341 | MODE 3: Program non-volatile memory section | |
342 | --------------------------------------------------*/ | |
aaad4303 SP |
343 | #define HFA384x_PROGMODE_DISABLE ((u16)0x00) |
344 | #define HFA384x_PROGMODE_RAM ((u16)0x01) | |
345 | #define HFA384x_PROGMODE_NV ((u16)0x02) | |
346 | #define HFA384x_PROGMODE_NVWRITE ((u16)0x03) | |
00b3ed16 GKH |
347 | |
348 | /*--- AUX register enable --------------------------*/ | |
aaad4303 SP |
349 | #define HFA384x_AUXPW0 ((u16)0xfe01) |
350 | #define HFA384x_AUXPW1 ((u16)0xdc23) | |
351 | #define HFA384x_AUXPW2 ((u16)0xba45) | |
00b3ed16 | 352 | |
aaad4303 SP |
353 | #define HFA384x_CONTROL_AUX_ISDISABLED ((u16)0x0000) |
354 | #define HFA384x_CONTROL_AUX_ISENABLED ((u16)0xc000) | |
355 | #define HFA384x_CONTROL_AUX_DOENABLE ((u16)0x8000) | |
356 | #define HFA384x_CONTROL_AUX_DODISABLE ((u16)0x4000) | |
00b3ed16 GKH |
357 | |
358 | /*--- Record ID Constants --------------------------*/ | |
359 | /*-------------------------------------------------------------------- | |
360 | Configuration RIDs: Network Parameters, Static Configuration Entities | |
361 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
362 | #define HFA384x_RID_CNFPORTTYPE ((u16)0xFC00) |
363 | #define HFA384x_RID_CNFOWNMACADDR ((u16)0xFC01) | |
364 | #define HFA384x_RID_CNFDESIREDSSID ((u16)0xFC02) | |
365 | #define HFA384x_RID_CNFOWNCHANNEL ((u16)0xFC03) | |
366 | #define HFA384x_RID_CNFOWNSSID ((u16)0xFC04) | |
367 | #define HFA384x_RID_CNFOWNATIMWIN ((u16)0xFC05) | |
368 | #define HFA384x_RID_CNFSYSSCALE ((u16)0xFC06) | |
369 | #define HFA384x_RID_CNFMAXDATALEN ((u16)0xFC07) | |
370 | #define HFA384x_RID_CNFWDSADDR ((u16)0xFC08) | |
371 | #define HFA384x_RID_CNFPMENABLED ((u16)0xFC09) | |
372 | #define HFA384x_RID_CNFPMEPS ((u16)0xFC0A) | |
373 | #define HFA384x_RID_CNFMULTICASTRX ((u16)0xFC0B) | |
374 | #define HFA384x_RID_CNFMAXSLEEPDUR ((u16)0xFC0C) | |
375 | #define HFA384x_RID_CNFPMHOLDDUR ((u16)0xFC0D) | |
376 | #define HFA384x_RID_CNFOWNNAME ((u16)0xFC0E) | |
377 | #define HFA384x_RID_CNFOWNDTIMPER ((u16)0xFC10) | |
378 | #define HFA384x_RID_CNFWDSADDR1 ((u16)0xFC11) | |
379 | #define HFA384x_RID_CNFWDSADDR2 ((u16)0xFC12) | |
380 | #define HFA384x_RID_CNFWDSADDR3 ((u16)0xFC13) | |
381 | #define HFA384x_RID_CNFWDSADDR4 ((u16)0xFC14) | |
382 | #define HFA384x_RID_CNFWDSADDR5 ((u16)0xFC15) | |
383 | #define HFA384x_RID_CNFWDSADDR6 ((u16)0xFC16) | |
384 | #define HFA384x_RID_CNFMCASTPMBUFF ((u16)0xFC17) | |
00b3ed16 GKH |
385 | |
386 | /*-------------------------------------------------------------------- | |
387 | Configuration RID lengths: Network Params, Static Config Entities | |
388 | This is the length of JUST the DATA part of the RID (does not | |
389 | include the len or code fields) | |
390 | --------------------------------------------------------------------*/ | |
391 | /* TODO: fill in the rest of these */ | |
aaad4303 SP |
392 | #define HFA384x_RID_CNFPORTTYPE_LEN ((u16)2) |
393 | #define HFA384x_RID_CNFOWNMACADDR_LEN ((u16)6) | |
394 | #define HFA384x_RID_CNFDESIREDSSID_LEN ((u16)34) | |
395 | #define HFA384x_RID_CNFOWNCHANNEL_LEN ((u16)2) | |
396 | #define HFA384x_RID_CNFOWNSSID_LEN ((u16)34) | |
397 | #define HFA384x_RID_CNFOWNATIMWIN_LEN ((u16)2) | |
398 | #define HFA384x_RID_CNFSYSSCALE_LEN ((u16)0) | |
399 | #define HFA384x_RID_CNFMAXDATALEN_LEN ((u16)0) | |
400 | #define HFA384x_RID_CNFWDSADDR_LEN ((u16)6) | |
401 | #define HFA384x_RID_CNFPMENABLED_LEN ((u16)0) | |
402 | #define HFA384x_RID_CNFPMEPS_LEN ((u16)0) | |
403 | #define HFA384x_RID_CNFMULTICASTRX_LEN ((u16)0) | |
404 | #define HFA384x_RID_CNFMAXSLEEPDUR_LEN ((u16)0) | |
405 | #define HFA384x_RID_CNFPMHOLDDUR_LEN ((u16)0) | |
406 | #define HFA384x_RID_CNFOWNNAME_LEN ((u16)34) | |
407 | #define HFA384x_RID_CNFOWNDTIMPER_LEN ((u16)0) | |
408 | #define HFA384x_RID_CNFWDSADDR1_LEN ((u16)6) | |
409 | #define HFA384x_RID_CNFWDSADDR2_LEN ((u16)6) | |
410 | #define HFA384x_RID_CNFWDSADDR3_LEN ((u16)6) | |
411 | #define HFA384x_RID_CNFWDSADDR4_LEN ((u16)6) | |
412 | #define HFA384x_RID_CNFWDSADDR5_LEN ((u16)6) | |
413 | #define HFA384x_RID_CNFWDSADDR6_LEN ((u16)6) | |
414 | #define HFA384x_RID_CNFMCASTPMBUFF_LEN ((u16)0) | |
415 | #define HFA384x_RID_CNFAUTHENTICATION_LEN ((u16)sizeof(u16)) | |
416 | #define HFA384x_RID_CNFMAXSLEEPDUR_LEN ((u16)0) | |
00b3ed16 GKH |
417 | |
418 | /*-------------------------------------------------------------------- | |
419 | Configuration RIDs: Network Parameters, Dynamic Configuration Entities | |
420 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
421 | #define HFA384x_RID_GROUPADDR ((u16)0xFC80) |
422 | #define HFA384x_RID_CREATEIBSS ((u16)0xFC81) | |
423 | #define HFA384x_RID_FRAGTHRESH ((u16)0xFC82) | |
424 | #define HFA384x_RID_RTSTHRESH ((u16)0xFC83) | |
425 | #define HFA384x_RID_TXRATECNTL ((u16)0xFC84) | |
426 | #define HFA384x_RID_PROMISCMODE ((u16)0xFC85) | |
427 | #define HFA384x_RID_FRAGTHRESH0 ((u16)0xFC90) | |
428 | #define HFA384x_RID_FRAGTHRESH1 ((u16)0xFC91) | |
429 | #define HFA384x_RID_FRAGTHRESH2 ((u16)0xFC92) | |
430 | #define HFA384x_RID_FRAGTHRESH3 ((u16)0xFC93) | |
431 | #define HFA384x_RID_FRAGTHRESH4 ((u16)0xFC94) | |
432 | #define HFA384x_RID_FRAGTHRESH5 ((u16)0xFC95) | |
433 | #define HFA384x_RID_FRAGTHRESH6 ((u16)0xFC96) | |
434 | #define HFA384x_RID_RTSTHRESH0 ((u16)0xFC97) | |
435 | #define HFA384x_RID_RTSTHRESH1 ((u16)0xFC98) | |
436 | #define HFA384x_RID_RTSTHRESH2 ((u16)0xFC99) | |
437 | #define HFA384x_RID_RTSTHRESH3 ((u16)0xFC9A) | |
438 | #define HFA384x_RID_RTSTHRESH4 ((u16)0xFC9B) | |
439 | #define HFA384x_RID_RTSTHRESH5 ((u16)0xFC9C) | |
440 | #define HFA384x_RID_RTSTHRESH6 ((u16)0xFC9D) | |
441 | #define HFA384x_RID_TXRATECNTL0 ((u16)0xFC9E) | |
442 | #define HFA384x_RID_TXRATECNTL1 ((u16)0xFC9F) | |
443 | #define HFA384x_RID_TXRATECNTL2 ((u16)0xFCA0) | |
444 | #define HFA384x_RID_TXRATECNTL3 ((u16)0xFCA1) | |
445 | #define HFA384x_RID_TXRATECNTL4 ((u16)0xFCA2) | |
446 | #define HFA384x_RID_TXRATECNTL5 ((u16)0xFCA3) | |
447 | #define HFA384x_RID_TXRATECNTL6 ((u16)0xFCA4) | |
00b3ed16 GKH |
448 | |
449 | /*-------------------------------------------------------------------- | |
450 | Configuration RID Lengths: Network Param, Dynamic Config Entities | |
451 | This is the length of JUST the DATA part of the RID (does not | |
452 | include the len or code fields) | |
453 | --------------------------------------------------------------------*/ | |
454 | /* TODO: fill in the rest of these */ | |
28b17a4b | 455 | #define HFA384x_RID_GROUPADDR_LEN ((u16)16 * ETH_ALEN) |
aaad4303 SP |
456 | #define HFA384x_RID_CREATEIBSS_LEN ((u16)0) |
457 | #define HFA384x_RID_FRAGTHRESH_LEN ((u16)0) | |
458 | #define HFA384x_RID_RTSTHRESH_LEN ((u16)0) | |
459 | #define HFA384x_RID_TXRATECNTL_LEN ((u16)4) | |
460 | #define HFA384x_RID_PROMISCMODE_LEN ((u16)2) | |
461 | #define HFA384x_RID_FRAGTHRESH0_LEN ((u16)0) | |
462 | #define HFA384x_RID_FRAGTHRESH1_LEN ((u16)0) | |
463 | #define HFA384x_RID_FRAGTHRESH2_LEN ((u16)0) | |
464 | #define HFA384x_RID_FRAGTHRESH3_LEN ((u16)0) | |
465 | #define HFA384x_RID_FRAGTHRESH4_LEN ((u16)0) | |
466 | #define HFA384x_RID_FRAGTHRESH5_LEN ((u16)0) | |
467 | #define HFA384x_RID_FRAGTHRESH6_LEN ((u16)0) | |
468 | #define HFA384x_RID_RTSTHRESH0_LEN ((u16)0) | |
469 | #define HFA384x_RID_RTSTHRESH1_LEN ((u16)0) | |
470 | #define HFA384x_RID_RTSTHRESH2_LEN ((u16)0) | |
471 | #define HFA384x_RID_RTSTHRESH3_LEN ((u16)0) | |
472 | #define HFA384x_RID_RTSTHRESH4_LEN ((u16)0) | |
473 | #define HFA384x_RID_RTSTHRESH5_LEN ((u16)0) | |
474 | #define HFA384x_RID_RTSTHRESH6_LEN ((u16)0) | |
475 | #define HFA384x_RID_TXRATECNTL0_LEN ((u16)0) | |
476 | #define HFA384x_RID_TXRATECNTL1_LEN ((u16)0) | |
477 | #define HFA384x_RID_TXRATECNTL2_LEN ((u16)0) | |
478 | #define HFA384x_RID_TXRATECNTL3_LEN ((u16)0) | |
479 | #define HFA384x_RID_TXRATECNTL4_LEN ((u16)0) | |
480 | #define HFA384x_RID_TXRATECNTL5_LEN ((u16)0) | |
481 | #define HFA384x_RID_TXRATECNTL6_LEN ((u16)0) | |
00b3ed16 GKH |
482 | |
483 | /*-------------------------------------------------------------------- | |
484 | Configuration RIDs: Behavior Parameters | |
485 | --------------------------------------------------------------------*/ | |
aaad4303 | 486 | #define HFA384x_RID_ITICKTIME ((u16)0xFCE0) |
00b3ed16 GKH |
487 | |
488 | /*-------------------------------------------------------------------- | |
489 | Configuration RID Lengths: Behavior Parameters | |
490 | This is the length of JUST the DATA part of the RID (does not | |
491 | include the len or code fields) | |
492 | --------------------------------------------------------------------*/ | |
aaad4303 | 493 | #define HFA384x_RID_ITICKTIME_LEN ((u16)2) |
00b3ed16 GKH |
494 | |
495 | /*---------------------------------------------------------------------- | |
496 | Information RIDs: NIC Information | |
497 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
498 | #define HFA384x_RID_MAXLOADTIME ((u16)0xFD00) |
499 | #define HFA384x_RID_DOWNLOADBUFFER ((u16)0xFD01) | |
500 | #define HFA384x_RID_PRIIDENTITY ((u16)0xFD02) | |
501 | #define HFA384x_RID_PRISUPRANGE ((u16)0xFD03) | |
502 | #define HFA384x_RID_PRI_CFIACTRANGES ((u16)0xFD04) | |
503 | #define HFA384x_RID_NICSERIALNUMBER ((u16)0xFD0A) | |
504 | #define HFA384x_RID_NICIDENTITY ((u16)0xFD0B) | |
505 | #define HFA384x_RID_MFISUPRANGE ((u16)0xFD0C) | |
506 | #define HFA384x_RID_CFISUPRANGE ((u16)0xFD0D) | |
507 | #define HFA384x_RID_CHANNELLIST ((u16)0xFD10) | |
508 | #define HFA384x_RID_REGULATORYDOMAINS ((u16)0xFD11) | |
509 | #define HFA384x_RID_TEMPTYPE ((u16)0xFD12) | |
510 | #define HFA384x_RID_CIS ((u16)0xFD13) | |
511 | #define HFA384x_RID_STAIDENTITY ((u16)0xFD20) | |
512 | #define HFA384x_RID_STASUPRANGE ((u16)0xFD21) | |
513 | #define HFA384x_RID_STA_MFIACTRANGES ((u16)0xFD22) | |
514 | #define HFA384x_RID_STA_CFIACTRANGES ((u16)0xFD23) | |
515 | #define HFA384x_RID_BUILDSEQ ((u16)0xFFFE) | |
516 | #define HFA384x_RID_FWID ((u16)0xFFFF) | |
00b3ed16 GKH |
517 | |
518 | /*---------------------------------------------------------------------- | |
519 | Information RID Lengths: NIC Information | |
520 | This is the length of JUST the DATA part of the RID (does not | |
521 | include the len or code fields) | |
522 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
523 | #define HFA384x_RID_MAXLOADTIME_LEN ((u16)0) |
524 | #define HFA384x_RID_DOWNLOADBUFFER_LEN ((u16)sizeof(hfa384x_downloadbuffer_t)) | |
525 | #define HFA384x_RID_PRIIDENTITY_LEN ((u16)8) | |
526 | #define HFA384x_RID_PRISUPRANGE_LEN ((u16)10) | |
527 | #define HFA384x_RID_CFIACTRANGES_LEN ((u16)10) | |
528 | #define HFA384x_RID_NICSERIALNUMBER_LEN ((u16)12) | |
529 | #define HFA384x_RID_NICIDENTITY_LEN ((u16)8) | |
530 | #define HFA384x_RID_MFISUPRANGE_LEN ((u16)10) | |
531 | #define HFA384x_RID_CFISUPRANGE_LEN ((u16)10) | |
532 | #define HFA384x_RID_CHANNELLIST_LEN ((u16)0) | |
533 | #define HFA384x_RID_REGULATORYDOMAINS_LEN ((u16)12) | |
534 | #define HFA384x_RID_TEMPTYPE_LEN ((u16)0) | |
535 | #define HFA384x_RID_CIS_LEN ((u16)480) | |
536 | #define HFA384x_RID_STAIDENTITY_LEN ((u16)8) | |
537 | #define HFA384x_RID_STASUPRANGE_LEN ((u16)10) | |
538 | #define HFA384x_RID_MFIACTRANGES_LEN ((u16)10) | |
539 | #define HFA384x_RID_CFIACTRANGES2_LEN ((u16)10) | |
540 | #define HFA384x_RID_BUILDSEQ_LEN ((u16)sizeof(hfa384x_BuildSeq_t)) | |
541 | #define HFA384x_RID_FWID_LEN ((u16)sizeof(hfa384x_FWID_t)) | |
00b3ed16 GKH |
542 | |
543 | /*-------------------------------------------------------------------- | |
544 | Information RIDs: MAC Information | |
545 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
546 | #define HFA384x_RID_PORTSTATUS ((u16)0xFD40) |
547 | #define HFA384x_RID_CURRENTSSID ((u16)0xFD41) | |
548 | #define HFA384x_RID_CURRENTBSSID ((u16)0xFD42) | |
549 | #define HFA384x_RID_COMMSQUALITY ((u16)0xFD43) | |
550 | #define HFA384x_RID_CURRENTTXRATE ((u16)0xFD44) | |
551 | #define HFA384x_RID_CURRENTBCNint ((u16)0xFD45) | |
552 | #define HFA384x_RID_CURRENTSCALETHRESH ((u16)0xFD46) | |
553 | #define HFA384x_RID_PROTOCOLRSPTIME ((u16)0xFD47) | |
554 | #define HFA384x_RID_SHORTRETRYLIMIT ((u16)0xFD48) | |
555 | #define HFA384x_RID_LONGRETRYLIMIT ((u16)0xFD49) | |
556 | #define HFA384x_RID_MAXTXLIFETIME ((u16)0xFD4A) | |
557 | #define HFA384x_RID_MAXRXLIFETIME ((u16)0xFD4B) | |
558 | #define HFA384x_RID_CFPOLLABLE ((u16)0xFD4C) | |
559 | #define HFA384x_RID_AUTHALGORITHMS ((u16)0xFD4D) | |
560 | #define HFA384x_RID_PRIVACYOPTIMP ((u16)0xFD4F) | |
561 | #define HFA384x_RID_DBMCOMMSQUALITY ((u16)0xFD51) | |
562 | #define HFA384x_RID_CURRENTTXRATE1 ((u16)0xFD80) | |
563 | #define HFA384x_RID_CURRENTTXRATE2 ((u16)0xFD81) | |
564 | #define HFA384x_RID_CURRENTTXRATE3 ((u16)0xFD82) | |
565 | #define HFA384x_RID_CURRENTTXRATE4 ((u16)0xFD83) | |
566 | #define HFA384x_RID_CURRENTTXRATE5 ((u16)0xFD84) | |
567 | #define HFA384x_RID_CURRENTTXRATE6 ((u16)0xFD85) | |
568 | #define HFA384x_RID_OWNMACADDRESS ((u16)0xFD86) | |
569 | // #define HFA384x_RID_PCFINFO ((u16)0xFD87) | |
570 | #define HFA384x_RID_SCANRESULTS ((u16)0xFD88) // NEW | |
571 | #define HFA384x_RID_HOSTSCANRESULTS ((u16)0xFD89) // NEW | |
572 | #define HFA384x_RID_AUTHENTICATIONUSED ((u16)0xFD8A) // NEW | |
573 | #define HFA384x_RID_ASSOCIATEFAILURE ((u16)0xFD8D) // 1.8.0 | |
00b3ed16 GKH |
574 | |
575 | /*-------------------------------------------------------------------- | |
576 | Information RID Lengths: MAC Information | |
577 | This is the length of JUST the DATA part of the RID (does not | |
578 | include the len or code fields) | |
579 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
580 | #define HFA384x_RID_PORTSTATUS_LEN ((u16)0) |
581 | #define HFA384x_RID_CURRENTSSID_LEN ((u16)34) | |
582 | #define HFA384x_RID_CURRENTBSSID_LEN ((u16)WLAN_BSSID_LEN) | |
583 | #define HFA384x_RID_COMMSQUALITY_LEN ((u16)sizeof(hfa384x_commsquality_t)) | |
584 | #define HFA384x_RID_DBMCOMMSQUALITY_LEN ((u16)sizeof(hfa384x_dbmcommsquality_t)) | |
585 | #define HFA384x_RID_CURRENTTXRATE_LEN ((u16)0) | |
586 | #define HFA384x_RID_CURRENTBCNint_LEN ((u16)0) | |
587 | #define HFA384x_RID_STACURSCALETHRESH_LEN ((u16)12) | |
588 | #define HFA384x_RID_APCURSCALETHRESH_LEN ((u16)6) | |
589 | #define HFA384x_RID_PROTOCOLRSPTIME_LEN ((u16)0) | |
590 | #define HFA384x_RID_SHORTRETRYLIMIT_LEN ((u16)0) | |
591 | #define HFA384x_RID_LONGRETRYLIMIT_LEN ((u16)0) | |
592 | #define HFA384x_RID_MAXTXLIFETIME_LEN ((u16)0) | |
593 | #define HFA384x_RID_MAXRXLIFETIME_LEN ((u16)0) | |
594 | #define HFA384x_RID_CFPOLLABLE_LEN ((u16)0) | |
595 | #define HFA384x_RID_AUTHALGORITHMS_LEN ((u16)4) | |
596 | #define HFA384x_RID_PRIVACYOPTIMP_LEN ((u16)0) | |
597 | #define HFA384x_RID_CURRENTTXRATE1_LEN ((u16)0) | |
598 | #define HFA384x_RID_CURRENTTXRATE2_LEN ((u16)0) | |
599 | #define HFA384x_RID_CURRENTTXRATE3_LEN ((u16)0) | |
600 | #define HFA384x_RID_CURRENTTXRATE4_LEN ((u16)0) | |
601 | #define HFA384x_RID_CURRENTTXRATE5_LEN ((u16)0) | |
602 | #define HFA384x_RID_CURRENTTXRATE6_LEN ((u16)0) | |
603 | #define HFA384x_RID_OWNMACADDRESS_LEN ((u16)6) | |
604 | #define HFA384x_RID_PCFINFO_LEN ((u16)6) | |
605 | #define HFA384x_RID_CNFAPPCFINFO_LEN ((u16)sizeof(hfa384x_PCFInfo_data_t)) | |
606 | #define HFA384x_RID_SCANREQUEST_LEN ((u16)sizeof(hfa384x_ScanRequest_data_t)) | |
607 | #define HFA384x_RID_JOINREQUEST_LEN ((u16)sizeof(hfa384x_JoinRequest_data_t)) | |
608 | #define HFA384x_RID_AUTHENTICATESTA_LEN ((u16)sizeof(hfa384x_authenticateStation_data_t)) | |
609 | #define HFA384x_RID_CHANNELINFOREQUEST_LEN ((u16)sizeof(hfa384x_ChannelInfoRequest_data_t)) | |
00b3ed16 GKH |
610 | /*-------------------------------------------------------------------- |
611 | Information RIDs: Modem Information | |
612 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
613 | #define HFA384x_RID_PHYTYPE ((u16)0xFDC0) |
614 | #define HFA384x_RID_CURRENTCHANNEL ((u16)0xFDC1) | |
615 | #define HFA384x_RID_CURRENTPOWERSTATE ((u16)0xFDC2) | |
616 | #define HFA384x_RID_CCAMODE ((u16)0xFDC3) | |
617 | #define HFA384x_RID_SUPPORTEDDATARATES ((u16)0xFDC6) | |
618 | #define HFA384x_RID_LFOSTATUS ((u16)0xFDC7) // 1.7.1 | |
00b3ed16 GKH |
619 | |
620 | /*-------------------------------------------------------------------- | |
621 | Information RID Lengths: Modem Information | |
622 | This is the length of JUST the DATA part of the RID (does not | |
623 | include the len or code fields) | |
624 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
625 | #define HFA384x_RID_PHYTYPE_LEN ((u16)0) |
626 | #define HFA384x_RID_CURRENTCHANNEL_LEN ((u16)0) | |
627 | #define HFA384x_RID_CURRENTPOWERSTATE_LEN ((u16)0) | |
628 | #define HFA384x_RID_CCAMODE_LEN ((u16)0) | |
629 | #define HFA384x_RID_SUPPORTEDDATARATES_LEN ((u16)10) | |
00b3ed16 GKH |
630 | |
631 | /*-------------------------------------------------------------------- | |
632 | API ENHANCEMENTS (NOT ALREADY IMPLEMENTED) | |
633 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
634 | #define HFA384x_RID_CNFWEPDEFAULTKEYID ((u16)0xFC23) |
635 | #define HFA384x_RID_CNFWEPDEFAULTKEY0 ((u16)0xFC24) | |
636 | #define HFA384x_RID_CNFWEPDEFAULTKEY1 ((u16)0xFC25) | |
637 | #define HFA384x_RID_CNFWEPDEFAULTKEY2 ((u16)0xFC26) | |
638 | #define HFA384x_RID_CNFWEPDEFAULTKEY3 ((u16)0xFC27) | |
639 | #define HFA384x_RID_CNFWEPFLAGS ((u16)0xFC28) | |
640 | #define HFA384x_RID_CNFWEPKEYMAPTABLE ((u16)0xFC29) | |
641 | #define HFA384x_RID_CNFAUTHENTICATION ((u16)0xFC2A) | |
642 | #define HFA384x_RID_CNFMAXASSOCSTATIONS ((u16)0xFC2B) | |
643 | #define HFA384x_RID_CNFTXCONTROL ((u16)0xFC2C) | |
644 | #define HFA384x_RID_CNFROAMINGMODE ((u16)0xFC2D) | |
645 | #define HFA384x_RID_CNFHOSTAUTHASSOC ((u16)0xFC2E) | |
646 | #define HFA384x_RID_CNFRCVCRCERROR ((u16)0xFC30) | |
647 | // #define HFA384x_RID_CNFMMLIFE ((u16)0xFC31) | |
648 | #define HFA384x_RID_CNFALTRETRYCNT ((u16)0xFC32) | |
649 | #define HFA384x_RID_CNFAPBCNint ((u16)0xFC33) | |
650 | #define HFA384x_RID_CNFAPPCFINFO ((u16)0xFC34) | |
651 | #define HFA384x_RID_CNFSTAPCFINFO ((u16)0xFC35) | |
652 | #define HFA384x_RID_CNFPRIORITYQUSAGE ((u16)0xFC37) | |
653 | #define HFA384x_RID_CNFTIMCTRL ((u16)0xFC40) | |
654 | #define HFA384x_RID_CNFTHIRTY2TALLY ((u16)0xFC42) | |
655 | #define HFA384x_RID_CNFENHSECURITY ((u16)0xFC43) | |
656 | #define HFA384x_RID_CNFDBMADJUST ((u16)0xFC46) // NEW | |
657 | #define HFA384x_RID_CNFWPADATA ((u16)0xFC48) // 1.7.0 | |
658 | #define HFA384x_RID_CNFPROPOGATIONDELAY ((u16)0xFC49) // 1.7.6 | |
659 | #define HFA384x_RID_CNFSHORTPREAMBLE ((u16)0xFCB0) | |
660 | #define HFA384x_RID_CNFEXCLONGPREAMBLE ((u16)0xFCB1) | |
661 | #define HFA384x_RID_CNFAUTHRSPTIMEOUT ((u16)0xFCB2) | |
662 | #define HFA384x_RID_CNFBASICRATES ((u16)0xFCB3) | |
663 | #define HFA384x_RID_CNFSUPPRATES ((u16)0xFCB4) | |
664 | #define HFA384x_RID_CNFFALLBACKCTRL ((u16)0xFCB5) // NEW | |
665 | #define HFA384x_RID_WEPKEYSTATUS ((u16)0xFCB6) // NEW | |
666 | #define HFA384x_RID_WEPKEYMAPINDEX ((u16)0xFCB7) // NEW | |
667 | #define HFA384x_RID_BROADCASTKEYID ((u16)0xFCB8) // NEW | |
668 | #define HFA384x_RID_ENTSECFLAGEYID ((u16)0xFCB9) // NEW | |
669 | #define HFA384x_RID_CNFPASSIVESCANCTRL ((u16)0xFCBA) // NEW STA | |
670 | #define HFA384x_RID_CNFWPAHANDLING ((u16)0xFCBB) // 1.7.0 | |
671 | #define HFA384x_RID_MDCCONTROL ((u16)0xFCBC) // 1.7.0/1.4.0 | |
672 | #define HFA384x_RID_MDCCOUNTRY ((u16)0xFCBD) // 1.7.0/1.4.0 | |
673 | #define HFA384x_RID_TXPOWERMAX ((u16)0xFCBE) // 1.7.0/1.4.0 | |
674 | #define HFA384x_RID_CNFLFOENBLED ((u16)0xFCBF) // 1.6.3 | |
675 | #define HFA384x_RID_CAPINFO ((u16)0xFCC0) // 1.7.0/1.3.7 | |
676 | #define HFA384x_RID_LISTENintERVAL ((u16)0xFCC1) // 1.7.0/1.3.7 | |
677 | #define HFA384x_RID_DIVERSITYENABLED ((u16)0xFCC2) // 1.7.0/1.3.7 | |
678 | #define HFA384x_RID_LED_CONTROL ((u16)0xFCC4) // 1.7.6 | |
679 | #define HFA384x_RID_HFO_DELAY ((u16)0xFCC5) // 1.7.6 | |
680 | #define HFA384x_RID_DISSALOWEDBSSID ((u16)0xFCC6) // 1.8.0 | |
681 | #define HFA384x_RID_SCANREQUEST ((u16)0xFCE1) | |
682 | #define HFA384x_RID_JOINREQUEST ((u16)0xFCE2) | |
683 | #define HFA384x_RID_AUTHENTICATESTA ((u16)0xFCE3) | |
684 | #define HFA384x_RID_CHANNELINFOREQUEST ((u16)0xFCE4) | |
685 | #define HFA384x_RID_HOSTSCAN ((u16)0xFCE5) // NEW STA | |
686 | #define HFA384x_RID_ASSOCIATESTA ((u16)0xFCE6) | |
687 | ||
688 | #define HFA384x_RID_CNFWEPDEFAULTKEY_LEN ((u16)6) | |
689 | #define HFA384x_RID_CNFWEP128DEFAULTKEY_LEN ((u16)14) | |
690 | #define HFA384x_RID_CNFPRIOQUSAGE_LEN ((u16)4) | |
00b3ed16 GKH |
691 | /*-------------------------------------------------------------------- |
692 | PD Record codes | |
693 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
694 | #define HFA384x_PDR_PCB_PARTNUM ((u16)0x0001) |
695 | #define HFA384x_PDR_PDAVER ((u16)0x0002) | |
696 | #define HFA384x_PDR_NIC_SERIAL ((u16)0x0003) | |
697 | #define HFA384x_PDR_MKK_MEASUREMENTS ((u16)0x0004) | |
698 | #define HFA384x_PDR_NIC_RAMSIZE ((u16)0x0005) | |
699 | #define HFA384x_PDR_MFISUPRANGE ((u16)0x0006) | |
700 | #define HFA384x_PDR_CFISUPRANGE ((u16)0x0007) | |
701 | #define HFA384x_PDR_NICID ((u16)0x0008) | |
702 | //#define HFA384x_PDR_REFDAC_MEASUREMENTS ((u16)0x0010) | |
703 | //#define HFA384x_PDR_VGDAC_MEASUREMENTS ((u16)0x0020) | |
704 | //#define HFA384x_PDR_LEVEL_COMP_MEASUREMENTS ((u16)0x0030) | |
705 | //#define HFA384x_PDR_MODEM_TRIMDAC_MEASUREMENTS ((u16)0x0040) | |
706 | //#define HFA384x_PDR_COREGA_HACK ((u16)0x00ff) | |
707 | #define HFA384x_PDR_MAC_ADDRESS ((u16)0x0101) | |
708 | //#define HFA384x_PDR_MKK_CALLNAME ((u16)0x0102) | |
709 | #define HFA384x_PDR_REGDOMAIN ((u16)0x0103) | |
710 | #define HFA384x_PDR_ALLOWED_CHANNEL ((u16)0x0104) | |
711 | #define HFA384x_PDR_DEFAULT_CHANNEL ((u16)0x0105) | |
712 | //#define HFA384x_PDR_PRIVACY_OPTION ((u16)0x0106) | |
713 | #define HFA384x_PDR_TEMPTYPE ((u16)0x0107) | |
714 | //#define HFA384x_PDR_REFDAC_SETUP ((u16)0x0110) | |
715 | //#define HFA384x_PDR_VGDAC_SETUP ((u16)0x0120) | |
716 | //#define HFA384x_PDR_LEVEL_COMP_SETUP ((u16)0x0130) | |
717 | //#define HFA384x_PDR_TRIMDAC_SETUP ((u16)0x0140) | |
718 | #define HFA384x_PDR_IFR_SETTING ((u16)0x0200) | |
719 | #define HFA384x_PDR_RFR_SETTING ((u16)0x0201) | |
720 | #define HFA384x_PDR_HFA3861_BASELINE ((u16)0x0202) | |
721 | #define HFA384x_PDR_HFA3861_SHADOW ((u16)0x0203) | |
722 | #define HFA384x_PDR_HFA3861_IFRF ((u16)0x0204) | |
723 | #define HFA384x_PDR_HFA3861_CHCALSP ((u16)0x0300) | |
724 | #define HFA384x_PDR_HFA3861_CHCALI ((u16)0x0301) | |
725 | #define HFA384x_PDR_MAX_TX_POWER ((u16)0x0302) | |
726 | #define HFA384x_PDR_MASTER_CHAN_LIST ((u16)0x0303) | |
727 | #define HFA384x_PDR_3842_NIC_CONFIG ((u16)0x0400) | |
728 | #define HFA384x_PDR_USB_ID ((u16)0x0401) | |
729 | #define HFA384x_PDR_PCI_ID ((u16)0x0402) | |
730 | #define HFA384x_PDR_PCI_IFCONF ((u16)0x0403) | |
731 | #define HFA384x_PDR_PCI_PMCONF ((u16)0x0404) | |
732 | #define HFA384x_PDR_RFENRGY ((u16)0x0406) | |
733 | #define HFA384x_PDR_USB_POWER_TYPE ((u16)0x0407) | |
734 | //#define HFA384x_PDR_UNKNOWN408 ((u16)0x0408) | |
735 | #define HFA384x_PDR_USB_MAX_POWER ((u16)0x0409) | |
736 | #define HFA384x_PDR_USB_MANUFACTURER ((u16)0x0410) | |
737 | #define HFA384x_PDR_USB_PRODUCT ((u16)0x0411) | |
738 | #define HFA384x_PDR_ANT_DIVERSITY ((u16)0x0412) | |
739 | #define HFA384x_PDR_HFO_DELAY ((u16)0x0413) | |
740 | #define HFA384x_PDR_SCALE_THRESH ((u16)0x0414) | |
741 | ||
742 | #define HFA384x_PDR_HFA3861_MANF_TESTSP ((u16)0x0900) | |
743 | #define HFA384x_PDR_HFA3861_MANF_TESTI ((u16)0x0901) | |
744 | #define HFA384x_PDR_END_OF_PDA ((u16)0x0000) | |
00b3ed16 GKH |
745 | |
746 | ||
747 | /*=============================================================*/ | |
748 | /*------ Macros -----------------------------------------------*/ | |
749 | ||
750 | /*--- Register ID macros ------------------------*/ | |
751 | ||
752 | #define HFA384x_CMD HFA384x_CMD_OFF | |
753 | #define HFA384x_PARAM0 HFA384x_PARAM0_OFF | |
754 | #define HFA384x_PARAM1 HFA384x_PARAM1_OFF | |
755 | #define HFA384x_PARAM2 HFA384x_PARAM2_OFF | |
756 | #define HFA384x_STATUS HFA384x_STATUS_OFF | |
757 | #define HFA384x_RESP0 HFA384x_RESP0_OFF | |
758 | #define HFA384x_RESP1 HFA384x_RESP1_OFF | |
759 | #define HFA384x_RESP2 HFA384x_RESP2_OFF | |
760 | #define HFA384x_INFOFID HFA384x_INFOFID_OFF | |
761 | #define HFA384x_RXFID HFA384x_RXFID_OFF | |
762 | #define HFA384x_ALLOCFID HFA384x_ALLOCFID_OFF | |
763 | #define HFA384x_TXCOMPLFID HFA384x_TXCOMPLFID_OFF | |
764 | #define HFA384x_SELECT0 HFA384x_SELECT0_OFF | |
765 | #define HFA384x_OFFSET0 HFA384x_OFFSET0_OFF | |
766 | #define HFA384x_DATA0 HFA384x_DATA0_OFF | |
767 | #define HFA384x_SELECT1 HFA384x_SELECT1_OFF | |
768 | #define HFA384x_OFFSET1 HFA384x_OFFSET1_OFF | |
769 | #define HFA384x_DATA1 HFA384x_DATA1_OFF | |
770 | #define HFA384x_EVSTAT HFA384x_EVSTAT_OFF | |
aaad4303 | 771 | #define HFA384x_intEN HFA384x_INTEN_OFF |
00b3ed16 GKH |
772 | #define HFA384x_EVACK HFA384x_EVACK_OFF |
773 | #define HFA384x_CONTROL HFA384x_CONTROL_OFF | |
774 | #define HFA384x_SWSUPPORT0 HFA384x_SWSUPPORT0_OFF | |
775 | #define HFA384x_SWSUPPORT1 HFA384x_SWSUPPORT1_OFF | |
776 | #define HFA384x_SWSUPPORT2 HFA384x_SWSUPPORT2_OFF | |
777 | #define HFA384x_AUXPAGE HFA384x_AUXPAGE_OFF | |
778 | #define HFA384x_AUXOFFSET HFA384x_AUXOFFSET_OFF | |
779 | #define HFA384x_AUXDATA HFA384x_AUXDATA_OFF | |
780 | #define HFA384x_PCICOR HFA384x_PCICOR_OFF | |
781 | #define HFA384x_PCIHCR HFA384x_PCIHCR_OFF | |
782 | ||
783 | ||
784 | /*--- Register Test/Get/Set Field macros ------------------------*/ | |
785 | ||
aaad4303 SP |
786 | #define HFA384x_CMD_ISBUSY(value) ((u16)(((u16)value) & HFA384x_CMD_BUSY)) |
787 | #define HFA384x_CMD_AINFO_GET(value) ((u16)(((u16)(value) & HFA384x_CMD_AINFO) >> 8)) | |
788 | #define HFA384x_CMD_AINFO_SET(value) ((u16)((u16)(value) << 8)) | |
789 | #define HFA384x_CMD_MACPORT_GET(value) ((u16)(HFA384x_CMD_AINFO_GET((u16)(value) & HFA384x_CMD_MACPORT))) | |
790 | #define HFA384x_CMD_MACPORT_SET(value) ((u16)HFA384x_CMD_AINFO_SET(value)) | |
791 | #define HFA384x_CMD_ISRECL(value) ((u16)(HFA384x_CMD_AINFO_GET((u16)(value) & HFA384x_CMD_RECL))) | |
792 | #define HFA384x_CMD_RECL_SET(value) ((u16)HFA384x_CMD_AINFO_SET(value)) | |
793 | #define HFA384x_CMD_QOS_GET(value) ((u16)((((u16)(value))&((u16)0x3000)) >> 12)) | |
794 | #define HFA384x_CMD_QOS_SET(value) ((u16)((((u16)(value)) << 12) & 0x3000)) | |
795 | #define HFA384x_CMD_ISWRITE(value) ((u16)(HFA384x_CMD_AINFO_GET((u16)(value) & HFA384x_CMD_WRITE))) | |
796 | #define HFA384x_CMD_WRITE_SET(value) ((u16)HFA384x_CMD_AINFO_SET((u16)value)) | |
797 | #define HFA384x_CMD_PROGMODE_GET(value) ((u16)(HFA384x_CMD_AINFO_GET((u16)(value) & HFA384x_CMD_PROGMODE))) | |
798 | #define HFA384x_CMD_PROGMODE_SET(value) ((u16)HFA384x_CMD_AINFO_SET((u16)value)) | |
799 | #define HFA384x_CMD_CMDCODE_GET(value) ((u16)(((u16)(value)) & HFA384x_CMD_CMDCODE)) | |
800 | #define HFA384x_CMD_CMDCODE_SET(value) ((u16)(value)) | |
801 | ||
802 | #define HFA384x_STATUS_RESULT_GET(value) ((u16)((((u16)(value)) & HFA384x_STATUS_RESULT) >> 8)) | |
803 | #define HFA384x_STATUS_RESULT_SET(value) (((u16)(value)) << 8) | |
804 | #define HFA384x_STATUS_CMDCODE_GET(value) (((u16)(value)) & HFA384x_STATUS_CMDCODE) | |
805 | #define HFA384x_STATUS_CMDCODE_SET(value) ((u16)(value)) | |
806 | ||
807 | #define HFA384x_OFFSET_ISBUSY(value) ((u16)(((u16)(value)) & HFA384x_OFFSET_BUSY)) | |
808 | #define HFA384x_OFFSET_ISERR(value) ((u16)(((u16)(value)) & HFA384x_OFFSET_ERR)) | |
809 | #define HFA384x_OFFSET_DATAOFF_GET(value) ((u16)(((u16)(value)) & HFA384x_OFFSET_DATAOFF)) | |
810 | #define HFA384x_OFFSET_DATAOFF_SET(value) ((u16)(value)) | |
811 | ||
812 | #define HFA384x_EVSTAT_ISTICK(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_TICK)) | |
813 | #define HFA384x_EVSTAT_ISWTERR(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_WTERR)) | |
814 | #define HFA384x_EVSTAT_ISINFDROP(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_INFDROP)) | |
815 | #define HFA384x_EVSTAT_ISINFO(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_INFO)) | |
816 | #define HFA384x_EVSTAT_ISDTIM(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_DTIM)) | |
817 | #define HFA384x_EVSTAT_ISCMD(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_CMD)) | |
818 | #define HFA384x_EVSTAT_ISALLOC(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_ALLOC)) | |
819 | #define HFA384x_EVSTAT_ISTXEXC(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_TXEXC)) | |
820 | #define HFA384x_EVSTAT_ISTX(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_TX)) | |
821 | #define HFA384x_EVSTAT_ISRX(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_RX)) | |
822 | ||
823 | #define HFA384x_EVSTAT_ISBAP_OP(value) ((u16)(((u16)(value)) & HFA384x_int_BAP_OP)) | |
824 | ||
825 | #define HFA384x_intEN_ISTICK(value) ((u16)(((u16)(value)) & HFA384x_INTEN_TICK)) | |
826 | #define HFA384x_intEN_TICK_SET(value) ((u16)(((u16)(value)) << 15)) | |
827 | #define HFA384x_intEN_ISWTERR(value) ((u16)(((u16)(value)) & HFA384x_INTEN_WTERR)) | |
828 | #define HFA384x_intEN_WTERR_SET(value) ((u16)(((u16)(value)) << 14)) | |
829 | #define HFA384x_intEN_ISINFDROP(value) ((u16)(((u16)(value)) & HFA384x_INTEN_INFDROP)) | |
830 | #define HFA384x_intEN_INFDROP_SET(value) ((u16)(((u16)(value)) << 13)) | |
831 | #define HFA384x_intEN_ISINFO(value) ((u16)(((u16)(value)) & HFA384x_INTEN_INFO)) | |
832 | #define HFA384x_intEN_INFO_SET(value) ((u16)(((u16)(value)) << 7)) | |
833 | #define HFA384x_intEN_ISDTIM(value) ((u16)(((u16)(value)) & HFA384x_INTEN_DTIM)) | |
834 | #define HFA384x_intEN_DTIM_SET(value) ((u16)(((u16)(value)) << 5)) | |
835 | #define HFA384x_intEN_ISCMD(value) ((u16)(((u16)(value)) & HFA384x_INTEN_CMD)) | |
836 | #define HFA384x_intEN_CMD_SET(value) ((u16)(((u16)(value)) << 4)) | |
837 | #define HFA384x_intEN_ISALLOC(value) ((u16)(((u16)(value)) & HFA384x_INTEN_ALLOC)) | |
838 | #define HFA384x_intEN_ALLOC_SET(value) ((u16)(((u16)(value)) << 3)) | |
839 | #define HFA384x_intEN_ISTXEXC(value) ((u16)(((u16)(value)) & HFA384x_INTEN_TXEXC)) | |
840 | #define HFA384x_intEN_TXEXC_SET(value) ((u16)(((u16)(value)) << 2)) | |
841 | #define HFA384x_intEN_ISTX(value) ((u16)(((u16)(value)) & HFA384x_INTEN_TX)) | |
842 | #define HFA384x_intEN_TX_SET(value) ((u16)(((u16)(value)) << 1)) | |
843 | #define HFA384x_intEN_ISRX(value) ((u16)(((u16)(value)) & HFA384x_INTEN_RX)) | |
844 | #define HFA384x_intEN_RX_SET(value) ((u16)(((u16)(value)) << 0)) | |
845 | ||
846 | #define HFA384x_EVACK_ISTICK(value) ((u16)(((u16)(value)) & HFA384x_EVACK_TICK)) | |
847 | #define HFA384x_EVACK_TICK_SET(value) ((u16)(((u16)(value)) << 15)) | |
848 | #define HFA384x_EVACK_ISWTERR(value) ((u16)(((u16)(value)) & HFA384x_EVACK_WTERR)) | |
849 | #define HFA384x_EVACK_WTERR_SET(value) ((u16)(((u16)(value)) << 14)) | |
850 | #define HFA384x_EVACK_ISINFDROP(value) ((u16)(((u16)(value)) & HFA384x_EVACK_INFDROP)) | |
851 | #define HFA384x_EVACK_INFDROP_SET(value) ((u16)(((u16)(value)) << 13)) | |
852 | #define HFA384x_EVACK_ISINFO(value) ((u16)(((u16)(value)) & HFA384x_EVACK_INFO)) | |
853 | #define HFA384x_EVACK_INFO_SET(value) ((u16)(((u16)(value)) << 7)) | |
854 | #define HFA384x_EVACK_ISDTIM(value) ((u16)(((u16)(value)) & HFA384x_EVACK_DTIM)) | |
855 | #define HFA384x_EVACK_DTIM_SET(value) ((u16)(((u16)(value)) << 5)) | |
856 | #define HFA384x_EVACK_ISCMD(value) ((u16)(((u16)(value)) & HFA384x_EVACK_CMD)) | |
857 | #define HFA384x_EVACK_CMD_SET(value) ((u16)(((u16)(value)) << 4)) | |
858 | #define HFA384x_EVACK_ISALLOC(value) ((u16)(((u16)(value)) & HFA384x_EVACK_ALLOC)) | |
859 | #define HFA384x_EVACK_ALLOC_SET(value) ((u16)(((u16)(value)) << 3)) | |
860 | #define HFA384x_EVACK_ISTXEXC(value) ((u16)(((u16)(value)) & HFA384x_EVACK_TXEXC)) | |
861 | #define HFA384x_EVACK_TXEXC_SET(value) ((u16)(((u16)(value)) << 2)) | |
862 | #define HFA384x_EVACK_ISTX(value) ((u16)(((u16)(value)) & HFA384x_EVACK_TX)) | |
863 | #define HFA384x_EVACK_TX_SET(value) ((u16)(((u16)(value)) << 1)) | |
864 | #define HFA384x_EVACK_ISRX(value) ((u16)(((u16)(value)) & HFA384x_EVACK_RX)) | |
865 | #define HFA384x_EVACK_RX_SET(value) ((u16)(((u16)(value)) << 0)) | |
866 | ||
867 | #define HFA384x_CONTROL_AUXEN_SET(value) ((u16)(((u16)(value)) << 14)) | |
868 | #define HFA384x_CONTROL_AUXEN_GET(value) ((u16)(((u16)(value)) >> 14)) | |
00b3ed16 GKH |
869 | |
870 | /* Byte Order */ | |
871 | #ifdef __KERNEL__ | |
aaad4303 SP |
872 | #define hfa384x2host_16(n) (__le16_to_cpu((u16)(n))) |
873 | #define hfa384x2host_32(n) (__le32_to_cpu((u32)(n))) | |
874 | #define host2hfa384x_16(n) (__cpu_to_le16((u16)(n))) | |
875 | #define host2hfa384x_32(n) (__cpu_to_le32((u32)(n))) | |
00b3ed16 GKH |
876 | #endif |
877 | ||
878 | /* Host Maintained State Info */ | |
879 | #define HFA384x_STATE_PREINIT 0 | |
880 | #define HFA384x_STATE_INIT 1 | |
881 | #define HFA384x_STATE_RUNNING 2 | |
882 | ||
883 | /*=============================================================*/ | |
884 | /*------ Types and their related constants --------------------*/ | |
885 | ||
886 | #define HFA384x_HOSTAUTHASSOC_HOSTAUTH BIT0 | |
887 | #define HFA384x_HOSTAUTHASSOC_HOSTASSOC BIT1 | |
888 | ||
889 | #define HFA384x_WHAHANDLING_DISABLED 0 | |
890 | #define HFA384x_WHAHANDLING_PASSTHROUGH BIT1 | |
891 | ||
892 | /*-------------------------------------------------------------*/ | |
893 | /* Commonly used basic types */ | |
894 | typedef struct hfa384x_bytestr | |
895 | { | |
aaad4303 SP |
896 | u16 len; |
897 | u8 data[0]; | |
9cba46dc | 898 | } __attribute__((packed)) hfa384x_bytestr_t; |
00b3ed16 GKH |
899 | |
900 | typedef struct hfa384x_bytestr32 | |
901 | { | |
aaad4303 SP |
902 | u16 len; |
903 | u8 data[32]; | |
9cba46dc | 904 | } __attribute__((packed)) hfa384x_bytestr32_t; |
00b3ed16 GKH |
905 | |
906 | /*-------------------------------------------------------------------- | |
907 | Configuration Record Structures: | |
908 | Network Parameters, Static Configuration Entities | |
909 | --------------------------------------------------------------------*/ | |
910 | /* Prototype structure: all configuration record structures start with | |
911 | these members */ | |
912 | ||
913 | typedef struct hfa384x_record | |
914 | { | |
aaad4303 SP |
915 | u16 reclen; |
916 | u16 rid; | |
9cba46dc | 917 | } __attribute__((packed)) hfa384x_rec_t; |
00b3ed16 GKH |
918 | |
919 | typedef struct hfa384x_record16 | |
920 | { | |
aaad4303 SP |
921 | u16 reclen; |
922 | u16 rid; | |
923 | u16 val; | |
9cba46dc | 924 | } __attribute__((packed)) hfa384x_rec16_t; |
00b3ed16 GKH |
925 | |
926 | typedef struct hfa384x_record32 | |
927 | { | |
aaad4303 SP |
928 | u16 reclen; |
929 | u16 rid; | |
930 | u32 val; | |
9cba46dc | 931 | } __attribute__((packed)) hfa384x_rec32; |
00b3ed16 GKH |
932 | |
933 | /*-- Hardware/Firmware Component Information ----------*/ | |
934 | typedef struct hfa384x_compident | |
935 | { | |
aaad4303 SP |
936 | u16 id; |
937 | u16 variant; | |
938 | u16 major; | |
939 | u16 minor; | |
9cba46dc | 940 | } __attribute__((packed)) hfa384x_compident_t; |
00b3ed16 GKH |
941 | |
942 | typedef struct hfa384x_caplevel | |
943 | { | |
aaad4303 SP |
944 | u16 role; |
945 | u16 id; | |
946 | u16 variant; | |
947 | u16 bottom; | |
948 | u16 top; | |
9cba46dc | 949 | } __attribute__((packed)) hfa384x_caplevel_t; |
00b3ed16 GKH |
950 | |
951 | /*-- Configuration Record: cnfPortType --*/ | |
952 | typedef struct hfa384x_cnfPortType | |
953 | { | |
aaad4303 | 954 | u16 cnfPortType; |
9cba46dc | 955 | } __attribute__((packed)) hfa384x_cnfPortType_t; |
00b3ed16 GKH |
956 | |
957 | /*-- Configuration Record: cnfOwnMACAddress --*/ | |
958 | typedef struct hfa384x_cnfOwnMACAddress | |
959 | { | |
aaad4303 | 960 | u8 cnfOwnMACAddress[6]; |
9cba46dc | 961 | } __attribute__((packed)) hfa384x_cnfOwnMACAddress_t; |
00b3ed16 GKH |
962 | |
963 | /*-- Configuration Record: cnfDesiredSSID --*/ | |
964 | typedef struct hfa384x_cnfDesiredSSID | |
965 | { | |
aaad4303 | 966 | u8 cnfDesiredSSID[34]; |
9cba46dc | 967 | } __attribute__((packed)) hfa384x_cnfDesiredSSID_t; |
00b3ed16 GKH |
968 | |
969 | /*-- Configuration Record: cnfOwnChannel --*/ | |
970 | typedef struct hfa384x_cnfOwnChannel | |
971 | { | |
aaad4303 | 972 | u16 cnfOwnChannel; |
9cba46dc | 973 | } __attribute__((packed)) hfa384x_cnfOwnChannel_t; |
00b3ed16 GKH |
974 | |
975 | /*-- Configuration Record: cnfOwnSSID --*/ | |
976 | typedef struct hfa384x_cnfOwnSSID | |
977 | { | |
aaad4303 | 978 | u8 cnfOwnSSID[34]; |
9cba46dc | 979 | } __attribute__((packed)) hfa384x_cnfOwnSSID_t; |
00b3ed16 GKH |
980 | |
981 | /*-- Configuration Record: cnfOwnATIMWindow --*/ | |
982 | typedef struct hfa384x_cnfOwnATIMWindow | |
983 | { | |
aaad4303 | 984 | u16 cnfOwnATIMWindow; |
9cba46dc | 985 | } __attribute__((packed)) hfa384x_cnfOwnATIMWindow_t; |
00b3ed16 GKH |
986 | |
987 | /*-- Configuration Record: cnfSystemScale --*/ | |
988 | typedef struct hfa384x_cnfSystemScale | |
989 | { | |
aaad4303 | 990 | u16 cnfSystemScale; |
9cba46dc | 991 | } __attribute__((packed)) hfa384x_cnfSystemScale_t; |
00b3ed16 GKH |
992 | |
993 | /*-- Configuration Record: cnfMaxDataLength --*/ | |
994 | typedef struct hfa384x_cnfMaxDataLength | |
995 | { | |
aaad4303 | 996 | u16 cnfMaxDataLength; |
9cba46dc | 997 | } __attribute__((packed)) hfa384x_cnfMaxDataLength_t; |
00b3ed16 GKH |
998 | |
999 | /*-- Configuration Record: cnfWDSAddress --*/ | |
1000 | typedef struct hfa384x_cnfWDSAddress | |
1001 | { | |
aaad4303 | 1002 | u8 cnfWDSAddress[6]; |
9cba46dc | 1003 | } __attribute__((packed)) hfa384x_cnfWDSAddress_t; |
00b3ed16 GKH |
1004 | |
1005 | /*-- Configuration Record: cnfPMEnabled --*/ | |
1006 | typedef struct hfa384x_cnfPMEnabled | |
1007 | { | |
aaad4303 | 1008 | u16 cnfPMEnabled; |
9cba46dc | 1009 | } __attribute__((packed)) hfa384x_cnfPMEnabled_t; |
00b3ed16 GKH |
1010 | |
1011 | /*-- Configuration Record: cnfPMEPS --*/ | |
1012 | typedef struct hfa384x_cnfPMEPS | |
1013 | { | |
aaad4303 | 1014 | u16 cnfPMEPS; |
9cba46dc | 1015 | } __attribute__((packed)) hfa384x_cnfPMEPS_t; |
00b3ed16 GKH |
1016 | |
1017 | /*-- Configuration Record: cnfMulticastReceive --*/ | |
1018 | typedef struct hfa384x_cnfMulticastReceive | |
1019 | { | |
aaad4303 | 1020 | u16 cnfMulticastReceive; |
9cba46dc | 1021 | } __attribute__((packed)) hfa384x_cnfMulticastReceive_t; |
00b3ed16 GKH |
1022 | |
1023 | /*-- Configuration Record: cnfAuthentication --*/ | |
1024 | #define HFA384x_CNFAUTHENTICATION_OPENSYSTEM 0x0001 | |
1025 | #define HFA384x_CNFAUTHENTICATION_SHAREDKEY 0x0002 | |
1026 | #define HFA384x_CNFAUTHENTICATION_LEAP 0x0004 | |
1027 | ||
1028 | /*-- Configuration Record: cnfMaxSleepDuration --*/ | |
1029 | typedef struct hfa384x_cnfMaxSleepDuration | |
1030 | { | |
aaad4303 | 1031 | u16 cnfMaxSleepDuration; |
9cba46dc | 1032 | } __attribute__((packed)) hfa384x_cnfMaxSleepDuration_t; |
00b3ed16 GKH |
1033 | |
1034 | /*-- Configuration Record: cnfPMHoldoverDuration --*/ | |
1035 | typedef struct hfa384x_cnfPMHoldoverDuration | |
1036 | { | |
aaad4303 | 1037 | u16 cnfPMHoldoverDuration; |
9cba46dc | 1038 | } __attribute__((packed)) hfa384x_cnfPMHoldoverDuration_t; |
00b3ed16 GKH |
1039 | |
1040 | /*-- Configuration Record: cnfOwnName --*/ | |
1041 | typedef struct hfa384x_cnfOwnName | |
1042 | { | |
aaad4303 | 1043 | u8 cnfOwnName[34]; |
9cba46dc | 1044 | } __attribute__((packed)) hfa384x_cnfOwnName_t; |
00b3ed16 GKH |
1045 | |
1046 | /*-- Configuration Record: cnfOwnDTIMPeriod --*/ | |
1047 | typedef struct hfa384x_cnfOwnDTIMPeriod | |
1048 | { | |
aaad4303 | 1049 | u16 cnfOwnDTIMPeriod; |
9cba46dc | 1050 | } __attribute__((packed)) hfa384x_cnfOwnDTIMPeriod_t; |
00b3ed16 GKH |
1051 | |
1052 | /*-- Configuration Record: cnfWDSAddress --*/ | |
1053 | typedef struct hfa384x_cnfWDSAddressN | |
1054 | { | |
aaad4303 | 1055 | u8 cnfWDSAddress[6]; |
9cba46dc | 1056 | } __attribute__((packed)) hfa384x_cnfWDSAddressN_t; |
00b3ed16 GKH |
1057 | |
1058 | /*-- Configuration Record: cnfMulticastPMBuffering --*/ | |
1059 | typedef struct hfa384x_cnfMulticastPMBuffering | |
1060 | { | |
aaad4303 | 1061 | u16 cnfMulticastPMBuffering; |
9cba46dc | 1062 | } __attribute__((packed)) hfa384x_cnfMulticastPMBuffering_t; |
00b3ed16 GKH |
1063 | |
1064 | /*-------------------------------------------------------------------- | |
1065 | Configuration Record Structures: | |
1066 | Network Parameters, Dynamic Configuration Entities | |
1067 | --------------------------------------------------------------------*/ | |
1068 | ||
1069 | /*-- Configuration Record: GroupAddresses --*/ | |
1070 | typedef struct hfa384x_GroupAddresses | |
1071 | { | |
aaad4303 | 1072 | u8 MACAddress[16][6]; |
9cba46dc | 1073 | } __attribute__((packed)) hfa384x_GroupAddresses_t; |
00b3ed16 GKH |
1074 | |
1075 | /*-- Configuration Record: CreateIBSS --*/ | |
1076 | typedef struct hfa384x_CreateIBSS | |
1077 | { | |
aaad4303 | 1078 | u16 CreateIBSS; |
9cba46dc | 1079 | } __attribute__((packed)) hfa384x_CreateIBSS_t; |
00b3ed16 GKH |
1080 | |
1081 | #define HFA384x_CREATEIBSS_JOINCREATEIBSS 0 | |
1082 | #define HFA384x_CREATEIBSS_JOINESS_JOINCREATEIBSS 1 | |
1083 | #define HFA384x_CREATEIBSS_JOINIBSS 2 | |
1084 | #define HFA384x_CREATEIBSS_JOINESS_JOINIBSS 3 | |
1085 | ||
1086 | /*-- Configuration Record: FragmentationThreshold --*/ | |
1087 | typedef struct hfa384x_FragmentationThreshold | |
1088 | { | |
aaad4303 | 1089 | u16 FragmentationThreshold; |
9cba46dc | 1090 | } __attribute__((packed)) hfa384x_FragmentationThreshold_t; |
00b3ed16 GKH |
1091 | |
1092 | /*-- Configuration Record: RTSThreshold --*/ | |
1093 | typedef struct hfa384x_RTSThreshold | |
1094 | { | |
aaad4303 | 1095 | u16 RTSThreshold; |
9cba46dc | 1096 | } __attribute__((packed)) hfa384x_RTSThreshold_t; |
00b3ed16 GKH |
1097 | |
1098 | /*-- Configuration Record: TxRateControl --*/ | |
1099 | typedef struct hfa384x_TxRateControl | |
1100 | { | |
aaad4303 | 1101 | u16 TxRateControl; |
9cba46dc | 1102 | } __attribute__((packed)) hfa384x_TxRateControl_t; |
00b3ed16 GKH |
1103 | |
1104 | /*-- Configuration Record: PromiscuousMode --*/ | |
1105 | typedef struct hfa384x_PromiscuousMode | |
1106 | { | |
aaad4303 | 1107 | u16 PromiscuousMode; |
9cba46dc | 1108 | } __attribute__((packed)) hfa384x_PromiscuousMode_t; |
00b3ed16 GKH |
1109 | |
1110 | /*-- Configuration Record: ScanRequest (data portion only) --*/ | |
1111 | typedef struct hfa384x_ScanRequest_data | |
1112 | { | |
aaad4303 SP |
1113 | u16 channelList; |
1114 | u16 txRate; | |
9cba46dc | 1115 | } __attribute__((packed)) hfa384x_ScanRequest_data_t; |
00b3ed16 GKH |
1116 | |
1117 | /*-- Configuration Record: HostScanRequest (data portion only) --*/ | |
1118 | typedef struct hfa384x_HostScanRequest_data | |
1119 | { | |
aaad4303 SP |
1120 | u16 channelList; |
1121 | u16 txRate; | |
00b3ed16 | 1122 | hfa384x_bytestr32_t ssid; |
9cba46dc | 1123 | } __attribute__((packed)) hfa384x_HostScanRequest_data_t; |
00b3ed16 GKH |
1124 | |
1125 | /*-- Configuration Record: JoinRequest (data portion only) --*/ | |
1126 | typedef struct hfa384x_JoinRequest_data | |
1127 | { | |
aaad4303 SP |
1128 | u8 bssid[WLAN_BSSID_LEN]; |
1129 | u16 channel; | |
9cba46dc | 1130 | } __attribute__((packed)) hfa384x_JoinRequest_data_t; |
00b3ed16 GKH |
1131 | |
1132 | /*-- Configuration Record: authenticateStation (data portion only) --*/ | |
1133 | typedef struct hfa384x_authenticateStation_data | |
1134 | { | |
28b17a4b | 1135 | u8 address[ETH_ALEN]; |
aaad4303 SP |
1136 | u16 status; |
1137 | u16 algorithm; | |
9cba46dc | 1138 | } __attribute__((packed)) hfa384x_authenticateStation_data_t; |
00b3ed16 GKH |
1139 | |
1140 | /*-- Configuration Record: associateStation (data portion only) --*/ | |
1141 | typedef struct hfa384x_associateStation_data | |
1142 | { | |
28b17a4b | 1143 | u8 address[ETH_ALEN]; |
aaad4303 SP |
1144 | u16 status; |
1145 | u16 type; | |
9cba46dc | 1146 | } __attribute__((packed)) hfa384x_associateStation_data_t; |
00b3ed16 GKH |
1147 | |
1148 | /*-- Configuration Record: ChannelInfoRequest (data portion only) --*/ | |
1149 | typedef struct hfa384x_ChannelInfoRequest_data | |
1150 | { | |
aaad4303 SP |
1151 | u16 channelList; |
1152 | u16 channelDwellTime; | |
9cba46dc | 1153 | } __attribute__((packed)) hfa384x_ChannelInfoRequest_data_t; |
00b3ed16 GKH |
1154 | |
1155 | /*-- Configuration Record: WEPKeyMapping (data portion only) --*/ | |
1156 | typedef struct hfa384x_WEPKeyMapping | |
1157 | { | |
28b17a4b | 1158 | u8 address[ETH_ALEN]; |
aaad4303 SP |
1159 | u16 key_index; |
1160 | u8 key[16]; | |
1161 | u8 mic_transmit_key[4]; | |
1162 | u8 mic_receive_key[4]; | |
9cba46dc | 1163 | } __attribute__((packed)) hfa384x_WEPKeyMapping_t; |
00b3ed16 GKH |
1164 | |
1165 | /*-- Configuration Record: WPAData (data portion only) --*/ | |
1166 | typedef struct hfa384x_WPAData | |
1167 | { | |
aaad4303 SP |
1168 | u16 datalen; |
1169 | u8 data[0]; // max 80 | |
9cba46dc | 1170 | } __attribute__((packed)) hfa384x_WPAData_t; |
00b3ed16 GKH |
1171 | |
1172 | /*-------------------------------------------------------------------- | |
1173 | Configuration Record Structures: Behavior Parameters | |
1174 | --------------------------------------------------------------------*/ | |
1175 | ||
1176 | /*-- Configuration Record: TickTime --*/ | |
1177 | typedef struct hfa384x_TickTime | |
1178 | { | |
aaad4303 | 1179 | u16 TickTime; |
9cba46dc | 1180 | } __attribute__((packed)) hfa384x_TickTime_t; |
00b3ed16 GKH |
1181 | |
1182 | /*-------------------------------------------------------------------- | |
1183 | Information Record Structures: NIC Information | |
1184 | --------------------------------------------------------------------*/ | |
1185 | ||
1186 | /*-- Information Record: MaxLoadTime --*/ | |
1187 | typedef struct hfa384x_MaxLoadTime | |
1188 | { | |
aaad4303 | 1189 | u16 MaxLoadTime; |
9cba46dc | 1190 | } __attribute__((packed)) hfa384x_MaxLoadTime_t; |
00b3ed16 GKH |
1191 | |
1192 | /*-- Information Record: DownLoadBuffer --*/ | |
1193 | /* NOTE: The page and offset are in AUX format */ | |
1194 | typedef struct hfa384x_downloadbuffer | |
1195 | { | |
aaad4303 SP |
1196 | u16 page; |
1197 | u16 offset; | |
1198 | u16 len; | |
9cba46dc | 1199 | } __attribute__((packed)) hfa384x_downloadbuffer_t; |
00b3ed16 GKH |
1200 | |
1201 | /*-- Information Record: PRIIdentity --*/ | |
1202 | typedef struct hfa384x_PRIIdentity | |
1203 | { | |
aaad4303 SP |
1204 | u16 PRICompID; |
1205 | u16 PRIVariant; | |
1206 | u16 PRIMajorVersion; | |
1207 | u16 PRIMinorVersion; | |
9cba46dc | 1208 | } __attribute__((packed)) hfa384x_PRIIdentity_t; |
00b3ed16 GKH |
1209 | |
1210 | /*-- Information Record: PRISupRange --*/ | |
1211 | typedef struct hfa384x_PRISupRange | |
1212 | { | |
aaad4303 SP |
1213 | u16 PRIRole; |
1214 | u16 PRIID; | |
1215 | u16 PRIVariant; | |
1216 | u16 PRIBottom; | |
1217 | u16 PRITop; | |
9cba46dc | 1218 | } __attribute__((packed)) hfa384x_PRISupRange_t; |
00b3ed16 GKH |
1219 | |
1220 | /*-- Information Record: CFIActRanges --*/ | |
1221 | typedef struct hfa384x_CFIActRanges | |
1222 | { | |
aaad4303 SP |
1223 | u16 CFIRole; |
1224 | u16 CFIID; | |
1225 | u16 CFIVariant; | |
1226 | u16 CFIBottom; | |
1227 | u16 CFITop; | |
9cba46dc | 1228 | } __attribute__((packed)) hfa384x_CFIActRanges_t; |
00b3ed16 GKH |
1229 | |
1230 | /*-- Information Record: NICSerialNumber --*/ | |
1231 | typedef struct hfa384x_NICSerialNumber | |
1232 | { | |
aaad4303 | 1233 | u8 NICSerialNumber[12]; |
9cba46dc | 1234 | } __attribute__((packed)) hfa384x_NICSerialNumber_t; |
00b3ed16 GKH |
1235 | |
1236 | /*-- Information Record: NICIdentity --*/ | |
1237 | typedef struct hfa384x_NICIdentity | |
1238 | { | |
aaad4303 SP |
1239 | u16 NICCompID; |
1240 | u16 NICVariant; | |
1241 | u16 NICMajorVersion; | |
1242 | u16 NICMinorVersion; | |
9cba46dc | 1243 | } __attribute__((packed)) hfa384x_NICIdentity_t; |
00b3ed16 GKH |
1244 | |
1245 | /*-- Information Record: MFISupRange --*/ | |
1246 | typedef struct hfa384x_MFISupRange | |
1247 | { | |
aaad4303 SP |
1248 | u16 MFIRole; |
1249 | u16 MFIID; | |
1250 | u16 MFIVariant; | |
1251 | u16 MFIBottom; | |
1252 | u16 MFITop; | |
9cba46dc | 1253 | } __attribute__((packed)) hfa384x_MFISupRange_t; |
00b3ed16 GKH |
1254 | |
1255 | /*-- Information Record: CFISupRange --*/ | |
1256 | typedef struct hfa384x_CFISupRange | |
1257 | { | |
aaad4303 SP |
1258 | u16 CFIRole; |
1259 | u16 CFIID; | |
1260 | u16 CFIVariant; | |
1261 | u16 CFIBottom; | |
1262 | u16 CFITop; | |
9cba46dc | 1263 | } __attribute__((packed)) hfa384x_CFISupRange_t; |
00b3ed16 GKH |
1264 | |
1265 | /*-- Information Record: BUILDSEQ:BuildSeq --*/ | |
1266 | typedef struct hfa384x_BuildSeq { | |
aaad4303 SP |
1267 | u16 primary; |
1268 | u16 secondary; | |
9cba46dc | 1269 | } __attribute__((packed)) hfa384x_BuildSeq_t; |
00b3ed16 GKH |
1270 | |
1271 | /*-- Information Record: FWID --*/ | |
1272 | #define HFA384x_FWID_LEN 14 | |
1273 | typedef struct hfa384x_FWID { | |
aaad4303 SP |
1274 | u8 primary[HFA384x_FWID_LEN]; |
1275 | u8 secondary[HFA384x_FWID_LEN]; | |
9cba46dc | 1276 | } __attribute__((packed)) hfa384x_FWID_t; |
00b3ed16 GKH |
1277 | |
1278 | /*-- Information Record: ChannelList --*/ | |
1279 | typedef struct hfa384x_ChannelList | |
1280 | { | |
aaad4303 | 1281 | u16 ChannelList; |
9cba46dc | 1282 | } __attribute__((packed)) hfa384x_ChannelList_t; |
00b3ed16 GKH |
1283 | |
1284 | /*-- Information Record: RegulatoryDomains --*/ | |
1285 | typedef struct hfa384x_RegulatoryDomains | |
1286 | { | |
aaad4303 | 1287 | u8 RegulatoryDomains[12]; |
9cba46dc | 1288 | } __attribute__((packed)) hfa384x_RegulatoryDomains_t; |
00b3ed16 GKH |
1289 | |
1290 | /*-- Information Record: TempType --*/ | |
1291 | typedef struct hfa384x_TempType | |
1292 | { | |
aaad4303 | 1293 | u16 TempType; |
9cba46dc | 1294 | } __attribute__((packed)) hfa384x_TempType_t; |
00b3ed16 GKH |
1295 | |
1296 | /*-- Information Record: CIS --*/ | |
1297 | typedef struct hfa384x_CIS | |
1298 | { | |
aaad4303 | 1299 | u8 CIS[480]; |
9cba46dc | 1300 | } __attribute__((packed)) hfa384x_CIS_t; |
00b3ed16 GKH |
1301 | |
1302 | /*-- Information Record: STAIdentity --*/ | |
1303 | typedef struct hfa384x_STAIdentity | |
1304 | { | |
aaad4303 SP |
1305 | u16 STACompID; |
1306 | u16 STAVariant; | |
1307 | u16 STAMajorVersion; | |
1308 | u16 STAMinorVersion; | |
9cba46dc | 1309 | } __attribute__((packed)) hfa384x_STAIdentity_t; |
00b3ed16 GKH |
1310 | |
1311 | /*-- Information Record: STASupRange --*/ | |
1312 | typedef struct hfa384x_STASupRange | |
1313 | { | |
aaad4303 SP |
1314 | u16 STARole; |
1315 | u16 STAID; | |
1316 | u16 STAVariant; | |
1317 | u16 STABottom; | |
1318 | u16 STATop; | |
9cba46dc | 1319 | } __attribute__((packed)) hfa384x_STASupRange_t; |
00b3ed16 GKH |
1320 | |
1321 | /*-- Information Record: MFIActRanges --*/ | |
1322 | typedef struct hfa384x_MFIActRanges | |
1323 | { | |
aaad4303 SP |
1324 | u16 MFIRole; |
1325 | u16 MFIID; | |
1326 | u16 MFIVariant; | |
1327 | u16 MFIBottom; | |
1328 | u16 MFITop; | |
9cba46dc | 1329 | } __attribute__((packed)) hfa384x_MFIActRanges_t; |
00b3ed16 GKH |
1330 | |
1331 | /*-------------------------------------------------------------------- | |
1332 | Information Record Structures: NIC Information | |
1333 | --------------------------------------------------------------------*/ | |
1334 | ||
1335 | /*-- Information Record: PortStatus --*/ | |
1336 | typedef struct hfa384x_PortStatus | |
1337 | { | |
aaad4303 | 1338 | u16 PortStatus; |
9cba46dc | 1339 | } __attribute__((packed)) hfa384x_PortStatus_t; |
00b3ed16 | 1340 | |
aaad4303 SP |
1341 | #define HFA384x_PSTATUS_DISABLED ((u16)1) |
1342 | #define HFA384x_PSTATUS_SEARCHING ((u16)2) | |
1343 | #define HFA384x_PSTATUS_CONN_IBSS ((u16)3) | |
1344 | #define HFA384x_PSTATUS_CONN_ESS ((u16)4) | |
1345 | #define HFA384x_PSTATUS_OUTOFRANGE ((u16)5) | |
1346 | #define HFA384x_PSTATUS_CONN_WDS ((u16)6) | |
00b3ed16 GKH |
1347 | |
1348 | /*-- Information Record: CurrentSSID --*/ | |
1349 | typedef struct hfa384x_CurrentSSID | |
1350 | { | |
aaad4303 | 1351 | u8 CurrentSSID[34]; |
9cba46dc | 1352 | } __attribute__((packed)) hfa384x_CurrentSSID_t; |
00b3ed16 GKH |
1353 | |
1354 | /*-- Information Record: CurrentBSSID --*/ | |
1355 | typedef struct hfa384x_CurrentBSSID | |
1356 | { | |
aaad4303 | 1357 | u8 CurrentBSSID[6]; |
9cba46dc | 1358 | } __attribute__((packed)) hfa384x_CurrentBSSID_t; |
00b3ed16 GKH |
1359 | |
1360 | /*-- Information Record: commsquality --*/ | |
1361 | typedef struct hfa384x_commsquality | |
1362 | { | |
aaad4303 SP |
1363 | u16 CQ_currBSS; |
1364 | u16 ASL_currBSS; | |
1365 | u16 ANL_currFC; | |
9cba46dc | 1366 | } __attribute__((packed)) hfa384x_commsquality_t; |
00b3ed16 GKH |
1367 | |
1368 | /*-- Information Record: dmbcommsquality --*/ | |
1369 | typedef struct hfa384x_dbmcommsquality | |
1370 | { | |
aaad4303 SP |
1371 | u16 CQdbm_currBSS; |
1372 | u16 ASLdbm_currBSS; | |
1373 | u16 ANLdbm_currFC; | |
9cba46dc | 1374 | } __attribute__((packed)) hfa384x_dbmcommsquality_t; |
00b3ed16 GKH |
1375 | |
1376 | /*-- Information Record: CurrentTxRate --*/ | |
1377 | typedef struct hfa384x_CurrentTxRate | |
1378 | { | |
aaad4303 | 1379 | u16 CurrentTxRate; |
9cba46dc | 1380 | } __attribute__((packed)) hfa384x_CurrentTxRate_t; |
00b3ed16 GKH |
1381 | |
1382 | /*-- Information Record: CurrentBeaconInterval --*/ | |
1383 | typedef struct hfa384x_CurrentBeaconInterval | |
1384 | { | |
aaad4303 | 1385 | u16 CurrentBeaconInterval; |
9cba46dc | 1386 | } __attribute__((packed)) hfa384x_CurrentBeaconInterval_t; |
00b3ed16 GKH |
1387 | |
1388 | /*-- Information Record: CurrentScaleThresholds --*/ | |
1389 | typedef struct hfa384x_CurrentScaleThresholds | |
1390 | { | |
aaad4303 SP |
1391 | u16 EnergyDetectThreshold; |
1392 | u16 CarrierDetectThreshold; | |
1393 | u16 DeferDetectThreshold; | |
1394 | u16 CellSearchThreshold; /* Stations only */ | |
1395 | u16 DeadSpotThreshold; /* Stations only */ | |
9cba46dc | 1396 | } __attribute__((packed)) hfa384x_CurrentScaleThresholds_t; |
00b3ed16 GKH |
1397 | |
1398 | /*-- Information Record: ProtocolRspTime --*/ | |
1399 | typedef struct hfa384x_ProtocolRspTime | |
1400 | { | |
aaad4303 | 1401 | u16 ProtocolRspTime; |
9cba46dc | 1402 | } __attribute__((packed)) hfa384x_ProtocolRspTime_t; |
00b3ed16 GKH |
1403 | |
1404 | /*-- Information Record: ShortRetryLimit --*/ | |
1405 | typedef struct hfa384x_ShortRetryLimit | |
1406 | { | |
aaad4303 | 1407 | u16 ShortRetryLimit; |
9cba46dc | 1408 | } __attribute__((packed)) hfa384x_ShortRetryLimit_t; |
00b3ed16 GKH |
1409 | |
1410 | /*-- Information Record: LongRetryLimit --*/ | |
1411 | typedef struct hfa384x_LongRetryLimit | |
1412 | { | |
aaad4303 | 1413 | u16 LongRetryLimit; |
9cba46dc | 1414 | } __attribute__((packed)) hfa384x_LongRetryLimit_t; |
00b3ed16 GKH |
1415 | |
1416 | /*-- Information Record: MaxTransmitLifetime --*/ | |
1417 | typedef struct hfa384x_MaxTransmitLifetime | |
1418 | { | |
aaad4303 | 1419 | u16 MaxTransmitLifetime; |
9cba46dc | 1420 | } __attribute__((packed)) hfa384x_MaxTransmitLifetime_t; |
00b3ed16 GKH |
1421 | |
1422 | /*-- Information Record: MaxReceiveLifetime --*/ | |
1423 | typedef struct hfa384x_MaxReceiveLifetime | |
1424 | { | |
aaad4303 | 1425 | u16 MaxReceiveLifetime; |
9cba46dc | 1426 | } __attribute__((packed)) hfa384x_MaxReceiveLifetime_t; |
00b3ed16 GKH |
1427 | |
1428 | /*-- Information Record: CFPollable --*/ | |
1429 | typedef struct hfa384x_CFPollable | |
1430 | { | |
aaad4303 | 1431 | u16 CFPollable; |
9cba46dc | 1432 | } __attribute__((packed)) hfa384x_CFPollable_t; |
00b3ed16 GKH |
1433 | |
1434 | /*-- Information Record: AuthenticationAlgorithms --*/ | |
1435 | typedef struct hfa384x_AuthenticationAlgorithms | |
1436 | { | |
aaad4303 SP |
1437 | u16 AuthenticationType; |
1438 | u16 TypeEnabled; | |
9cba46dc | 1439 | } __attribute__((packed)) hfa384x_AuthenticationAlgorithms_t; |
00b3ed16 GKH |
1440 | |
1441 | /*-- Information Record: AuthenticationAlgorithms | |
1442 | (data only --*/ | |
1443 | typedef struct hfa384x_AuthenticationAlgorithms_data | |
1444 | { | |
aaad4303 SP |
1445 | u16 AuthenticationType; |
1446 | u16 TypeEnabled; | |
9cba46dc | 1447 | } __attribute__((packed)) hfa384x_AuthenticationAlgorithms_data_t; |
00b3ed16 GKH |
1448 | |
1449 | /*-- Information Record: PrivacyOptionImplemented --*/ | |
1450 | typedef struct hfa384x_PrivacyOptionImplemented | |
1451 | { | |
aaad4303 | 1452 | u16 PrivacyOptionImplemented; |
9cba46dc | 1453 | } __attribute__((packed)) hfa384x_PrivacyOptionImplemented_t; |
00b3ed16 GKH |
1454 | |
1455 | /*-- Information Record: OwnMACAddress --*/ | |
1456 | typedef struct hfa384x_OwnMACAddress | |
1457 | { | |
aaad4303 | 1458 | u8 OwnMACAddress[6]; |
9cba46dc | 1459 | } __attribute__((packed)) hfa384x_OwnMACAddress_t; |
00b3ed16 GKH |
1460 | |
1461 | /*-- Information Record: PCFInfo --*/ | |
1462 | typedef struct hfa384x_PCFInfo | |
1463 | { | |
aaad4303 SP |
1464 | u16 MediumOccupancyLimit; |
1465 | u16 CFPPeriod; | |
1466 | u16 CFPMaxDuration; | |
1467 | u16 CFPFlags; | |
9cba46dc | 1468 | } __attribute__((packed)) hfa384x_PCFInfo_t; |
00b3ed16 GKH |
1469 | |
1470 | /*-- Information Record: PCFInfo (data portion only) --*/ | |
1471 | typedef struct hfa384x_PCFInfo_data | |
1472 | { | |
aaad4303 SP |
1473 | u16 MediumOccupancyLimit; |
1474 | u16 CFPPeriod; | |
1475 | u16 CFPMaxDuration; | |
1476 | u16 CFPFlags; | |
9cba46dc | 1477 | } __attribute__((packed)) hfa384x_PCFInfo_data_t; |
00b3ed16 GKH |
1478 | |
1479 | /*-------------------------------------------------------------------- | |
1480 | Information Record Structures: Modem Information Records | |
1481 | --------------------------------------------------------------------*/ | |
1482 | ||
1483 | /*-- Information Record: PHYType --*/ | |
1484 | typedef struct hfa384x_PHYType | |
1485 | { | |
aaad4303 | 1486 | u16 PHYType; |
9cba46dc | 1487 | } __attribute__((packed)) hfa384x_PHYType_t; |
00b3ed16 GKH |
1488 | |
1489 | /*-- Information Record: CurrentChannel --*/ | |
1490 | typedef struct hfa384x_CurrentChannel | |
1491 | { | |
aaad4303 | 1492 | u16 CurrentChannel; |
9cba46dc | 1493 | } __attribute__((packed)) hfa384x_CurrentChannel_t; |
00b3ed16 GKH |
1494 | |
1495 | /*-- Information Record: CurrentPowerState --*/ | |
1496 | typedef struct hfa384x_CurrentPowerState | |
1497 | { | |
aaad4303 | 1498 | u16 CurrentPowerState; |
9cba46dc | 1499 | } __attribute__((packed)) hfa384x_CurrentPowerState_t; |
00b3ed16 GKH |
1500 | |
1501 | /*-- Information Record: CCAMode --*/ | |
1502 | typedef struct hfa384x_CCAMode | |
1503 | { | |
aaad4303 | 1504 | u16 CCAMode; |
9cba46dc | 1505 | } __attribute__((packed)) hfa384x_CCAMode_t; |
00b3ed16 GKH |
1506 | |
1507 | /*-- Information Record: SupportedDataRates --*/ | |
1508 | typedef struct hfa384x_SupportedDataRates | |
1509 | { | |
aaad4303 | 1510 | u8 SupportedDataRates[10]; |
9cba46dc | 1511 | } __attribute__((packed)) hfa384x_SupportedDataRates_t; |
00b3ed16 GKH |
1512 | |
1513 | /*-- Information Record: LFOStatus --*/ | |
1514 | typedef struct hfa384x_LFOStatus | |
1515 | { | |
aaad4303 SP |
1516 | u16 TestResults; |
1517 | u16 LFOResult; | |
1518 | u16 VRHFOResult; | |
9cba46dc | 1519 | } __attribute__((packed)) hfa384x_LFOStatus_t; |
00b3ed16 GKH |
1520 | |
1521 | #define HFA384x_TESTRESULT_ALLPASSED BIT0 | |
1522 | #define HFA384x_TESTRESULT_LFO_FAIL BIT1 | |
1523 | #define HFA384x_TESTRESULT_VR_HF0_FAIL BIT2 | |
1524 | #define HFA384x_HOST_FIRM_COORDINATE BIT7 | |
1525 | #define HFA384x_TESTRESULT_COORDINATE BIT15 | |
1526 | ||
1527 | /*-- Information Record: LEDControl --*/ | |
1528 | typedef struct hfa384x_LEDControl | |
1529 | { | |
aaad4303 SP |
1530 | u16 searching_on; |
1531 | u16 searching_off; | |
1532 | u16 assoc_on; | |
1533 | u16 assoc_off; | |
1534 | u16 activity; | |
9cba46dc | 1535 | } __attribute__((packed)) hfa384x_LEDControl_t; |
00b3ed16 GKH |
1536 | |
1537 | /*-------------------------------------------------------------------- | |
1538 | FRAME DESCRIPTORS AND FRAME STRUCTURES | |
1539 | ||
1540 | FRAME DESCRIPTORS: Offsets | |
1541 | ||
1542 | ---------------------------------------------------------------------- | |
1543 | Control Info (offset 44-51) | |
1544 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
1545 | #define HFA384x_FD_STATUS_OFF ((u16)0x44) |
1546 | #define HFA384x_FD_TIME_OFF ((u16)0x46) | |
1547 | #define HFA384x_FD_SWSUPPORT_OFF ((u16)0x4A) | |
1548 | #define HFA384x_FD_SILENCE_OFF ((u16)0x4A) | |
1549 | #define HFA384x_FD_SIGNAL_OFF ((u16)0x4B) | |
1550 | #define HFA384x_FD_RATE_OFF ((u16)0x4C) | |
1551 | #define HFA384x_FD_RXFLOW_OFF ((u16)0x4D) | |
1552 | #define HFA384x_FD_RESERVED_OFF ((u16)0x4E) | |
1553 | #define HFA384x_FD_TXCONTROL_OFF ((u16)0x50) | |
00b3ed16 GKH |
1554 | /*-------------------------------------------------------------------- |
1555 | 802.11 Header (offset 52-6B) | |
1556 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
1557 | #define HFA384x_FD_FRAMECONTROL_OFF ((u16)0x52) |
1558 | #define HFA384x_FD_DURATIONID_OFF ((u16)0x54) | |
1559 | #define HFA384x_FD_ADDRESS1_OFF ((u16)0x56) | |
1560 | #define HFA384x_FD_ADDRESS2_OFF ((u16)0x5C) | |
1561 | #define HFA384x_FD_ADDRESS3_OFF ((u16)0x62) | |
1562 | #define HFA384x_FD_SEQCONTROL_OFF ((u16)0x68) | |
1563 | #define HFA384x_FD_ADDRESS4_OFF ((u16)0x6A) | |
1564 | #define HFA384x_FD_DATALEN_OFF ((u16)0x70) | |
00b3ed16 GKH |
1565 | /*-------------------------------------------------------------------- |
1566 | 802.3 Header (offset 72-7F) | |
1567 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
1568 | #define HFA384x_FD_DESTADDRESS_OFF ((u16)0x72) |
1569 | #define HFA384x_FD_SRCADDRESS_OFF ((u16)0x78) | |
1570 | #define HFA384x_FD_DATALENGTH_OFF ((u16)0x7E) | |
00b3ed16 GKH |
1571 | |
1572 | /*-------------------------------------------------------------------- | |
1573 | FRAME STRUCTURES: Communication Frames | |
1574 | ---------------------------------------------------------------------- | |
1575 | Communication Frames: Transmit Frames | |
1576 | --------------------------------------------------------------------*/ | |
1577 | /*-- Communication Frame: Transmit Frame Structure --*/ | |
1578 | typedef struct hfa384x_tx_frame | |
1579 | { | |
aaad4303 SP |
1580 | u16 status; |
1581 | u16 reserved1; | |
1582 | u16 reserved2; | |
1583 | u32 sw_support; | |
1584 | u8 tx_retrycount; | |
1585 | u8 tx_rate; | |
1586 | u16 tx_control; | |
00b3ed16 GKH |
1587 | |
1588 | /*-- 802.11 Header Information --*/ | |
1589 | ||
aaad4303 SP |
1590 | u16 frame_control; |
1591 | u16 duration_id; | |
1592 | u8 address1[6]; | |
1593 | u8 address2[6]; | |
1594 | u8 address3[6]; | |
1595 | u16 sequence_control; | |
1596 | u8 address4[6]; | |
1597 | u16 data_len; /* little endian format */ | |
00b3ed16 GKH |
1598 | |
1599 | /*-- 802.3 Header Information --*/ | |
1600 | ||
aaad4303 SP |
1601 | u8 dest_addr[6]; |
1602 | u8 src_addr[6]; | |
1603 | u16 data_length; /* big endian format */ | |
9cba46dc | 1604 | } __attribute__((packed)) hfa384x_tx_frame_t; |
00b3ed16 GKH |
1605 | /*-------------------------------------------------------------------- |
1606 | Communication Frames: Field Masks for Transmit Frames | |
1607 | --------------------------------------------------------------------*/ | |
1608 | /*-- Status Field --*/ | |
aaad4303 SP |
1609 | #define HFA384x_TXSTATUS_ACKERR ((u16)BIT5) |
1610 | #define HFA384x_TXSTATUS_FORMERR ((u16)BIT3) | |
1611 | #define HFA384x_TXSTATUS_DISCON ((u16)BIT2) | |
1612 | #define HFA384x_TXSTATUS_AGEDERR ((u16)BIT1) | |
1613 | #define HFA384x_TXSTATUS_RETRYERR ((u16)BIT0) | |
00b3ed16 | 1614 | /*-- Transmit Control Field --*/ |
aaad4303 SP |
1615 | #define HFA384x_TX_CFPOLL ((u16)BIT12) |
1616 | #define HFA384x_TX_PRST ((u16)BIT11) | |
1617 | #define HFA384x_TX_MACPORT ((u16)(BIT10 | BIT9 | BIT8)) | |
1618 | #define HFA384x_TX_NOENCRYPT ((u16)BIT7) | |
1619 | #define HFA384x_TX_RETRYSTRAT ((u16)(BIT6 | BIT5)) | |
1620 | #define HFA384x_TX_STRUCTYPE ((u16)(BIT4 | BIT3)) | |
1621 | #define HFA384x_TX_TXEX ((u16)BIT2) | |
1622 | #define HFA384x_TX_TXOK ((u16)BIT1) | |
00b3ed16 GKH |
1623 | /*-------------------------------------------------------------------- |
1624 | Communication Frames: Test/Get/Set Field Values for Transmit Frames | |
1625 | --------------------------------------------------------------------*/ | |
1626 | /*-- Status Field --*/ | |
1627 | #define HFA384x_TXSTATUS_ISERROR(v) \ | |
aaad4303 | 1628 | (((u16)(v))&\ |
00b3ed16 GKH |
1629 | (HFA384x_TXSTATUS_ACKERR|HFA384x_TXSTATUS_FORMERR|\ |
1630 | HFA384x_TXSTATUS_DISCON|HFA384x_TXSTATUS_AGEDERR|\ | |
1631 | HFA384x_TXSTATUS_RETRYERR)) | |
1632 | ||
aaad4303 SP |
1633 | #define HFA384x_TXSTATUS_ISACKERR(v) ((u16)(((u16)(v)) & HFA384x_TXSTATUS_ACKERR)) |
1634 | #define HFA384x_TXSTATUS_ISFORMERR(v) ((u16)(((u16)(v)) & HFA384x_TXSTATUS_FORMERR)) | |
1635 | #define HFA384x_TXSTATUS_ISDISCON(v) ((u16)(((u16)(v)) & HFA384x_TXSTATUS_DISCON)) | |
1636 | #define HFA384x_TXSTATUS_ISAGEDERR(v) ((u16)(((u16)(v)) & HFA384x_TXSTATUS_AGEDERR)) | |
1637 | #define HFA384x_TXSTATUS_ISRETRYERR(v) ((u16)(((u16)(v)) & HFA384x_TXSTATUS_RETRYERR)) | |
00b3ed16 | 1638 | |
aaad4303 SP |
1639 | #define HFA384x_TX_GET(v,m,s) ((((u16)(v))&((u16)(m)))>>((u16)(s))) |
1640 | #define HFA384x_TX_SET(v,m,s) ((((u16)(v))<<((u16)(s)))&((u16)(m))) | |
00b3ed16 GKH |
1641 | |
1642 | #define HFA384x_TX_CFPOLL_GET(v) HFA384x_TX_GET(v, HFA384x_TX_CFPOLL,12) | |
1643 | #define HFA384x_TX_CFPOLL_SET(v) HFA384x_TX_SET(v, HFA384x_TX_CFPOLL,12) | |
1644 | #define HFA384x_TX_PRST_GET(v) HFA384x_TX_GET(v, HFA384x_TX_PRST,11) | |
1645 | #define HFA384x_TX_PRST_SET(v) HFA384x_TX_SET(v, HFA384x_TX_PRST,11) | |
1646 | #define HFA384x_TX_MACPORT_GET(v) HFA384x_TX_GET(v, HFA384x_TX_MACPORT, 8) | |
1647 | #define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8) | |
1648 | #define HFA384x_TX_NOENCRYPT_GET(v) HFA384x_TX_GET(v, HFA384x_TX_NOENCRYPT, 7) | |
1649 | #define HFA384x_TX_NOENCRYPT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_NOENCRYPT, 7) | |
1650 | #define HFA384x_TX_RETRYSTRAT_GET(v) HFA384x_TX_GET(v, HFA384x_TX_RETRYSTRAT, 5) | |
1651 | #define HFA384x_TX_RETRYSTRAT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_RETRYSTRAT, 5) | |
1652 | #define HFA384x_TX_STRUCTYPE_GET(v) HFA384x_TX_GET(v, HFA384x_TX_STRUCTYPE, 3) | |
1653 | #define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, HFA384x_TX_STRUCTYPE, 3) | |
1654 | #define HFA384x_TX_TXEX_GET(v) HFA384x_TX_GET(v, HFA384x_TX_TXEX, 2) | |
1655 | #define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2) | |
1656 | #define HFA384x_TX_TXOK_GET(v) HFA384x_TX_GET(v, HFA384x_TX_TXOK, 1) | |
1657 | #define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1) | |
1658 | /*-------------------------------------------------------------------- | |
1659 | Communication Frames: Receive Frames | |
1660 | --------------------------------------------------------------------*/ | |
1661 | /*-- Communication Frame: Receive Frame Structure --*/ | |
1662 | typedef struct hfa384x_rx_frame | |
1663 | { | |
1664 | /*-- MAC rx descriptor (hfa384x byte order) --*/ | |
aaad4303 SP |
1665 | u16 status; |
1666 | u32 time; | |
1667 | u8 silence; | |
1668 | u8 signal; | |
1669 | u8 rate; | |
1670 | u8 rx_flow; | |
1671 | u16 reserved1; | |
1672 | u16 reserved2; | |
00b3ed16 GKH |
1673 | |
1674 | /*-- 802.11 Header Information (802.11 byte order) --*/ | |
aaad4303 SP |
1675 | u16 frame_control; |
1676 | u16 duration_id; | |
1677 | u8 address1[6]; | |
1678 | u8 address2[6]; | |
1679 | u8 address3[6]; | |
1680 | u16 sequence_control; | |
1681 | u8 address4[6]; | |
1682 | u16 data_len; /* hfa384x (little endian) format */ | |
00b3ed16 GKH |
1683 | |
1684 | /*-- 802.3 Header Information --*/ | |
aaad4303 SP |
1685 | u8 dest_addr[6]; |
1686 | u8 src_addr[6]; | |
1687 | u16 data_length; /* IEEE? (big endian) format */ | |
9cba46dc | 1688 | } __attribute__((packed)) hfa384x_rx_frame_t; |
00b3ed16 GKH |
1689 | /*-------------------------------------------------------------------- |
1690 | Communication Frames: Field Masks for Receive Frames | |
1691 | --------------------------------------------------------------------*/ | |
1692 | /*-- Offsets --------*/ | |
aaad4303 SP |
1693 | #define HFA384x_RX_DATA_LEN_OFF ((u16)44) |
1694 | #define HFA384x_RX_80211HDR_OFF ((u16)14) | |
1695 | #define HFA384x_RX_DATA_OFF ((u16)60) | |
00b3ed16 GKH |
1696 | |
1697 | /*-- Status Fields --*/ | |
aaad4303 SP |
1698 | #define HFA384x_RXSTATUS_MSGTYPE ((u16)(BIT15 | BIT14 | BIT13)) |
1699 | #define HFA384x_RXSTATUS_MACPORT ((u16)(BIT10 | BIT9 | BIT8)) | |
1700 | #define HFA384x_RXSTATUS_UNDECR ((u16)BIT1) | |
1701 | #define HFA384x_RXSTATUS_FCSERR ((u16)BIT0) | |
00b3ed16 GKH |
1702 | /*-------------------------------------------------------------------- |
1703 | Communication Frames: Test/Get/Set Field Values for Receive Frames | |
1704 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
1705 | #define HFA384x_RXSTATUS_MSGTYPE_GET(value) ((u16)((((u16)(value)) & HFA384x_RXSTATUS_MSGTYPE) >> 13)) |
1706 | #define HFA384x_RXSTATUS_MSGTYPE_SET(value) ((u16)(((u16)(value)) << 13)) | |
1707 | #define HFA384x_RXSTATUS_MACPORT_GET(value) ((u16)((((u16)(value)) & HFA384x_RXSTATUS_MACPORT) >> 8)) | |
1708 | #define HFA384x_RXSTATUS_MACPORT_SET(value) ((u16)(((u16)(value)) << 8)) | |
1709 | #define HFA384x_RXSTATUS_ISUNDECR(value) ((u16)(((u16)(value)) & HFA384x_RXSTATUS_UNDECR)) | |
1710 | #define HFA384x_RXSTATUS_ISFCSERR(value) ((u16)(((u16)(value)) & HFA384x_RXSTATUS_FCSERR)) | |
00b3ed16 GKH |
1711 | /*-------------------------------------------------------------------- |
1712 | FRAME STRUCTURES: Information Types and Information Frame Structures | |
1713 | ---------------------------------------------------------------------- | |
1714 | Information Types | |
1715 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
1716 | #define HFA384x_IT_HANDOVERADDR ((u16)0xF000UL) |
1717 | #define HFA384x_IT_HANDOVERDEAUTHADDRESS ((u16)0xF001UL)//AP 1.3.7 | |
1718 | #define HFA384x_IT_COMMTALLIES ((u16)0xF100UL) | |
1719 | #define HFA384x_IT_SCANRESULTS ((u16)0xF101UL) | |
1720 | #define HFA384x_IT_CHINFORESULTS ((u16)0xF102UL) | |
1721 | #define HFA384x_IT_HOSTSCANRESULTS ((u16)0xF103UL) | |
1722 | #define HFA384x_IT_LINKSTATUS ((u16)0xF200UL) | |
1723 | #define HFA384x_IT_ASSOCSTATUS ((u16)0xF201UL) | |
1724 | #define HFA384x_IT_AUTHREQ ((u16)0xF202UL) | |
1725 | #define HFA384x_IT_PSUSERCNT ((u16)0xF203UL) | |
1726 | #define HFA384x_IT_KEYIDCHANGED ((u16)0xF204UL) | |
1727 | #define HFA384x_IT_ASSOCREQ ((u16)0xF205UL) | |
1728 | #define HFA384x_IT_MICFAILURE ((u16)0xF206UL) | |
00b3ed16 GKH |
1729 | |
1730 | /*-------------------------------------------------------------------- | |
1731 | Information Frames Structures | |
1732 | ---------------------------------------------------------------------- | |
1733 | Information Frames: Notification Frame Structures | |
1734 | --------------------------------------------------------------------*/ | |
1735 | /*-- Notification Frame,MAC Mgmt: Handover Address --*/ | |
1736 | typedef struct hfa384x_HandoverAddr | |
1737 | { | |
aaad4303 SP |
1738 | u16 framelen; |
1739 | u16 infotype; | |
1740 | u8 handover_addr[WLAN_BSSID_LEN]; | |
9cba46dc | 1741 | } __attribute__((packed)) hfa384x_HandoverAddr_t; |
00b3ed16 GKH |
1742 | |
1743 | /*-- Inquiry Frame, Diagnose: Communication Tallies --*/ | |
1744 | typedef struct hfa384x_CommTallies16 | |
1745 | { | |
aaad4303 SP |
1746 | u16 txunicastframes; |
1747 | u16 txmulticastframes; | |
1748 | u16 txfragments; | |
1749 | u16 txunicastoctets; | |
1750 | u16 txmulticastoctets; | |
1751 | u16 txdeferredtrans; | |
1752 | u16 txsingleretryframes; | |
1753 | u16 txmultipleretryframes; | |
1754 | u16 txretrylimitexceeded; | |
1755 | u16 txdiscards; | |
1756 | u16 rxunicastframes; | |
1757 | u16 rxmulticastframes; | |
1758 | u16 rxfragments; | |
1759 | u16 rxunicastoctets; | |
1760 | u16 rxmulticastoctets; | |
1761 | u16 rxfcserrors; | |
1762 | u16 rxdiscardsnobuffer; | |
1763 | u16 txdiscardswrongsa; | |
1764 | u16 rxdiscardswepundecr; | |
1765 | u16 rxmsginmsgfrag; | |
1766 | u16 rxmsginbadmsgfrag; | |
9cba46dc | 1767 | } __attribute__((packed)) hfa384x_CommTallies16_t; |
00b3ed16 GKH |
1768 | |
1769 | typedef struct hfa384x_CommTallies32 | |
1770 | { | |
aaad4303 SP |
1771 | u32 txunicastframes; |
1772 | u32 txmulticastframes; | |
1773 | u32 txfragments; | |
1774 | u32 txunicastoctets; | |
1775 | u32 txmulticastoctets; | |
1776 | u32 txdeferredtrans; | |
1777 | u32 txsingleretryframes; | |
1778 | u32 txmultipleretryframes; | |
1779 | u32 txretrylimitexceeded; | |
1780 | u32 txdiscards; | |
1781 | u32 rxunicastframes; | |
1782 | u32 rxmulticastframes; | |
1783 | u32 rxfragments; | |
1784 | u32 rxunicastoctets; | |
1785 | u32 rxmulticastoctets; | |
1786 | u32 rxfcserrors; | |
1787 | u32 rxdiscardsnobuffer; | |
1788 | u32 txdiscardswrongsa; | |
1789 | u32 rxdiscardswepundecr; | |
1790 | u32 rxmsginmsgfrag; | |
1791 | u32 rxmsginbadmsgfrag; | |
9cba46dc | 1792 | } __attribute__((packed)) hfa384x_CommTallies32_t; |
00b3ed16 GKH |
1793 | |
1794 | /*-- Inquiry Frame, Diagnose: Scan Results & Subfields--*/ | |
1795 | typedef struct hfa384x_ScanResultSub | |
1796 | { | |
aaad4303 SP |
1797 | u16 chid; |
1798 | u16 anl; | |
1799 | u16 sl; | |
1800 | u8 bssid[WLAN_BSSID_LEN]; | |
1801 | u16 bcnint; | |
1802 | u16 capinfo; | |
00b3ed16 | 1803 | hfa384x_bytestr32_t ssid; |
aaad4303 SP |
1804 | u8 supprates[10]; /* 802.11 info element */ |
1805 | u16 proberesp_rate; | |
9cba46dc | 1806 | } __attribute__((packed)) hfa384x_ScanResultSub_t; |
00b3ed16 GKH |
1807 | |
1808 | typedef struct hfa384x_ScanResult | |
1809 | { | |
aaad4303 SP |
1810 | u16 rsvd; |
1811 | u16 scanreason; | |
00b3ed16 GKH |
1812 | hfa384x_ScanResultSub_t |
1813 | result[HFA384x_SCANRESULT_MAX]; | |
9cba46dc | 1814 | } __attribute__((packed)) hfa384x_ScanResult_t; |
00b3ed16 GKH |
1815 | |
1816 | /*-- Inquiry Frame, Diagnose: ChInfo Results & Subfields--*/ | |
1817 | typedef struct hfa384x_ChInfoResultSub | |
1818 | { | |
aaad4303 SP |
1819 | u16 chid; |
1820 | u16 anl; | |
1821 | u16 pnl; | |
1822 | u16 active; | |
9cba46dc | 1823 | } __attribute__((packed)) hfa384x_ChInfoResultSub_t; |
00b3ed16 GKH |
1824 | |
1825 | #define HFA384x_CHINFORESULT_BSSACTIVE BIT0 | |
1826 | #define HFA384x_CHINFORESULT_PCFACTIVE BIT1 | |
1827 | ||
1828 | typedef struct hfa384x_ChInfoResult | |
1829 | { | |
aaad4303 | 1830 | u16 scanchannels; |
00b3ed16 GKH |
1831 | hfa384x_ChInfoResultSub_t |
1832 | result[HFA384x_CHINFORESULT_MAX]; | |
9cba46dc | 1833 | } __attribute__((packed)) hfa384x_ChInfoResult_t; |
00b3ed16 GKH |
1834 | |
1835 | /*-- Inquiry Frame, Diagnose: Host Scan Results & Subfields--*/ | |
1836 | typedef struct hfa384x_HScanResultSub | |
1837 | { | |
aaad4303 SP |
1838 | u16 chid; |
1839 | u16 anl; | |
1840 | u16 sl; | |
1841 | u8 bssid[WLAN_BSSID_LEN]; | |
1842 | u16 bcnint; | |
1843 | u16 capinfo; | |
00b3ed16 | 1844 | hfa384x_bytestr32_t ssid; |
aaad4303 SP |
1845 | u8 supprates[10]; /* 802.11 info element */ |
1846 | u16 proberesp_rate; | |
1847 | u16 atim; | |
9cba46dc | 1848 | } __attribute__((packed)) hfa384x_HScanResultSub_t; |
00b3ed16 GKH |
1849 | |
1850 | typedef struct hfa384x_HScanResult | |
1851 | { | |
aaad4303 SP |
1852 | u16 nresult; |
1853 | u16 rsvd; | |
00b3ed16 GKH |
1854 | hfa384x_HScanResultSub_t |
1855 | result[HFA384x_HSCANRESULT_MAX]; | |
9cba46dc | 1856 | } __attribute__((packed)) hfa384x_HScanResult_t; |
00b3ed16 GKH |
1857 | |
1858 | /*-- Unsolicited Frame, MAC Mgmt: LinkStatus --*/ | |
1859 | ||
aaad4303 SP |
1860 | #define HFA384x_LINK_NOTCONNECTED ((u16)0) |
1861 | #define HFA384x_LINK_CONNECTED ((u16)1) | |
1862 | #define HFA384x_LINK_DISCONNECTED ((u16)2) | |
1863 | #define HFA384x_LINK_AP_CHANGE ((u16)3) | |
1864 | #define HFA384x_LINK_AP_OUTOFRANGE ((u16)4) | |
1865 | #define HFA384x_LINK_AP_INRANGE ((u16)5) | |
1866 | #define HFA384x_LINK_ASSOCFAIL ((u16)6) | |
00b3ed16 GKH |
1867 | |
1868 | typedef struct hfa384x_LinkStatus | |
1869 | { | |
aaad4303 | 1870 | u16 linkstatus; |
9cba46dc | 1871 | } __attribute__((packed)) hfa384x_LinkStatus_t; |
00b3ed16 GKH |
1872 | |
1873 | ||
1874 | /*-- Unsolicited Frame, MAC Mgmt: AssociationStatus (--*/ | |
1875 | ||
aaad4303 SP |
1876 | #define HFA384x_ASSOCSTATUS_STAASSOC ((u16)1) |
1877 | #define HFA384x_ASSOCSTATUS_REASSOC ((u16)2) | |
1878 | #define HFA384x_ASSOCSTATUS_DISASSOC ((u16)3) | |
1879 | #define HFA384x_ASSOCSTATUS_ASSOCFAIL ((u16)4) | |
1880 | #define HFA384x_ASSOCSTATUS_AUTHFAIL ((u16)5) | |
00b3ed16 GKH |
1881 | |
1882 | typedef struct hfa384x_AssocStatus | |
1883 | { | |
aaad4303 | 1884 | u16 assocstatus; |
28b17a4b | 1885 | u8 sta_addr[ETH_ALEN]; |
00b3ed16 | 1886 | /* old_ap_addr is only valid if assocstatus == 2 */ |
28b17a4b | 1887 | u8 old_ap_addr[ETH_ALEN]; |
aaad4303 SP |
1888 | u16 reason; |
1889 | u16 reserved; | |
9cba46dc | 1890 | } __attribute__((packed)) hfa384x_AssocStatus_t; |
00b3ed16 GKH |
1891 | |
1892 | /*-- Unsolicited Frame, MAC Mgmt: AuthRequest (AP Only) --*/ | |
1893 | ||
1894 | typedef struct hfa384x_AuthRequest | |
1895 | { | |
28b17a4b | 1896 | u8 sta_addr[ETH_ALEN]; |
aaad4303 | 1897 | u16 algorithm; |
9cba46dc | 1898 | } __attribute__((packed)) hfa384x_AuthReq_t; |
00b3ed16 GKH |
1899 | |
1900 | /*-- Unsolicited Frame, MAC Mgmt: AssocRequest (AP Only) --*/ | |
1901 | ||
1902 | typedef struct hfa384x_AssocRequest | |
1903 | { | |
28b17a4b | 1904 | u8 sta_addr[ETH_ALEN]; |
aaad4303 SP |
1905 | u16 type; |
1906 | u8 wpa_data[80]; | |
9cba46dc | 1907 | } __attribute__((packed)) hfa384x_AssocReq_t; |
00b3ed16 GKH |
1908 | |
1909 | ||
1910 | #define HFA384x_ASSOCREQ_TYPE_ASSOC 0 | |
1911 | #define HFA384x_ASSOCREQ_TYPE_REASSOC 1 | |
1912 | ||
1913 | /*-- Unsolicited Frame, MAC Mgmt: MIC Failure (AP Only) --*/ | |
1914 | ||
1915 | typedef struct hfa384x_MicFailure | |
1916 | { | |
28b17a4b MM |
1917 | u8 sender[ETH_ALEN]; |
1918 | u8 dest[ETH_ALEN]; | |
9cba46dc | 1919 | } __attribute__((packed)) hfa384x_MicFailure_t; |
00b3ed16 GKH |
1920 | |
1921 | /*-- Unsolicited Frame, MAC Mgmt: PSUserCount (AP Only) --*/ | |
1922 | ||
1923 | typedef struct hfa384x_PSUserCount | |
1924 | { | |
aaad4303 | 1925 | u16 usercnt; |
9cba46dc | 1926 | } __attribute__((packed)) hfa384x_PSUserCount_t; |
00b3ed16 GKH |
1927 | |
1928 | typedef struct hfa384x_KeyIDChanged | |
1929 | { | |
28b17a4b | 1930 | u8 sta_addr[ETH_ALEN]; |
aaad4303 | 1931 | u16 keyid; |
9cba46dc | 1932 | } __attribute__((packed)) hfa384x_KeyIDChanged_t; |
00b3ed16 GKH |
1933 | |
1934 | /*-- Collection of all Inf frames ---------------*/ | |
1935 | typedef union hfa384x_infodata { | |
1936 | hfa384x_CommTallies16_t commtallies16; | |
1937 | hfa384x_CommTallies32_t commtallies32; | |
1938 | hfa384x_ScanResult_t scanresult; | |
1939 | hfa384x_ChInfoResult_t chinforesult; | |
1940 | hfa384x_HScanResult_t hscanresult; | |
1941 | hfa384x_LinkStatus_t linkstatus; | |
1942 | hfa384x_AssocStatus_t assocstatus; | |
1943 | hfa384x_AuthReq_t authreq; | |
1944 | hfa384x_PSUserCount_t psusercnt; | |
1945 | hfa384x_KeyIDChanged_t keyidchanged; | |
9cba46dc | 1946 | } __attribute__((packed)) hfa384x_infodata_t; |
00b3ed16 GKH |
1947 | |
1948 | typedef struct hfa384x_InfFrame | |
1949 | { | |
aaad4303 SP |
1950 | u16 framelen; |
1951 | u16 infotype; | |
00b3ed16 | 1952 | hfa384x_infodata_t info; |
9cba46dc | 1953 | } __attribute__((packed)) hfa384x_InfFrame_t; |
00b3ed16 | 1954 | |
00b3ed16 GKH |
1955 | /*-------------------------------------------------------------------- |
1956 | USB Packet structures and constants. | |
1957 | --------------------------------------------------------------------*/ | |
1958 | ||
1959 | /* Should be sent to the ctrlout endpoint */ | |
1960 | #define HFA384x_USB_ENBULKIN 6 | |
1961 | ||
1962 | /* Should be sent to the bulkout endpoint */ | |
1963 | #define HFA384x_USB_TXFRM 0 | |
1964 | #define HFA384x_USB_CMDREQ 1 | |
1965 | #define HFA384x_USB_WRIDREQ 2 | |
1966 | #define HFA384x_USB_RRIDREQ 3 | |
1967 | #define HFA384x_USB_WMEMREQ 4 | |
1968 | #define HFA384x_USB_RMEMREQ 5 | |
1969 | ||
1970 | /* Received from the bulkin endpoint */ | |
1971 | #define HFA384x_USB_ISFRM(a) (!((a) & 0x8000)) | |
1972 | #define HFA384x_USB_ISTXFRM(a) (((a) & 0x9000) == 0x1000) | |
1973 | #define HFA384x_USB_ISRXFRM(a) (!((a) & 0x9000)) | |
1974 | #define HFA384x_USB_INFOFRM 0x8000 | |
1975 | #define HFA384x_USB_CMDRESP 0x8001 | |
1976 | #define HFA384x_USB_WRIDRESP 0x8002 | |
1977 | #define HFA384x_USB_RRIDRESP 0x8003 | |
1978 | #define HFA384x_USB_WMEMRESP 0x8004 | |
1979 | #define HFA384x_USB_RMEMRESP 0x8005 | |
1980 | #define HFA384x_USB_BUFAVAIL 0x8006 | |
1981 | #define HFA384x_USB_ERROR 0x8007 | |
1982 | ||
1983 | /*------------------------------------*/ | |
1984 | /* Request (bulk OUT) packet contents */ | |
1985 | ||
1986 | typedef struct hfa384x_usb_txfrm { | |
1987 | hfa384x_tx_frame_t desc; | |
aaad4303 | 1988 | u8 data[WLAN_DATA_MAXLEN]; |
9cba46dc | 1989 | } __attribute__((packed)) hfa384x_usb_txfrm_t; |
00b3ed16 GKH |
1990 | |
1991 | typedef struct hfa384x_usb_cmdreq { | |
aaad4303 SP |
1992 | u16 type; |
1993 | u16 cmd; | |
1994 | u16 parm0; | |
1995 | u16 parm1; | |
1996 | u16 parm2; | |
1997 | u8 pad[54]; | |
9cba46dc | 1998 | } __attribute__((packed)) hfa384x_usb_cmdreq_t; |
00b3ed16 GKH |
1999 | |
2000 | typedef struct hfa384x_usb_wridreq { | |
aaad4303 SP |
2001 | u16 type; |
2002 | u16 frmlen; | |
2003 | u16 rid; | |
2004 | u8 data[HFA384x_RIDDATA_MAXLEN]; | |
9cba46dc | 2005 | } __attribute__((packed)) hfa384x_usb_wridreq_t; |
00b3ed16 GKH |
2006 | |
2007 | typedef struct hfa384x_usb_rridreq { | |
aaad4303 SP |
2008 | u16 type; |
2009 | u16 frmlen; | |
2010 | u16 rid; | |
2011 | u8 pad[58]; | |
9cba46dc | 2012 | } __attribute__((packed)) hfa384x_usb_rridreq_t; |
00b3ed16 GKH |
2013 | |
2014 | typedef struct hfa384x_usb_wmemreq { | |
aaad4303 SP |
2015 | u16 type; |
2016 | u16 frmlen; | |
2017 | u16 offset; | |
2018 | u16 page; | |
2019 | u8 data[HFA384x_USB_RWMEM_MAXLEN]; | |
9cba46dc | 2020 | } __attribute__((packed)) hfa384x_usb_wmemreq_t; |
00b3ed16 GKH |
2021 | |
2022 | typedef struct hfa384x_usb_rmemreq { | |
aaad4303 SP |
2023 | u16 type; |
2024 | u16 frmlen; | |
2025 | u16 offset; | |
2026 | u16 page; | |
2027 | u8 pad[56]; | |
9cba46dc | 2028 | } __attribute__((packed)) hfa384x_usb_rmemreq_t; |
00b3ed16 GKH |
2029 | |
2030 | /*------------------------------------*/ | |
2031 | /* Response (bulk IN) packet contents */ | |
2032 | ||
2033 | typedef struct hfa384x_usb_rxfrm { | |
2034 | hfa384x_rx_frame_t desc; | |
aaad4303 | 2035 | u8 data[WLAN_DATA_MAXLEN]; |
9cba46dc | 2036 | } __attribute__((packed)) hfa384x_usb_rxfrm_t; |
00b3ed16 GKH |
2037 | |
2038 | typedef struct hfa384x_usb_infofrm { | |
aaad4303 | 2039 | u16 type; |
00b3ed16 | 2040 | hfa384x_InfFrame_t info; |
9cba46dc | 2041 | } __attribute__((packed)) hfa384x_usb_infofrm_t; |
00b3ed16 GKH |
2042 | |
2043 | typedef struct hfa384x_usb_statusresp { | |
aaad4303 SP |
2044 | u16 type; |
2045 | u16 status; | |
2046 | u16 resp0; | |
2047 | u16 resp1; | |
2048 | u16 resp2; | |
9cba46dc | 2049 | } __attribute__((packed)) hfa384x_usb_cmdresp_t; |
00b3ed16 GKH |
2050 | |
2051 | typedef hfa384x_usb_cmdresp_t hfa384x_usb_wridresp_t; | |
2052 | ||
2053 | typedef struct hfa384x_usb_rridresp { | |
aaad4303 SP |
2054 | u16 type; |
2055 | u16 frmlen; | |
2056 | u16 rid; | |
2057 | u8 data[HFA384x_RIDDATA_MAXLEN]; | |
9cba46dc | 2058 | } __attribute__((packed)) hfa384x_usb_rridresp_t; |
00b3ed16 GKH |
2059 | |
2060 | typedef hfa384x_usb_cmdresp_t hfa384x_usb_wmemresp_t; | |
2061 | ||
2062 | typedef struct hfa384x_usb_rmemresp { | |
aaad4303 SP |
2063 | u16 type; |
2064 | u16 frmlen; | |
2065 | u8 data[HFA384x_USB_RWMEM_MAXLEN]; | |
9cba46dc | 2066 | } __attribute__((packed)) hfa384x_usb_rmemresp_t; |
00b3ed16 GKH |
2067 | |
2068 | typedef struct hfa384x_usb_bufavail { | |
aaad4303 SP |
2069 | u16 type; |
2070 | u16 frmlen; | |
9cba46dc | 2071 | } __attribute__((packed)) hfa384x_usb_bufavail_t; |
00b3ed16 GKH |
2072 | |
2073 | typedef struct hfa384x_usb_error { | |
aaad4303 SP |
2074 | u16 type; |
2075 | u16 errortype; | |
9cba46dc | 2076 | } __attribute__((packed)) hfa384x_usb_error_t; |
00b3ed16 GKH |
2077 | |
2078 | /*----------------------------------------------------------*/ | |
2079 | /* Unions for packaging all the known packet types together */ | |
2080 | ||
2081 | typedef union hfa384x_usbout { | |
aaad4303 | 2082 | u16 type; |
00b3ed16 GKH |
2083 | hfa384x_usb_txfrm_t txfrm; |
2084 | hfa384x_usb_cmdreq_t cmdreq; | |
2085 | hfa384x_usb_wridreq_t wridreq; | |
2086 | hfa384x_usb_rridreq_t rridreq; | |
2087 | hfa384x_usb_wmemreq_t wmemreq; | |
2088 | hfa384x_usb_rmemreq_t rmemreq; | |
9cba46dc | 2089 | } __attribute__((packed)) hfa384x_usbout_t; |
00b3ed16 GKH |
2090 | |
2091 | typedef union hfa384x_usbin { | |
aaad4303 | 2092 | u16 type; |
00b3ed16 GKH |
2093 | hfa384x_usb_rxfrm_t rxfrm; |
2094 | hfa384x_usb_txfrm_t txfrm; | |
2095 | hfa384x_usb_infofrm_t infofrm; | |
2096 | hfa384x_usb_cmdresp_t cmdresp; | |
2097 | hfa384x_usb_wridresp_t wridresp; | |
2098 | hfa384x_usb_rridresp_t rridresp; | |
2099 | hfa384x_usb_wmemresp_t wmemresp; | |
2100 | hfa384x_usb_rmemresp_t rmemresp; | |
2101 | hfa384x_usb_bufavail_t bufavail; | |
2102 | hfa384x_usb_error_t usberror; | |
aaad4303 | 2103 | u8 boguspad[3000]; |
9cba46dc | 2104 | } __attribute__((packed)) hfa384x_usbin_t; |
00b3ed16 | 2105 | |
00b3ed16 GKH |
2106 | /*-------------------------------------------------------------------- |
2107 | PD record structures. | |
2108 | --------------------------------------------------------------------*/ | |
2109 | ||
2110 | typedef struct hfa384x_pdr_pcb_partnum | |
2111 | { | |
aaad4303 | 2112 | u8 num[8]; |
9cba46dc | 2113 | } __attribute__((packed)) hfa384x_pdr_pcb_partnum_t; |
00b3ed16 GKH |
2114 | |
2115 | typedef struct hfa384x_pdr_pcb_tracenum | |
2116 | { | |
aaad4303 | 2117 | u8 num[8]; |
9cba46dc | 2118 | } __attribute__((packed)) hfa384x_pdr_pcb_tracenum_t; |
00b3ed16 GKH |
2119 | |
2120 | typedef struct hfa384x_pdr_nic_serial | |
2121 | { | |
aaad4303 | 2122 | u8 num[12]; |
9cba46dc | 2123 | } __attribute__((packed)) hfa384x_pdr_nic_serial_t; |
00b3ed16 GKH |
2124 | |
2125 | typedef struct hfa384x_pdr_mkk_measurements | |
2126 | { | |
2127 | double carrier_freq; | |
2128 | double occupied_band; | |
2129 | double power_density; | |
2130 | double tx_spur_f1; | |
2131 | double tx_spur_f2; | |
2132 | double tx_spur_f3; | |
2133 | double tx_spur_f4; | |
2134 | double tx_spur_l1; | |
2135 | double tx_spur_l2; | |
2136 | double tx_spur_l3; | |
2137 | double tx_spur_l4; | |
2138 | double rx_spur_f1; | |
2139 | double rx_spur_f2; | |
2140 | double rx_spur_l1; | |
2141 | double rx_spur_l2; | |
9cba46dc | 2142 | } __attribute__((packed)) hfa384x_pdr_mkk_measurements_t; |
00b3ed16 GKH |
2143 | |
2144 | typedef struct hfa384x_pdr_nic_ramsize | |
2145 | { | |
aaad4303 | 2146 | u8 size[12]; /* units of KB */ |
9cba46dc | 2147 | } __attribute__((packed)) hfa384x_pdr_nic_ramsize_t; |
00b3ed16 GKH |
2148 | |
2149 | typedef struct hfa384x_pdr_mfisuprange | |
2150 | { | |
aaad4303 SP |
2151 | u16 id; |
2152 | u16 variant; | |
2153 | u16 bottom; | |
2154 | u16 top; | |
9cba46dc | 2155 | } __attribute__((packed)) hfa384x_pdr_mfisuprange_t; |
00b3ed16 GKH |
2156 | |
2157 | typedef struct hfa384x_pdr_cfisuprange | |
2158 | { | |
aaad4303 SP |
2159 | u16 id; |
2160 | u16 variant; | |
2161 | u16 bottom; | |
2162 | u16 top; | |
9cba46dc | 2163 | } __attribute__((packed)) hfa384x_pdr_cfisuprange_t; |
00b3ed16 GKH |
2164 | |
2165 | typedef struct hfa384x_pdr_nicid | |
2166 | { | |
aaad4303 SP |
2167 | u16 id; |
2168 | u16 variant; | |
2169 | u16 major; | |
2170 | u16 minor; | |
9cba46dc | 2171 | } __attribute__((packed)) hfa384x_pdr_nicid_t; |
00b3ed16 GKH |
2172 | |
2173 | ||
2174 | typedef struct hfa384x_pdr_refdac_measurements | |
2175 | { | |
aaad4303 | 2176 | u16 value[0]; |
9cba46dc | 2177 | } __attribute__((packed)) hfa384x_pdr_refdac_measurements_t; |
00b3ed16 GKH |
2178 | |
2179 | typedef struct hfa384x_pdr_vgdac_measurements | |
2180 | { | |
aaad4303 | 2181 | u16 value[0]; |
9cba46dc | 2182 | } __attribute__((packed)) hfa384x_pdr_vgdac_measurements_t; |
00b3ed16 GKH |
2183 | |
2184 | typedef struct hfa384x_pdr_level_comp_measurements | |
2185 | { | |
aaad4303 | 2186 | u16 value[0]; |
9cba46dc | 2187 | } __attribute__((packed)) hfa384x_pdr_level_compc_measurements_t; |
00b3ed16 GKH |
2188 | |
2189 | typedef struct hfa384x_pdr_mac_address | |
2190 | { | |
aaad4303 | 2191 | u8 addr[6]; |
9cba46dc | 2192 | } __attribute__((packed)) hfa384x_pdr_mac_address_t; |
00b3ed16 GKH |
2193 | |
2194 | typedef struct hfa384x_pdr_mkk_callname | |
2195 | { | |
aaad4303 | 2196 | u8 callname[8]; |
9cba46dc | 2197 | } __attribute__((packed)) hfa384x_pdr_mkk_callname_t; |
00b3ed16 GKH |
2198 | |
2199 | typedef struct hfa384x_pdr_regdomain | |
2200 | { | |
aaad4303 SP |
2201 | u16 numdomains; |
2202 | u16 domain[5]; | |
9cba46dc | 2203 | } __attribute__((packed)) hfa384x_pdr_regdomain_t; |
00b3ed16 GKH |
2204 | |
2205 | typedef struct hfa384x_pdr_allowed_channel | |
2206 | { | |
aaad4303 | 2207 | u16 ch_bitmap; |
9cba46dc | 2208 | } __attribute__((packed)) hfa384x_pdr_allowed_channel_t; |
00b3ed16 GKH |
2209 | |
2210 | typedef struct hfa384x_pdr_default_channel | |
2211 | { | |
aaad4303 | 2212 | u16 channel; |
9cba46dc | 2213 | } __attribute__((packed)) hfa384x_pdr_default_channel_t; |
00b3ed16 GKH |
2214 | |
2215 | typedef struct hfa384x_pdr_privacy_option | |
2216 | { | |
aaad4303 | 2217 | u16 available; |
9cba46dc | 2218 | } __attribute__((packed)) hfa384x_pdr_privacy_option_t; |
00b3ed16 GKH |
2219 | |
2220 | typedef struct hfa384x_pdr_temptype | |
2221 | { | |
aaad4303 | 2222 | u16 type; |
9cba46dc | 2223 | } __attribute__((packed)) hfa384x_pdr_temptype_t; |
00b3ed16 GKH |
2224 | |
2225 | typedef struct hfa384x_pdr_refdac_setup | |
2226 | { | |
aaad4303 | 2227 | u16 ch_value[14]; |
9cba46dc | 2228 | } __attribute__((packed)) hfa384x_pdr_refdac_setup_t; |
00b3ed16 GKH |
2229 | |
2230 | typedef struct hfa384x_pdr_vgdac_setup | |
2231 | { | |
aaad4303 | 2232 | u16 ch_value[14]; |
9cba46dc | 2233 | } __attribute__((packed)) hfa384x_pdr_vgdac_setup_t; |
00b3ed16 GKH |
2234 | |
2235 | typedef struct hfa384x_pdr_level_comp_setup | |
2236 | { | |
aaad4303 | 2237 | u16 ch_value[14]; |
9cba46dc | 2238 | } __attribute__((packed)) hfa384x_pdr_level_comp_setup_t; |
00b3ed16 GKH |
2239 | |
2240 | typedef struct hfa384x_pdr_trimdac_setup | |
2241 | { | |
aaad4303 SP |
2242 | u16 trimidac; |
2243 | u16 trimqdac; | |
9cba46dc | 2244 | } __attribute__((packed)) hfa384x_pdr_trimdac_setup_t; |
00b3ed16 GKH |
2245 | |
2246 | typedef struct hfa384x_pdr_ifr_setting | |
2247 | { | |
aaad4303 | 2248 | u16 value[3]; |
9cba46dc | 2249 | } __attribute__((packed)) hfa384x_pdr_ifr_setting_t; |
00b3ed16 GKH |
2250 | |
2251 | typedef struct hfa384x_pdr_rfr_setting | |
2252 | { | |
aaad4303 | 2253 | u16 value[3]; |
9cba46dc | 2254 | } __attribute__((packed)) hfa384x_pdr_rfr_setting_t; |
00b3ed16 GKH |
2255 | |
2256 | typedef struct hfa384x_pdr_hfa3861_baseline | |
2257 | { | |
aaad4303 | 2258 | u16 value[50]; |
9cba46dc | 2259 | } __attribute__((packed)) hfa384x_pdr_hfa3861_baseline_t; |
00b3ed16 GKH |
2260 | |
2261 | typedef struct hfa384x_pdr_hfa3861_shadow | |
2262 | { | |
aaad4303 | 2263 | u32 value[32]; |
9cba46dc | 2264 | } __attribute__((packed)) hfa384x_pdr_hfa3861_shadow_t; |
00b3ed16 GKH |
2265 | |
2266 | typedef struct hfa384x_pdr_hfa3861_ifrf | |
2267 | { | |
aaad4303 | 2268 | u32 value[20]; |
9cba46dc | 2269 | } __attribute__((packed)) hfa384x_pdr_hfa3861_ifrf_t; |
00b3ed16 GKH |
2270 | |
2271 | typedef struct hfa384x_pdr_hfa3861_chcalsp | |
2272 | { | |
aaad4303 | 2273 | u16 value[14]; |
9cba46dc | 2274 | } __attribute__((packed)) hfa384x_pdr_hfa3861_chcalsp_t; |
00b3ed16 GKH |
2275 | |
2276 | typedef struct hfa384x_pdr_hfa3861_chcali | |
2277 | { | |
aaad4303 | 2278 | u16 value[17]; |
9cba46dc | 2279 | } __attribute__((packed)) hfa384x_pdr_hfa3861_chcali_t; |
00b3ed16 GKH |
2280 | |
2281 | typedef struct hfa384x_pdr_hfa3861_nic_config | |
2282 | { | |
aaad4303 | 2283 | u16 config_bitmap; |
9cba46dc | 2284 | } __attribute__((packed)) hfa384x_pdr_nic_config_t; |
00b3ed16 GKH |
2285 | |
2286 | typedef struct hfa384x_pdr_hfo_delay | |
2287 | { | |
aaad4303 | 2288 | u8 hfo_delay; |
9cba46dc | 2289 | } __attribute__((packed)) hfa384x_hfo_delay_t; |
00b3ed16 GKH |
2290 | |
2291 | typedef struct hfa384x_pdr_hfa3861_manf_testsp | |
2292 | { | |
aaad4303 | 2293 | u16 value[30]; |
9cba46dc | 2294 | } __attribute__((packed)) hfa384x_pdr_hfa3861_manf_testsp_t; |
00b3ed16 GKH |
2295 | |
2296 | typedef struct hfa384x_pdr_hfa3861_manf_testi | |
2297 | { | |
aaad4303 | 2298 | u16 value[30]; |
9cba46dc | 2299 | } __attribute__((packed)) hfa384x_pdr_hfa3861_manf_testi_t; |
00b3ed16 GKH |
2300 | |
2301 | typedef struct hfa384x_end_of_pda | |
2302 | { | |
aaad4303 | 2303 | u16 crc; |
9cba46dc | 2304 | } __attribute__((packed)) hfa384x_pdr_end_of_pda_t; |
00b3ed16 GKH |
2305 | |
2306 | typedef struct hfa384x_pdrec | |
2307 | { | |
aaad4303 SP |
2308 | u16 len; /* in words */ |
2309 | u16 code; | |
00b3ed16 GKH |
2310 | union pdr { |
2311 | hfa384x_pdr_pcb_partnum_t pcb_partnum; | |
2312 | hfa384x_pdr_pcb_tracenum_t pcb_tracenum; | |
2313 | hfa384x_pdr_nic_serial_t nic_serial; | |
2314 | hfa384x_pdr_mkk_measurements_t mkk_measurements; | |
2315 | hfa384x_pdr_nic_ramsize_t nic_ramsize; | |
2316 | hfa384x_pdr_mfisuprange_t mfisuprange; | |
2317 | hfa384x_pdr_cfisuprange_t cfisuprange; | |
2318 | hfa384x_pdr_nicid_t nicid; | |
2319 | hfa384x_pdr_refdac_measurements_t refdac_measurements; | |
2320 | hfa384x_pdr_vgdac_measurements_t vgdac_measurements; | |
2321 | hfa384x_pdr_level_compc_measurements_t level_compc_measurements; | |
2322 | hfa384x_pdr_mac_address_t mac_address; | |
2323 | hfa384x_pdr_mkk_callname_t mkk_callname; | |
2324 | hfa384x_pdr_regdomain_t regdomain; | |
2325 | hfa384x_pdr_allowed_channel_t allowed_channel; | |
2326 | hfa384x_pdr_default_channel_t default_channel; | |
2327 | hfa384x_pdr_privacy_option_t privacy_option; | |
2328 | hfa384x_pdr_temptype_t temptype; | |
2329 | hfa384x_pdr_refdac_setup_t refdac_setup; | |
2330 | hfa384x_pdr_vgdac_setup_t vgdac_setup; | |
2331 | hfa384x_pdr_level_comp_setup_t level_comp_setup; | |
2332 | hfa384x_pdr_trimdac_setup_t trimdac_setup; | |
2333 | hfa384x_pdr_ifr_setting_t ifr_setting; | |
2334 | hfa384x_pdr_rfr_setting_t rfr_setting; | |
2335 | hfa384x_pdr_hfa3861_baseline_t hfa3861_baseline; | |
2336 | hfa384x_pdr_hfa3861_shadow_t hfa3861_shadow; | |
2337 | hfa384x_pdr_hfa3861_ifrf_t hfa3861_ifrf; | |
2338 | hfa384x_pdr_hfa3861_chcalsp_t hfa3861_chcalsp; | |
2339 | hfa384x_pdr_hfa3861_chcali_t hfa3861_chcali; | |
2340 | hfa384x_pdr_nic_config_t nic_config; | |
2341 | hfa384x_hfo_delay_t hfo_delay; | |
2342 | hfa384x_pdr_hfa3861_manf_testsp_t hfa3861_manf_testsp; | |
2343 | hfa384x_pdr_hfa3861_manf_testi_t hfa3861_manf_testi; | |
2344 | hfa384x_pdr_end_of_pda_t end_of_pda; | |
2345 | ||
2346 | } data; | |
9cba46dc | 2347 | } __attribute__((packed)) hfa384x_pdrec_t; |
00b3ed16 GKH |
2348 | |
2349 | ||
2350 | #ifdef __KERNEL__ | |
2351 | /*-------------------------------------------------------------------- | |
2352 | --- MAC state structure, argument to all functions -- | |
2353 | --- Also, a collection of support types -- | |
2354 | --------------------------------------------------------------------*/ | |
2355 | typedef struct hfa384x_statusresult | |
2356 | { | |
aaad4303 SP |
2357 | u16 status; |
2358 | u16 resp0; | |
2359 | u16 resp1; | |
2360 | u16 resp2; | |
00b3ed16 GKH |
2361 | } hfa384x_cmdresult_t; |
2362 | ||
00b3ed16 GKH |
2363 | /* USB Control Exchange (CTLX): |
2364 | * A queue of the structure below is maintained for all of the | |
2365 | * Request/Response type USB packets supported by Prism2. | |
2366 | */ | |
2367 | /* The following hfa384x_* structures are arguments to | |
2368 | * the usercb() for the different CTLX types. | |
2369 | */ | |
2370 | typedef hfa384x_cmdresult_t hfa384x_wridresult_t; | |
2371 | typedef hfa384x_cmdresult_t hfa384x_wmemresult_t; | |
2372 | ||
2373 | typedef struct hfa384x_rridresult | |
2374 | { | |
aaad4303 | 2375 | u16 rid; |
00b3ed16 | 2376 | const void *riddata; |
aaad4303 | 2377 | unsigned int riddata_len; |
00b3ed16 GKH |
2378 | } hfa384x_rridresult_t; |
2379 | ||
2380 | enum ctlx_state { | |
2381 | CTLX_START = 0, /* Start state, not queued */ | |
2382 | ||
2383 | CTLX_COMPLETE, /* CTLX successfully completed */ | |
2384 | CTLX_REQ_FAILED, /* OUT URB completed w/ error */ | |
2385 | ||
2386 | CTLX_PENDING, /* Queued, data valid */ | |
2387 | CTLX_REQ_SUBMITTED, /* OUT URB submitted */ | |
2388 | CTLX_REQ_COMPLETE, /* OUT URB complete */ | |
2389 | CTLX_RESP_COMPLETE /* IN URB received */ | |
2390 | }; | |
2391 | typedef enum ctlx_state CTLX_STATE; | |
2392 | ||
2393 | struct hfa384x_usbctlx; | |
2394 | struct hfa384x; | |
2395 | ||
2396 | typedef void (*ctlx_cmdcb_t)( struct hfa384x*, const struct hfa384x_usbctlx* ); | |
2397 | ||
2398 | typedef void (*ctlx_usercb_t)( | |
2399 | struct hfa384x *hw, | |
2400 | void *ctlxresult, | |
2401 | void *usercb_data); | |
2402 | ||
2403 | typedef struct hfa384x_usbctlx | |
2404 | { | |
2405 | struct list_head list; | |
2406 | ||
2407 | size_t outbufsize; | |
2408 | hfa384x_usbout_t outbuf; /* pkt buf for OUT */ | |
2409 | hfa384x_usbin_t inbuf; /* pkt buf for IN(a copy) */ | |
2410 | ||
2411 | CTLX_STATE state; /* Tracks running state */ | |
2412 | ||
2413 | struct completion done; | |
2414 | volatile int reapable; /* Food for the reaper task */ | |
2415 | ||
2416 | ctlx_cmdcb_t cmdcb; /* Async command callback */ | |
2417 | ctlx_usercb_t usercb; /* Async user callback, */ | |
2418 | void *usercb_data; /* at CTLX completion */ | |
2419 | ||
2420 | int variant; /* Identifies cmd variant */ | |
2421 | } hfa384x_usbctlx_t; | |
2422 | ||
2423 | typedef struct hfa384x_usbctlxq | |
2424 | { | |
2425 | spinlock_t lock; | |
2426 | struct list_head pending; | |
2427 | struct list_head active; | |
2428 | struct list_head completing; | |
2429 | struct list_head reapable; | |
2430 | } hfa384x_usbctlxq_t; | |
00b3ed16 GKH |
2431 | |
2432 | typedef struct hfa484x_metacmd | |
2433 | { | |
aaad4303 | 2434 | u16 cmd; |
00b3ed16 | 2435 | |
aaad4303 SP |
2436 | u16 parm0; |
2437 | u16 parm1; | |
2438 | u16 parm2; | |
00b3ed16 | 2439 | |
00b3ed16 GKH |
2440 | hfa384x_cmdresult_t result; |
2441 | } hfa384x_metacmd_t; | |
2442 | ||
2443 | #define MAX_PRISM2_GRP_ADDR 16 | |
2444 | #define MAX_GRP_ADDR 32 | |
2445 | #define WLAN_COMMENT_MAX 80 /* Max. length of user comment string. */ | |
2446 | ||
2447 | #define MM_SAT_PCF (BIT14) | |
2448 | #define MM_GCSD_PCF (BIT15) | |
2449 | #define MM_GCSD_PCF_EB (BIT14 | BIT15) | |
2450 | ||
2451 | #define WLAN_STATE_STOPPED 0 /* Network is not active. */ | |
2452 | #define WLAN_STATE_STARTED 1 /* Network has been started. */ | |
2453 | ||
2454 | #define WLAN_AUTH_MAX 60 /* Max. # of authenticated stations. */ | |
2455 | #define WLAN_ACCESS_MAX 60 /* Max. # of stations in an access list. */ | |
2456 | #define WLAN_ACCESS_NONE 0 /* No stations may be authenticated. */ | |
2457 | #define WLAN_ACCESS_ALL 1 /* All stations may be authenticated. */ | |
2458 | #define WLAN_ACCESS_ALLOW 2 /* Authenticate only "allowed" stations. */ | |
2459 | #define WLAN_ACCESS_DENY 3 /* Do not authenticate "denied" stations. */ | |
2460 | ||
2461 | /* XXX These are going away ASAP */ | |
2462 | typedef struct prism2sta_authlist | |
2463 | { | |
aaad4303 | 2464 | unsigned int cnt; |
28b17a4b | 2465 | u8 addr[WLAN_AUTH_MAX][ETH_ALEN]; |
aaad4303 | 2466 | u8 assoc[WLAN_AUTH_MAX]; |
00b3ed16 GKH |
2467 | } prism2sta_authlist_t; |
2468 | ||
2469 | typedef struct prism2sta_accesslist | |
2470 | { | |
aaad4303 SP |
2471 | unsigned int modify; |
2472 | unsigned int cnt; | |
28b17a4b | 2473 | u8 addr[WLAN_ACCESS_MAX][ETH_ALEN]; |
aaad4303 | 2474 | unsigned int cnt1; |
28b17a4b | 2475 | u8 addr1[WLAN_ACCESS_MAX][ETH_ALEN]; |
00b3ed16 GKH |
2476 | } prism2sta_accesslist_t; |
2477 | ||
2478 | typedef struct hfa384x | |
2479 | { | |
00b3ed16 GKH |
2480 | /* USB support data */ |
2481 | struct usb_device *usb; | |
2482 | struct urb rx_urb; | |
2483 | struct sk_buff *rx_urb_skb; | |
2484 | struct urb tx_urb; | |
2485 | struct urb ctlx_urb; | |
2486 | hfa384x_usbout_t txbuff; | |
2487 | hfa384x_usbctlxq_t ctlxq; | |
2488 | struct timer_list reqtimer; | |
2489 | struct timer_list resptimer; | |
2490 | ||
2491 | struct timer_list throttle; | |
2492 | ||
2493 | struct tasklet_struct reaper_bh; | |
2494 | struct tasklet_struct completion_bh; | |
2495 | ||
2496 | struct work_struct usb_work; | |
2497 | ||
2498 | unsigned long usb_flags; | |
2499 | #define THROTTLE_RX 0 | |
2500 | #define THROTTLE_TX 1 | |
2501 | #define WORK_RX_HALT 2 | |
2502 | #define WORK_TX_HALT 3 | |
2503 | #define WORK_RX_RESUME 4 | |
2504 | #define WORK_TX_RESUME 5 | |
2505 | ||
2506 | unsigned short req_timer_done:1; | |
2507 | unsigned short resp_timer_done:1; | |
2508 | ||
2509 | int endp_in; | |
2510 | int endp_out; | |
00b3ed16 GKH |
2511 | |
2512 | int sniff_fcs; | |
2513 | int sniff_channel; | |
2514 | int sniff_truncate; | |
2515 | int sniffhdr; | |
2516 | ||
2517 | wait_queue_head_t cmdq; /* wait queue itself */ | |
2518 | ||
2519 | /* Controller state */ | |
aaad4303 SP |
2520 | u32 state; |
2521 | u32 isap; | |
2522 | u8 port_enabled[HFA384x_NUMPORTS_MAX]; | |
00b3ed16 GKH |
2523 | |
2524 | /* Download support */ | |
aaad4303 | 2525 | unsigned int dlstate; |
00b3ed16 | 2526 | hfa384x_downloadbuffer_t bufinfo; |
aaad4303 | 2527 | u16 dltimeout; |
00b3ed16 | 2528 | |
00b3ed16 GKH |
2529 | int scanflag; /* to signal scan comlete */ |
2530 | int join_ap; /* are we joined to a specific ap */ | |
2531 | int join_retries; /* number of join retries till we fail */ | |
2532 | hfa384x_JoinRequest_data_t joinreq; /* join request saved data */ | |
2533 | ||
2534 | wlandevice_t *wlandev; | |
2535 | /* Timer to allow for the deferred processing of linkstatus messages */ | |
2536 | struct work_struct link_bh; | |
2537 | ||
2538 | struct work_struct commsqual_bh; | |
2539 | hfa384x_commsquality_t qual; | |
2540 | struct timer_list commsqual_timer; | |
2541 | ||
aaad4303 SP |
2542 | u16 link_status; |
2543 | u16 link_status_new; | |
00b3ed16 GKH |
2544 | struct sk_buff_head authq; |
2545 | ||
2546 | /* And here we have stuff that used to be in priv */ | |
2547 | ||
2548 | /* State variables */ | |
aaad4303 SP |
2549 | unsigned int presniff_port_type; |
2550 | u16 presniff_wepflags; | |
2551 | u32 dot11_desired_bss_type; | |
00b3ed16 GKH |
2552 | |
2553 | int dbmadjust; | |
2554 | ||
2555 | /* Group Addresses - right now, there are up to a total | |
2556 | of MAX_GRP_ADDR group addresses */ | |
28b17a4b | 2557 | u8 dot11_grp_addr[MAX_GRP_ADDR][ETH_ALEN]; |
aaad4303 | 2558 | unsigned int dot11_grpcnt; |
00b3ed16 GKH |
2559 | |
2560 | /* Component Identities */ | |
2561 | hfa384x_compident_t ident_nic; | |
2562 | hfa384x_compident_t ident_pri_fw; | |
2563 | hfa384x_compident_t ident_sta_fw; | |
2564 | hfa384x_compident_t ident_ap_fw; | |
aaad4303 | 2565 | u16 mm_mods; |
00b3ed16 GKH |
2566 | |
2567 | /* Supplier compatibility ranges */ | |
2568 | hfa384x_caplevel_t cap_sup_mfi; | |
2569 | hfa384x_caplevel_t cap_sup_cfi; | |
2570 | hfa384x_caplevel_t cap_sup_pri; | |
2571 | hfa384x_caplevel_t cap_sup_sta; | |
2572 | hfa384x_caplevel_t cap_sup_ap; | |
2573 | ||
2574 | /* Actor compatibility ranges */ | |
2575 | hfa384x_caplevel_t cap_act_pri_cfi; /* pri f/w to controller interface */ | |
2576 | hfa384x_caplevel_t cap_act_sta_cfi; /* sta f/w to controller interface */ | |
2577 | hfa384x_caplevel_t cap_act_sta_mfi; /* sta f/w to modem interface */ | |
2578 | hfa384x_caplevel_t cap_act_ap_cfi; /* ap f/w to controller interface */ | |
2579 | hfa384x_caplevel_t cap_act_ap_mfi; /* ap f/w to modem interface */ | |
2580 | ||
aaad4303 | 2581 | u32 psusercount; /* Power save user count. */ |
00b3ed16 | 2582 | hfa384x_CommTallies32_t tallies; /* Communication tallies. */ |
aaad4303 | 2583 | u8 comment[WLAN_COMMENT_MAX+1]; /* User comment */ |
00b3ed16 GKH |
2584 | |
2585 | /* Channel Info request results (AP only) */ | |
2586 | struct { | |
2587 | atomic_t done; | |
aaad4303 | 2588 | u8 count; |
00b3ed16 GKH |
2589 | hfa384x_ChInfoResult_t results; |
2590 | } channel_info; | |
2591 | ||
2592 | hfa384x_InfFrame_t *scanresults; | |
2593 | ||
2594 | ||
2595 | prism2sta_authlist_t authlist; /* Authenticated station list. */ | |
aaad4303 | 2596 | unsigned int accessmode; /* Access mode. */ |
00b3ed16 GKH |
2597 | prism2sta_accesslist_t allow; /* Allowed station list. */ |
2598 | prism2sta_accesslist_t deny; /* Denied station list. */ | |
2599 | ||
2600 | } hfa384x_t; | |
2601 | ||
2602 | /*=============================================================*/ | |
2603 | /*--- Function Declarations -----------------------------------*/ | |
2604 | /*=============================================================*/ | |
00b3ed16 GKH |
2605 | void |
2606 | hfa384x_create( | |
2607 | hfa384x_t *hw, | |
2608 | struct usb_device *usb); | |
00b3ed16 GKH |
2609 | |
2610 | void hfa384x_destroy(hfa384x_t *hw); | |
2611 | ||
00b3ed16 GKH |
2612 | int |
2613 | hfa384x_corereset( hfa384x_t *hw, int holdtime, int settletime, int genesis); | |
2614 | int | |
2615 | hfa384x_drvr_chinforesults( hfa384x_t *hw); | |
2616 | int | |
2617 | hfa384x_drvr_commtallies( hfa384x_t *hw); | |
2618 | int | |
aaad4303 | 2619 | hfa384x_drvr_disable(hfa384x_t *hw, u16 macport); |
00b3ed16 | 2620 | int |
aaad4303 | 2621 | hfa384x_drvr_enable(hfa384x_t *hw, u16 macport); |
00b3ed16 GKH |
2622 | int |
2623 | hfa384x_drvr_flashdl_enable(hfa384x_t *hw); | |
2624 | int | |
2625 | hfa384x_drvr_flashdl_disable(hfa384x_t *hw); | |
2626 | int | |
aaad4303 | 2627 | hfa384x_drvr_flashdl_write(hfa384x_t *hw, u32 daddr, void* buf, u32 len); |
00b3ed16 | 2628 | int |
aaad4303 | 2629 | hfa384x_drvr_getconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len); |
00b3ed16 | 2630 | int |
aaad4303 | 2631 | hfa384x_drvr_handover( hfa384x_t *hw, u8 *addr); |
00b3ed16 GKH |
2632 | int |
2633 | hfa384x_drvr_hostscanresults( hfa384x_t *hw); | |
2634 | int | |
2635 | hfa384x_drvr_low_level(hfa384x_t *hw, hfa384x_metacmd_t *cmd); | |
2636 | int | |
aaad4303 | 2637 | hfa384x_drvr_mmi_read(hfa384x_t *hw, u32 address, u32 *result); |
00b3ed16 | 2638 | int |
aaad4303 | 2639 | hfa384x_drvr_mmi_write(hfa384x_t *hw, u32 address, u32 data); |
00b3ed16 | 2640 | int |
aaad4303 | 2641 | hfa384x_drvr_ramdl_enable(hfa384x_t *hw, u32 exeaddr); |
00b3ed16 GKH |
2642 | int |
2643 | hfa384x_drvr_ramdl_disable(hfa384x_t *hw); | |
2644 | int | |
aaad4303 | 2645 | hfa384x_drvr_ramdl_write(hfa384x_t *hw, u32 daddr, void* buf, u32 len); |
00b3ed16 | 2646 | int |
aaad4303 | 2647 | hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, unsigned int len); |
00b3ed16 GKH |
2648 | int |
2649 | hfa384x_drvr_scanresults( hfa384x_t *hw); | |
2650 | ||
2651 | int | |
aaad4303 | 2652 | hfa384x_drvr_setconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len); |
00b3ed16 GKH |
2653 | |
2654 | static inline int | |
aaad4303 | 2655 | hfa384x_drvr_getconfig16(hfa384x_t *hw, u16 rid, void *val) |
00b3ed16 GKH |
2656 | { |
2657 | int result = 0; | |
aaad4303 | 2658 | result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u16)); |
00b3ed16 | 2659 | if ( result == 0 ) { |
aaad4303 | 2660 | *((u16*)val) = hfa384x2host_16(*((u16*)val)); |
00b3ed16 GKH |
2661 | } |
2662 | return result; | |
2663 | } | |
2664 | ||
2665 | static inline int | |
aaad4303 | 2666 | hfa384x_drvr_getconfig32(hfa384x_t *hw, u16 rid, void *val) |
00b3ed16 GKH |
2667 | { |
2668 | int result = 0; | |
2669 | ||
aaad4303 | 2670 | result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u32)); |
00b3ed16 | 2671 | if ( result == 0 ) { |
aaad4303 | 2672 | *((u32*)val) = hfa384x2host_32(*((u32*)val)); |
00b3ed16 GKH |
2673 | } |
2674 | ||
2675 | return result; | |
2676 | } | |
2677 | ||
2678 | static inline int | |
aaad4303 | 2679 | hfa384x_drvr_setconfig16(hfa384x_t *hw, u16 rid, u16 val) |
00b3ed16 | 2680 | { |
aaad4303 | 2681 | u16 value = host2hfa384x_16(val); |
00b3ed16 GKH |
2682 | return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value)); |
2683 | } | |
2684 | ||
2685 | static inline int | |
aaad4303 | 2686 | hfa384x_drvr_setconfig32(hfa384x_t *hw, u16 rid, u32 val) |
00b3ed16 | 2687 | { |
aaad4303 | 2688 | u32 value = host2hfa384x_32(val); |
00b3ed16 GKH |
2689 | return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value)); |
2690 | } | |
2691 | ||
00b3ed16 GKH |
2692 | int |
2693 | hfa384x_drvr_getconfig_async(hfa384x_t *hw, | |
aaad4303 | 2694 | u16 rid, |
00b3ed16 GKH |
2695 | ctlx_usercb_t usercb, |
2696 | void *usercb_data); | |
2697 | ||
2698 | int | |
2699 | hfa384x_drvr_setconfig_async(hfa384x_t *hw, | |
aaad4303 | 2700 | u16 rid, |
00b3ed16 | 2701 | void *buf, |
aaad4303 | 2702 | u16 len, |
00b3ed16 GKH |
2703 | ctlx_usercb_t usercb, |
2704 | void *usercb_data); | |
00b3ed16 GKH |
2705 | |
2706 | static inline int | |
aaad4303 | 2707 | hfa384x_drvr_setconfig16_async(hfa384x_t *hw, u16 rid, u16 val) |
00b3ed16 | 2708 | { |
aaad4303 | 2709 | u16 value = host2hfa384x_16(val); |
00b3ed16 GKH |
2710 | return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value), |
2711 | NULL , NULL); | |
2712 | } | |
2713 | ||
2714 | static inline int | |
aaad4303 | 2715 | hfa384x_drvr_setconfig32_async(hfa384x_t *hw, u16 rid, u32 val) |
00b3ed16 | 2716 | { |
aaad4303 | 2717 | u32 value = host2hfa384x_32(val); |
00b3ed16 GKH |
2718 | return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value), |
2719 | NULL , NULL); | |
2720 | } | |
2721 | ||
2722 | ||
2723 | int | |
2724 | hfa384x_drvr_start(hfa384x_t *hw); | |
2725 | int | |
2726 | hfa384x_drvr_stop(hfa384x_t *hw); | |
2727 | int | |
2728 | hfa384x_drvr_txframe(hfa384x_t *hw, struct sk_buff *skb, p80211_hdr_t *p80211_hdr, p80211_metawep_t *p80211_wep); | |
2729 | void | |
2730 | hfa384x_tx_timeout(wlandevice_t *wlandev); | |
2731 | ||
2732 | int | |
2733 | hfa384x_cmd_initialize(hfa384x_t *hw); | |
2734 | int | |
aaad4303 | 2735 | hfa384x_cmd_enable(hfa384x_t *hw, u16 macport); |
00b3ed16 | 2736 | int |
aaad4303 | 2737 | hfa384x_cmd_disable(hfa384x_t *hw, u16 macport); |
00b3ed16 GKH |
2738 | int |
2739 | hfa384x_cmd_diagnose(hfa384x_t *hw); | |
2740 | int | |
aaad4303 | 2741 | hfa384x_cmd_allocate(hfa384x_t *hw, u16 len); |
00b3ed16 | 2742 | int |
aaad4303 | 2743 | hfa384x_cmd_transmit(hfa384x_t *hw, u16 reclaim, u16 qos, u16 fid); |
00b3ed16 | 2744 | int |
aaad4303 | 2745 | hfa384x_cmd_clearpersist(hfa384x_t *hw, u16 fid); |
00b3ed16 | 2746 | int |
aaad4303 | 2747 | hfa384x_cmd_access(hfa384x_t *hw, u16 write, u16 rid, void *buf, u16 len); |
00b3ed16 | 2748 | int |
aaad4303 | 2749 | hfa384x_cmd_monitor(hfa384x_t *hw, u16 enable); |
00b3ed16 GKH |
2750 | int |
2751 | hfa384x_cmd_download( | |
2752 | hfa384x_t *hw, | |
aaad4303 SP |
2753 | u16 mode, |
2754 | u16 lowaddr, | |
2755 | u16 highaddr, | |
2756 | u16 codelen); | |
00b3ed16 GKH |
2757 | int |
2758 | hfa384x_cmd_aux_enable(hfa384x_t *hw, int force); | |
2759 | int | |
2760 | hfa384x_cmd_aux_disable(hfa384x_t *hw); | |
2761 | int | |
2762 | hfa384x_copy_from_bap( | |
2763 | hfa384x_t *hw, | |
aaad4303 SP |
2764 | u16 bap, |
2765 | u16 id, | |
2766 | u16 offset, | |
00b3ed16 | 2767 | void *buf, |
aaad4303 | 2768 | unsigned int len); |
00b3ed16 GKH |
2769 | int |
2770 | hfa384x_copy_to_bap( | |
2771 | hfa384x_t *hw, | |
aaad4303 SP |
2772 | u16 bap, |
2773 | u16 id, | |
2774 | u16 offset, | |
00b3ed16 | 2775 | void *buf, |
aaad4303 | 2776 | unsigned int len); |
00b3ed16 GKH |
2777 | void |
2778 | hfa384x_copy_from_aux( | |
2779 | hfa384x_t *hw, | |
aaad4303 SP |
2780 | u32 cardaddr, |
2781 | u32 auxctl, | |
00b3ed16 | 2782 | void *buf, |
aaad4303 | 2783 | unsigned int len); |
00b3ed16 GKH |
2784 | void |
2785 | hfa384x_copy_to_aux( | |
2786 | hfa384x_t *hw, | |
aaad4303 SP |
2787 | u32 cardaddr, |
2788 | u32 auxctl, | |
00b3ed16 | 2789 | void *buf, |
aaad4303 | 2790 | unsigned int len); |
00b3ed16 | 2791 | |
00b3ed16 GKH |
2792 | #endif /* __KERNEL__ */ |
2793 | ||
2794 | #endif /* _HFA384x_H */ |