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00b3ed16 GKH |
1 | /* hfa384x.h |
2 | * | |
3 | * Defines the constants and data structures for the hfa384x | |
4 | * | |
5 | * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved. | |
6 | * -------------------------------------------------------------------- | |
7 | * | |
8 | * linux-wlan | |
9 | * | |
10 | * The contents of this file are subject to the Mozilla Public | |
11 | * License Version 1.1 (the "License"); you may not use this file | |
12 | * except in compliance with the License. You may obtain a copy of | |
13 | * the License at http://www.mozilla.org/MPL/ | |
14 | * | |
15 | * Software distributed under the License is distributed on an "AS | |
16 | * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or | |
17 | * implied. See the License for the specific language governing | |
18 | * rights and limitations under the License. | |
19 | * | |
20 | * Alternatively, the contents of this file may be used under the | |
21 | * terms of the GNU Public License version 2 (the "GPL"), in which | |
22 | * case the provisions of the GPL are applicable instead of the | |
23 | * above. If you wish to allow the use of your version of this file | |
24 | * only under the terms of the GPL and not to allow others to use | |
25 | * your version of this file under the MPL, indicate your decision | |
26 | * by deleting the provisions above and replace them with the notice | |
27 | * and other provisions required by the GPL. If you do not delete | |
28 | * the provisions above, a recipient may use your version of this | |
29 | * file under either the MPL or the GPL. | |
30 | * | |
31 | * -------------------------------------------------------------------- | |
32 | * | |
33 | * Inquiries regarding the linux-wlan Open Source project can be | |
34 | * made directly to: | |
35 | * | |
36 | * AbsoluteValue Systems Inc. | |
37 | * info@linux-wlan.com | |
38 | * http://www.linux-wlan.com | |
39 | * | |
40 | * -------------------------------------------------------------------- | |
41 | * | |
42 | * Portions of the development of this software were funded by | |
43 | * Intersil Corporation as part of PRISM(R) chipset product development. | |
44 | * | |
45 | * -------------------------------------------------------------------- | |
46 | * | |
47 | * [Implementation and usage notes] | |
48 | * | |
49 | * [References] | |
50 | * CW10 Programmer's Manual v1.5 | |
51 | * IEEE 802.11 D10.0 | |
52 | * | |
53 | * -------------------------------------------------------------------- | |
54 | */ | |
55 | ||
56 | #ifndef _HFA384x_H | |
57 | #define _HFA384x_H | |
58 | ||
59 | /*=============================================================*/ | |
60 | #define HFA384x_FIRMWARE_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) | |
61 | ||
62 | #define HFA384x_LEVEL_TO_dBm(v) (0x100 + (v) * 100 / 255 - 100) | |
63 | ||
64 | /*------ Constants --------------------------------------------*/ | |
65 | /*--- Mins & Maxs -----------------------------------*/ | |
aaad4303 SP |
66 | #define HFA384x_CMD_ALLOC_LEN_MIN ((u16)4) |
67 | #define HFA384x_CMD_ALLOC_LEN_MAX ((u16)2400) | |
68 | #define HFA384x_BAP_DATALEN_MAX ((u16)4096) | |
69 | #define HFA384x_BAP_OFFSET_MAX ((u16)4096) | |
70 | #define HFA384x_PORTID_MAX ((u16)7) | |
71 | #define HFA384x_NUMPORTS_MAX ((u16)(HFA384x_PORTID_MAX+1)) | |
72 | #define HFA384x_PDR_LEN_MAX ((u16)512) /* in bytes, from EK */ | |
73 | #define HFA384x_PDA_RECS_MAX ((u16)200) /* a guess */ | |
74 | #define HFA384x_PDA_LEN_MAX ((u16)1024) /* in bytes, from EK */ | |
75 | #define HFA384x_SCANRESULT_MAX ((u16)31) | |
76 | #define HFA384x_HSCANRESULT_MAX ((u16)31) | |
77 | #define HFA384x_CHINFORESULT_MAX ((u16)16) | |
00b3ed16 GKH |
78 | #define HFA384x_DRVR_FIDSTACKLEN_MAX (10) |
79 | #define HFA384x_DRVR_TXBUF_MAX (sizeof(hfa384x_tx_frame_t) + \ | |
80 | WLAN_DATA_MAXLEN - \ | |
81 | WLAN_WEP_IV_LEN - \ | |
82 | WLAN_WEP_ICV_LEN + 2) | |
83 | #define HFA384x_DRVR_MAGIC (0x4a2d) | |
84 | #define HFA384x_INFODATA_MAXLEN (sizeof(hfa384x_infodata_t)) | |
85 | #define HFA384x_INFOFRM_MAXLEN (sizeof(hfa384x_InfFrame_t)) | |
86 | #define HFA384x_RID_GUESSING_MAXLEN 2048 /* I'm not really sure */ | |
87 | #define HFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN | |
88 | #define HFA384x_USB_RWMEM_MAXLEN 2048 | |
89 | ||
90 | /*--- Support Constants -----------------------------*/ | |
aaad4303 SP |
91 | #define HFA384x_BAP_PROC ((u16)0) |
92 | #define HFA384x_BAP_int ((u16)1) | |
93 | #define HFA384x_PORTTYPE_IBSS ((u16)0) | |
94 | #define HFA384x_PORTTYPE_BSS ((u16)1) | |
95 | #define HFA384x_PORTTYPE_WDS ((u16)2) | |
96 | #define HFA384x_PORTTYPE_PSUEDOIBSS ((u16)3) | |
97 | #define HFA384x_PORTTYPE_HOSTAP ((u16)6) | |
98 | #define HFA384x_WEPFLAGS_PRIVINVOKED ((u16)BIT0) | |
99 | #define HFA384x_WEPFLAGS_EXCLUDE ((u16)BIT1) | |
100 | #define HFA384x_WEPFLAGS_DISABLE_TXCRYPT ((u16)BIT4) | |
101 | #define HFA384x_WEPFLAGS_DISABLE_RXCRYPT ((u16)BIT7) | |
102 | #define HFA384x_WEPFLAGS_DISALLOW_MIXED ((u16)BIT11) | |
103 | #define HFA384x_WEPFLAGS_IV_intERVAL1 ((u16)0) | |
104 | #define HFA384x_WEPFLAGS_IV_intERVAL10 ((u16)BIT5) | |
105 | #define HFA384x_WEPFLAGS_IV_intERVAL50 ((u16)BIT6) | |
106 | #define HFA384x_WEPFLAGS_IV_intERVAL100 ((u16)(BIT5 | BIT6)) | |
107 | #define HFA384x_WEPFLAGS_FIRMWARE_WPA ((u16)BIT8) | |
108 | #define HFA384x_WEPFLAGS_HOST_MIC ((u16)BIT9) | |
109 | #define HFA384x_ROAMMODE_FWSCAN_FWROAM ((u16)1) | |
110 | #define HFA384x_ROAMMODE_FWSCAN_HOSTROAM ((u16)2) | |
111 | #define HFA384x_ROAMMODE_HOSTSCAN_HOSTROAM ((u16)3) | |
112 | #define HFA384x_PORTSTATUS_DISABLED ((u16)1) | |
113 | #define HFA384x_PORTSTATUS_INITSRCH ((u16)2) | |
114 | #define HFA384x_PORTSTATUS_CONN_IBSS ((u16)3) | |
115 | #define HFA384x_PORTSTATUS_CONN_ESS ((u16)4) | |
116 | #define HFA384x_PORTSTATUS_OOR_ESS ((u16)5) | |
117 | #define HFA384x_PORTSTATUS_CONN_WDS ((u16)6) | |
118 | #define HFA384x_PORTSTATUS_HOSTAP ((u16)8) | |
119 | #define HFA384x_RATEBIT_1 ((u16)1) | |
120 | #define HFA384x_RATEBIT_2 ((u16)2) | |
121 | #define HFA384x_RATEBIT_5dot5 ((u16)4) | |
122 | #define HFA384x_RATEBIT_11 ((u16)8) | |
00b3ed16 GKH |
123 | |
124 | /*--- Just some symbolic names for legibility -------*/ | |
aaad4303 SP |
125 | #define HFA384x_TXCMD_NORECL ((u16)0) |
126 | #define HFA384x_TXCMD_RECL ((u16)1) | |
00b3ed16 GKH |
127 | |
128 | /*--- MAC Internal memory constants and macros ------*/ | |
129 | /* masks and macros used to manipulate MAC internal memory addresses. */ | |
130 | /* MAC internal memory addresses are 23 bit quantities. The MAC uses | |
131 | * a paged address space where the upper 16 bits are the page number | |
132 | * and the lower 7 bits are the offset. There are various Host API | |
133 | * elements that require two 16-bit quantities to specify a MAC | |
134 | * internal memory address. Unfortunately, some of the API's use a | |
135 | * page/offset format where the offset value is JUST the lower seven | |
136 | * bits and the page is the remaining 16 bits. Some of the API's | |
137 | * assume that the 23 bit address has been split at the 16th bit. We | |
138 | * refer to these two formats as AUX format and CMD format. The | |
139 | * macros below help handle some of this. | |
140 | */ | |
141 | ||
142 | /* Handy constant */ | |
aaad4303 | 143 | #define HFA384x_ADDR_AUX_OFF_MAX ((u16)0x007f) |
00b3ed16 GKH |
144 | |
145 | /* Mask bits for discarding unwanted pieces in a flat address */ | |
146 | #define HFA384x_ADDR_FLAT_AUX_PAGE_MASK (0x007fff80) | |
147 | #define HFA384x_ADDR_FLAT_AUX_OFF_MASK (0x0000007f) | |
148 | #define HFA384x_ADDR_FLAT_CMD_PAGE_MASK (0xffff0000) | |
149 | #define HFA384x_ADDR_FLAT_CMD_OFF_MASK (0x0000ffff) | |
150 | ||
151 | /* Mask bits for discarding unwanted pieces in AUX format 16-bit address parts */ | |
152 | #define HFA384x_ADDR_AUX_PAGE_MASK (0xffff) | |
153 | #define HFA384x_ADDR_AUX_OFF_MASK (0x007f) | |
154 | ||
155 | /* Mask bits for discarding unwanted pieces in CMD format 16-bit address parts */ | |
156 | #define HFA384x_ADDR_CMD_PAGE_MASK (0x007f) | |
157 | #define HFA384x_ADDR_CMD_OFF_MASK (0xffff) | |
158 | ||
159 | /* Make a 32-bit flat address from AUX format 16-bit page and offset */ | |
160 | #define HFA384x_ADDR_AUX_MKFLAT(p,o) \ | |
aaad4303 SP |
161 | (((u32)(((u16)(p))&HFA384x_ADDR_AUX_PAGE_MASK)) <<7) | \ |
162 | ((u32)(((u16)(o))&HFA384x_ADDR_AUX_OFF_MASK)) | |
00b3ed16 GKH |
163 | |
164 | /* Make a 32-bit flat address from CMD format 16-bit page and offset */ | |
165 | #define HFA384x_ADDR_CMD_MKFLAT(p,o) \ | |
aaad4303 SP |
166 | (((u32)(((u16)(p))&HFA384x_ADDR_CMD_PAGE_MASK)) <<16) | \ |
167 | ((u32)(((u16)(o))&HFA384x_ADDR_CMD_OFF_MASK)) | |
00b3ed16 GKH |
168 | |
169 | /* Make AUX format offset and page from a 32-bit flat address */ | |
170 | #define HFA384x_ADDR_AUX_MKPAGE(f) \ | |
aaad4303 | 171 | ((u16)((((u32)(f))&HFA384x_ADDR_FLAT_AUX_PAGE_MASK)>>7)) |
00b3ed16 | 172 | #define HFA384x_ADDR_AUX_MKOFF(f) \ |
aaad4303 | 173 | ((u16)(((u32)(f))&HFA384x_ADDR_FLAT_AUX_OFF_MASK)) |
00b3ed16 GKH |
174 | |
175 | /* Make CMD format offset and page from a 32-bit flat address */ | |
176 | #define HFA384x_ADDR_CMD_MKPAGE(f) \ | |
aaad4303 | 177 | ((u16)((((u32)(f))&HFA384x_ADDR_FLAT_CMD_PAGE_MASK)>>16)) |
00b3ed16 | 178 | #define HFA384x_ADDR_CMD_MKOFF(f) \ |
aaad4303 | 179 | ((u16)(((u32)(f))&HFA384x_ADDR_FLAT_CMD_OFF_MASK)) |
00b3ed16 GKH |
180 | |
181 | /*--- Aux register masks/tests ----------------------*/ | |
182 | /* Some of the upper bits of the AUX offset register are used to */ | |
183 | /* select address space. */ | |
184 | #define HFA384x_AUX_CTL_EXTDS (0x00) | |
185 | #define HFA384x_AUX_CTL_NV (0x01) | |
186 | #define HFA384x_AUX_CTL_PHY (0x02) | |
187 | #define HFA384x_AUX_CTL_ICSRAM (0x03) | |
188 | ||
189 | /* Make AUX register offset and page values from a flat address */ | |
190 | #define HFA384x_AUX_MKOFF(f, c) \ | |
aaad4303 | 191 | (HFA384x_ADDR_AUX_MKOFF(f) | (((u16)(c))<<12)) |
00b3ed16 GKH |
192 | #define HFA384x_AUX_MKPAGE(f) HFA384x_ADDR_AUX_MKPAGE(f) |
193 | ||
194 | ||
195 | /*--- Controller Memory addresses -------------------*/ | |
196 | #define HFA3842_PDA_BASE (0x007f0000UL) | |
197 | #define HFA3841_PDA_BASE (0x003f0000UL) | |
198 | #define HFA3841_PDA_BOGUS_BASE (0x00390000UL) | |
199 | ||
200 | /*--- Driver Download states -----------------------*/ | |
201 | #define HFA384x_DLSTATE_DISABLED 0 | |
202 | #define HFA384x_DLSTATE_RAMENABLED 1 | |
203 | #define HFA384x_DLSTATE_FLASHENABLED 2 | |
204 | #define HFA384x_DLSTATE_FLASHWRITTEN 3 | |
205 | #define HFA384x_DLSTATE_FLASHWRITEPENDING 4 | |
206 | #define HFA384x_DLSTATE_GENESIS 5 | |
207 | ||
00b3ed16 GKH |
208 | #define HFA384x_CMD_OFF (0x00) |
209 | #define HFA384x_PARAM0_OFF (0x04) | |
210 | #define HFA384x_PARAM1_OFF (0x08) | |
211 | #define HFA384x_PARAM2_OFF (0x0c) | |
212 | #define HFA384x_STATUS_OFF (0x10) | |
213 | #define HFA384x_RESP0_OFF (0x14) | |
214 | #define HFA384x_RESP1_OFF (0x18) | |
215 | #define HFA384x_RESP2_OFF (0x1c) | |
216 | #define HFA384x_INFOFID_OFF (0x20) | |
217 | #define HFA384x_RXFID_OFF (0x40) | |
218 | #define HFA384x_ALLOCFID_OFF (0x44) | |
219 | #define HFA384x_TXCOMPLFID_OFF (0x48) | |
220 | #define HFA384x_SELECT0_OFF (0x30) | |
221 | #define HFA384x_OFFSET0_OFF (0x38) | |
222 | #define HFA384x_DATA0_OFF (0x6c) | |
223 | #define HFA384x_SELECT1_OFF (0x34) | |
224 | #define HFA384x_OFFSET1_OFF (0x3c) | |
225 | #define HFA384x_DATA1_OFF (0x70) | |
226 | #define HFA384x_EVSTAT_OFF (0x60) | |
aaad4303 | 227 | #define HFA384x_intEN_OFF (0x64) |
00b3ed16 GKH |
228 | #define HFA384x_EVACK_OFF (0x68) |
229 | #define HFA384x_CONTROL_OFF (0x28) | |
230 | #define HFA384x_SWSUPPORT0_OFF (0x50) | |
231 | #define HFA384x_SWSUPPORT1_OFF (0x54) | |
232 | #define HFA384x_SWSUPPORT2_OFF (0x58) | |
233 | #define HFA384x_AUXPAGE_OFF (0x74) | |
234 | #define HFA384x_AUXOFFSET_OFF (0x78) | |
235 | #define HFA384x_AUXDATA_OFF (0x7c) | |
236 | #define HFA384x_PCICOR_OFF (0x4c) | |
237 | #define HFA384x_PCIHCR_OFF (0x5c) | |
238 | #define HFA384x_PCI_M0_ADDRH_OFF (0x80) | |
239 | #define HFA384x_PCI_M0_ADDRL_OFF (0x84) | |
240 | #define HFA384x_PCI_M0_LEN_OFF (0x88) | |
241 | #define HFA384x_PCI_M0_CTL_OFF (0x8c) | |
242 | #define HFA384x_PCI_STATUS_OFF (0x98) | |
243 | #define HFA384x_PCI_M1_ADDRH_OFF (0xa0) | |
244 | #define HFA384x_PCI_M1_ADDRL_OFF (0xa4) | |
245 | #define HFA384x_PCI_M1_LEN_OFF (0xa8) | |
246 | #define HFA384x_PCI_M1_CTL_OFF (0xac) | |
247 | ||
00b3ed16 | 248 | /*--- Register Field Masks --------------------------*/ |
aaad4303 SP |
249 | #define HFA384x_CMD_BUSY ((u16)BIT15) |
250 | #define HFA384x_CMD_AINFO ((u16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8)) | |
251 | #define HFA384x_CMD_MACPORT ((u16)(BIT10 | BIT9 | BIT8)) | |
252 | #define HFA384x_CMD_RECL ((u16)BIT8) | |
253 | #define HFA384x_CMD_WRITE ((u16)BIT8) | |
254 | #define HFA384x_CMD_PROGMODE ((u16)(BIT9 | BIT8)) | |
255 | #define HFA384x_CMD_CMDCODE ((u16)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)) | |
256 | ||
257 | #define HFA384x_STATUS_RESULT ((u16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8)) | |
258 | #define HFA384x_STATUS_CMDCODE ((u16)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)) | |
259 | ||
260 | #define HFA384x_OFFSET_BUSY ((u16)BIT15) | |
261 | #define HFA384x_OFFSET_ERR ((u16)BIT14) | |
262 | #define HFA384x_OFFSET_DATAOFF ((u16)(BIT11 | BIT10 | BIT9 | BIT8 | BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1)) | |
263 | ||
264 | #define HFA384x_EVSTAT_TICK ((u16)BIT15) | |
265 | #define HFA384x_EVSTAT_WTERR ((u16)BIT14) | |
266 | #define HFA384x_EVSTAT_INFDROP ((u16)BIT13) | |
267 | #define HFA384x_EVSTAT_INFO ((u16)BIT7) | |
268 | #define HFA384x_EVSTAT_DTIM ((u16)BIT5) | |
269 | #define HFA384x_EVSTAT_CMD ((u16)BIT4) | |
270 | #define HFA384x_EVSTAT_ALLOC ((u16)BIT3) | |
271 | #define HFA384x_EVSTAT_TXEXC ((u16)BIT2) | |
272 | #define HFA384x_EVSTAT_TX ((u16)BIT1) | |
273 | #define HFA384x_EVSTAT_RX ((u16)BIT0) | |
274 | ||
275 | #define HFA384x_int_BAP_OP (HFA384x_EVSTAT_INFO|HFA384x_EVSTAT_RX|HFA384x_EVSTAT_TX|HFA384x_EVSTAT_TXEXC) | |
276 | ||
277 | #define HFA384x_int_NORMAL (HFA384x_EVSTAT_INFO|HFA384x_EVSTAT_RX|HFA384x_EVSTAT_TX|HFA384x_EVSTAT_TXEXC|HFA384x_EVSTAT_INFDROP|HFA384x_EVSTAT_ALLOC|HFA384x_EVSTAT_DTIM) | |
278 | ||
279 | #define HFA384x_intEN_TICK ((u16)BIT15) | |
280 | #define HFA384x_intEN_WTERR ((u16)BIT14) | |
281 | #define HFA384x_intEN_INFDROP ((u16)BIT13) | |
282 | #define HFA384x_intEN_INFO ((u16)BIT7) | |
283 | #define HFA384x_intEN_DTIM ((u16)BIT5) | |
284 | #define HFA384x_intEN_CMD ((u16)BIT4) | |
285 | #define HFA384x_intEN_ALLOC ((u16)BIT3) | |
286 | #define HFA384x_intEN_TXEXC ((u16)BIT2) | |
287 | #define HFA384x_intEN_TX ((u16)BIT1) | |
288 | #define HFA384x_intEN_RX ((u16)BIT0) | |
289 | ||
290 | #define HFA384x_EVACK_TICK ((u16)BIT15) | |
291 | #define HFA384x_EVACK_WTERR ((u16)BIT14) | |
292 | #define HFA384x_EVACK_INFDROP ((u16)BIT13) | |
293 | #define HFA384x_EVACK_INFO ((u16)BIT7) | |
294 | #define HFA384x_EVACK_DTIM ((u16)BIT5) | |
295 | #define HFA384x_EVACK_CMD ((u16)BIT4) | |
296 | #define HFA384x_EVACK_ALLOC ((u16)BIT3) | |
297 | #define HFA384x_EVACK_TXEXC ((u16)BIT2) | |
298 | #define HFA384x_EVACK_TX ((u16)BIT1) | |
299 | #define HFA384x_EVACK_RX ((u16)BIT0) | |
300 | ||
301 | #define HFA384x_CONTROL_AUXEN ((u16)(BIT15 | BIT14)) | |
00b3ed16 GKH |
302 | |
303 | ||
304 | /*--- Command Code Constants --------------------------*/ | |
305 | /*--- Controller Commands --------------------------*/ | |
aaad4303 SP |
306 | #define HFA384x_CMDCODE_INIT ((u16)0x00) |
307 | #define HFA384x_CMDCODE_ENABLE ((u16)0x01) | |
308 | #define HFA384x_CMDCODE_DISABLE ((u16)0x02) | |
309 | #define HFA384x_CMDCODE_DIAG ((u16)0x03) | |
00b3ed16 GKH |
310 | |
311 | /*--- Buffer Mgmt Commands --------------------------*/ | |
aaad4303 SP |
312 | #define HFA384x_CMDCODE_ALLOC ((u16)0x0A) |
313 | #define HFA384x_CMDCODE_TX ((u16)0x0B) | |
314 | #define HFA384x_CMDCODE_CLRPRST ((u16)0x12) | |
00b3ed16 GKH |
315 | |
316 | /*--- Regulate Commands --------------------------*/ | |
aaad4303 SP |
317 | #define HFA384x_CMDCODE_NOTIFY ((u16)0x10) |
318 | #define HFA384x_CMDCODE_INQ ((u16)0x11) | |
00b3ed16 GKH |
319 | |
320 | /*--- Configure Commands --------------------------*/ | |
aaad4303 SP |
321 | #define HFA384x_CMDCODE_ACCESS ((u16)0x21) |
322 | #define HFA384x_CMDCODE_DOWNLD ((u16)0x22) | |
00b3ed16 GKH |
323 | |
324 | /*--- Debugging Commands -----------------------------*/ | |
aaad4303 SP |
325 | #define HFA384x_CMDCODE_MONITOR ((u16)(0x38)) |
326 | #define HFA384x_MONITOR_ENABLE ((u16)(0x0b)) | |
327 | #define HFA384x_MONITOR_DISABLE ((u16)(0x0f)) | |
00b3ed16 GKH |
328 | |
329 | /*--- Result Codes --------------------------*/ | |
aaad4303 SP |
330 | #define HFA384x_SUCCESS ((u16)(0x00)) |
331 | #define HFA384x_CARD_FAIL ((u16)(0x01)) | |
332 | #define HFA384x_NO_BUFF ((u16)(0x05)) | |
333 | #define HFA384x_CMD_ERR ((u16)(0x7F)) | |
00b3ed16 GKH |
334 | |
335 | /*--- Programming Modes -------------------------- | |
336 | MODE 0: Disable programming | |
337 | MODE 1: Enable volatile memory programming | |
338 | MODE 2: Enable non-volatile memory programming | |
339 | MODE 3: Program non-volatile memory section | |
340 | --------------------------------------------------*/ | |
aaad4303 SP |
341 | #define HFA384x_PROGMODE_DISABLE ((u16)0x00) |
342 | #define HFA384x_PROGMODE_RAM ((u16)0x01) | |
343 | #define HFA384x_PROGMODE_NV ((u16)0x02) | |
344 | #define HFA384x_PROGMODE_NVWRITE ((u16)0x03) | |
00b3ed16 GKH |
345 | |
346 | /*--- AUX register enable --------------------------*/ | |
aaad4303 SP |
347 | #define HFA384x_AUXPW0 ((u16)0xfe01) |
348 | #define HFA384x_AUXPW1 ((u16)0xdc23) | |
349 | #define HFA384x_AUXPW2 ((u16)0xba45) | |
00b3ed16 | 350 | |
aaad4303 SP |
351 | #define HFA384x_CONTROL_AUX_ISDISABLED ((u16)0x0000) |
352 | #define HFA384x_CONTROL_AUX_ISENABLED ((u16)0xc000) | |
353 | #define HFA384x_CONTROL_AUX_DOENABLE ((u16)0x8000) | |
354 | #define HFA384x_CONTROL_AUX_DODISABLE ((u16)0x4000) | |
00b3ed16 GKH |
355 | |
356 | /*--- Record ID Constants --------------------------*/ | |
357 | /*-------------------------------------------------------------------- | |
358 | Configuration RIDs: Network Parameters, Static Configuration Entities | |
359 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
360 | #define HFA384x_RID_CNFPORTTYPE ((u16)0xFC00) |
361 | #define HFA384x_RID_CNFOWNMACADDR ((u16)0xFC01) | |
362 | #define HFA384x_RID_CNFDESIREDSSID ((u16)0xFC02) | |
363 | #define HFA384x_RID_CNFOWNCHANNEL ((u16)0xFC03) | |
364 | #define HFA384x_RID_CNFOWNSSID ((u16)0xFC04) | |
365 | #define HFA384x_RID_CNFOWNATIMWIN ((u16)0xFC05) | |
366 | #define HFA384x_RID_CNFSYSSCALE ((u16)0xFC06) | |
367 | #define HFA384x_RID_CNFMAXDATALEN ((u16)0xFC07) | |
368 | #define HFA384x_RID_CNFWDSADDR ((u16)0xFC08) | |
369 | #define HFA384x_RID_CNFPMENABLED ((u16)0xFC09) | |
370 | #define HFA384x_RID_CNFPMEPS ((u16)0xFC0A) | |
371 | #define HFA384x_RID_CNFMULTICASTRX ((u16)0xFC0B) | |
372 | #define HFA384x_RID_CNFMAXSLEEPDUR ((u16)0xFC0C) | |
373 | #define HFA384x_RID_CNFPMHOLDDUR ((u16)0xFC0D) | |
374 | #define HFA384x_RID_CNFOWNNAME ((u16)0xFC0E) | |
375 | #define HFA384x_RID_CNFOWNDTIMPER ((u16)0xFC10) | |
376 | #define HFA384x_RID_CNFWDSADDR1 ((u16)0xFC11) | |
377 | #define HFA384x_RID_CNFWDSADDR2 ((u16)0xFC12) | |
378 | #define HFA384x_RID_CNFWDSADDR3 ((u16)0xFC13) | |
379 | #define HFA384x_RID_CNFWDSADDR4 ((u16)0xFC14) | |
380 | #define HFA384x_RID_CNFWDSADDR5 ((u16)0xFC15) | |
381 | #define HFA384x_RID_CNFWDSADDR6 ((u16)0xFC16) | |
382 | #define HFA384x_RID_CNFMCASTPMBUFF ((u16)0xFC17) | |
00b3ed16 GKH |
383 | |
384 | /*-------------------------------------------------------------------- | |
385 | Configuration RID lengths: Network Params, Static Config Entities | |
386 | This is the length of JUST the DATA part of the RID (does not | |
387 | include the len or code fields) | |
388 | --------------------------------------------------------------------*/ | |
389 | /* TODO: fill in the rest of these */ | |
aaad4303 SP |
390 | #define HFA384x_RID_CNFPORTTYPE_LEN ((u16)2) |
391 | #define HFA384x_RID_CNFOWNMACADDR_LEN ((u16)6) | |
392 | #define HFA384x_RID_CNFDESIREDSSID_LEN ((u16)34) | |
393 | #define HFA384x_RID_CNFOWNCHANNEL_LEN ((u16)2) | |
394 | #define HFA384x_RID_CNFOWNSSID_LEN ((u16)34) | |
395 | #define HFA384x_RID_CNFOWNATIMWIN_LEN ((u16)2) | |
396 | #define HFA384x_RID_CNFSYSSCALE_LEN ((u16)0) | |
397 | #define HFA384x_RID_CNFMAXDATALEN_LEN ((u16)0) | |
398 | #define HFA384x_RID_CNFWDSADDR_LEN ((u16)6) | |
399 | #define HFA384x_RID_CNFPMENABLED_LEN ((u16)0) | |
400 | #define HFA384x_RID_CNFPMEPS_LEN ((u16)0) | |
401 | #define HFA384x_RID_CNFMULTICASTRX_LEN ((u16)0) | |
402 | #define HFA384x_RID_CNFMAXSLEEPDUR_LEN ((u16)0) | |
403 | #define HFA384x_RID_CNFPMHOLDDUR_LEN ((u16)0) | |
404 | #define HFA384x_RID_CNFOWNNAME_LEN ((u16)34) | |
405 | #define HFA384x_RID_CNFOWNDTIMPER_LEN ((u16)0) | |
406 | #define HFA384x_RID_CNFWDSADDR1_LEN ((u16)6) | |
407 | #define HFA384x_RID_CNFWDSADDR2_LEN ((u16)6) | |
408 | #define HFA384x_RID_CNFWDSADDR3_LEN ((u16)6) | |
409 | #define HFA384x_RID_CNFWDSADDR4_LEN ((u16)6) | |
410 | #define HFA384x_RID_CNFWDSADDR5_LEN ((u16)6) | |
411 | #define HFA384x_RID_CNFWDSADDR6_LEN ((u16)6) | |
412 | #define HFA384x_RID_CNFMCASTPMBUFF_LEN ((u16)0) | |
413 | #define HFA384x_RID_CNFAUTHENTICATION_LEN ((u16)sizeof(u16)) | |
414 | #define HFA384x_RID_CNFMAXSLEEPDUR_LEN ((u16)0) | |
00b3ed16 GKH |
415 | |
416 | /*-------------------------------------------------------------------- | |
417 | Configuration RIDs: Network Parameters, Dynamic Configuration Entities | |
418 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
419 | #define HFA384x_RID_GROUPADDR ((u16)0xFC80) |
420 | #define HFA384x_RID_CREATEIBSS ((u16)0xFC81) | |
421 | #define HFA384x_RID_FRAGTHRESH ((u16)0xFC82) | |
422 | #define HFA384x_RID_RTSTHRESH ((u16)0xFC83) | |
423 | #define HFA384x_RID_TXRATECNTL ((u16)0xFC84) | |
424 | #define HFA384x_RID_PROMISCMODE ((u16)0xFC85) | |
425 | #define HFA384x_RID_FRAGTHRESH0 ((u16)0xFC90) | |
426 | #define HFA384x_RID_FRAGTHRESH1 ((u16)0xFC91) | |
427 | #define HFA384x_RID_FRAGTHRESH2 ((u16)0xFC92) | |
428 | #define HFA384x_RID_FRAGTHRESH3 ((u16)0xFC93) | |
429 | #define HFA384x_RID_FRAGTHRESH4 ((u16)0xFC94) | |
430 | #define HFA384x_RID_FRAGTHRESH5 ((u16)0xFC95) | |
431 | #define HFA384x_RID_FRAGTHRESH6 ((u16)0xFC96) | |
432 | #define HFA384x_RID_RTSTHRESH0 ((u16)0xFC97) | |
433 | #define HFA384x_RID_RTSTHRESH1 ((u16)0xFC98) | |
434 | #define HFA384x_RID_RTSTHRESH2 ((u16)0xFC99) | |
435 | #define HFA384x_RID_RTSTHRESH3 ((u16)0xFC9A) | |
436 | #define HFA384x_RID_RTSTHRESH4 ((u16)0xFC9B) | |
437 | #define HFA384x_RID_RTSTHRESH5 ((u16)0xFC9C) | |
438 | #define HFA384x_RID_RTSTHRESH6 ((u16)0xFC9D) | |
439 | #define HFA384x_RID_TXRATECNTL0 ((u16)0xFC9E) | |
440 | #define HFA384x_RID_TXRATECNTL1 ((u16)0xFC9F) | |
441 | #define HFA384x_RID_TXRATECNTL2 ((u16)0xFCA0) | |
442 | #define HFA384x_RID_TXRATECNTL3 ((u16)0xFCA1) | |
443 | #define HFA384x_RID_TXRATECNTL4 ((u16)0xFCA2) | |
444 | #define HFA384x_RID_TXRATECNTL5 ((u16)0xFCA3) | |
445 | #define HFA384x_RID_TXRATECNTL6 ((u16)0xFCA4) | |
00b3ed16 GKH |
446 | |
447 | /*-------------------------------------------------------------------- | |
448 | Configuration RID Lengths: Network Param, Dynamic Config Entities | |
449 | This is the length of JUST the DATA part of the RID (does not | |
450 | include the len or code fields) | |
451 | --------------------------------------------------------------------*/ | |
452 | /* TODO: fill in the rest of these */ | |
aaad4303 SP |
453 | #define HFA384x_RID_GROUPADDR_LEN ((u16)16 * WLAN_ADDR_LEN) |
454 | #define HFA384x_RID_CREATEIBSS_LEN ((u16)0) | |
455 | #define HFA384x_RID_FRAGTHRESH_LEN ((u16)0) | |
456 | #define HFA384x_RID_RTSTHRESH_LEN ((u16)0) | |
457 | #define HFA384x_RID_TXRATECNTL_LEN ((u16)4) | |
458 | #define HFA384x_RID_PROMISCMODE_LEN ((u16)2) | |
459 | #define HFA384x_RID_FRAGTHRESH0_LEN ((u16)0) | |
460 | #define HFA384x_RID_FRAGTHRESH1_LEN ((u16)0) | |
461 | #define HFA384x_RID_FRAGTHRESH2_LEN ((u16)0) | |
462 | #define HFA384x_RID_FRAGTHRESH3_LEN ((u16)0) | |
463 | #define HFA384x_RID_FRAGTHRESH4_LEN ((u16)0) | |
464 | #define HFA384x_RID_FRAGTHRESH5_LEN ((u16)0) | |
465 | #define HFA384x_RID_FRAGTHRESH6_LEN ((u16)0) | |
466 | #define HFA384x_RID_RTSTHRESH0_LEN ((u16)0) | |
467 | #define HFA384x_RID_RTSTHRESH1_LEN ((u16)0) | |
468 | #define HFA384x_RID_RTSTHRESH2_LEN ((u16)0) | |
469 | #define HFA384x_RID_RTSTHRESH3_LEN ((u16)0) | |
470 | #define HFA384x_RID_RTSTHRESH4_LEN ((u16)0) | |
471 | #define HFA384x_RID_RTSTHRESH5_LEN ((u16)0) | |
472 | #define HFA384x_RID_RTSTHRESH6_LEN ((u16)0) | |
473 | #define HFA384x_RID_TXRATECNTL0_LEN ((u16)0) | |
474 | #define HFA384x_RID_TXRATECNTL1_LEN ((u16)0) | |
475 | #define HFA384x_RID_TXRATECNTL2_LEN ((u16)0) | |
476 | #define HFA384x_RID_TXRATECNTL3_LEN ((u16)0) | |
477 | #define HFA384x_RID_TXRATECNTL4_LEN ((u16)0) | |
478 | #define HFA384x_RID_TXRATECNTL5_LEN ((u16)0) | |
479 | #define HFA384x_RID_TXRATECNTL6_LEN ((u16)0) | |
00b3ed16 GKH |
480 | |
481 | /*-------------------------------------------------------------------- | |
482 | Configuration RIDs: Behavior Parameters | |
483 | --------------------------------------------------------------------*/ | |
aaad4303 | 484 | #define HFA384x_RID_ITICKTIME ((u16)0xFCE0) |
00b3ed16 GKH |
485 | |
486 | /*-------------------------------------------------------------------- | |
487 | Configuration RID Lengths: Behavior Parameters | |
488 | This is the length of JUST the DATA part of the RID (does not | |
489 | include the len or code fields) | |
490 | --------------------------------------------------------------------*/ | |
aaad4303 | 491 | #define HFA384x_RID_ITICKTIME_LEN ((u16)2) |
00b3ed16 GKH |
492 | |
493 | /*---------------------------------------------------------------------- | |
494 | Information RIDs: NIC Information | |
495 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
496 | #define HFA384x_RID_MAXLOADTIME ((u16)0xFD00) |
497 | #define HFA384x_RID_DOWNLOADBUFFER ((u16)0xFD01) | |
498 | #define HFA384x_RID_PRIIDENTITY ((u16)0xFD02) | |
499 | #define HFA384x_RID_PRISUPRANGE ((u16)0xFD03) | |
500 | #define HFA384x_RID_PRI_CFIACTRANGES ((u16)0xFD04) | |
501 | #define HFA384x_RID_NICSERIALNUMBER ((u16)0xFD0A) | |
502 | #define HFA384x_RID_NICIDENTITY ((u16)0xFD0B) | |
503 | #define HFA384x_RID_MFISUPRANGE ((u16)0xFD0C) | |
504 | #define HFA384x_RID_CFISUPRANGE ((u16)0xFD0D) | |
505 | #define HFA384x_RID_CHANNELLIST ((u16)0xFD10) | |
506 | #define HFA384x_RID_REGULATORYDOMAINS ((u16)0xFD11) | |
507 | #define HFA384x_RID_TEMPTYPE ((u16)0xFD12) | |
508 | #define HFA384x_RID_CIS ((u16)0xFD13) | |
509 | #define HFA384x_RID_STAIDENTITY ((u16)0xFD20) | |
510 | #define HFA384x_RID_STASUPRANGE ((u16)0xFD21) | |
511 | #define HFA384x_RID_STA_MFIACTRANGES ((u16)0xFD22) | |
512 | #define HFA384x_RID_STA_CFIACTRANGES ((u16)0xFD23) | |
513 | #define HFA384x_RID_BUILDSEQ ((u16)0xFFFE) | |
514 | #define HFA384x_RID_FWID ((u16)0xFFFF) | |
00b3ed16 GKH |
515 | |
516 | /*---------------------------------------------------------------------- | |
517 | Information RID Lengths: NIC Information | |
518 | This is the length of JUST the DATA part of the RID (does not | |
519 | include the len or code fields) | |
520 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
521 | #define HFA384x_RID_MAXLOADTIME_LEN ((u16)0) |
522 | #define HFA384x_RID_DOWNLOADBUFFER_LEN ((u16)sizeof(hfa384x_downloadbuffer_t)) | |
523 | #define HFA384x_RID_PRIIDENTITY_LEN ((u16)8) | |
524 | #define HFA384x_RID_PRISUPRANGE_LEN ((u16)10) | |
525 | #define HFA384x_RID_CFIACTRANGES_LEN ((u16)10) | |
526 | #define HFA384x_RID_NICSERIALNUMBER_LEN ((u16)12) | |
527 | #define HFA384x_RID_NICIDENTITY_LEN ((u16)8) | |
528 | #define HFA384x_RID_MFISUPRANGE_LEN ((u16)10) | |
529 | #define HFA384x_RID_CFISUPRANGE_LEN ((u16)10) | |
530 | #define HFA384x_RID_CHANNELLIST_LEN ((u16)0) | |
531 | #define HFA384x_RID_REGULATORYDOMAINS_LEN ((u16)12) | |
532 | #define HFA384x_RID_TEMPTYPE_LEN ((u16)0) | |
533 | #define HFA384x_RID_CIS_LEN ((u16)480) | |
534 | #define HFA384x_RID_STAIDENTITY_LEN ((u16)8) | |
535 | #define HFA384x_RID_STASUPRANGE_LEN ((u16)10) | |
536 | #define HFA384x_RID_MFIACTRANGES_LEN ((u16)10) | |
537 | #define HFA384x_RID_CFIACTRANGES2_LEN ((u16)10) | |
538 | #define HFA384x_RID_BUILDSEQ_LEN ((u16)sizeof(hfa384x_BuildSeq_t)) | |
539 | #define HFA384x_RID_FWID_LEN ((u16)sizeof(hfa384x_FWID_t)) | |
00b3ed16 GKH |
540 | |
541 | /*-------------------------------------------------------------------- | |
542 | Information RIDs: MAC Information | |
543 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
544 | #define HFA384x_RID_PORTSTATUS ((u16)0xFD40) |
545 | #define HFA384x_RID_CURRENTSSID ((u16)0xFD41) | |
546 | #define HFA384x_RID_CURRENTBSSID ((u16)0xFD42) | |
547 | #define HFA384x_RID_COMMSQUALITY ((u16)0xFD43) | |
548 | #define HFA384x_RID_CURRENTTXRATE ((u16)0xFD44) | |
549 | #define HFA384x_RID_CURRENTBCNint ((u16)0xFD45) | |
550 | #define HFA384x_RID_CURRENTSCALETHRESH ((u16)0xFD46) | |
551 | #define HFA384x_RID_PROTOCOLRSPTIME ((u16)0xFD47) | |
552 | #define HFA384x_RID_SHORTRETRYLIMIT ((u16)0xFD48) | |
553 | #define HFA384x_RID_LONGRETRYLIMIT ((u16)0xFD49) | |
554 | #define HFA384x_RID_MAXTXLIFETIME ((u16)0xFD4A) | |
555 | #define HFA384x_RID_MAXRXLIFETIME ((u16)0xFD4B) | |
556 | #define HFA384x_RID_CFPOLLABLE ((u16)0xFD4C) | |
557 | #define HFA384x_RID_AUTHALGORITHMS ((u16)0xFD4D) | |
558 | #define HFA384x_RID_PRIVACYOPTIMP ((u16)0xFD4F) | |
559 | #define HFA384x_RID_DBMCOMMSQUALITY ((u16)0xFD51) | |
560 | #define HFA384x_RID_CURRENTTXRATE1 ((u16)0xFD80) | |
561 | #define HFA384x_RID_CURRENTTXRATE2 ((u16)0xFD81) | |
562 | #define HFA384x_RID_CURRENTTXRATE3 ((u16)0xFD82) | |
563 | #define HFA384x_RID_CURRENTTXRATE4 ((u16)0xFD83) | |
564 | #define HFA384x_RID_CURRENTTXRATE5 ((u16)0xFD84) | |
565 | #define HFA384x_RID_CURRENTTXRATE6 ((u16)0xFD85) | |
566 | #define HFA384x_RID_OWNMACADDRESS ((u16)0xFD86) | |
567 | // #define HFA384x_RID_PCFINFO ((u16)0xFD87) | |
568 | #define HFA384x_RID_SCANRESULTS ((u16)0xFD88) // NEW | |
569 | #define HFA384x_RID_HOSTSCANRESULTS ((u16)0xFD89) // NEW | |
570 | #define HFA384x_RID_AUTHENTICATIONUSED ((u16)0xFD8A) // NEW | |
571 | #define HFA384x_RID_ASSOCIATEFAILURE ((u16)0xFD8D) // 1.8.0 | |
00b3ed16 GKH |
572 | |
573 | /*-------------------------------------------------------------------- | |
574 | Information RID Lengths: MAC Information | |
575 | This is the length of JUST the DATA part of the RID (does not | |
576 | include the len or code fields) | |
577 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
578 | #define HFA384x_RID_PORTSTATUS_LEN ((u16)0) |
579 | #define HFA384x_RID_CURRENTSSID_LEN ((u16)34) | |
580 | #define HFA384x_RID_CURRENTBSSID_LEN ((u16)WLAN_BSSID_LEN) | |
581 | #define HFA384x_RID_COMMSQUALITY_LEN ((u16)sizeof(hfa384x_commsquality_t)) | |
582 | #define HFA384x_RID_DBMCOMMSQUALITY_LEN ((u16)sizeof(hfa384x_dbmcommsquality_t)) | |
583 | #define HFA384x_RID_CURRENTTXRATE_LEN ((u16)0) | |
584 | #define HFA384x_RID_CURRENTBCNint_LEN ((u16)0) | |
585 | #define HFA384x_RID_STACURSCALETHRESH_LEN ((u16)12) | |
586 | #define HFA384x_RID_APCURSCALETHRESH_LEN ((u16)6) | |
587 | #define HFA384x_RID_PROTOCOLRSPTIME_LEN ((u16)0) | |
588 | #define HFA384x_RID_SHORTRETRYLIMIT_LEN ((u16)0) | |
589 | #define HFA384x_RID_LONGRETRYLIMIT_LEN ((u16)0) | |
590 | #define HFA384x_RID_MAXTXLIFETIME_LEN ((u16)0) | |
591 | #define HFA384x_RID_MAXRXLIFETIME_LEN ((u16)0) | |
592 | #define HFA384x_RID_CFPOLLABLE_LEN ((u16)0) | |
593 | #define HFA384x_RID_AUTHALGORITHMS_LEN ((u16)4) | |
594 | #define HFA384x_RID_PRIVACYOPTIMP_LEN ((u16)0) | |
595 | #define HFA384x_RID_CURRENTTXRATE1_LEN ((u16)0) | |
596 | #define HFA384x_RID_CURRENTTXRATE2_LEN ((u16)0) | |
597 | #define HFA384x_RID_CURRENTTXRATE3_LEN ((u16)0) | |
598 | #define HFA384x_RID_CURRENTTXRATE4_LEN ((u16)0) | |
599 | #define HFA384x_RID_CURRENTTXRATE5_LEN ((u16)0) | |
600 | #define HFA384x_RID_CURRENTTXRATE6_LEN ((u16)0) | |
601 | #define HFA384x_RID_OWNMACADDRESS_LEN ((u16)6) | |
602 | #define HFA384x_RID_PCFINFO_LEN ((u16)6) | |
603 | #define HFA384x_RID_CNFAPPCFINFO_LEN ((u16)sizeof(hfa384x_PCFInfo_data_t)) | |
604 | #define HFA384x_RID_SCANREQUEST_LEN ((u16)sizeof(hfa384x_ScanRequest_data_t)) | |
605 | #define HFA384x_RID_JOINREQUEST_LEN ((u16)sizeof(hfa384x_JoinRequest_data_t)) | |
606 | #define HFA384x_RID_AUTHENTICATESTA_LEN ((u16)sizeof(hfa384x_authenticateStation_data_t)) | |
607 | #define HFA384x_RID_CHANNELINFOREQUEST_LEN ((u16)sizeof(hfa384x_ChannelInfoRequest_data_t)) | |
00b3ed16 GKH |
608 | /*-------------------------------------------------------------------- |
609 | Information RIDs: Modem Information | |
610 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
611 | #define HFA384x_RID_PHYTYPE ((u16)0xFDC0) |
612 | #define HFA384x_RID_CURRENTCHANNEL ((u16)0xFDC1) | |
613 | #define HFA384x_RID_CURRENTPOWERSTATE ((u16)0xFDC2) | |
614 | #define HFA384x_RID_CCAMODE ((u16)0xFDC3) | |
615 | #define HFA384x_RID_SUPPORTEDDATARATES ((u16)0xFDC6) | |
616 | #define HFA384x_RID_LFOSTATUS ((u16)0xFDC7) // 1.7.1 | |
00b3ed16 GKH |
617 | |
618 | /*-------------------------------------------------------------------- | |
619 | Information RID Lengths: Modem Information | |
620 | This is the length of JUST the DATA part of the RID (does not | |
621 | include the len or code fields) | |
622 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
623 | #define HFA384x_RID_PHYTYPE_LEN ((u16)0) |
624 | #define HFA384x_RID_CURRENTCHANNEL_LEN ((u16)0) | |
625 | #define HFA384x_RID_CURRENTPOWERSTATE_LEN ((u16)0) | |
626 | #define HFA384x_RID_CCAMODE_LEN ((u16)0) | |
627 | #define HFA384x_RID_SUPPORTEDDATARATES_LEN ((u16)10) | |
00b3ed16 GKH |
628 | |
629 | /*-------------------------------------------------------------------- | |
630 | API ENHANCEMENTS (NOT ALREADY IMPLEMENTED) | |
631 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
632 | #define HFA384x_RID_CNFWEPDEFAULTKEYID ((u16)0xFC23) |
633 | #define HFA384x_RID_CNFWEPDEFAULTKEY0 ((u16)0xFC24) | |
634 | #define HFA384x_RID_CNFWEPDEFAULTKEY1 ((u16)0xFC25) | |
635 | #define HFA384x_RID_CNFWEPDEFAULTKEY2 ((u16)0xFC26) | |
636 | #define HFA384x_RID_CNFWEPDEFAULTKEY3 ((u16)0xFC27) | |
637 | #define HFA384x_RID_CNFWEPFLAGS ((u16)0xFC28) | |
638 | #define HFA384x_RID_CNFWEPKEYMAPTABLE ((u16)0xFC29) | |
639 | #define HFA384x_RID_CNFAUTHENTICATION ((u16)0xFC2A) | |
640 | #define HFA384x_RID_CNFMAXASSOCSTATIONS ((u16)0xFC2B) | |
641 | #define HFA384x_RID_CNFTXCONTROL ((u16)0xFC2C) | |
642 | #define HFA384x_RID_CNFROAMINGMODE ((u16)0xFC2D) | |
643 | #define HFA384x_RID_CNFHOSTAUTHASSOC ((u16)0xFC2E) | |
644 | #define HFA384x_RID_CNFRCVCRCERROR ((u16)0xFC30) | |
645 | // #define HFA384x_RID_CNFMMLIFE ((u16)0xFC31) | |
646 | #define HFA384x_RID_CNFALTRETRYCNT ((u16)0xFC32) | |
647 | #define HFA384x_RID_CNFAPBCNint ((u16)0xFC33) | |
648 | #define HFA384x_RID_CNFAPPCFINFO ((u16)0xFC34) | |
649 | #define HFA384x_RID_CNFSTAPCFINFO ((u16)0xFC35) | |
650 | #define HFA384x_RID_CNFPRIORITYQUSAGE ((u16)0xFC37) | |
651 | #define HFA384x_RID_CNFTIMCTRL ((u16)0xFC40) | |
652 | #define HFA384x_RID_CNFTHIRTY2TALLY ((u16)0xFC42) | |
653 | #define HFA384x_RID_CNFENHSECURITY ((u16)0xFC43) | |
654 | #define HFA384x_RID_CNFDBMADJUST ((u16)0xFC46) // NEW | |
655 | #define HFA384x_RID_CNFWPADATA ((u16)0xFC48) // 1.7.0 | |
656 | #define HFA384x_RID_CNFPROPOGATIONDELAY ((u16)0xFC49) // 1.7.6 | |
657 | #define HFA384x_RID_CNFSHORTPREAMBLE ((u16)0xFCB0) | |
658 | #define HFA384x_RID_CNFEXCLONGPREAMBLE ((u16)0xFCB1) | |
659 | #define HFA384x_RID_CNFAUTHRSPTIMEOUT ((u16)0xFCB2) | |
660 | #define HFA384x_RID_CNFBASICRATES ((u16)0xFCB3) | |
661 | #define HFA384x_RID_CNFSUPPRATES ((u16)0xFCB4) | |
662 | #define HFA384x_RID_CNFFALLBACKCTRL ((u16)0xFCB5) // NEW | |
663 | #define HFA384x_RID_WEPKEYSTATUS ((u16)0xFCB6) // NEW | |
664 | #define HFA384x_RID_WEPKEYMAPINDEX ((u16)0xFCB7) // NEW | |
665 | #define HFA384x_RID_BROADCASTKEYID ((u16)0xFCB8) // NEW | |
666 | #define HFA384x_RID_ENTSECFLAGEYID ((u16)0xFCB9) // NEW | |
667 | #define HFA384x_RID_CNFPASSIVESCANCTRL ((u16)0xFCBA) // NEW STA | |
668 | #define HFA384x_RID_CNFWPAHANDLING ((u16)0xFCBB) // 1.7.0 | |
669 | #define HFA384x_RID_MDCCONTROL ((u16)0xFCBC) // 1.7.0/1.4.0 | |
670 | #define HFA384x_RID_MDCCOUNTRY ((u16)0xFCBD) // 1.7.0/1.4.0 | |
671 | #define HFA384x_RID_TXPOWERMAX ((u16)0xFCBE) // 1.7.0/1.4.0 | |
672 | #define HFA384x_RID_CNFLFOENBLED ((u16)0xFCBF) // 1.6.3 | |
673 | #define HFA384x_RID_CAPINFO ((u16)0xFCC0) // 1.7.0/1.3.7 | |
674 | #define HFA384x_RID_LISTENintERVAL ((u16)0xFCC1) // 1.7.0/1.3.7 | |
675 | #define HFA384x_RID_DIVERSITYENABLED ((u16)0xFCC2) // 1.7.0/1.3.7 | |
676 | #define HFA384x_RID_LED_CONTROL ((u16)0xFCC4) // 1.7.6 | |
677 | #define HFA384x_RID_HFO_DELAY ((u16)0xFCC5) // 1.7.6 | |
678 | #define HFA384x_RID_DISSALOWEDBSSID ((u16)0xFCC6) // 1.8.0 | |
679 | #define HFA384x_RID_SCANREQUEST ((u16)0xFCE1) | |
680 | #define HFA384x_RID_JOINREQUEST ((u16)0xFCE2) | |
681 | #define HFA384x_RID_AUTHENTICATESTA ((u16)0xFCE3) | |
682 | #define HFA384x_RID_CHANNELINFOREQUEST ((u16)0xFCE4) | |
683 | #define HFA384x_RID_HOSTSCAN ((u16)0xFCE5) // NEW STA | |
684 | #define HFA384x_RID_ASSOCIATESTA ((u16)0xFCE6) | |
685 | ||
686 | #define HFA384x_RID_CNFWEPDEFAULTKEY_LEN ((u16)6) | |
687 | #define HFA384x_RID_CNFWEP128DEFAULTKEY_LEN ((u16)14) | |
688 | #define HFA384x_RID_CNFPRIOQUSAGE_LEN ((u16)4) | |
00b3ed16 GKH |
689 | /*-------------------------------------------------------------------- |
690 | PD Record codes | |
691 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
692 | #define HFA384x_PDR_PCB_PARTNUM ((u16)0x0001) |
693 | #define HFA384x_PDR_PDAVER ((u16)0x0002) | |
694 | #define HFA384x_PDR_NIC_SERIAL ((u16)0x0003) | |
695 | #define HFA384x_PDR_MKK_MEASUREMENTS ((u16)0x0004) | |
696 | #define HFA384x_PDR_NIC_RAMSIZE ((u16)0x0005) | |
697 | #define HFA384x_PDR_MFISUPRANGE ((u16)0x0006) | |
698 | #define HFA384x_PDR_CFISUPRANGE ((u16)0x0007) | |
699 | #define HFA384x_PDR_NICID ((u16)0x0008) | |
700 | //#define HFA384x_PDR_REFDAC_MEASUREMENTS ((u16)0x0010) | |
701 | //#define HFA384x_PDR_VGDAC_MEASUREMENTS ((u16)0x0020) | |
702 | //#define HFA384x_PDR_LEVEL_COMP_MEASUREMENTS ((u16)0x0030) | |
703 | //#define HFA384x_PDR_MODEM_TRIMDAC_MEASUREMENTS ((u16)0x0040) | |
704 | //#define HFA384x_PDR_COREGA_HACK ((u16)0x00ff) | |
705 | #define HFA384x_PDR_MAC_ADDRESS ((u16)0x0101) | |
706 | //#define HFA384x_PDR_MKK_CALLNAME ((u16)0x0102) | |
707 | #define HFA384x_PDR_REGDOMAIN ((u16)0x0103) | |
708 | #define HFA384x_PDR_ALLOWED_CHANNEL ((u16)0x0104) | |
709 | #define HFA384x_PDR_DEFAULT_CHANNEL ((u16)0x0105) | |
710 | //#define HFA384x_PDR_PRIVACY_OPTION ((u16)0x0106) | |
711 | #define HFA384x_PDR_TEMPTYPE ((u16)0x0107) | |
712 | //#define HFA384x_PDR_REFDAC_SETUP ((u16)0x0110) | |
713 | //#define HFA384x_PDR_VGDAC_SETUP ((u16)0x0120) | |
714 | //#define HFA384x_PDR_LEVEL_COMP_SETUP ((u16)0x0130) | |
715 | //#define HFA384x_PDR_TRIMDAC_SETUP ((u16)0x0140) | |
716 | #define HFA384x_PDR_IFR_SETTING ((u16)0x0200) | |
717 | #define HFA384x_PDR_RFR_SETTING ((u16)0x0201) | |
718 | #define HFA384x_PDR_HFA3861_BASELINE ((u16)0x0202) | |
719 | #define HFA384x_PDR_HFA3861_SHADOW ((u16)0x0203) | |
720 | #define HFA384x_PDR_HFA3861_IFRF ((u16)0x0204) | |
721 | #define HFA384x_PDR_HFA3861_CHCALSP ((u16)0x0300) | |
722 | #define HFA384x_PDR_HFA3861_CHCALI ((u16)0x0301) | |
723 | #define HFA384x_PDR_MAX_TX_POWER ((u16)0x0302) | |
724 | #define HFA384x_PDR_MASTER_CHAN_LIST ((u16)0x0303) | |
725 | #define HFA384x_PDR_3842_NIC_CONFIG ((u16)0x0400) | |
726 | #define HFA384x_PDR_USB_ID ((u16)0x0401) | |
727 | #define HFA384x_PDR_PCI_ID ((u16)0x0402) | |
728 | #define HFA384x_PDR_PCI_IFCONF ((u16)0x0403) | |
729 | #define HFA384x_PDR_PCI_PMCONF ((u16)0x0404) | |
730 | #define HFA384x_PDR_RFENRGY ((u16)0x0406) | |
731 | #define HFA384x_PDR_USB_POWER_TYPE ((u16)0x0407) | |
732 | //#define HFA384x_PDR_UNKNOWN408 ((u16)0x0408) | |
733 | #define HFA384x_PDR_USB_MAX_POWER ((u16)0x0409) | |
734 | #define HFA384x_PDR_USB_MANUFACTURER ((u16)0x0410) | |
735 | #define HFA384x_PDR_USB_PRODUCT ((u16)0x0411) | |
736 | #define HFA384x_PDR_ANT_DIVERSITY ((u16)0x0412) | |
737 | #define HFA384x_PDR_HFO_DELAY ((u16)0x0413) | |
738 | #define HFA384x_PDR_SCALE_THRESH ((u16)0x0414) | |
739 | ||
740 | #define HFA384x_PDR_HFA3861_MANF_TESTSP ((u16)0x0900) | |
741 | #define HFA384x_PDR_HFA3861_MANF_TESTI ((u16)0x0901) | |
742 | #define HFA384x_PDR_END_OF_PDA ((u16)0x0000) | |
00b3ed16 GKH |
743 | |
744 | ||
745 | /*=============================================================*/ | |
746 | /*------ Macros -----------------------------------------------*/ | |
747 | ||
748 | /*--- Register ID macros ------------------------*/ | |
749 | ||
750 | #define HFA384x_CMD HFA384x_CMD_OFF | |
751 | #define HFA384x_PARAM0 HFA384x_PARAM0_OFF | |
752 | #define HFA384x_PARAM1 HFA384x_PARAM1_OFF | |
753 | #define HFA384x_PARAM2 HFA384x_PARAM2_OFF | |
754 | #define HFA384x_STATUS HFA384x_STATUS_OFF | |
755 | #define HFA384x_RESP0 HFA384x_RESP0_OFF | |
756 | #define HFA384x_RESP1 HFA384x_RESP1_OFF | |
757 | #define HFA384x_RESP2 HFA384x_RESP2_OFF | |
758 | #define HFA384x_INFOFID HFA384x_INFOFID_OFF | |
759 | #define HFA384x_RXFID HFA384x_RXFID_OFF | |
760 | #define HFA384x_ALLOCFID HFA384x_ALLOCFID_OFF | |
761 | #define HFA384x_TXCOMPLFID HFA384x_TXCOMPLFID_OFF | |
762 | #define HFA384x_SELECT0 HFA384x_SELECT0_OFF | |
763 | #define HFA384x_OFFSET0 HFA384x_OFFSET0_OFF | |
764 | #define HFA384x_DATA0 HFA384x_DATA0_OFF | |
765 | #define HFA384x_SELECT1 HFA384x_SELECT1_OFF | |
766 | #define HFA384x_OFFSET1 HFA384x_OFFSET1_OFF | |
767 | #define HFA384x_DATA1 HFA384x_DATA1_OFF | |
768 | #define HFA384x_EVSTAT HFA384x_EVSTAT_OFF | |
aaad4303 | 769 | #define HFA384x_intEN HFA384x_INTEN_OFF |
00b3ed16 GKH |
770 | #define HFA384x_EVACK HFA384x_EVACK_OFF |
771 | #define HFA384x_CONTROL HFA384x_CONTROL_OFF | |
772 | #define HFA384x_SWSUPPORT0 HFA384x_SWSUPPORT0_OFF | |
773 | #define HFA384x_SWSUPPORT1 HFA384x_SWSUPPORT1_OFF | |
774 | #define HFA384x_SWSUPPORT2 HFA384x_SWSUPPORT2_OFF | |
775 | #define HFA384x_AUXPAGE HFA384x_AUXPAGE_OFF | |
776 | #define HFA384x_AUXOFFSET HFA384x_AUXOFFSET_OFF | |
777 | #define HFA384x_AUXDATA HFA384x_AUXDATA_OFF | |
778 | #define HFA384x_PCICOR HFA384x_PCICOR_OFF | |
779 | #define HFA384x_PCIHCR HFA384x_PCIHCR_OFF | |
780 | ||
781 | ||
782 | /*--- Register Test/Get/Set Field macros ------------------------*/ | |
783 | ||
aaad4303 SP |
784 | #define HFA384x_CMD_ISBUSY(value) ((u16)(((u16)value) & HFA384x_CMD_BUSY)) |
785 | #define HFA384x_CMD_AINFO_GET(value) ((u16)(((u16)(value) & HFA384x_CMD_AINFO) >> 8)) | |
786 | #define HFA384x_CMD_AINFO_SET(value) ((u16)((u16)(value) << 8)) | |
787 | #define HFA384x_CMD_MACPORT_GET(value) ((u16)(HFA384x_CMD_AINFO_GET((u16)(value) & HFA384x_CMD_MACPORT))) | |
788 | #define HFA384x_CMD_MACPORT_SET(value) ((u16)HFA384x_CMD_AINFO_SET(value)) | |
789 | #define HFA384x_CMD_ISRECL(value) ((u16)(HFA384x_CMD_AINFO_GET((u16)(value) & HFA384x_CMD_RECL))) | |
790 | #define HFA384x_CMD_RECL_SET(value) ((u16)HFA384x_CMD_AINFO_SET(value)) | |
791 | #define HFA384x_CMD_QOS_GET(value) ((u16)((((u16)(value))&((u16)0x3000)) >> 12)) | |
792 | #define HFA384x_CMD_QOS_SET(value) ((u16)((((u16)(value)) << 12) & 0x3000)) | |
793 | #define HFA384x_CMD_ISWRITE(value) ((u16)(HFA384x_CMD_AINFO_GET((u16)(value) & HFA384x_CMD_WRITE))) | |
794 | #define HFA384x_CMD_WRITE_SET(value) ((u16)HFA384x_CMD_AINFO_SET((u16)value)) | |
795 | #define HFA384x_CMD_PROGMODE_GET(value) ((u16)(HFA384x_CMD_AINFO_GET((u16)(value) & HFA384x_CMD_PROGMODE))) | |
796 | #define HFA384x_CMD_PROGMODE_SET(value) ((u16)HFA384x_CMD_AINFO_SET((u16)value)) | |
797 | #define HFA384x_CMD_CMDCODE_GET(value) ((u16)(((u16)(value)) & HFA384x_CMD_CMDCODE)) | |
798 | #define HFA384x_CMD_CMDCODE_SET(value) ((u16)(value)) | |
799 | ||
800 | #define HFA384x_STATUS_RESULT_GET(value) ((u16)((((u16)(value)) & HFA384x_STATUS_RESULT) >> 8)) | |
801 | #define HFA384x_STATUS_RESULT_SET(value) (((u16)(value)) << 8) | |
802 | #define HFA384x_STATUS_CMDCODE_GET(value) (((u16)(value)) & HFA384x_STATUS_CMDCODE) | |
803 | #define HFA384x_STATUS_CMDCODE_SET(value) ((u16)(value)) | |
804 | ||
805 | #define HFA384x_OFFSET_ISBUSY(value) ((u16)(((u16)(value)) & HFA384x_OFFSET_BUSY)) | |
806 | #define HFA384x_OFFSET_ISERR(value) ((u16)(((u16)(value)) & HFA384x_OFFSET_ERR)) | |
807 | #define HFA384x_OFFSET_DATAOFF_GET(value) ((u16)(((u16)(value)) & HFA384x_OFFSET_DATAOFF)) | |
808 | #define HFA384x_OFFSET_DATAOFF_SET(value) ((u16)(value)) | |
809 | ||
810 | #define HFA384x_EVSTAT_ISTICK(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_TICK)) | |
811 | #define HFA384x_EVSTAT_ISWTERR(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_WTERR)) | |
812 | #define HFA384x_EVSTAT_ISINFDROP(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_INFDROP)) | |
813 | #define HFA384x_EVSTAT_ISINFO(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_INFO)) | |
814 | #define HFA384x_EVSTAT_ISDTIM(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_DTIM)) | |
815 | #define HFA384x_EVSTAT_ISCMD(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_CMD)) | |
816 | #define HFA384x_EVSTAT_ISALLOC(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_ALLOC)) | |
817 | #define HFA384x_EVSTAT_ISTXEXC(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_TXEXC)) | |
818 | #define HFA384x_EVSTAT_ISTX(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_TX)) | |
819 | #define HFA384x_EVSTAT_ISRX(value) ((u16)(((u16)(value)) & HFA384x_EVSTAT_RX)) | |
820 | ||
821 | #define HFA384x_EVSTAT_ISBAP_OP(value) ((u16)(((u16)(value)) & HFA384x_int_BAP_OP)) | |
822 | ||
823 | #define HFA384x_intEN_ISTICK(value) ((u16)(((u16)(value)) & HFA384x_INTEN_TICK)) | |
824 | #define HFA384x_intEN_TICK_SET(value) ((u16)(((u16)(value)) << 15)) | |
825 | #define HFA384x_intEN_ISWTERR(value) ((u16)(((u16)(value)) & HFA384x_INTEN_WTERR)) | |
826 | #define HFA384x_intEN_WTERR_SET(value) ((u16)(((u16)(value)) << 14)) | |
827 | #define HFA384x_intEN_ISINFDROP(value) ((u16)(((u16)(value)) & HFA384x_INTEN_INFDROP)) | |
828 | #define HFA384x_intEN_INFDROP_SET(value) ((u16)(((u16)(value)) << 13)) | |
829 | #define HFA384x_intEN_ISINFO(value) ((u16)(((u16)(value)) & HFA384x_INTEN_INFO)) | |
830 | #define HFA384x_intEN_INFO_SET(value) ((u16)(((u16)(value)) << 7)) | |
831 | #define HFA384x_intEN_ISDTIM(value) ((u16)(((u16)(value)) & HFA384x_INTEN_DTIM)) | |
832 | #define HFA384x_intEN_DTIM_SET(value) ((u16)(((u16)(value)) << 5)) | |
833 | #define HFA384x_intEN_ISCMD(value) ((u16)(((u16)(value)) & HFA384x_INTEN_CMD)) | |
834 | #define HFA384x_intEN_CMD_SET(value) ((u16)(((u16)(value)) << 4)) | |
835 | #define HFA384x_intEN_ISALLOC(value) ((u16)(((u16)(value)) & HFA384x_INTEN_ALLOC)) | |
836 | #define HFA384x_intEN_ALLOC_SET(value) ((u16)(((u16)(value)) << 3)) | |
837 | #define HFA384x_intEN_ISTXEXC(value) ((u16)(((u16)(value)) & HFA384x_INTEN_TXEXC)) | |
838 | #define HFA384x_intEN_TXEXC_SET(value) ((u16)(((u16)(value)) << 2)) | |
839 | #define HFA384x_intEN_ISTX(value) ((u16)(((u16)(value)) & HFA384x_INTEN_TX)) | |
840 | #define HFA384x_intEN_TX_SET(value) ((u16)(((u16)(value)) << 1)) | |
841 | #define HFA384x_intEN_ISRX(value) ((u16)(((u16)(value)) & HFA384x_INTEN_RX)) | |
842 | #define HFA384x_intEN_RX_SET(value) ((u16)(((u16)(value)) << 0)) | |
843 | ||
844 | #define HFA384x_EVACK_ISTICK(value) ((u16)(((u16)(value)) & HFA384x_EVACK_TICK)) | |
845 | #define HFA384x_EVACK_TICK_SET(value) ((u16)(((u16)(value)) << 15)) | |
846 | #define HFA384x_EVACK_ISWTERR(value) ((u16)(((u16)(value)) & HFA384x_EVACK_WTERR)) | |
847 | #define HFA384x_EVACK_WTERR_SET(value) ((u16)(((u16)(value)) << 14)) | |
848 | #define HFA384x_EVACK_ISINFDROP(value) ((u16)(((u16)(value)) & HFA384x_EVACK_INFDROP)) | |
849 | #define HFA384x_EVACK_INFDROP_SET(value) ((u16)(((u16)(value)) << 13)) | |
850 | #define HFA384x_EVACK_ISINFO(value) ((u16)(((u16)(value)) & HFA384x_EVACK_INFO)) | |
851 | #define HFA384x_EVACK_INFO_SET(value) ((u16)(((u16)(value)) << 7)) | |
852 | #define HFA384x_EVACK_ISDTIM(value) ((u16)(((u16)(value)) & HFA384x_EVACK_DTIM)) | |
853 | #define HFA384x_EVACK_DTIM_SET(value) ((u16)(((u16)(value)) << 5)) | |
854 | #define HFA384x_EVACK_ISCMD(value) ((u16)(((u16)(value)) & HFA384x_EVACK_CMD)) | |
855 | #define HFA384x_EVACK_CMD_SET(value) ((u16)(((u16)(value)) << 4)) | |
856 | #define HFA384x_EVACK_ISALLOC(value) ((u16)(((u16)(value)) & HFA384x_EVACK_ALLOC)) | |
857 | #define HFA384x_EVACK_ALLOC_SET(value) ((u16)(((u16)(value)) << 3)) | |
858 | #define HFA384x_EVACK_ISTXEXC(value) ((u16)(((u16)(value)) & HFA384x_EVACK_TXEXC)) | |
859 | #define HFA384x_EVACK_TXEXC_SET(value) ((u16)(((u16)(value)) << 2)) | |
860 | #define HFA384x_EVACK_ISTX(value) ((u16)(((u16)(value)) & HFA384x_EVACK_TX)) | |
861 | #define HFA384x_EVACK_TX_SET(value) ((u16)(((u16)(value)) << 1)) | |
862 | #define HFA384x_EVACK_ISRX(value) ((u16)(((u16)(value)) & HFA384x_EVACK_RX)) | |
863 | #define HFA384x_EVACK_RX_SET(value) ((u16)(((u16)(value)) << 0)) | |
864 | ||
865 | #define HFA384x_CONTROL_AUXEN_SET(value) ((u16)(((u16)(value)) << 14)) | |
866 | #define HFA384x_CONTROL_AUXEN_GET(value) ((u16)(((u16)(value)) >> 14)) | |
00b3ed16 GKH |
867 | |
868 | /* Byte Order */ | |
869 | #ifdef __KERNEL__ | |
aaad4303 SP |
870 | #define hfa384x2host_16(n) (__le16_to_cpu((u16)(n))) |
871 | #define hfa384x2host_32(n) (__le32_to_cpu((u32)(n))) | |
872 | #define host2hfa384x_16(n) (__cpu_to_le16((u16)(n))) | |
873 | #define host2hfa384x_32(n) (__cpu_to_le32((u32)(n))) | |
00b3ed16 GKH |
874 | #endif |
875 | ||
876 | /* Host Maintained State Info */ | |
877 | #define HFA384x_STATE_PREINIT 0 | |
878 | #define HFA384x_STATE_INIT 1 | |
879 | #define HFA384x_STATE_RUNNING 2 | |
880 | ||
881 | /*=============================================================*/ | |
882 | /*------ Types and their related constants --------------------*/ | |
883 | ||
884 | #define HFA384x_HOSTAUTHASSOC_HOSTAUTH BIT0 | |
885 | #define HFA384x_HOSTAUTHASSOC_HOSTASSOC BIT1 | |
886 | ||
887 | #define HFA384x_WHAHANDLING_DISABLED 0 | |
888 | #define HFA384x_WHAHANDLING_PASSTHROUGH BIT1 | |
889 | ||
890 | /*-------------------------------------------------------------*/ | |
891 | /* Commonly used basic types */ | |
892 | typedef struct hfa384x_bytestr | |
893 | { | |
aaad4303 SP |
894 | u16 len; |
895 | u8 data[0]; | |
9cba46dc | 896 | } __attribute__((packed)) hfa384x_bytestr_t; |
00b3ed16 GKH |
897 | |
898 | typedef struct hfa384x_bytestr32 | |
899 | { | |
aaad4303 SP |
900 | u16 len; |
901 | u8 data[32]; | |
9cba46dc | 902 | } __attribute__((packed)) hfa384x_bytestr32_t; |
00b3ed16 GKH |
903 | |
904 | /*-------------------------------------------------------------------- | |
905 | Configuration Record Structures: | |
906 | Network Parameters, Static Configuration Entities | |
907 | --------------------------------------------------------------------*/ | |
908 | /* Prototype structure: all configuration record structures start with | |
909 | these members */ | |
910 | ||
911 | typedef struct hfa384x_record | |
912 | { | |
aaad4303 SP |
913 | u16 reclen; |
914 | u16 rid; | |
9cba46dc | 915 | } __attribute__((packed)) hfa384x_rec_t; |
00b3ed16 GKH |
916 | |
917 | typedef struct hfa384x_record16 | |
918 | { | |
aaad4303 SP |
919 | u16 reclen; |
920 | u16 rid; | |
921 | u16 val; | |
9cba46dc | 922 | } __attribute__((packed)) hfa384x_rec16_t; |
00b3ed16 GKH |
923 | |
924 | typedef struct hfa384x_record32 | |
925 | { | |
aaad4303 SP |
926 | u16 reclen; |
927 | u16 rid; | |
928 | u32 val; | |
9cba46dc | 929 | } __attribute__((packed)) hfa384x_rec32; |
00b3ed16 GKH |
930 | |
931 | /*-- Hardware/Firmware Component Information ----------*/ | |
932 | typedef struct hfa384x_compident | |
933 | { | |
aaad4303 SP |
934 | u16 id; |
935 | u16 variant; | |
936 | u16 major; | |
937 | u16 minor; | |
9cba46dc | 938 | } __attribute__((packed)) hfa384x_compident_t; |
00b3ed16 GKH |
939 | |
940 | typedef struct hfa384x_caplevel | |
941 | { | |
aaad4303 SP |
942 | u16 role; |
943 | u16 id; | |
944 | u16 variant; | |
945 | u16 bottom; | |
946 | u16 top; | |
9cba46dc | 947 | } __attribute__((packed)) hfa384x_caplevel_t; |
00b3ed16 GKH |
948 | |
949 | /*-- Configuration Record: cnfPortType --*/ | |
950 | typedef struct hfa384x_cnfPortType | |
951 | { | |
aaad4303 | 952 | u16 cnfPortType; |
9cba46dc | 953 | } __attribute__((packed)) hfa384x_cnfPortType_t; |
00b3ed16 GKH |
954 | |
955 | /*-- Configuration Record: cnfOwnMACAddress --*/ | |
956 | typedef struct hfa384x_cnfOwnMACAddress | |
957 | { | |
aaad4303 | 958 | u8 cnfOwnMACAddress[6]; |
9cba46dc | 959 | } __attribute__((packed)) hfa384x_cnfOwnMACAddress_t; |
00b3ed16 GKH |
960 | |
961 | /*-- Configuration Record: cnfDesiredSSID --*/ | |
962 | typedef struct hfa384x_cnfDesiredSSID | |
963 | { | |
aaad4303 | 964 | u8 cnfDesiredSSID[34]; |
9cba46dc | 965 | } __attribute__((packed)) hfa384x_cnfDesiredSSID_t; |
00b3ed16 GKH |
966 | |
967 | /*-- Configuration Record: cnfOwnChannel --*/ | |
968 | typedef struct hfa384x_cnfOwnChannel | |
969 | { | |
aaad4303 | 970 | u16 cnfOwnChannel; |
9cba46dc | 971 | } __attribute__((packed)) hfa384x_cnfOwnChannel_t; |
00b3ed16 GKH |
972 | |
973 | /*-- Configuration Record: cnfOwnSSID --*/ | |
974 | typedef struct hfa384x_cnfOwnSSID | |
975 | { | |
aaad4303 | 976 | u8 cnfOwnSSID[34]; |
9cba46dc | 977 | } __attribute__((packed)) hfa384x_cnfOwnSSID_t; |
00b3ed16 GKH |
978 | |
979 | /*-- Configuration Record: cnfOwnATIMWindow --*/ | |
980 | typedef struct hfa384x_cnfOwnATIMWindow | |
981 | { | |
aaad4303 | 982 | u16 cnfOwnATIMWindow; |
9cba46dc | 983 | } __attribute__((packed)) hfa384x_cnfOwnATIMWindow_t; |
00b3ed16 GKH |
984 | |
985 | /*-- Configuration Record: cnfSystemScale --*/ | |
986 | typedef struct hfa384x_cnfSystemScale | |
987 | { | |
aaad4303 | 988 | u16 cnfSystemScale; |
9cba46dc | 989 | } __attribute__((packed)) hfa384x_cnfSystemScale_t; |
00b3ed16 GKH |
990 | |
991 | /*-- Configuration Record: cnfMaxDataLength --*/ | |
992 | typedef struct hfa384x_cnfMaxDataLength | |
993 | { | |
aaad4303 | 994 | u16 cnfMaxDataLength; |
9cba46dc | 995 | } __attribute__((packed)) hfa384x_cnfMaxDataLength_t; |
00b3ed16 GKH |
996 | |
997 | /*-- Configuration Record: cnfWDSAddress --*/ | |
998 | typedef struct hfa384x_cnfWDSAddress | |
999 | { | |
aaad4303 | 1000 | u8 cnfWDSAddress[6]; |
9cba46dc | 1001 | } __attribute__((packed)) hfa384x_cnfWDSAddress_t; |
00b3ed16 GKH |
1002 | |
1003 | /*-- Configuration Record: cnfPMEnabled --*/ | |
1004 | typedef struct hfa384x_cnfPMEnabled | |
1005 | { | |
aaad4303 | 1006 | u16 cnfPMEnabled; |
9cba46dc | 1007 | } __attribute__((packed)) hfa384x_cnfPMEnabled_t; |
00b3ed16 GKH |
1008 | |
1009 | /*-- Configuration Record: cnfPMEPS --*/ | |
1010 | typedef struct hfa384x_cnfPMEPS | |
1011 | { | |
aaad4303 | 1012 | u16 cnfPMEPS; |
9cba46dc | 1013 | } __attribute__((packed)) hfa384x_cnfPMEPS_t; |
00b3ed16 GKH |
1014 | |
1015 | /*-- Configuration Record: cnfMulticastReceive --*/ | |
1016 | typedef struct hfa384x_cnfMulticastReceive | |
1017 | { | |
aaad4303 | 1018 | u16 cnfMulticastReceive; |
9cba46dc | 1019 | } __attribute__((packed)) hfa384x_cnfMulticastReceive_t; |
00b3ed16 GKH |
1020 | |
1021 | /*-- Configuration Record: cnfAuthentication --*/ | |
1022 | #define HFA384x_CNFAUTHENTICATION_OPENSYSTEM 0x0001 | |
1023 | #define HFA384x_CNFAUTHENTICATION_SHAREDKEY 0x0002 | |
1024 | #define HFA384x_CNFAUTHENTICATION_LEAP 0x0004 | |
1025 | ||
1026 | /*-- Configuration Record: cnfMaxSleepDuration --*/ | |
1027 | typedef struct hfa384x_cnfMaxSleepDuration | |
1028 | { | |
aaad4303 | 1029 | u16 cnfMaxSleepDuration; |
9cba46dc | 1030 | } __attribute__((packed)) hfa384x_cnfMaxSleepDuration_t; |
00b3ed16 GKH |
1031 | |
1032 | /*-- Configuration Record: cnfPMHoldoverDuration --*/ | |
1033 | typedef struct hfa384x_cnfPMHoldoverDuration | |
1034 | { | |
aaad4303 | 1035 | u16 cnfPMHoldoverDuration; |
9cba46dc | 1036 | } __attribute__((packed)) hfa384x_cnfPMHoldoverDuration_t; |
00b3ed16 GKH |
1037 | |
1038 | /*-- Configuration Record: cnfOwnName --*/ | |
1039 | typedef struct hfa384x_cnfOwnName | |
1040 | { | |
aaad4303 | 1041 | u8 cnfOwnName[34]; |
9cba46dc | 1042 | } __attribute__((packed)) hfa384x_cnfOwnName_t; |
00b3ed16 GKH |
1043 | |
1044 | /*-- Configuration Record: cnfOwnDTIMPeriod --*/ | |
1045 | typedef struct hfa384x_cnfOwnDTIMPeriod | |
1046 | { | |
aaad4303 | 1047 | u16 cnfOwnDTIMPeriod; |
9cba46dc | 1048 | } __attribute__((packed)) hfa384x_cnfOwnDTIMPeriod_t; |
00b3ed16 GKH |
1049 | |
1050 | /*-- Configuration Record: cnfWDSAddress --*/ | |
1051 | typedef struct hfa384x_cnfWDSAddressN | |
1052 | { | |
aaad4303 | 1053 | u8 cnfWDSAddress[6]; |
9cba46dc | 1054 | } __attribute__((packed)) hfa384x_cnfWDSAddressN_t; |
00b3ed16 GKH |
1055 | |
1056 | /*-- Configuration Record: cnfMulticastPMBuffering --*/ | |
1057 | typedef struct hfa384x_cnfMulticastPMBuffering | |
1058 | { | |
aaad4303 | 1059 | u16 cnfMulticastPMBuffering; |
9cba46dc | 1060 | } __attribute__((packed)) hfa384x_cnfMulticastPMBuffering_t; |
00b3ed16 GKH |
1061 | |
1062 | /*-------------------------------------------------------------------- | |
1063 | Configuration Record Structures: | |
1064 | Network Parameters, Dynamic Configuration Entities | |
1065 | --------------------------------------------------------------------*/ | |
1066 | ||
1067 | /*-- Configuration Record: GroupAddresses --*/ | |
1068 | typedef struct hfa384x_GroupAddresses | |
1069 | { | |
aaad4303 | 1070 | u8 MACAddress[16][6]; |
9cba46dc | 1071 | } __attribute__((packed)) hfa384x_GroupAddresses_t; |
00b3ed16 GKH |
1072 | |
1073 | /*-- Configuration Record: CreateIBSS --*/ | |
1074 | typedef struct hfa384x_CreateIBSS | |
1075 | { | |
aaad4303 | 1076 | u16 CreateIBSS; |
9cba46dc | 1077 | } __attribute__((packed)) hfa384x_CreateIBSS_t; |
00b3ed16 GKH |
1078 | |
1079 | #define HFA384x_CREATEIBSS_JOINCREATEIBSS 0 | |
1080 | #define HFA384x_CREATEIBSS_JOINESS_JOINCREATEIBSS 1 | |
1081 | #define HFA384x_CREATEIBSS_JOINIBSS 2 | |
1082 | #define HFA384x_CREATEIBSS_JOINESS_JOINIBSS 3 | |
1083 | ||
1084 | /*-- Configuration Record: FragmentationThreshold --*/ | |
1085 | typedef struct hfa384x_FragmentationThreshold | |
1086 | { | |
aaad4303 | 1087 | u16 FragmentationThreshold; |
9cba46dc | 1088 | } __attribute__((packed)) hfa384x_FragmentationThreshold_t; |
00b3ed16 GKH |
1089 | |
1090 | /*-- Configuration Record: RTSThreshold --*/ | |
1091 | typedef struct hfa384x_RTSThreshold | |
1092 | { | |
aaad4303 | 1093 | u16 RTSThreshold; |
9cba46dc | 1094 | } __attribute__((packed)) hfa384x_RTSThreshold_t; |
00b3ed16 GKH |
1095 | |
1096 | /*-- Configuration Record: TxRateControl --*/ | |
1097 | typedef struct hfa384x_TxRateControl | |
1098 | { | |
aaad4303 | 1099 | u16 TxRateControl; |
9cba46dc | 1100 | } __attribute__((packed)) hfa384x_TxRateControl_t; |
00b3ed16 GKH |
1101 | |
1102 | /*-- Configuration Record: PromiscuousMode --*/ | |
1103 | typedef struct hfa384x_PromiscuousMode | |
1104 | { | |
aaad4303 | 1105 | u16 PromiscuousMode; |
9cba46dc | 1106 | } __attribute__((packed)) hfa384x_PromiscuousMode_t; |
00b3ed16 GKH |
1107 | |
1108 | /*-- Configuration Record: ScanRequest (data portion only) --*/ | |
1109 | typedef struct hfa384x_ScanRequest_data | |
1110 | { | |
aaad4303 SP |
1111 | u16 channelList; |
1112 | u16 txRate; | |
9cba46dc | 1113 | } __attribute__((packed)) hfa384x_ScanRequest_data_t; |
00b3ed16 GKH |
1114 | |
1115 | /*-- Configuration Record: HostScanRequest (data portion only) --*/ | |
1116 | typedef struct hfa384x_HostScanRequest_data | |
1117 | { | |
aaad4303 SP |
1118 | u16 channelList; |
1119 | u16 txRate; | |
00b3ed16 | 1120 | hfa384x_bytestr32_t ssid; |
9cba46dc | 1121 | } __attribute__((packed)) hfa384x_HostScanRequest_data_t; |
00b3ed16 GKH |
1122 | |
1123 | /*-- Configuration Record: JoinRequest (data portion only) --*/ | |
1124 | typedef struct hfa384x_JoinRequest_data | |
1125 | { | |
aaad4303 SP |
1126 | u8 bssid[WLAN_BSSID_LEN]; |
1127 | u16 channel; | |
9cba46dc | 1128 | } __attribute__((packed)) hfa384x_JoinRequest_data_t; |
00b3ed16 GKH |
1129 | |
1130 | /*-- Configuration Record: authenticateStation (data portion only) --*/ | |
1131 | typedef struct hfa384x_authenticateStation_data | |
1132 | { | |
aaad4303 SP |
1133 | u8 address[WLAN_ADDR_LEN]; |
1134 | u16 status; | |
1135 | u16 algorithm; | |
9cba46dc | 1136 | } __attribute__((packed)) hfa384x_authenticateStation_data_t; |
00b3ed16 GKH |
1137 | |
1138 | /*-- Configuration Record: associateStation (data portion only) --*/ | |
1139 | typedef struct hfa384x_associateStation_data | |
1140 | { | |
aaad4303 SP |
1141 | u8 address[WLAN_ADDR_LEN]; |
1142 | u16 status; | |
1143 | u16 type; | |
9cba46dc | 1144 | } __attribute__((packed)) hfa384x_associateStation_data_t; |
00b3ed16 GKH |
1145 | |
1146 | /*-- Configuration Record: ChannelInfoRequest (data portion only) --*/ | |
1147 | typedef struct hfa384x_ChannelInfoRequest_data | |
1148 | { | |
aaad4303 SP |
1149 | u16 channelList; |
1150 | u16 channelDwellTime; | |
9cba46dc | 1151 | } __attribute__((packed)) hfa384x_ChannelInfoRequest_data_t; |
00b3ed16 GKH |
1152 | |
1153 | /*-- Configuration Record: WEPKeyMapping (data portion only) --*/ | |
1154 | typedef struct hfa384x_WEPKeyMapping | |
1155 | { | |
aaad4303 SP |
1156 | u8 address[WLAN_ADDR_LEN]; |
1157 | u16 key_index; | |
1158 | u8 key[16]; | |
1159 | u8 mic_transmit_key[4]; | |
1160 | u8 mic_receive_key[4]; | |
9cba46dc | 1161 | } __attribute__((packed)) hfa384x_WEPKeyMapping_t; |
00b3ed16 GKH |
1162 | |
1163 | /*-- Configuration Record: WPAData (data portion only) --*/ | |
1164 | typedef struct hfa384x_WPAData | |
1165 | { | |
aaad4303 SP |
1166 | u16 datalen; |
1167 | u8 data[0]; // max 80 | |
9cba46dc | 1168 | } __attribute__((packed)) hfa384x_WPAData_t; |
00b3ed16 GKH |
1169 | |
1170 | /*-------------------------------------------------------------------- | |
1171 | Configuration Record Structures: Behavior Parameters | |
1172 | --------------------------------------------------------------------*/ | |
1173 | ||
1174 | /*-- Configuration Record: TickTime --*/ | |
1175 | typedef struct hfa384x_TickTime | |
1176 | { | |
aaad4303 | 1177 | u16 TickTime; |
9cba46dc | 1178 | } __attribute__((packed)) hfa384x_TickTime_t; |
00b3ed16 GKH |
1179 | |
1180 | /*-------------------------------------------------------------------- | |
1181 | Information Record Structures: NIC Information | |
1182 | --------------------------------------------------------------------*/ | |
1183 | ||
1184 | /*-- Information Record: MaxLoadTime --*/ | |
1185 | typedef struct hfa384x_MaxLoadTime | |
1186 | { | |
aaad4303 | 1187 | u16 MaxLoadTime; |
9cba46dc | 1188 | } __attribute__((packed)) hfa384x_MaxLoadTime_t; |
00b3ed16 GKH |
1189 | |
1190 | /*-- Information Record: DownLoadBuffer --*/ | |
1191 | /* NOTE: The page and offset are in AUX format */ | |
1192 | typedef struct hfa384x_downloadbuffer | |
1193 | { | |
aaad4303 SP |
1194 | u16 page; |
1195 | u16 offset; | |
1196 | u16 len; | |
9cba46dc | 1197 | } __attribute__((packed)) hfa384x_downloadbuffer_t; |
00b3ed16 GKH |
1198 | |
1199 | /*-- Information Record: PRIIdentity --*/ | |
1200 | typedef struct hfa384x_PRIIdentity | |
1201 | { | |
aaad4303 SP |
1202 | u16 PRICompID; |
1203 | u16 PRIVariant; | |
1204 | u16 PRIMajorVersion; | |
1205 | u16 PRIMinorVersion; | |
9cba46dc | 1206 | } __attribute__((packed)) hfa384x_PRIIdentity_t; |
00b3ed16 GKH |
1207 | |
1208 | /*-- Information Record: PRISupRange --*/ | |
1209 | typedef struct hfa384x_PRISupRange | |
1210 | { | |
aaad4303 SP |
1211 | u16 PRIRole; |
1212 | u16 PRIID; | |
1213 | u16 PRIVariant; | |
1214 | u16 PRIBottom; | |
1215 | u16 PRITop; | |
9cba46dc | 1216 | } __attribute__((packed)) hfa384x_PRISupRange_t; |
00b3ed16 GKH |
1217 | |
1218 | /*-- Information Record: CFIActRanges --*/ | |
1219 | typedef struct hfa384x_CFIActRanges | |
1220 | { | |
aaad4303 SP |
1221 | u16 CFIRole; |
1222 | u16 CFIID; | |
1223 | u16 CFIVariant; | |
1224 | u16 CFIBottom; | |
1225 | u16 CFITop; | |
9cba46dc | 1226 | } __attribute__((packed)) hfa384x_CFIActRanges_t; |
00b3ed16 GKH |
1227 | |
1228 | /*-- Information Record: NICSerialNumber --*/ | |
1229 | typedef struct hfa384x_NICSerialNumber | |
1230 | { | |
aaad4303 | 1231 | u8 NICSerialNumber[12]; |
9cba46dc | 1232 | } __attribute__((packed)) hfa384x_NICSerialNumber_t; |
00b3ed16 GKH |
1233 | |
1234 | /*-- Information Record: NICIdentity --*/ | |
1235 | typedef struct hfa384x_NICIdentity | |
1236 | { | |
aaad4303 SP |
1237 | u16 NICCompID; |
1238 | u16 NICVariant; | |
1239 | u16 NICMajorVersion; | |
1240 | u16 NICMinorVersion; | |
9cba46dc | 1241 | } __attribute__((packed)) hfa384x_NICIdentity_t; |
00b3ed16 GKH |
1242 | |
1243 | /*-- Information Record: MFISupRange --*/ | |
1244 | typedef struct hfa384x_MFISupRange | |
1245 | { | |
aaad4303 SP |
1246 | u16 MFIRole; |
1247 | u16 MFIID; | |
1248 | u16 MFIVariant; | |
1249 | u16 MFIBottom; | |
1250 | u16 MFITop; | |
9cba46dc | 1251 | } __attribute__((packed)) hfa384x_MFISupRange_t; |
00b3ed16 GKH |
1252 | |
1253 | /*-- Information Record: CFISupRange --*/ | |
1254 | typedef struct hfa384x_CFISupRange | |
1255 | { | |
aaad4303 SP |
1256 | u16 CFIRole; |
1257 | u16 CFIID; | |
1258 | u16 CFIVariant; | |
1259 | u16 CFIBottom; | |
1260 | u16 CFITop; | |
9cba46dc | 1261 | } __attribute__((packed)) hfa384x_CFISupRange_t; |
00b3ed16 GKH |
1262 | |
1263 | /*-- Information Record: BUILDSEQ:BuildSeq --*/ | |
1264 | typedef struct hfa384x_BuildSeq { | |
aaad4303 SP |
1265 | u16 primary; |
1266 | u16 secondary; | |
9cba46dc | 1267 | } __attribute__((packed)) hfa384x_BuildSeq_t; |
00b3ed16 GKH |
1268 | |
1269 | /*-- Information Record: FWID --*/ | |
1270 | #define HFA384x_FWID_LEN 14 | |
1271 | typedef struct hfa384x_FWID { | |
aaad4303 SP |
1272 | u8 primary[HFA384x_FWID_LEN]; |
1273 | u8 secondary[HFA384x_FWID_LEN]; | |
9cba46dc | 1274 | } __attribute__((packed)) hfa384x_FWID_t; |
00b3ed16 GKH |
1275 | |
1276 | /*-- Information Record: ChannelList --*/ | |
1277 | typedef struct hfa384x_ChannelList | |
1278 | { | |
aaad4303 | 1279 | u16 ChannelList; |
9cba46dc | 1280 | } __attribute__((packed)) hfa384x_ChannelList_t; |
00b3ed16 GKH |
1281 | |
1282 | /*-- Information Record: RegulatoryDomains --*/ | |
1283 | typedef struct hfa384x_RegulatoryDomains | |
1284 | { | |
aaad4303 | 1285 | u8 RegulatoryDomains[12]; |
9cba46dc | 1286 | } __attribute__((packed)) hfa384x_RegulatoryDomains_t; |
00b3ed16 GKH |
1287 | |
1288 | /*-- Information Record: TempType --*/ | |
1289 | typedef struct hfa384x_TempType | |
1290 | { | |
aaad4303 | 1291 | u16 TempType; |
9cba46dc | 1292 | } __attribute__((packed)) hfa384x_TempType_t; |
00b3ed16 GKH |
1293 | |
1294 | /*-- Information Record: CIS --*/ | |
1295 | typedef struct hfa384x_CIS | |
1296 | { | |
aaad4303 | 1297 | u8 CIS[480]; |
9cba46dc | 1298 | } __attribute__((packed)) hfa384x_CIS_t; |
00b3ed16 GKH |
1299 | |
1300 | /*-- Information Record: STAIdentity --*/ | |
1301 | typedef struct hfa384x_STAIdentity | |
1302 | { | |
aaad4303 SP |
1303 | u16 STACompID; |
1304 | u16 STAVariant; | |
1305 | u16 STAMajorVersion; | |
1306 | u16 STAMinorVersion; | |
9cba46dc | 1307 | } __attribute__((packed)) hfa384x_STAIdentity_t; |
00b3ed16 GKH |
1308 | |
1309 | /*-- Information Record: STASupRange --*/ | |
1310 | typedef struct hfa384x_STASupRange | |
1311 | { | |
aaad4303 SP |
1312 | u16 STARole; |
1313 | u16 STAID; | |
1314 | u16 STAVariant; | |
1315 | u16 STABottom; | |
1316 | u16 STATop; | |
9cba46dc | 1317 | } __attribute__((packed)) hfa384x_STASupRange_t; |
00b3ed16 GKH |
1318 | |
1319 | /*-- Information Record: MFIActRanges --*/ | |
1320 | typedef struct hfa384x_MFIActRanges | |
1321 | { | |
aaad4303 SP |
1322 | u16 MFIRole; |
1323 | u16 MFIID; | |
1324 | u16 MFIVariant; | |
1325 | u16 MFIBottom; | |
1326 | u16 MFITop; | |
9cba46dc | 1327 | } __attribute__((packed)) hfa384x_MFIActRanges_t; |
00b3ed16 GKH |
1328 | |
1329 | /*-------------------------------------------------------------------- | |
1330 | Information Record Structures: NIC Information | |
1331 | --------------------------------------------------------------------*/ | |
1332 | ||
1333 | /*-- Information Record: PortStatus --*/ | |
1334 | typedef struct hfa384x_PortStatus | |
1335 | { | |
aaad4303 | 1336 | u16 PortStatus; |
9cba46dc | 1337 | } __attribute__((packed)) hfa384x_PortStatus_t; |
00b3ed16 | 1338 | |
aaad4303 SP |
1339 | #define HFA384x_PSTATUS_DISABLED ((u16)1) |
1340 | #define HFA384x_PSTATUS_SEARCHING ((u16)2) | |
1341 | #define HFA384x_PSTATUS_CONN_IBSS ((u16)3) | |
1342 | #define HFA384x_PSTATUS_CONN_ESS ((u16)4) | |
1343 | #define HFA384x_PSTATUS_OUTOFRANGE ((u16)5) | |
1344 | #define HFA384x_PSTATUS_CONN_WDS ((u16)6) | |
00b3ed16 GKH |
1345 | |
1346 | /*-- Information Record: CurrentSSID --*/ | |
1347 | typedef struct hfa384x_CurrentSSID | |
1348 | { | |
aaad4303 | 1349 | u8 CurrentSSID[34]; |
9cba46dc | 1350 | } __attribute__((packed)) hfa384x_CurrentSSID_t; |
00b3ed16 GKH |
1351 | |
1352 | /*-- Information Record: CurrentBSSID --*/ | |
1353 | typedef struct hfa384x_CurrentBSSID | |
1354 | { | |
aaad4303 | 1355 | u8 CurrentBSSID[6]; |
9cba46dc | 1356 | } __attribute__((packed)) hfa384x_CurrentBSSID_t; |
00b3ed16 GKH |
1357 | |
1358 | /*-- Information Record: commsquality --*/ | |
1359 | typedef struct hfa384x_commsquality | |
1360 | { | |
aaad4303 SP |
1361 | u16 CQ_currBSS; |
1362 | u16 ASL_currBSS; | |
1363 | u16 ANL_currFC; | |
9cba46dc | 1364 | } __attribute__((packed)) hfa384x_commsquality_t; |
00b3ed16 GKH |
1365 | |
1366 | /*-- Information Record: dmbcommsquality --*/ | |
1367 | typedef struct hfa384x_dbmcommsquality | |
1368 | { | |
aaad4303 SP |
1369 | u16 CQdbm_currBSS; |
1370 | u16 ASLdbm_currBSS; | |
1371 | u16 ANLdbm_currFC; | |
9cba46dc | 1372 | } __attribute__((packed)) hfa384x_dbmcommsquality_t; |
00b3ed16 GKH |
1373 | |
1374 | /*-- Information Record: CurrentTxRate --*/ | |
1375 | typedef struct hfa384x_CurrentTxRate | |
1376 | { | |
aaad4303 | 1377 | u16 CurrentTxRate; |
9cba46dc | 1378 | } __attribute__((packed)) hfa384x_CurrentTxRate_t; |
00b3ed16 GKH |
1379 | |
1380 | /*-- Information Record: CurrentBeaconInterval --*/ | |
1381 | typedef struct hfa384x_CurrentBeaconInterval | |
1382 | { | |
aaad4303 | 1383 | u16 CurrentBeaconInterval; |
9cba46dc | 1384 | } __attribute__((packed)) hfa384x_CurrentBeaconInterval_t; |
00b3ed16 GKH |
1385 | |
1386 | /*-- Information Record: CurrentScaleThresholds --*/ | |
1387 | typedef struct hfa384x_CurrentScaleThresholds | |
1388 | { | |
aaad4303 SP |
1389 | u16 EnergyDetectThreshold; |
1390 | u16 CarrierDetectThreshold; | |
1391 | u16 DeferDetectThreshold; | |
1392 | u16 CellSearchThreshold; /* Stations only */ | |
1393 | u16 DeadSpotThreshold; /* Stations only */ | |
9cba46dc | 1394 | } __attribute__((packed)) hfa384x_CurrentScaleThresholds_t; |
00b3ed16 GKH |
1395 | |
1396 | /*-- Information Record: ProtocolRspTime --*/ | |
1397 | typedef struct hfa384x_ProtocolRspTime | |
1398 | { | |
aaad4303 | 1399 | u16 ProtocolRspTime; |
9cba46dc | 1400 | } __attribute__((packed)) hfa384x_ProtocolRspTime_t; |
00b3ed16 GKH |
1401 | |
1402 | /*-- Information Record: ShortRetryLimit --*/ | |
1403 | typedef struct hfa384x_ShortRetryLimit | |
1404 | { | |
aaad4303 | 1405 | u16 ShortRetryLimit; |
9cba46dc | 1406 | } __attribute__((packed)) hfa384x_ShortRetryLimit_t; |
00b3ed16 GKH |
1407 | |
1408 | /*-- Information Record: LongRetryLimit --*/ | |
1409 | typedef struct hfa384x_LongRetryLimit | |
1410 | { | |
aaad4303 | 1411 | u16 LongRetryLimit; |
9cba46dc | 1412 | } __attribute__((packed)) hfa384x_LongRetryLimit_t; |
00b3ed16 GKH |
1413 | |
1414 | /*-- Information Record: MaxTransmitLifetime --*/ | |
1415 | typedef struct hfa384x_MaxTransmitLifetime | |
1416 | { | |
aaad4303 | 1417 | u16 MaxTransmitLifetime; |
9cba46dc | 1418 | } __attribute__((packed)) hfa384x_MaxTransmitLifetime_t; |
00b3ed16 GKH |
1419 | |
1420 | /*-- Information Record: MaxReceiveLifetime --*/ | |
1421 | typedef struct hfa384x_MaxReceiveLifetime | |
1422 | { | |
aaad4303 | 1423 | u16 MaxReceiveLifetime; |
9cba46dc | 1424 | } __attribute__((packed)) hfa384x_MaxReceiveLifetime_t; |
00b3ed16 GKH |
1425 | |
1426 | /*-- Information Record: CFPollable --*/ | |
1427 | typedef struct hfa384x_CFPollable | |
1428 | { | |
aaad4303 | 1429 | u16 CFPollable; |
9cba46dc | 1430 | } __attribute__((packed)) hfa384x_CFPollable_t; |
00b3ed16 GKH |
1431 | |
1432 | /*-- Information Record: AuthenticationAlgorithms --*/ | |
1433 | typedef struct hfa384x_AuthenticationAlgorithms | |
1434 | { | |
aaad4303 SP |
1435 | u16 AuthenticationType; |
1436 | u16 TypeEnabled; | |
9cba46dc | 1437 | } __attribute__((packed)) hfa384x_AuthenticationAlgorithms_t; |
00b3ed16 GKH |
1438 | |
1439 | /*-- Information Record: AuthenticationAlgorithms | |
1440 | (data only --*/ | |
1441 | typedef struct hfa384x_AuthenticationAlgorithms_data | |
1442 | { | |
aaad4303 SP |
1443 | u16 AuthenticationType; |
1444 | u16 TypeEnabled; | |
9cba46dc | 1445 | } __attribute__((packed)) hfa384x_AuthenticationAlgorithms_data_t; |
00b3ed16 GKH |
1446 | |
1447 | /*-- Information Record: PrivacyOptionImplemented --*/ | |
1448 | typedef struct hfa384x_PrivacyOptionImplemented | |
1449 | { | |
aaad4303 | 1450 | u16 PrivacyOptionImplemented; |
9cba46dc | 1451 | } __attribute__((packed)) hfa384x_PrivacyOptionImplemented_t; |
00b3ed16 GKH |
1452 | |
1453 | /*-- Information Record: OwnMACAddress --*/ | |
1454 | typedef struct hfa384x_OwnMACAddress | |
1455 | { | |
aaad4303 | 1456 | u8 OwnMACAddress[6]; |
9cba46dc | 1457 | } __attribute__((packed)) hfa384x_OwnMACAddress_t; |
00b3ed16 GKH |
1458 | |
1459 | /*-- Information Record: PCFInfo --*/ | |
1460 | typedef struct hfa384x_PCFInfo | |
1461 | { | |
aaad4303 SP |
1462 | u16 MediumOccupancyLimit; |
1463 | u16 CFPPeriod; | |
1464 | u16 CFPMaxDuration; | |
1465 | u16 CFPFlags; | |
9cba46dc | 1466 | } __attribute__((packed)) hfa384x_PCFInfo_t; |
00b3ed16 GKH |
1467 | |
1468 | /*-- Information Record: PCFInfo (data portion only) --*/ | |
1469 | typedef struct hfa384x_PCFInfo_data | |
1470 | { | |
aaad4303 SP |
1471 | u16 MediumOccupancyLimit; |
1472 | u16 CFPPeriod; | |
1473 | u16 CFPMaxDuration; | |
1474 | u16 CFPFlags; | |
9cba46dc | 1475 | } __attribute__((packed)) hfa384x_PCFInfo_data_t; |
00b3ed16 GKH |
1476 | |
1477 | /*-------------------------------------------------------------------- | |
1478 | Information Record Structures: Modem Information Records | |
1479 | --------------------------------------------------------------------*/ | |
1480 | ||
1481 | /*-- Information Record: PHYType --*/ | |
1482 | typedef struct hfa384x_PHYType | |
1483 | { | |
aaad4303 | 1484 | u16 PHYType; |
9cba46dc | 1485 | } __attribute__((packed)) hfa384x_PHYType_t; |
00b3ed16 GKH |
1486 | |
1487 | /*-- Information Record: CurrentChannel --*/ | |
1488 | typedef struct hfa384x_CurrentChannel | |
1489 | { | |
aaad4303 | 1490 | u16 CurrentChannel; |
9cba46dc | 1491 | } __attribute__((packed)) hfa384x_CurrentChannel_t; |
00b3ed16 GKH |
1492 | |
1493 | /*-- Information Record: CurrentPowerState --*/ | |
1494 | typedef struct hfa384x_CurrentPowerState | |
1495 | { | |
aaad4303 | 1496 | u16 CurrentPowerState; |
9cba46dc | 1497 | } __attribute__((packed)) hfa384x_CurrentPowerState_t; |
00b3ed16 GKH |
1498 | |
1499 | /*-- Information Record: CCAMode --*/ | |
1500 | typedef struct hfa384x_CCAMode | |
1501 | { | |
aaad4303 | 1502 | u16 CCAMode; |
9cba46dc | 1503 | } __attribute__((packed)) hfa384x_CCAMode_t; |
00b3ed16 GKH |
1504 | |
1505 | /*-- Information Record: SupportedDataRates --*/ | |
1506 | typedef struct hfa384x_SupportedDataRates | |
1507 | { | |
aaad4303 | 1508 | u8 SupportedDataRates[10]; |
9cba46dc | 1509 | } __attribute__((packed)) hfa384x_SupportedDataRates_t; |
00b3ed16 GKH |
1510 | |
1511 | /*-- Information Record: LFOStatus --*/ | |
1512 | typedef struct hfa384x_LFOStatus | |
1513 | { | |
aaad4303 SP |
1514 | u16 TestResults; |
1515 | u16 LFOResult; | |
1516 | u16 VRHFOResult; | |
9cba46dc | 1517 | } __attribute__((packed)) hfa384x_LFOStatus_t; |
00b3ed16 GKH |
1518 | |
1519 | #define HFA384x_TESTRESULT_ALLPASSED BIT0 | |
1520 | #define HFA384x_TESTRESULT_LFO_FAIL BIT1 | |
1521 | #define HFA384x_TESTRESULT_VR_HF0_FAIL BIT2 | |
1522 | #define HFA384x_HOST_FIRM_COORDINATE BIT7 | |
1523 | #define HFA384x_TESTRESULT_COORDINATE BIT15 | |
1524 | ||
1525 | /*-- Information Record: LEDControl --*/ | |
1526 | typedef struct hfa384x_LEDControl | |
1527 | { | |
aaad4303 SP |
1528 | u16 searching_on; |
1529 | u16 searching_off; | |
1530 | u16 assoc_on; | |
1531 | u16 assoc_off; | |
1532 | u16 activity; | |
9cba46dc | 1533 | } __attribute__((packed)) hfa384x_LEDControl_t; |
00b3ed16 GKH |
1534 | |
1535 | /*-------------------------------------------------------------------- | |
1536 | FRAME DESCRIPTORS AND FRAME STRUCTURES | |
1537 | ||
1538 | FRAME DESCRIPTORS: Offsets | |
1539 | ||
1540 | ---------------------------------------------------------------------- | |
1541 | Control Info (offset 44-51) | |
1542 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
1543 | #define HFA384x_FD_STATUS_OFF ((u16)0x44) |
1544 | #define HFA384x_FD_TIME_OFF ((u16)0x46) | |
1545 | #define HFA384x_FD_SWSUPPORT_OFF ((u16)0x4A) | |
1546 | #define HFA384x_FD_SILENCE_OFF ((u16)0x4A) | |
1547 | #define HFA384x_FD_SIGNAL_OFF ((u16)0x4B) | |
1548 | #define HFA384x_FD_RATE_OFF ((u16)0x4C) | |
1549 | #define HFA384x_FD_RXFLOW_OFF ((u16)0x4D) | |
1550 | #define HFA384x_FD_RESERVED_OFF ((u16)0x4E) | |
1551 | #define HFA384x_FD_TXCONTROL_OFF ((u16)0x50) | |
00b3ed16 GKH |
1552 | /*-------------------------------------------------------------------- |
1553 | 802.11 Header (offset 52-6B) | |
1554 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
1555 | #define HFA384x_FD_FRAMECONTROL_OFF ((u16)0x52) |
1556 | #define HFA384x_FD_DURATIONID_OFF ((u16)0x54) | |
1557 | #define HFA384x_FD_ADDRESS1_OFF ((u16)0x56) | |
1558 | #define HFA384x_FD_ADDRESS2_OFF ((u16)0x5C) | |
1559 | #define HFA384x_FD_ADDRESS3_OFF ((u16)0x62) | |
1560 | #define HFA384x_FD_SEQCONTROL_OFF ((u16)0x68) | |
1561 | #define HFA384x_FD_ADDRESS4_OFF ((u16)0x6A) | |
1562 | #define HFA384x_FD_DATALEN_OFF ((u16)0x70) | |
00b3ed16 GKH |
1563 | /*-------------------------------------------------------------------- |
1564 | 802.3 Header (offset 72-7F) | |
1565 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
1566 | #define HFA384x_FD_DESTADDRESS_OFF ((u16)0x72) |
1567 | #define HFA384x_FD_SRCADDRESS_OFF ((u16)0x78) | |
1568 | #define HFA384x_FD_DATALENGTH_OFF ((u16)0x7E) | |
00b3ed16 GKH |
1569 | |
1570 | /*-------------------------------------------------------------------- | |
1571 | FRAME STRUCTURES: Communication Frames | |
1572 | ---------------------------------------------------------------------- | |
1573 | Communication Frames: Transmit Frames | |
1574 | --------------------------------------------------------------------*/ | |
1575 | /*-- Communication Frame: Transmit Frame Structure --*/ | |
1576 | typedef struct hfa384x_tx_frame | |
1577 | { | |
aaad4303 SP |
1578 | u16 status; |
1579 | u16 reserved1; | |
1580 | u16 reserved2; | |
1581 | u32 sw_support; | |
1582 | u8 tx_retrycount; | |
1583 | u8 tx_rate; | |
1584 | u16 tx_control; | |
00b3ed16 GKH |
1585 | |
1586 | /*-- 802.11 Header Information --*/ | |
1587 | ||
aaad4303 SP |
1588 | u16 frame_control; |
1589 | u16 duration_id; | |
1590 | u8 address1[6]; | |
1591 | u8 address2[6]; | |
1592 | u8 address3[6]; | |
1593 | u16 sequence_control; | |
1594 | u8 address4[6]; | |
1595 | u16 data_len; /* little endian format */ | |
00b3ed16 GKH |
1596 | |
1597 | /*-- 802.3 Header Information --*/ | |
1598 | ||
aaad4303 SP |
1599 | u8 dest_addr[6]; |
1600 | u8 src_addr[6]; | |
1601 | u16 data_length; /* big endian format */ | |
9cba46dc | 1602 | } __attribute__((packed)) hfa384x_tx_frame_t; |
00b3ed16 GKH |
1603 | /*-------------------------------------------------------------------- |
1604 | Communication Frames: Field Masks for Transmit Frames | |
1605 | --------------------------------------------------------------------*/ | |
1606 | /*-- Status Field --*/ | |
aaad4303 SP |
1607 | #define HFA384x_TXSTATUS_ACKERR ((u16)BIT5) |
1608 | #define HFA384x_TXSTATUS_FORMERR ((u16)BIT3) | |
1609 | #define HFA384x_TXSTATUS_DISCON ((u16)BIT2) | |
1610 | #define HFA384x_TXSTATUS_AGEDERR ((u16)BIT1) | |
1611 | #define HFA384x_TXSTATUS_RETRYERR ((u16)BIT0) | |
00b3ed16 | 1612 | /*-- Transmit Control Field --*/ |
aaad4303 SP |
1613 | #define HFA384x_TX_CFPOLL ((u16)BIT12) |
1614 | #define HFA384x_TX_PRST ((u16)BIT11) | |
1615 | #define HFA384x_TX_MACPORT ((u16)(BIT10 | BIT9 | BIT8)) | |
1616 | #define HFA384x_TX_NOENCRYPT ((u16)BIT7) | |
1617 | #define HFA384x_TX_RETRYSTRAT ((u16)(BIT6 | BIT5)) | |
1618 | #define HFA384x_TX_STRUCTYPE ((u16)(BIT4 | BIT3)) | |
1619 | #define HFA384x_TX_TXEX ((u16)BIT2) | |
1620 | #define HFA384x_TX_TXOK ((u16)BIT1) | |
00b3ed16 GKH |
1621 | /*-------------------------------------------------------------------- |
1622 | Communication Frames: Test/Get/Set Field Values for Transmit Frames | |
1623 | --------------------------------------------------------------------*/ | |
1624 | /*-- Status Field --*/ | |
1625 | #define HFA384x_TXSTATUS_ISERROR(v) \ | |
aaad4303 | 1626 | (((u16)(v))&\ |
00b3ed16 GKH |
1627 | (HFA384x_TXSTATUS_ACKERR|HFA384x_TXSTATUS_FORMERR|\ |
1628 | HFA384x_TXSTATUS_DISCON|HFA384x_TXSTATUS_AGEDERR|\ | |
1629 | HFA384x_TXSTATUS_RETRYERR)) | |
1630 | ||
aaad4303 SP |
1631 | #define HFA384x_TXSTATUS_ISACKERR(v) ((u16)(((u16)(v)) & HFA384x_TXSTATUS_ACKERR)) |
1632 | #define HFA384x_TXSTATUS_ISFORMERR(v) ((u16)(((u16)(v)) & HFA384x_TXSTATUS_FORMERR)) | |
1633 | #define HFA384x_TXSTATUS_ISDISCON(v) ((u16)(((u16)(v)) & HFA384x_TXSTATUS_DISCON)) | |
1634 | #define HFA384x_TXSTATUS_ISAGEDERR(v) ((u16)(((u16)(v)) & HFA384x_TXSTATUS_AGEDERR)) | |
1635 | #define HFA384x_TXSTATUS_ISRETRYERR(v) ((u16)(((u16)(v)) & HFA384x_TXSTATUS_RETRYERR)) | |
00b3ed16 | 1636 | |
aaad4303 SP |
1637 | #define HFA384x_TX_GET(v,m,s) ((((u16)(v))&((u16)(m)))>>((u16)(s))) |
1638 | #define HFA384x_TX_SET(v,m,s) ((((u16)(v))<<((u16)(s)))&((u16)(m))) | |
00b3ed16 GKH |
1639 | |
1640 | #define HFA384x_TX_CFPOLL_GET(v) HFA384x_TX_GET(v, HFA384x_TX_CFPOLL,12) | |
1641 | #define HFA384x_TX_CFPOLL_SET(v) HFA384x_TX_SET(v, HFA384x_TX_CFPOLL,12) | |
1642 | #define HFA384x_TX_PRST_GET(v) HFA384x_TX_GET(v, HFA384x_TX_PRST,11) | |
1643 | #define HFA384x_TX_PRST_SET(v) HFA384x_TX_SET(v, HFA384x_TX_PRST,11) | |
1644 | #define HFA384x_TX_MACPORT_GET(v) HFA384x_TX_GET(v, HFA384x_TX_MACPORT, 8) | |
1645 | #define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8) | |
1646 | #define HFA384x_TX_NOENCRYPT_GET(v) HFA384x_TX_GET(v, HFA384x_TX_NOENCRYPT, 7) | |
1647 | #define HFA384x_TX_NOENCRYPT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_NOENCRYPT, 7) | |
1648 | #define HFA384x_TX_RETRYSTRAT_GET(v) HFA384x_TX_GET(v, HFA384x_TX_RETRYSTRAT, 5) | |
1649 | #define HFA384x_TX_RETRYSTRAT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_RETRYSTRAT, 5) | |
1650 | #define HFA384x_TX_STRUCTYPE_GET(v) HFA384x_TX_GET(v, HFA384x_TX_STRUCTYPE, 3) | |
1651 | #define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, HFA384x_TX_STRUCTYPE, 3) | |
1652 | #define HFA384x_TX_TXEX_GET(v) HFA384x_TX_GET(v, HFA384x_TX_TXEX, 2) | |
1653 | #define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2) | |
1654 | #define HFA384x_TX_TXOK_GET(v) HFA384x_TX_GET(v, HFA384x_TX_TXOK, 1) | |
1655 | #define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1) | |
1656 | /*-------------------------------------------------------------------- | |
1657 | Communication Frames: Receive Frames | |
1658 | --------------------------------------------------------------------*/ | |
1659 | /*-- Communication Frame: Receive Frame Structure --*/ | |
1660 | typedef struct hfa384x_rx_frame | |
1661 | { | |
1662 | /*-- MAC rx descriptor (hfa384x byte order) --*/ | |
aaad4303 SP |
1663 | u16 status; |
1664 | u32 time; | |
1665 | u8 silence; | |
1666 | u8 signal; | |
1667 | u8 rate; | |
1668 | u8 rx_flow; | |
1669 | u16 reserved1; | |
1670 | u16 reserved2; | |
00b3ed16 GKH |
1671 | |
1672 | /*-- 802.11 Header Information (802.11 byte order) --*/ | |
aaad4303 SP |
1673 | u16 frame_control; |
1674 | u16 duration_id; | |
1675 | u8 address1[6]; | |
1676 | u8 address2[6]; | |
1677 | u8 address3[6]; | |
1678 | u16 sequence_control; | |
1679 | u8 address4[6]; | |
1680 | u16 data_len; /* hfa384x (little endian) format */ | |
00b3ed16 GKH |
1681 | |
1682 | /*-- 802.3 Header Information --*/ | |
aaad4303 SP |
1683 | u8 dest_addr[6]; |
1684 | u8 src_addr[6]; | |
1685 | u16 data_length; /* IEEE? (big endian) format */ | |
9cba46dc | 1686 | } __attribute__((packed)) hfa384x_rx_frame_t; |
00b3ed16 GKH |
1687 | /*-------------------------------------------------------------------- |
1688 | Communication Frames: Field Masks for Receive Frames | |
1689 | --------------------------------------------------------------------*/ | |
1690 | /*-- Offsets --------*/ | |
aaad4303 SP |
1691 | #define HFA384x_RX_DATA_LEN_OFF ((u16)44) |
1692 | #define HFA384x_RX_80211HDR_OFF ((u16)14) | |
1693 | #define HFA384x_RX_DATA_OFF ((u16)60) | |
00b3ed16 GKH |
1694 | |
1695 | /*-- Status Fields --*/ | |
aaad4303 SP |
1696 | #define HFA384x_RXSTATUS_MSGTYPE ((u16)(BIT15 | BIT14 | BIT13)) |
1697 | #define HFA384x_RXSTATUS_MACPORT ((u16)(BIT10 | BIT9 | BIT8)) | |
1698 | #define HFA384x_RXSTATUS_UNDECR ((u16)BIT1) | |
1699 | #define HFA384x_RXSTATUS_FCSERR ((u16)BIT0) | |
00b3ed16 GKH |
1700 | /*-------------------------------------------------------------------- |
1701 | Communication Frames: Test/Get/Set Field Values for Receive Frames | |
1702 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
1703 | #define HFA384x_RXSTATUS_MSGTYPE_GET(value) ((u16)((((u16)(value)) & HFA384x_RXSTATUS_MSGTYPE) >> 13)) |
1704 | #define HFA384x_RXSTATUS_MSGTYPE_SET(value) ((u16)(((u16)(value)) << 13)) | |
1705 | #define HFA384x_RXSTATUS_MACPORT_GET(value) ((u16)((((u16)(value)) & HFA384x_RXSTATUS_MACPORT) >> 8)) | |
1706 | #define HFA384x_RXSTATUS_MACPORT_SET(value) ((u16)(((u16)(value)) << 8)) | |
1707 | #define HFA384x_RXSTATUS_ISUNDECR(value) ((u16)(((u16)(value)) & HFA384x_RXSTATUS_UNDECR)) | |
1708 | #define HFA384x_RXSTATUS_ISFCSERR(value) ((u16)(((u16)(value)) & HFA384x_RXSTATUS_FCSERR)) | |
00b3ed16 GKH |
1709 | /*-------------------------------------------------------------------- |
1710 | FRAME STRUCTURES: Information Types and Information Frame Structures | |
1711 | ---------------------------------------------------------------------- | |
1712 | Information Types | |
1713 | --------------------------------------------------------------------*/ | |
aaad4303 SP |
1714 | #define HFA384x_IT_HANDOVERADDR ((u16)0xF000UL) |
1715 | #define HFA384x_IT_HANDOVERDEAUTHADDRESS ((u16)0xF001UL)//AP 1.3.7 | |
1716 | #define HFA384x_IT_COMMTALLIES ((u16)0xF100UL) | |
1717 | #define HFA384x_IT_SCANRESULTS ((u16)0xF101UL) | |
1718 | #define HFA384x_IT_CHINFORESULTS ((u16)0xF102UL) | |
1719 | #define HFA384x_IT_HOSTSCANRESULTS ((u16)0xF103UL) | |
1720 | #define HFA384x_IT_LINKSTATUS ((u16)0xF200UL) | |
1721 | #define HFA384x_IT_ASSOCSTATUS ((u16)0xF201UL) | |
1722 | #define HFA384x_IT_AUTHREQ ((u16)0xF202UL) | |
1723 | #define HFA384x_IT_PSUSERCNT ((u16)0xF203UL) | |
1724 | #define HFA384x_IT_KEYIDCHANGED ((u16)0xF204UL) | |
1725 | #define HFA384x_IT_ASSOCREQ ((u16)0xF205UL) | |
1726 | #define HFA384x_IT_MICFAILURE ((u16)0xF206UL) | |
00b3ed16 GKH |
1727 | |
1728 | /*-------------------------------------------------------------------- | |
1729 | Information Frames Structures | |
1730 | ---------------------------------------------------------------------- | |
1731 | Information Frames: Notification Frame Structures | |
1732 | --------------------------------------------------------------------*/ | |
1733 | /*-- Notification Frame,MAC Mgmt: Handover Address --*/ | |
1734 | typedef struct hfa384x_HandoverAddr | |
1735 | { | |
aaad4303 SP |
1736 | u16 framelen; |
1737 | u16 infotype; | |
1738 | u8 handover_addr[WLAN_BSSID_LEN]; | |
9cba46dc | 1739 | } __attribute__((packed)) hfa384x_HandoverAddr_t; |
00b3ed16 GKH |
1740 | |
1741 | /*-- Inquiry Frame, Diagnose: Communication Tallies --*/ | |
1742 | typedef struct hfa384x_CommTallies16 | |
1743 | { | |
aaad4303 SP |
1744 | u16 txunicastframes; |
1745 | u16 txmulticastframes; | |
1746 | u16 txfragments; | |
1747 | u16 txunicastoctets; | |
1748 | u16 txmulticastoctets; | |
1749 | u16 txdeferredtrans; | |
1750 | u16 txsingleretryframes; | |
1751 | u16 txmultipleretryframes; | |
1752 | u16 txretrylimitexceeded; | |
1753 | u16 txdiscards; | |
1754 | u16 rxunicastframes; | |
1755 | u16 rxmulticastframes; | |
1756 | u16 rxfragments; | |
1757 | u16 rxunicastoctets; | |
1758 | u16 rxmulticastoctets; | |
1759 | u16 rxfcserrors; | |
1760 | u16 rxdiscardsnobuffer; | |
1761 | u16 txdiscardswrongsa; | |
1762 | u16 rxdiscardswepundecr; | |
1763 | u16 rxmsginmsgfrag; | |
1764 | u16 rxmsginbadmsgfrag; | |
9cba46dc | 1765 | } __attribute__((packed)) hfa384x_CommTallies16_t; |
00b3ed16 GKH |
1766 | |
1767 | typedef struct hfa384x_CommTallies32 | |
1768 | { | |
aaad4303 SP |
1769 | u32 txunicastframes; |
1770 | u32 txmulticastframes; | |
1771 | u32 txfragments; | |
1772 | u32 txunicastoctets; | |
1773 | u32 txmulticastoctets; | |
1774 | u32 txdeferredtrans; | |
1775 | u32 txsingleretryframes; | |
1776 | u32 txmultipleretryframes; | |
1777 | u32 txretrylimitexceeded; | |
1778 | u32 txdiscards; | |
1779 | u32 rxunicastframes; | |
1780 | u32 rxmulticastframes; | |
1781 | u32 rxfragments; | |
1782 | u32 rxunicastoctets; | |
1783 | u32 rxmulticastoctets; | |
1784 | u32 rxfcserrors; | |
1785 | u32 rxdiscardsnobuffer; | |
1786 | u32 txdiscardswrongsa; | |
1787 | u32 rxdiscardswepundecr; | |
1788 | u32 rxmsginmsgfrag; | |
1789 | u32 rxmsginbadmsgfrag; | |
9cba46dc | 1790 | } __attribute__((packed)) hfa384x_CommTallies32_t; |
00b3ed16 GKH |
1791 | |
1792 | /*-- Inquiry Frame, Diagnose: Scan Results & Subfields--*/ | |
1793 | typedef struct hfa384x_ScanResultSub | |
1794 | { | |
aaad4303 SP |
1795 | u16 chid; |
1796 | u16 anl; | |
1797 | u16 sl; | |
1798 | u8 bssid[WLAN_BSSID_LEN]; | |
1799 | u16 bcnint; | |
1800 | u16 capinfo; | |
00b3ed16 | 1801 | hfa384x_bytestr32_t ssid; |
aaad4303 SP |
1802 | u8 supprates[10]; /* 802.11 info element */ |
1803 | u16 proberesp_rate; | |
9cba46dc | 1804 | } __attribute__((packed)) hfa384x_ScanResultSub_t; |
00b3ed16 GKH |
1805 | |
1806 | typedef struct hfa384x_ScanResult | |
1807 | { | |
aaad4303 SP |
1808 | u16 rsvd; |
1809 | u16 scanreason; | |
00b3ed16 GKH |
1810 | hfa384x_ScanResultSub_t |
1811 | result[HFA384x_SCANRESULT_MAX]; | |
9cba46dc | 1812 | } __attribute__((packed)) hfa384x_ScanResult_t; |
00b3ed16 GKH |
1813 | |
1814 | /*-- Inquiry Frame, Diagnose: ChInfo Results & Subfields--*/ | |
1815 | typedef struct hfa384x_ChInfoResultSub | |
1816 | { | |
aaad4303 SP |
1817 | u16 chid; |
1818 | u16 anl; | |
1819 | u16 pnl; | |
1820 | u16 active; | |
9cba46dc | 1821 | } __attribute__((packed)) hfa384x_ChInfoResultSub_t; |
00b3ed16 GKH |
1822 | |
1823 | #define HFA384x_CHINFORESULT_BSSACTIVE BIT0 | |
1824 | #define HFA384x_CHINFORESULT_PCFACTIVE BIT1 | |
1825 | ||
1826 | typedef struct hfa384x_ChInfoResult | |
1827 | { | |
aaad4303 | 1828 | u16 scanchannels; |
00b3ed16 GKH |
1829 | hfa384x_ChInfoResultSub_t |
1830 | result[HFA384x_CHINFORESULT_MAX]; | |
9cba46dc | 1831 | } __attribute__((packed)) hfa384x_ChInfoResult_t; |
00b3ed16 GKH |
1832 | |
1833 | /*-- Inquiry Frame, Diagnose: Host Scan Results & Subfields--*/ | |
1834 | typedef struct hfa384x_HScanResultSub | |
1835 | { | |
aaad4303 SP |
1836 | u16 chid; |
1837 | u16 anl; | |
1838 | u16 sl; | |
1839 | u8 bssid[WLAN_BSSID_LEN]; | |
1840 | u16 bcnint; | |
1841 | u16 capinfo; | |
00b3ed16 | 1842 | hfa384x_bytestr32_t ssid; |
aaad4303 SP |
1843 | u8 supprates[10]; /* 802.11 info element */ |
1844 | u16 proberesp_rate; | |
1845 | u16 atim; | |
9cba46dc | 1846 | } __attribute__((packed)) hfa384x_HScanResultSub_t; |
00b3ed16 GKH |
1847 | |
1848 | typedef struct hfa384x_HScanResult | |
1849 | { | |
aaad4303 SP |
1850 | u16 nresult; |
1851 | u16 rsvd; | |
00b3ed16 GKH |
1852 | hfa384x_HScanResultSub_t |
1853 | result[HFA384x_HSCANRESULT_MAX]; | |
9cba46dc | 1854 | } __attribute__((packed)) hfa384x_HScanResult_t; |
00b3ed16 GKH |
1855 | |
1856 | /*-- Unsolicited Frame, MAC Mgmt: LinkStatus --*/ | |
1857 | ||
aaad4303 SP |
1858 | #define HFA384x_LINK_NOTCONNECTED ((u16)0) |
1859 | #define HFA384x_LINK_CONNECTED ((u16)1) | |
1860 | #define HFA384x_LINK_DISCONNECTED ((u16)2) | |
1861 | #define HFA384x_LINK_AP_CHANGE ((u16)3) | |
1862 | #define HFA384x_LINK_AP_OUTOFRANGE ((u16)4) | |
1863 | #define HFA384x_LINK_AP_INRANGE ((u16)5) | |
1864 | #define HFA384x_LINK_ASSOCFAIL ((u16)6) | |
00b3ed16 GKH |
1865 | |
1866 | typedef struct hfa384x_LinkStatus | |
1867 | { | |
aaad4303 | 1868 | u16 linkstatus; |
9cba46dc | 1869 | } __attribute__((packed)) hfa384x_LinkStatus_t; |
00b3ed16 GKH |
1870 | |
1871 | ||
1872 | /*-- Unsolicited Frame, MAC Mgmt: AssociationStatus (--*/ | |
1873 | ||
aaad4303 SP |
1874 | #define HFA384x_ASSOCSTATUS_STAASSOC ((u16)1) |
1875 | #define HFA384x_ASSOCSTATUS_REASSOC ((u16)2) | |
1876 | #define HFA384x_ASSOCSTATUS_DISASSOC ((u16)3) | |
1877 | #define HFA384x_ASSOCSTATUS_ASSOCFAIL ((u16)4) | |
1878 | #define HFA384x_ASSOCSTATUS_AUTHFAIL ((u16)5) | |
00b3ed16 GKH |
1879 | |
1880 | typedef struct hfa384x_AssocStatus | |
1881 | { | |
aaad4303 SP |
1882 | u16 assocstatus; |
1883 | u8 sta_addr[WLAN_ADDR_LEN]; | |
00b3ed16 | 1884 | /* old_ap_addr is only valid if assocstatus == 2 */ |
aaad4303 SP |
1885 | u8 old_ap_addr[WLAN_ADDR_LEN]; |
1886 | u16 reason; | |
1887 | u16 reserved; | |
9cba46dc | 1888 | } __attribute__((packed)) hfa384x_AssocStatus_t; |
00b3ed16 GKH |
1889 | |
1890 | /*-- Unsolicited Frame, MAC Mgmt: AuthRequest (AP Only) --*/ | |
1891 | ||
1892 | typedef struct hfa384x_AuthRequest | |
1893 | { | |
aaad4303 SP |
1894 | u8 sta_addr[WLAN_ADDR_LEN]; |
1895 | u16 algorithm; | |
9cba46dc | 1896 | } __attribute__((packed)) hfa384x_AuthReq_t; |
00b3ed16 GKH |
1897 | |
1898 | /*-- Unsolicited Frame, MAC Mgmt: AssocRequest (AP Only) --*/ | |
1899 | ||
1900 | typedef struct hfa384x_AssocRequest | |
1901 | { | |
aaad4303 SP |
1902 | u8 sta_addr[WLAN_ADDR_LEN]; |
1903 | u16 type; | |
1904 | u8 wpa_data[80]; | |
9cba46dc | 1905 | } __attribute__((packed)) hfa384x_AssocReq_t; |
00b3ed16 GKH |
1906 | |
1907 | ||
1908 | #define HFA384x_ASSOCREQ_TYPE_ASSOC 0 | |
1909 | #define HFA384x_ASSOCREQ_TYPE_REASSOC 1 | |
1910 | ||
1911 | /*-- Unsolicited Frame, MAC Mgmt: MIC Failure (AP Only) --*/ | |
1912 | ||
1913 | typedef struct hfa384x_MicFailure | |
1914 | { | |
aaad4303 SP |
1915 | u8 sender[WLAN_ADDR_LEN]; |
1916 | u8 dest[WLAN_ADDR_LEN]; | |
9cba46dc | 1917 | } __attribute__((packed)) hfa384x_MicFailure_t; |
00b3ed16 GKH |
1918 | |
1919 | /*-- Unsolicited Frame, MAC Mgmt: PSUserCount (AP Only) --*/ | |
1920 | ||
1921 | typedef struct hfa384x_PSUserCount | |
1922 | { | |
aaad4303 | 1923 | u16 usercnt; |
9cba46dc | 1924 | } __attribute__((packed)) hfa384x_PSUserCount_t; |
00b3ed16 GKH |
1925 | |
1926 | typedef struct hfa384x_KeyIDChanged | |
1927 | { | |
aaad4303 SP |
1928 | u8 sta_addr[WLAN_ADDR_LEN]; |
1929 | u16 keyid; | |
9cba46dc | 1930 | } __attribute__((packed)) hfa384x_KeyIDChanged_t; |
00b3ed16 GKH |
1931 | |
1932 | /*-- Collection of all Inf frames ---------------*/ | |
1933 | typedef union hfa384x_infodata { | |
1934 | hfa384x_CommTallies16_t commtallies16; | |
1935 | hfa384x_CommTallies32_t commtallies32; | |
1936 | hfa384x_ScanResult_t scanresult; | |
1937 | hfa384x_ChInfoResult_t chinforesult; | |
1938 | hfa384x_HScanResult_t hscanresult; | |
1939 | hfa384x_LinkStatus_t linkstatus; | |
1940 | hfa384x_AssocStatus_t assocstatus; | |
1941 | hfa384x_AuthReq_t authreq; | |
1942 | hfa384x_PSUserCount_t psusercnt; | |
1943 | hfa384x_KeyIDChanged_t keyidchanged; | |
9cba46dc | 1944 | } __attribute__((packed)) hfa384x_infodata_t; |
00b3ed16 GKH |
1945 | |
1946 | typedef struct hfa384x_InfFrame | |
1947 | { | |
aaad4303 SP |
1948 | u16 framelen; |
1949 | u16 infotype; | |
00b3ed16 | 1950 | hfa384x_infodata_t info; |
9cba46dc | 1951 | } __attribute__((packed)) hfa384x_InfFrame_t; |
00b3ed16 | 1952 | |
00b3ed16 GKH |
1953 | /*-------------------------------------------------------------------- |
1954 | USB Packet structures and constants. | |
1955 | --------------------------------------------------------------------*/ | |
1956 | ||
1957 | /* Should be sent to the ctrlout endpoint */ | |
1958 | #define HFA384x_USB_ENBULKIN 6 | |
1959 | ||
1960 | /* Should be sent to the bulkout endpoint */ | |
1961 | #define HFA384x_USB_TXFRM 0 | |
1962 | #define HFA384x_USB_CMDREQ 1 | |
1963 | #define HFA384x_USB_WRIDREQ 2 | |
1964 | #define HFA384x_USB_RRIDREQ 3 | |
1965 | #define HFA384x_USB_WMEMREQ 4 | |
1966 | #define HFA384x_USB_RMEMREQ 5 | |
1967 | ||
1968 | /* Received from the bulkin endpoint */ | |
1969 | #define HFA384x_USB_ISFRM(a) (!((a) & 0x8000)) | |
1970 | #define HFA384x_USB_ISTXFRM(a) (((a) & 0x9000) == 0x1000) | |
1971 | #define HFA384x_USB_ISRXFRM(a) (!((a) & 0x9000)) | |
1972 | #define HFA384x_USB_INFOFRM 0x8000 | |
1973 | #define HFA384x_USB_CMDRESP 0x8001 | |
1974 | #define HFA384x_USB_WRIDRESP 0x8002 | |
1975 | #define HFA384x_USB_RRIDRESP 0x8003 | |
1976 | #define HFA384x_USB_WMEMRESP 0x8004 | |
1977 | #define HFA384x_USB_RMEMRESP 0x8005 | |
1978 | #define HFA384x_USB_BUFAVAIL 0x8006 | |
1979 | #define HFA384x_USB_ERROR 0x8007 | |
1980 | ||
1981 | /*------------------------------------*/ | |
1982 | /* Request (bulk OUT) packet contents */ | |
1983 | ||
1984 | typedef struct hfa384x_usb_txfrm { | |
1985 | hfa384x_tx_frame_t desc; | |
aaad4303 | 1986 | u8 data[WLAN_DATA_MAXLEN]; |
9cba46dc | 1987 | } __attribute__((packed)) hfa384x_usb_txfrm_t; |
00b3ed16 GKH |
1988 | |
1989 | typedef struct hfa384x_usb_cmdreq { | |
aaad4303 SP |
1990 | u16 type; |
1991 | u16 cmd; | |
1992 | u16 parm0; | |
1993 | u16 parm1; | |
1994 | u16 parm2; | |
1995 | u8 pad[54]; | |
9cba46dc | 1996 | } __attribute__((packed)) hfa384x_usb_cmdreq_t; |
00b3ed16 GKH |
1997 | |
1998 | typedef struct hfa384x_usb_wridreq { | |
aaad4303 SP |
1999 | u16 type; |
2000 | u16 frmlen; | |
2001 | u16 rid; | |
2002 | u8 data[HFA384x_RIDDATA_MAXLEN]; | |
9cba46dc | 2003 | } __attribute__((packed)) hfa384x_usb_wridreq_t; |
00b3ed16 GKH |
2004 | |
2005 | typedef struct hfa384x_usb_rridreq { | |
aaad4303 SP |
2006 | u16 type; |
2007 | u16 frmlen; | |
2008 | u16 rid; | |
2009 | u8 pad[58]; | |
9cba46dc | 2010 | } __attribute__((packed)) hfa384x_usb_rridreq_t; |
00b3ed16 GKH |
2011 | |
2012 | typedef struct hfa384x_usb_wmemreq { | |
aaad4303 SP |
2013 | u16 type; |
2014 | u16 frmlen; | |
2015 | u16 offset; | |
2016 | u16 page; | |
2017 | u8 data[HFA384x_USB_RWMEM_MAXLEN]; | |
9cba46dc | 2018 | } __attribute__((packed)) hfa384x_usb_wmemreq_t; |
00b3ed16 GKH |
2019 | |
2020 | typedef struct hfa384x_usb_rmemreq { | |
aaad4303 SP |
2021 | u16 type; |
2022 | u16 frmlen; | |
2023 | u16 offset; | |
2024 | u16 page; | |
2025 | u8 pad[56]; | |
9cba46dc | 2026 | } __attribute__((packed)) hfa384x_usb_rmemreq_t; |
00b3ed16 GKH |
2027 | |
2028 | /*------------------------------------*/ | |
2029 | /* Response (bulk IN) packet contents */ | |
2030 | ||
2031 | typedef struct hfa384x_usb_rxfrm { | |
2032 | hfa384x_rx_frame_t desc; | |
aaad4303 | 2033 | u8 data[WLAN_DATA_MAXLEN]; |
9cba46dc | 2034 | } __attribute__((packed)) hfa384x_usb_rxfrm_t; |
00b3ed16 GKH |
2035 | |
2036 | typedef struct hfa384x_usb_infofrm { | |
aaad4303 | 2037 | u16 type; |
00b3ed16 | 2038 | hfa384x_InfFrame_t info; |
9cba46dc | 2039 | } __attribute__((packed)) hfa384x_usb_infofrm_t; |
00b3ed16 GKH |
2040 | |
2041 | typedef struct hfa384x_usb_statusresp { | |
aaad4303 SP |
2042 | u16 type; |
2043 | u16 status; | |
2044 | u16 resp0; | |
2045 | u16 resp1; | |
2046 | u16 resp2; | |
9cba46dc | 2047 | } __attribute__((packed)) hfa384x_usb_cmdresp_t; |
00b3ed16 GKH |
2048 | |
2049 | typedef hfa384x_usb_cmdresp_t hfa384x_usb_wridresp_t; | |
2050 | ||
2051 | typedef struct hfa384x_usb_rridresp { | |
aaad4303 SP |
2052 | u16 type; |
2053 | u16 frmlen; | |
2054 | u16 rid; | |
2055 | u8 data[HFA384x_RIDDATA_MAXLEN]; | |
9cba46dc | 2056 | } __attribute__((packed)) hfa384x_usb_rridresp_t; |
00b3ed16 GKH |
2057 | |
2058 | typedef hfa384x_usb_cmdresp_t hfa384x_usb_wmemresp_t; | |
2059 | ||
2060 | typedef struct hfa384x_usb_rmemresp { | |
aaad4303 SP |
2061 | u16 type; |
2062 | u16 frmlen; | |
2063 | u8 data[HFA384x_USB_RWMEM_MAXLEN]; | |
9cba46dc | 2064 | } __attribute__((packed)) hfa384x_usb_rmemresp_t; |
00b3ed16 GKH |
2065 | |
2066 | typedef struct hfa384x_usb_bufavail { | |
aaad4303 SP |
2067 | u16 type; |
2068 | u16 frmlen; | |
9cba46dc | 2069 | } __attribute__((packed)) hfa384x_usb_bufavail_t; |
00b3ed16 GKH |
2070 | |
2071 | typedef struct hfa384x_usb_error { | |
aaad4303 SP |
2072 | u16 type; |
2073 | u16 errortype; | |
9cba46dc | 2074 | } __attribute__((packed)) hfa384x_usb_error_t; |
00b3ed16 GKH |
2075 | |
2076 | /*----------------------------------------------------------*/ | |
2077 | /* Unions for packaging all the known packet types together */ | |
2078 | ||
2079 | typedef union hfa384x_usbout { | |
aaad4303 | 2080 | u16 type; |
00b3ed16 GKH |
2081 | hfa384x_usb_txfrm_t txfrm; |
2082 | hfa384x_usb_cmdreq_t cmdreq; | |
2083 | hfa384x_usb_wridreq_t wridreq; | |
2084 | hfa384x_usb_rridreq_t rridreq; | |
2085 | hfa384x_usb_wmemreq_t wmemreq; | |
2086 | hfa384x_usb_rmemreq_t rmemreq; | |
9cba46dc | 2087 | } __attribute__((packed)) hfa384x_usbout_t; |
00b3ed16 GKH |
2088 | |
2089 | typedef union hfa384x_usbin { | |
aaad4303 | 2090 | u16 type; |
00b3ed16 GKH |
2091 | hfa384x_usb_rxfrm_t rxfrm; |
2092 | hfa384x_usb_txfrm_t txfrm; | |
2093 | hfa384x_usb_infofrm_t infofrm; | |
2094 | hfa384x_usb_cmdresp_t cmdresp; | |
2095 | hfa384x_usb_wridresp_t wridresp; | |
2096 | hfa384x_usb_rridresp_t rridresp; | |
2097 | hfa384x_usb_wmemresp_t wmemresp; | |
2098 | hfa384x_usb_rmemresp_t rmemresp; | |
2099 | hfa384x_usb_bufavail_t bufavail; | |
2100 | hfa384x_usb_error_t usberror; | |
aaad4303 | 2101 | u8 boguspad[3000]; |
9cba46dc | 2102 | } __attribute__((packed)) hfa384x_usbin_t; |
00b3ed16 | 2103 | |
00b3ed16 GKH |
2104 | /*-------------------------------------------------------------------- |
2105 | PD record structures. | |
2106 | --------------------------------------------------------------------*/ | |
2107 | ||
2108 | typedef struct hfa384x_pdr_pcb_partnum | |
2109 | { | |
aaad4303 | 2110 | u8 num[8]; |
9cba46dc | 2111 | } __attribute__((packed)) hfa384x_pdr_pcb_partnum_t; |
00b3ed16 GKH |
2112 | |
2113 | typedef struct hfa384x_pdr_pcb_tracenum | |
2114 | { | |
aaad4303 | 2115 | u8 num[8]; |
9cba46dc | 2116 | } __attribute__((packed)) hfa384x_pdr_pcb_tracenum_t; |
00b3ed16 GKH |
2117 | |
2118 | typedef struct hfa384x_pdr_nic_serial | |
2119 | { | |
aaad4303 | 2120 | u8 num[12]; |
9cba46dc | 2121 | } __attribute__((packed)) hfa384x_pdr_nic_serial_t; |
00b3ed16 GKH |
2122 | |
2123 | typedef struct hfa384x_pdr_mkk_measurements | |
2124 | { | |
2125 | double carrier_freq; | |
2126 | double occupied_band; | |
2127 | double power_density; | |
2128 | double tx_spur_f1; | |
2129 | double tx_spur_f2; | |
2130 | double tx_spur_f3; | |
2131 | double tx_spur_f4; | |
2132 | double tx_spur_l1; | |
2133 | double tx_spur_l2; | |
2134 | double tx_spur_l3; | |
2135 | double tx_spur_l4; | |
2136 | double rx_spur_f1; | |
2137 | double rx_spur_f2; | |
2138 | double rx_spur_l1; | |
2139 | double rx_spur_l2; | |
9cba46dc | 2140 | } __attribute__((packed)) hfa384x_pdr_mkk_measurements_t; |
00b3ed16 GKH |
2141 | |
2142 | typedef struct hfa384x_pdr_nic_ramsize | |
2143 | { | |
aaad4303 | 2144 | u8 size[12]; /* units of KB */ |
9cba46dc | 2145 | } __attribute__((packed)) hfa384x_pdr_nic_ramsize_t; |
00b3ed16 GKH |
2146 | |
2147 | typedef struct hfa384x_pdr_mfisuprange | |
2148 | { | |
aaad4303 SP |
2149 | u16 id; |
2150 | u16 variant; | |
2151 | u16 bottom; | |
2152 | u16 top; | |
9cba46dc | 2153 | } __attribute__((packed)) hfa384x_pdr_mfisuprange_t; |
00b3ed16 GKH |
2154 | |
2155 | typedef struct hfa384x_pdr_cfisuprange | |
2156 | { | |
aaad4303 SP |
2157 | u16 id; |
2158 | u16 variant; | |
2159 | u16 bottom; | |
2160 | u16 top; | |
9cba46dc | 2161 | } __attribute__((packed)) hfa384x_pdr_cfisuprange_t; |
00b3ed16 GKH |
2162 | |
2163 | typedef struct hfa384x_pdr_nicid | |
2164 | { | |
aaad4303 SP |
2165 | u16 id; |
2166 | u16 variant; | |
2167 | u16 major; | |
2168 | u16 minor; | |
9cba46dc | 2169 | } __attribute__((packed)) hfa384x_pdr_nicid_t; |
00b3ed16 GKH |
2170 | |
2171 | ||
2172 | typedef struct hfa384x_pdr_refdac_measurements | |
2173 | { | |
aaad4303 | 2174 | u16 value[0]; |
9cba46dc | 2175 | } __attribute__((packed)) hfa384x_pdr_refdac_measurements_t; |
00b3ed16 GKH |
2176 | |
2177 | typedef struct hfa384x_pdr_vgdac_measurements | |
2178 | { | |
aaad4303 | 2179 | u16 value[0]; |
9cba46dc | 2180 | } __attribute__((packed)) hfa384x_pdr_vgdac_measurements_t; |
00b3ed16 GKH |
2181 | |
2182 | typedef struct hfa384x_pdr_level_comp_measurements | |
2183 | { | |
aaad4303 | 2184 | u16 value[0]; |
9cba46dc | 2185 | } __attribute__((packed)) hfa384x_pdr_level_compc_measurements_t; |
00b3ed16 GKH |
2186 | |
2187 | typedef struct hfa384x_pdr_mac_address | |
2188 | { | |
aaad4303 | 2189 | u8 addr[6]; |
9cba46dc | 2190 | } __attribute__((packed)) hfa384x_pdr_mac_address_t; |
00b3ed16 GKH |
2191 | |
2192 | typedef struct hfa384x_pdr_mkk_callname | |
2193 | { | |
aaad4303 | 2194 | u8 callname[8]; |
9cba46dc | 2195 | } __attribute__((packed)) hfa384x_pdr_mkk_callname_t; |
00b3ed16 GKH |
2196 | |
2197 | typedef struct hfa384x_pdr_regdomain | |
2198 | { | |
aaad4303 SP |
2199 | u16 numdomains; |
2200 | u16 domain[5]; | |
9cba46dc | 2201 | } __attribute__((packed)) hfa384x_pdr_regdomain_t; |
00b3ed16 GKH |
2202 | |
2203 | typedef struct hfa384x_pdr_allowed_channel | |
2204 | { | |
aaad4303 | 2205 | u16 ch_bitmap; |
9cba46dc | 2206 | } __attribute__((packed)) hfa384x_pdr_allowed_channel_t; |
00b3ed16 GKH |
2207 | |
2208 | typedef struct hfa384x_pdr_default_channel | |
2209 | { | |
aaad4303 | 2210 | u16 channel; |
9cba46dc | 2211 | } __attribute__((packed)) hfa384x_pdr_default_channel_t; |
00b3ed16 GKH |
2212 | |
2213 | typedef struct hfa384x_pdr_privacy_option | |
2214 | { | |
aaad4303 | 2215 | u16 available; |
9cba46dc | 2216 | } __attribute__((packed)) hfa384x_pdr_privacy_option_t; |
00b3ed16 GKH |
2217 | |
2218 | typedef struct hfa384x_pdr_temptype | |
2219 | { | |
aaad4303 | 2220 | u16 type; |
9cba46dc | 2221 | } __attribute__((packed)) hfa384x_pdr_temptype_t; |
00b3ed16 GKH |
2222 | |
2223 | typedef struct hfa384x_pdr_refdac_setup | |
2224 | { | |
aaad4303 | 2225 | u16 ch_value[14]; |
9cba46dc | 2226 | } __attribute__((packed)) hfa384x_pdr_refdac_setup_t; |
00b3ed16 GKH |
2227 | |
2228 | typedef struct hfa384x_pdr_vgdac_setup | |
2229 | { | |
aaad4303 | 2230 | u16 ch_value[14]; |
9cba46dc | 2231 | } __attribute__((packed)) hfa384x_pdr_vgdac_setup_t; |
00b3ed16 GKH |
2232 | |
2233 | typedef struct hfa384x_pdr_level_comp_setup | |
2234 | { | |
aaad4303 | 2235 | u16 ch_value[14]; |
9cba46dc | 2236 | } __attribute__((packed)) hfa384x_pdr_level_comp_setup_t; |
00b3ed16 GKH |
2237 | |
2238 | typedef struct hfa384x_pdr_trimdac_setup | |
2239 | { | |
aaad4303 SP |
2240 | u16 trimidac; |
2241 | u16 trimqdac; | |
9cba46dc | 2242 | } __attribute__((packed)) hfa384x_pdr_trimdac_setup_t; |
00b3ed16 GKH |
2243 | |
2244 | typedef struct hfa384x_pdr_ifr_setting | |
2245 | { | |
aaad4303 | 2246 | u16 value[3]; |
9cba46dc | 2247 | } __attribute__((packed)) hfa384x_pdr_ifr_setting_t; |
00b3ed16 GKH |
2248 | |
2249 | typedef struct hfa384x_pdr_rfr_setting | |
2250 | { | |
aaad4303 | 2251 | u16 value[3]; |
9cba46dc | 2252 | } __attribute__((packed)) hfa384x_pdr_rfr_setting_t; |
00b3ed16 GKH |
2253 | |
2254 | typedef struct hfa384x_pdr_hfa3861_baseline | |
2255 | { | |
aaad4303 | 2256 | u16 value[50]; |
9cba46dc | 2257 | } __attribute__((packed)) hfa384x_pdr_hfa3861_baseline_t; |
00b3ed16 GKH |
2258 | |
2259 | typedef struct hfa384x_pdr_hfa3861_shadow | |
2260 | { | |
aaad4303 | 2261 | u32 value[32]; |
9cba46dc | 2262 | } __attribute__((packed)) hfa384x_pdr_hfa3861_shadow_t; |
00b3ed16 GKH |
2263 | |
2264 | typedef struct hfa384x_pdr_hfa3861_ifrf | |
2265 | { | |
aaad4303 | 2266 | u32 value[20]; |
9cba46dc | 2267 | } __attribute__((packed)) hfa384x_pdr_hfa3861_ifrf_t; |
00b3ed16 GKH |
2268 | |
2269 | typedef struct hfa384x_pdr_hfa3861_chcalsp | |
2270 | { | |
aaad4303 | 2271 | u16 value[14]; |
9cba46dc | 2272 | } __attribute__((packed)) hfa384x_pdr_hfa3861_chcalsp_t; |
00b3ed16 GKH |
2273 | |
2274 | typedef struct hfa384x_pdr_hfa3861_chcali | |
2275 | { | |
aaad4303 | 2276 | u16 value[17]; |
9cba46dc | 2277 | } __attribute__((packed)) hfa384x_pdr_hfa3861_chcali_t; |
00b3ed16 GKH |
2278 | |
2279 | typedef struct hfa384x_pdr_hfa3861_nic_config | |
2280 | { | |
aaad4303 | 2281 | u16 config_bitmap; |
9cba46dc | 2282 | } __attribute__((packed)) hfa384x_pdr_nic_config_t; |
00b3ed16 GKH |
2283 | |
2284 | typedef struct hfa384x_pdr_hfo_delay | |
2285 | { | |
aaad4303 | 2286 | u8 hfo_delay; |
9cba46dc | 2287 | } __attribute__((packed)) hfa384x_hfo_delay_t; |
00b3ed16 GKH |
2288 | |
2289 | typedef struct hfa384x_pdr_hfa3861_manf_testsp | |
2290 | { | |
aaad4303 | 2291 | u16 value[30]; |
9cba46dc | 2292 | } __attribute__((packed)) hfa384x_pdr_hfa3861_manf_testsp_t; |
00b3ed16 GKH |
2293 | |
2294 | typedef struct hfa384x_pdr_hfa3861_manf_testi | |
2295 | { | |
aaad4303 | 2296 | u16 value[30]; |
9cba46dc | 2297 | } __attribute__((packed)) hfa384x_pdr_hfa3861_manf_testi_t; |
00b3ed16 GKH |
2298 | |
2299 | typedef struct hfa384x_end_of_pda | |
2300 | { | |
aaad4303 | 2301 | u16 crc; |
9cba46dc | 2302 | } __attribute__((packed)) hfa384x_pdr_end_of_pda_t; |
00b3ed16 GKH |
2303 | |
2304 | typedef struct hfa384x_pdrec | |
2305 | { | |
aaad4303 SP |
2306 | u16 len; /* in words */ |
2307 | u16 code; | |
00b3ed16 GKH |
2308 | union pdr { |
2309 | hfa384x_pdr_pcb_partnum_t pcb_partnum; | |
2310 | hfa384x_pdr_pcb_tracenum_t pcb_tracenum; | |
2311 | hfa384x_pdr_nic_serial_t nic_serial; | |
2312 | hfa384x_pdr_mkk_measurements_t mkk_measurements; | |
2313 | hfa384x_pdr_nic_ramsize_t nic_ramsize; | |
2314 | hfa384x_pdr_mfisuprange_t mfisuprange; | |
2315 | hfa384x_pdr_cfisuprange_t cfisuprange; | |
2316 | hfa384x_pdr_nicid_t nicid; | |
2317 | hfa384x_pdr_refdac_measurements_t refdac_measurements; | |
2318 | hfa384x_pdr_vgdac_measurements_t vgdac_measurements; | |
2319 | hfa384x_pdr_level_compc_measurements_t level_compc_measurements; | |
2320 | hfa384x_pdr_mac_address_t mac_address; | |
2321 | hfa384x_pdr_mkk_callname_t mkk_callname; | |
2322 | hfa384x_pdr_regdomain_t regdomain; | |
2323 | hfa384x_pdr_allowed_channel_t allowed_channel; | |
2324 | hfa384x_pdr_default_channel_t default_channel; | |
2325 | hfa384x_pdr_privacy_option_t privacy_option; | |
2326 | hfa384x_pdr_temptype_t temptype; | |
2327 | hfa384x_pdr_refdac_setup_t refdac_setup; | |
2328 | hfa384x_pdr_vgdac_setup_t vgdac_setup; | |
2329 | hfa384x_pdr_level_comp_setup_t level_comp_setup; | |
2330 | hfa384x_pdr_trimdac_setup_t trimdac_setup; | |
2331 | hfa384x_pdr_ifr_setting_t ifr_setting; | |
2332 | hfa384x_pdr_rfr_setting_t rfr_setting; | |
2333 | hfa384x_pdr_hfa3861_baseline_t hfa3861_baseline; | |
2334 | hfa384x_pdr_hfa3861_shadow_t hfa3861_shadow; | |
2335 | hfa384x_pdr_hfa3861_ifrf_t hfa3861_ifrf; | |
2336 | hfa384x_pdr_hfa3861_chcalsp_t hfa3861_chcalsp; | |
2337 | hfa384x_pdr_hfa3861_chcali_t hfa3861_chcali; | |
2338 | hfa384x_pdr_nic_config_t nic_config; | |
2339 | hfa384x_hfo_delay_t hfo_delay; | |
2340 | hfa384x_pdr_hfa3861_manf_testsp_t hfa3861_manf_testsp; | |
2341 | hfa384x_pdr_hfa3861_manf_testi_t hfa3861_manf_testi; | |
2342 | hfa384x_pdr_end_of_pda_t end_of_pda; | |
2343 | ||
2344 | } data; | |
9cba46dc | 2345 | } __attribute__((packed)) hfa384x_pdrec_t; |
00b3ed16 GKH |
2346 | |
2347 | ||
2348 | #ifdef __KERNEL__ | |
2349 | /*-------------------------------------------------------------------- | |
2350 | --- MAC state structure, argument to all functions -- | |
2351 | --- Also, a collection of support types -- | |
2352 | --------------------------------------------------------------------*/ | |
2353 | typedef struct hfa384x_statusresult | |
2354 | { | |
aaad4303 SP |
2355 | u16 status; |
2356 | u16 resp0; | |
2357 | u16 resp1; | |
2358 | u16 resp2; | |
00b3ed16 GKH |
2359 | } hfa384x_cmdresult_t; |
2360 | ||
00b3ed16 GKH |
2361 | /* USB Control Exchange (CTLX): |
2362 | * A queue of the structure below is maintained for all of the | |
2363 | * Request/Response type USB packets supported by Prism2. | |
2364 | */ | |
2365 | /* The following hfa384x_* structures are arguments to | |
2366 | * the usercb() for the different CTLX types. | |
2367 | */ | |
2368 | typedef hfa384x_cmdresult_t hfa384x_wridresult_t; | |
2369 | typedef hfa384x_cmdresult_t hfa384x_wmemresult_t; | |
2370 | ||
2371 | typedef struct hfa384x_rridresult | |
2372 | { | |
aaad4303 | 2373 | u16 rid; |
00b3ed16 | 2374 | const void *riddata; |
aaad4303 | 2375 | unsigned int riddata_len; |
00b3ed16 GKH |
2376 | } hfa384x_rridresult_t; |
2377 | ||
2378 | enum ctlx_state { | |
2379 | CTLX_START = 0, /* Start state, not queued */ | |
2380 | ||
2381 | CTLX_COMPLETE, /* CTLX successfully completed */ | |
2382 | CTLX_REQ_FAILED, /* OUT URB completed w/ error */ | |
2383 | ||
2384 | CTLX_PENDING, /* Queued, data valid */ | |
2385 | CTLX_REQ_SUBMITTED, /* OUT URB submitted */ | |
2386 | CTLX_REQ_COMPLETE, /* OUT URB complete */ | |
2387 | CTLX_RESP_COMPLETE /* IN URB received */ | |
2388 | }; | |
2389 | typedef enum ctlx_state CTLX_STATE; | |
2390 | ||
2391 | struct hfa384x_usbctlx; | |
2392 | struct hfa384x; | |
2393 | ||
2394 | typedef void (*ctlx_cmdcb_t)( struct hfa384x*, const struct hfa384x_usbctlx* ); | |
2395 | ||
2396 | typedef void (*ctlx_usercb_t)( | |
2397 | struct hfa384x *hw, | |
2398 | void *ctlxresult, | |
2399 | void *usercb_data); | |
2400 | ||
2401 | typedef struct hfa384x_usbctlx | |
2402 | { | |
2403 | struct list_head list; | |
2404 | ||
2405 | size_t outbufsize; | |
2406 | hfa384x_usbout_t outbuf; /* pkt buf for OUT */ | |
2407 | hfa384x_usbin_t inbuf; /* pkt buf for IN(a copy) */ | |
2408 | ||
2409 | CTLX_STATE state; /* Tracks running state */ | |
2410 | ||
2411 | struct completion done; | |
2412 | volatile int reapable; /* Food for the reaper task */ | |
2413 | ||
2414 | ctlx_cmdcb_t cmdcb; /* Async command callback */ | |
2415 | ctlx_usercb_t usercb; /* Async user callback, */ | |
2416 | void *usercb_data; /* at CTLX completion */ | |
2417 | ||
2418 | int variant; /* Identifies cmd variant */ | |
2419 | } hfa384x_usbctlx_t; | |
2420 | ||
2421 | typedef struct hfa384x_usbctlxq | |
2422 | { | |
2423 | spinlock_t lock; | |
2424 | struct list_head pending; | |
2425 | struct list_head active; | |
2426 | struct list_head completing; | |
2427 | struct list_head reapable; | |
2428 | } hfa384x_usbctlxq_t; | |
00b3ed16 GKH |
2429 | |
2430 | typedef struct hfa484x_metacmd | |
2431 | { | |
aaad4303 | 2432 | u16 cmd; |
00b3ed16 | 2433 | |
aaad4303 SP |
2434 | u16 parm0; |
2435 | u16 parm1; | |
2436 | u16 parm2; | |
00b3ed16 | 2437 | |
00b3ed16 GKH |
2438 | hfa384x_cmdresult_t result; |
2439 | } hfa384x_metacmd_t; | |
2440 | ||
2441 | #define MAX_PRISM2_GRP_ADDR 16 | |
2442 | #define MAX_GRP_ADDR 32 | |
2443 | #define WLAN_COMMENT_MAX 80 /* Max. length of user comment string. */ | |
2444 | ||
2445 | #define MM_SAT_PCF (BIT14) | |
2446 | #define MM_GCSD_PCF (BIT15) | |
2447 | #define MM_GCSD_PCF_EB (BIT14 | BIT15) | |
2448 | ||
2449 | #define WLAN_STATE_STOPPED 0 /* Network is not active. */ | |
2450 | #define WLAN_STATE_STARTED 1 /* Network has been started. */ | |
2451 | ||
2452 | #define WLAN_AUTH_MAX 60 /* Max. # of authenticated stations. */ | |
2453 | #define WLAN_ACCESS_MAX 60 /* Max. # of stations in an access list. */ | |
2454 | #define WLAN_ACCESS_NONE 0 /* No stations may be authenticated. */ | |
2455 | #define WLAN_ACCESS_ALL 1 /* All stations may be authenticated. */ | |
2456 | #define WLAN_ACCESS_ALLOW 2 /* Authenticate only "allowed" stations. */ | |
2457 | #define WLAN_ACCESS_DENY 3 /* Do not authenticate "denied" stations. */ | |
2458 | ||
2459 | /* XXX These are going away ASAP */ | |
2460 | typedef struct prism2sta_authlist | |
2461 | { | |
aaad4303 SP |
2462 | unsigned int cnt; |
2463 | u8 addr[WLAN_AUTH_MAX][WLAN_ADDR_LEN]; | |
2464 | u8 assoc[WLAN_AUTH_MAX]; | |
00b3ed16 GKH |
2465 | } prism2sta_authlist_t; |
2466 | ||
2467 | typedef struct prism2sta_accesslist | |
2468 | { | |
aaad4303 SP |
2469 | unsigned int modify; |
2470 | unsigned int cnt; | |
2471 | u8 addr[WLAN_ACCESS_MAX][WLAN_ADDR_LEN]; | |
2472 | unsigned int cnt1; | |
2473 | u8 addr1[WLAN_ACCESS_MAX][WLAN_ADDR_LEN]; | |
00b3ed16 GKH |
2474 | } prism2sta_accesslist_t; |
2475 | ||
2476 | typedef struct hfa384x | |
2477 | { | |
00b3ed16 GKH |
2478 | /* USB support data */ |
2479 | struct usb_device *usb; | |
2480 | struct urb rx_urb; | |
2481 | struct sk_buff *rx_urb_skb; | |
2482 | struct urb tx_urb; | |
2483 | struct urb ctlx_urb; | |
2484 | hfa384x_usbout_t txbuff; | |
2485 | hfa384x_usbctlxq_t ctlxq; | |
2486 | struct timer_list reqtimer; | |
2487 | struct timer_list resptimer; | |
2488 | ||
2489 | struct timer_list throttle; | |
2490 | ||
2491 | struct tasklet_struct reaper_bh; | |
2492 | struct tasklet_struct completion_bh; | |
2493 | ||
2494 | struct work_struct usb_work; | |
2495 | ||
2496 | unsigned long usb_flags; | |
2497 | #define THROTTLE_RX 0 | |
2498 | #define THROTTLE_TX 1 | |
2499 | #define WORK_RX_HALT 2 | |
2500 | #define WORK_TX_HALT 3 | |
2501 | #define WORK_RX_RESUME 4 | |
2502 | #define WORK_TX_RESUME 5 | |
2503 | ||
2504 | unsigned short req_timer_done:1; | |
2505 | unsigned short resp_timer_done:1; | |
2506 | ||
2507 | int endp_in; | |
2508 | int endp_out; | |
00b3ed16 GKH |
2509 | |
2510 | int sniff_fcs; | |
2511 | int sniff_channel; | |
2512 | int sniff_truncate; | |
2513 | int sniffhdr; | |
2514 | ||
2515 | wait_queue_head_t cmdq; /* wait queue itself */ | |
2516 | ||
2517 | /* Controller state */ | |
aaad4303 SP |
2518 | u32 state; |
2519 | u32 isap; | |
2520 | u8 port_enabled[HFA384x_NUMPORTS_MAX]; | |
00b3ed16 GKH |
2521 | |
2522 | /* Download support */ | |
aaad4303 | 2523 | unsigned int dlstate; |
00b3ed16 | 2524 | hfa384x_downloadbuffer_t bufinfo; |
aaad4303 | 2525 | u16 dltimeout; |
00b3ed16 | 2526 | |
00b3ed16 GKH |
2527 | int scanflag; /* to signal scan comlete */ |
2528 | int join_ap; /* are we joined to a specific ap */ | |
2529 | int join_retries; /* number of join retries till we fail */ | |
2530 | hfa384x_JoinRequest_data_t joinreq; /* join request saved data */ | |
2531 | ||
2532 | wlandevice_t *wlandev; | |
2533 | /* Timer to allow for the deferred processing of linkstatus messages */ | |
2534 | struct work_struct link_bh; | |
2535 | ||
2536 | struct work_struct commsqual_bh; | |
2537 | hfa384x_commsquality_t qual; | |
2538 | struct timer_list commsqual_timer; | |
2539 | ||
aaad4303 SP |
2540 | u16 link_status; |
2541 | u16 link_status_new; | |
00b3ed16 GKH |
2542 | struct sk_buff_head authq; |
2543 | ||
2544 | /* And here we have stuff that used to be in priv */ | |
2545 | ||
2546 | /* State variables */ | |
aaad4303 SP |
2547 | unsigned int presniff_port_type; |
2548 | u16 presniff_wepflags; | |
2549 | u32 dot11_desired_bss_type; | |
00b3ed16 GKH |
2550 | |
2551 | int dbmadjust; | |
2552 | ||
2553 | /* Group Addresses - right now, there are up to a total | |
2554 | of MAX_GRP_ADDR group addresses */ | |
aaad4303 SP |
2555 | u8 dot11_grp_addr[MAX_GRP_ADDR][WLAN_ADDR_LEN]; |
2556 | unsigned int dot11_grpcnt; | |
00b3ed16 GKH |
2557 | |
2558 | /* Component Identities */ | |
2559 | hfa384x_compident_t ident_nic; | |
2560 | hfa384x_compident_t ident_pri_fw; | |
2561 | hfa384x_compident_t ident_sta_fw; | |
2562 | hfa384x_compident_t ident_ap_fw; | |
aaad4303 | 2563 | u16 mm_mods; |
00b3ed16 GKH |
2564 | |
2565 | /* Supplier compatibility ranges */ | |
2566 | hfa384x_caplevel_t cap_sup_mfi; | |
2567 | hfa384x_caplevel_t cap_sup_cfi; | |
2568 | hfa384x_caplevel_t cap_sup_pri; | |
2569 | hfa384x_caplevel_t cap_sup_sta; | |
2570 | hfa384x_caplevel_t cap_sup_ap; | |
2571 | ||
2572 | /* Actor compatibility ranges */ | |
2573 | hfa384x_caplevel_t cap_act_pri_cfi; /* pri f/w to controller interface */ | |
2574 | hfa384x_caplevel_t cap_act_sta_cfi; /* sta f/w to controller interface */ | |
2575 | hfa384x_caplevel_t cap_act_sta_mfi; /* sta f/w to modem interface */ | |
2576 | hfa384x_caplevel_t cap_act_ap_cfi; /* ap f/w to controller interface */ | |
2577 | hfa384x_caplevel_t cap_act_ap_mfi; /* ap f/w to modem interface */ | |
2578 | ||
aaad4303 | 2579 | u32 psusercount; /* Power save user count. */ |
00b3ed16 | 2580 | hfa384x_CommTallies32_t tallies; /* Communication tallies. */ |
aaad4303 | 2581 | u8 comment[WLAN_COMMENT_MAX+1]; /* User comment */ |
00b3ed16 GKH |
2582 | |
2583 | /* Channel Info request results (AP only) */ | |
2584 | struct { | |
2585 | atomic_t done; | |
aaad4303 | 2586 | u8 count; |
00b3ed16 GKH |
2587 | hfa384x_ChInfoResult_t results; |
2588 | } channel_info; | |
2589 | ||
2590 | hfa384x_InfFrame_t *scanresults; | |
2591 | ||
2592 | ||
2593 | prism2sta_authlist_t authlist; /* Authenticated station list. */ | |
aaad4303 | 2594 | unsigned int accessmode; /* Access mode. */ |
00b3ed16 GKH |
2595 | prism2sta_accesslist_t allow; /* Allowed station list. */ |
2596 | prism2sta_accesslist_t deny; /* Denied station list. */ | |
2597 | ||
2598 | } hfa384x_t; | |
2599 | ||
2600 | /*=============================================================*/ | |
2601 | /*--- Function Declarations -----------------------------------*/ | |
2602 | /*=============================================================*/ | |
00b3ed16 GKH |
2603 | void |
2604 | hfa384x_create( | |
2605 | hfa384x_t *hw, | |
2606 | struct usb_device *usb); | |
00b3ed16 GKH |
2607 | |
2608 | void hfa384x_destroy(hfa384x_t *hw); | |
2609 | ||
00b3ed16 GKH |
2610 | int |
2611 | hfa384x_corereset( hfa384x_t *hw, int holdtime, int settletime, int genesis); | |
2612 | int | |
2613 | hfa384x_drvr_chinforesults( hfa384x_t *hw); | |
2614 | int | |
2615 | hfa384x_drvr_commtallies( hfa384x_t *hw); | |
2616 | int | |
aaad4303 | 2617 | hfa384x_drvr_disable(hfa384x_t *hw, u16 macport); |
00b3ed16 | 2618 | int |
aaad4303 | 2619 | hfa384x_drvr_enable(hfa384x_t *hw, u16 macport); |
00b3ed16 GKH |
2620 | int |
2621 | hfa384x_drvr_flashdl_enable(hfa384x_t *hw); | |
2622 | int | |
2623 | hfa384x_drvr_flashdl_disable(hfa384x_t *hw); | |
2624 | int | |
aaad4303 | 2625 | hfa384x_drvr_flashdl_write(hfa384x_t *hw, u32 daddr, void* buf, u32 len); |
00b3ed16 | 2626 | int |
aaad4303 | 2627 | hfa384x_drvr_getconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len); |
00b3ed16 | 2628 | int |
aaad4303 | 2629 | hfa384x_drvr_handover( hfa384x_t *hw, u8 *addr); |
00b3ed16 GKH |
2630 | int |
2631 | hfa384x_drvr_hostscanresults( hfa384x_t *hw); | |
2632 | int | |
2633 | hfa384x_drvr_low_level(hfa384x_t *hw, hfa384x_metacmd_t *cmd); | |
2634 | int | |
aaad4303 | 2635 | hfa384x_drvr_mmi_read(hfa384x_t *hw, u32 address, u32 *result); |
00b3ed16 | 2636 | int |
aaad4303 | 2637 | hfa384x_drvr_mmi_write(hfa384x_t *hw, u32 address, u32 data); |
00b3ed16 | 2638 | int |
aaad4303 | 2639 | hfa384x_drvr_ramdl_enable(hfa384x_t *hw, u32 exeaddr); |
00b3ed16 GKH |
2640 | int |
2641 | hfa384x_drvr_ramdl_disable(hfa384x_t *hw); | |
2642 | int | |
aaad4303 | 2643 | hfa384x_drvr_ramdl_write(hfa384x_t *hw, u32 daddr, void* buf, u32 len); |
00b3ed16 | 2644 | int |
aaad4303 | 2645 | hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, unsigned int len); |
00b3ed16 GKH |
2646 | int |
2647 | hfa384x_drvr_scanresults( hfa384x_t *hw); | |
2648 | ||
2649 | int | |
aaad4303 | 2650 | hfa384x_drvr_setconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len); |
00b3ed16 GKH |
2651 | |
2652 | static inline int | |
aaad4303 | 2653 | hfa384x_drvr_getconfig16(hfa384x_t *hw, u16 rid, void *val) |
00b3ed16 GKH |
2654 | { |
2655 | int result = 0; | |
aaad4303 | 2656 | result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u16)); |
00b3ed16 | 2657 | if ( result == 0 ) { |
aaad4303 | 2658 | *((u16*)val) = hfa384x2host_16(*((u16*)val)); |
00b3ed16 GKH |
2659 | } |
2660 | return result; | |
2661 | } | |
2662 | ||
2663 | static inline int | |
aaad4303 | 2664 | hfa384x_drvr_getconfig32(hfa384x_t *hw, u16 rid, void *val) |
00b3ed16 GKH |
2665 | { |
2666 | int result = 0; | |
2667 | ||
aaad4303 | 2668 | result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u32)); |
00b3ed16 | 2669 | if ( result == 0 ) { |
aaad4303 | 2670 | *((u32*)val) = hfa384x2host_32(*((u32*)val)); |
00b3ed16 GKH |
2671 | } |
2672 | ||
2673 | return result; | |
2674 | } | |
2675 | ||
2676 | static inline int | |
aaad4303 | 2677 | hfa384x_drvr_setconfig16(hfa384x_t *hw, u16 rid, u16 val) |
00b3ed16 | 2678 | { |
aaad4303 | 2679 | u16 value = host2hfa384x_16(val); |
00b3ed16 GKH |
2680 | return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value)); |
2681 | } | |
2682 | ||
2683 | static inline int | |
aaad4303 | 2684 | hfa384x_drvr_setconfig32(hfa384x_t *hw, u16 rid, u32 val) |
00b3ed16 | 2685 | { |
aaad4303 | 2686 | u32 value = host2hfa384x_32(val); |
00b3ed16 GKH |
2687 | return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value)); |
2688 | } | |
2689 | ||
00b3ed16 GKH |
2690 | int |
2691 | hfa384x_drvr_getconfig_async(hfa384x_t *hw, | |
aaad4303 | 2692 | u16 rid, |
00b3ed16 GKH |
2693 | ctlx_usercb_t usercb, |
2694 | void *usercb_data); | |
2695 | ||
2696 | int | |
2697 | hfa384x_drvr_setconfig_async(hfa384x_t *hw, | |
aaad4303 | 2698 | u16 rid, |
00b3ed16 | 2699 | void *buf, |
aaad4303 | 2700 | u16 len, |
00b3ed16 GKH |
2701 | ctlx_usercb_t usercb, |
2702 | void *usercb_data); | |
00b3ed16 GKH |
2703 | |
2704 | static inline int | |
aaad4303 | 2705 | hfa384x_drvr_setconfig16_async(hfa384x_t *hw, u16 rid, u16 val) |
00b3ed16 | 2706 | { |
aaad4303 | 2707 | u16 value = host2hfa384x_16(val); |
00b3ed16 GKH |
2708 | return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value), |
2709 | NULL , NULL); | |
2710 | } | |
2711 | ||
2712 | static inline int | |
aaad4303 | 2713 | hfa384x_drvr_setconfig32_async(hfa384x_t *hw, u16 rid, u32 val) |
00b3ed16 | 2714 | { |
aaad4303 | 2715 | u32 value = host2hfa384x_32(val); |
00b3ed16 GKH |
2716 | return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value), |
2717 | NULL , NULL); | |
2718 | } | |
2719 | ||
2720 | ||
2721 | int | |
2722 | hfa384x_drvr_start(hfa384x_t *hw); | |
2723 | int | |
2724 | hfa384x_drvr_stop(hfa384x_t *hw); | |
2725 | int | |
2726 | hfa384x_drvr_txframe(hfa384x_t *hw, struct sk_buff *skb, p80211_hdr_t *p80211_hdr, p80211_metawep_t *p80211_wep); | |
2727 | void | |
2728 | hfa384x_tx_timeout(wlandevice_t *wlandev); | |
2729 | ||
2730 | int | |
2731 | hfa384x_cmd_initialize(hfa384x_t *hw); | |
2732 | int | |
aaad4303 | 2733 | hfa384x_cmd_enable(hfa384x_t *hw, u16 macport); |
00b3ed16 | 2734 | int |
aaad4303 | 2735 | hfa384x_cmd_disable(hfa384x_t *hw, u16 macport); |
00b3ed16 GKH |
2736 | int |
2737 | hfa384x_cmd_diagnose(hfa384x_t *hw); | |
2738 | int | |
aaad4303 | 2739 | hfa384x_cmd_allocate(hfa384x_t *hw, u16 len); |
00b3ed16 | 2740 | int |
aaad4303 | 2741 | hfa384x_cmd_transmit(hfa384x_t *hw, u16 reclaim, u16 qos, u16 fid); |
00b3ed16 | 2742 | int |
aaad4303 | 2743 | hfa384x_cmd_clearpersist(hfa384x_t *hw, u16 fid); |
00b3ed16 | 2744 | int |
aaad4303 | 2745 | hfa384x_cmd_access(hfa384x_t *hw, u16 write, u16 rid, void *buf, u16 len); |
00b3ed16 | 2746 | int |
aaad4303 | 2747 | hfa384x_cmd_monitor(hfa384x_t *hw, u16 enable); |
00b3ed16 GKH |
2748 | int |
2749 | hfa384x_cmd_download( | |
2750 | hfa384x_t *hw, | |
aaad4303 SP |
2751 | u16 mode, |
2752 | u16 lowaddr, | |
2753 | u16 highaddr, | |
2754 | u16 codelen); | |
00b3ed16 GKH |
2755 | int |
2756 | hfa384x_cmd_aux_enable(hfa384x_t *hw, int force); | |
2757 | int | |
2758 | hfa384x_cmd_aux_disable(hfa384x_t *hw); | |
2759 | int | |
2760 | hfa384x_copy_from_bap( | |
2761 | hfa384x_t *hw, | |
aaad4303 SP |
2762 | u16 bap, |
2763 | u16 id, | |
2764 | u16 offset, | |
00b3ed16 | 2765 | void *buf, |
aaad4303 | 2766 | unsigned int len); |
00b3ed16 GKH |
2767 | int |
2768 | hfa384x_copy_to_bap( | |
2769 | hfa384x_t *hw, | |
aaad4303 SP |
2770 | u16 bap, |
2771 | u16 id, | |
2772 | u16 offset, | |
00b3ed16 | 2773 | void *buf, |
aaad4303 | 2774 | unsigned int len); |
00b3ed16 GKH |
2775 | void |
2776 | hfa384x_copy_from_aux( | |
2777 | hfa384x_t *hw, | |
aaad4303 SP |
2778 | u32 cardaddr, |
2779 | u32 auxctl, | |
00b3ed16 | 2780 | void *buf, |
aaad4303 | 2781 | unsigned int len); |
00b3ed16 GKH |
2782 | void |
2783 | hfa384x_copy_to_aux( | |
2784 | hfa384x_t *hw, | |
aaad4303 SP |
2785 | u32 cardaddr, |
2786 | u32 auxctl, | |
00b3ed16 | 2787 | void *buf, |
aaad4303 | 2788 | unsigned int len); |
00b3ed16 | 2789 | |
00b3ed16 GKH |
2790 | #endif /* __KERNEL__ */ |
2791 | ||
2792 | #endif /* _HFA384x_H */ |