[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / winbond / wb35tx_s.h

#ifndef __WINBOND_WB35_TX_S_H
#define __WINBOND_WB35_TX_S_H

#include "mds_s.h"

//====================================
// IS89C35 Tx related definition
//====================================
#define TX_INTERFACE			0	// Interface 1
#define TX_PIPE					3	// endpoint 4
#define TX_INTERRUPT			1	// endpoint 2
#define MAX_INTERRUPT_LENGTH	64	// It must be 64 for EP2 hardware


//====================================
// Internal variable for module
//====================================


struct wb35_tx {
	// For Tx buffer
	u8	TxBuffer[ MAX_USB_TX_BUFFER_NUMBER ][ MAX_USB_TX_BUFFER ];

	// For Interrupt pipe
	u8	EP2_buf[MAX_INTERRUPT_LENGTH];

	atomic_t	TxResultCount;// For thread control of EP2 931130.4.m
	atomic_t	TxFireCounter;// For thread control of EP4 931130.4.n
	u32			ByteTransfer;

	u32	    TxSendIndex;// The next index of Mds array to be sent
	u32	    EP2vm_state; // for EP2vm state
	u32	    EP4vm_state; // for EP4vm state
	u32	    tx_halt; // Stopping VM

	struct urb *				Tx4Urb;
	struct urb *				Tx2Urb;

	int		EP2VM_status;
	int		EP4VM_status;

	u32	TxFillCount; // 20060928
	u32	TxTimer; // 20060928 Add if sending packet not great than 13
};

#endif
Commit	Line	Data
80aba536 PE	1	#ifndef __WINBOND_WB35_TX_S_H
	2	#define __WINBOND_WB35_TX_S_H
	3
9ce922fd	4	#include "mds_s.h"
80aba536	5
66101de1 PM	6	//====================================
	7	// IS89C35 Tx related definition
	8	//====================================
	9	#define TX_INTERFACE 0 // Interface 1
	10	#define TX_PIPE 3 // endpoint 4
	11	#define TX_INTERRUPT 1 // endpoint 2
	12	#define MAX_INTERRUPT_LENGTH 64 // It must be 64 for EP2 hardware
	13
	14
	15
	16	//====================================
	17	// Internal variable for module
	18	//====================================
	19
	20
eb62f3ea	21	struct wb35_tx {
66101de1 PM	22	// For Tx buffer
	23	u8 TxBuffer[ MAX_USB_TX_BUFFER_NUMBER ][ MAX_USB_TX_BUFFER ];
	24
	25	// For Interrupt pipe
	26	u8 EP2_buf[MAX_INTERRUPT_LENGTH];
	27
44e8541c PE	28	atomic_t TxResultCount;// For thread control of EP2 931130.4.m
44e8541c PE	29	atomic_t TxFireCounter;// For thread control of EP4 931130.4.n
66101de1 PM	30	u32 ByteTransfer;
	31
	32	u32 TxSendIndex;// The next index of Mds array to be sent
	33	u32 EP2vm_state; // for EP2vm state
	34	u32 EP4vm_state; // for EP4vm state
	35	u32 tx_halt; // Stopping VM
	36
	37	struct urb * Tx4Urb;
	38	struct urb * Tx2Urb;
	39
	40	int EP2VM_status;
	41	int EP4VM_status;
	42
	43	u32 TxFillCount; // 20060928
	44	u32 TxTimer; // 20060928 Add if sending packet not great than 13
eb62f3ea	45	};
66101de1	46
80aba536	47	#endif