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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / vt6655 / desc.h
CommitLineData
5449c685
FB		 1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: desc.h
20 *
21 * Purpose:The header file of descriptor
22 *
23 * Revision History:
24 *
25 * Author: Tevin Chen
26 *
27 * Date: May 21, 1996
28 *
29 */
30
5449c685
FB		 31#ifndef __DESC_H__
32#define __DESC_H__
33
34#include <linux/types.h>
35#include <linux/mm.h>
5449c685 36#include "ttype.h"
5449c685 37#include "tether.h"
612822f5 38
5449c685
FB		 39/*--------------------- Export Definitions -------------------------*/
40
41#define B_OWNED_BY_CHIP 1 //
42#define B_OWNED_BY_HOST 0 //
43
44//
45// Bits in the RSR register
46//
47#define RSR_ADDRBROAD 0x80 // 1000 0000
48#define RSR_ADDRMULTI 0x40 // 0100 0000
49#define RSR_ADDRUNI 0x00 // 0000 0000
50#define RSR_IVLDTYP 0x20 // 0010 0000 , invalid packet type
51#define RSR_IVLDLEN 0x10 // 0001 0000 , invalid len (> 2312 byte)
52#define RSR_BSSIDOK 0x08 // 0000 1000
53#define RSR_CRCOK 0x04 // 0000 0100
54#define RSR_BCNSSIDOK 0x02 // 0000 0010
55#define RSR_ADDROK 0x01 // 0000 0001
56
57//
58// Bits in the new RSR register
59//
60#define NEWRSR_DECRYPTOK 0x10 // 0001 0000
61#define NEWRSR_CFPIND 0x08 // 0000 1000
62#define NEWRSR_HWUTSF 0x04 // 0000 0100
63#define NEWRSR_BCNHITAID 0x02 // 0000 0010
64#define NEWRSR_BCNHITAID0 0x01 // 0000 0001
65
66//
67// Bits in the TSR0 register
68//
69#define TSR0_PWRSTS1_2 0xC0 // 1100 0000
70#define TSR0_PWRSTS7 0x20 // 0010 0000
71#define TSR0_NCR 0x1F // 0001 1111
72
73//
74// Bits in the TSR1 register
75//
76#define TSR1_TERR 0x80 // 1000 0000
77#define TSR1_PWRSTS4_6 0x70 // 0111 0000
78#define TSR1_RETRYTMO 0x08 // 0000 1000
79#define TSR1_TMO 0x04 // 0000 0100
80#define TSR1_PWRSTS3 0x02 // 0000 0010
81#define ACK_DATA 0x01 // 0000 0000
82
83//
84// Bits in the TCR register
85//
86#define EDMSDU 0x04 // 0000 0100 end of sdu
87#define TCR_EDP 0x02 // 0000 0010 end of packet
88#define TCR_STP 0x01 // 0000 0001 start of packet
89
90// max transmit or receive buffer size
91#define CB_MAX_BUF_SIZE 2900U // max buffer size
92 // NOTE: must be multiple of 4
93#define CB_MAX_TX_BUF_SIZE CB_MAX_BUF_SIZE // max Tx buffer size
94#define CB_MAX_RX_BUF_SIZE_NORMAL CB_MAX_BUF_SIZE // max Rx buffer size when not use Multi-RD
95
96#define CB_BEACON_BUF_SIZE 512U // default beacon buffer size
97
98#define CB_MAX_RX_DESC 128 // max # of descriptor
99#define CB_MIN_RX_DESC 16 // min # of rx descriptor
100#define CB_MAX_TX_DESC 64 // max # of descriptor
101#define CB_MIN_TX_DESC 16 // min # of tx descriptor
102
103#define CB_MAX_RECEIVED_PACKETS 16 // max # of received packets at one time
104 // limit our receive routine to indicating
105 // this many at a time for 2 reasons:
106 // 1. driver flow control to protocol layer
107 // 2. limit the time used in ISR routine
108
109#define CB_EXTRA_RD_NUM 32 // default # of Extra RD
110#define CB_RD_NUM 32 // default # of RD
111#define CB_TD_NUM 32 // default # of TD
112
113
114// max number of physical segments
115// in a single NDIS packet. Above this threshold, the packet
116// is copied into a single physically contiguous buffer
117#define CB_MAX_SEGMENT 4
118
119#define CB_MIN_MAP_REG_NUM 4
120#define CB_MAX_MAP_REG_NUM CB_MAX_TX_DESC
121
122#define CB_PROTOCOL_RESERVED_SECTION 16
123
124
612822f5 125
5449c685
FB		 126// if retrys excess 15 times , tx will abort, and
127// if tx fifo underflow, tx will fail
128// we should try to resend it
129#define CB_MAX_TX_ABORT_RETRY 3
130
131#ifdef __BIG_ENDIAN
132
133// WMAC definition FIFO Control
134#define FIFOCTL_AUTO_FB_1 0x0010 // 0001 0000 0000 0000
135#define FIFOCTL_AUTO_FB_0 0x0008 // 0000 1000 0000 0000
136#define FIFOCTL_GRPACK 0x0004 // 0000 0100 0000 0000
137#define FIFOCTL_11GA 0x0003 // 0000 0011 0000 0000
138#define FIFOCTL_11GB 0x0002 // 0000 0010 0000 0000
139#define FIFOCTL_11B 0x0001 // 0000 0001 0000 0000
140#define FIFOCTL_11A 0x0000 // 0000 0000 0000 0000
141#define FIFOCTL_RTS 0x8000 // 0000 0000 1000 0000
142#define FIFOCTL_ISDMA0 0x4000 // 0000 0000 0100 0000
143#define FIFOCTL_GENINT 0x2000 // 0000 0000 0010 0000
144#define FIFOCTL_TMOEN 0x1000 // 0000 0000 0001 0000
145#define FIFOCTL_LRETRY 0x0800 // 0000 0000 0000 1000
146#define FIFOCTL_CRCDIS 0x0400 // 0000 0000 0000 0100
147#define FIFOCTL_NEEDACK 0x0200 // 0000 0000 0000 0010
148#define FIFOCTL_LHEAD 0x0100 // 0000 0000 0000 0001
149
150//WMAC definition Frag Control
151#define FRAGCTL_AES 0x0003 // 0000 0011 0000 0000
152#define FRAGCTL_TKIP 0x0002 // 0000 0010 0000 0000
153#define FRAGCTL_LEGACY 0x0001 // 0000 0001 0000 0000
154#define FRAGCTL_NONENCRYPT 0x0000 // 0000 0000 0000 0000
155//#define FRAGCTL_AC3 0x0C00 // 0000 0000 0000 1100
156//#define FRAGCTL_AC2 0x0800 // 0000 0000 0000 1000
157//#define FRAGCTL_AC1 0x0400 // 0000 0000 0000 0100
158//#define FRAGCTL_AC0 0x0000 // 0000 0000 0000 0000
159#define FRAGCTL_ENDFRAG 0x0300 // 0000 0000 0000 0011
160#define FRAGCTL_MIDFRAG 0x0200 // 0000 0000 0000 0010
161#define FRAGCTL_STAFRAG 0x0100 // 0000 0000 0000 0001
162#define FRAGCTL_NONFRAG 0x0000 // 0000 0000 0000 0000
163
164#else
165
166#define FIFOCTL_AUTO_FB_1 0x1000 // 0001 0000 0000 0000
167#define FIFOCTL_AUTO_FB_0 0x0800 // 0000 1000 0000 0000
168#define FIFOCTL_GRPACK 0x0400 // 0000 0100 0000 0000
169#define FIFOCTL_11GA 0x0300 // 0000 0011 0000 0000
170#define FIFOCTL_11GB 0x0200 // 0000 0010 0000 0000
171#define FIFOCTL_11B 0x0100 // 0000 0001 0000 0000
172#define FIFOCTL_11A 0x0000 // 0000 0000 0000 0000
173#define FIFOCTL_RTS 0x0080 // 0000 0000 1000 0000
174#define FIFOCTL_ISDMA0 0x0040 // 0000 0000 0100 0000
175#define FIFOCTL_GENINT 0x0020 // 0000 0000 0010 0000
176#define FIFOCTL_TMOEN 0x0010 // 0000 0000 0001 0000
177#define FIFOCTL_LRETRY 0x0008 // 0000 0000 0000 1000
178#define FIFOCTL_CRCDIS 0x0004 // 0000 0000 0000 0100
179#define FIFOCTL_NEEDACK 0x0002 // 0000 0000 0000 0010
180#define FIFOCTL_LHEAD 0x0001 // 0000 0000 0000 0001
181
182//WMAC definition Frag Control
183#define FRAGCTL_AES 0x0300 // 0000 0011 0000 0000
184#define FRAGCTL_TKIP 0x0200 // 0000 0010 0000 0000
185#define FRAGCTL_LEGACY 0x0100 // 0000 0001 0000 0000
186#define FRAGCTL_NONENCRYPT 0x0000 // 0000 0000 0000 0000
187//#define FRAGCTL_AC3 0x000C // 0000 0000 0000 1100
188//#define FRAGCTL_AC2 0x0008 // 0000 0000 0000 1000
189//#define FRAGCTL_AC1 0x0004 // 0000 0000 0000 0100
190//#define FRAGCTL_AC0 0x0000 // 0000 0000 0000 0000
191#define FRAGCTL_ENDFRAG 0x0003 // 0000 0000 0000 0011
192#define FRAGCTL_MIDFRAG 0x0002 // 0000 0000 0000 0010
193#define FRAGCTL_STAFRAG 0x0001 // 0000 0000 0000 0001
194#define FRAGCTL_NONFRAG 0x0000 // 0000 0000 0000 0000
195
196#endif // #ifdef __BIG_ENDIAN
197
198//#define TYPE_AC0DMA 0
199//#define TYPE_TXDMA0 1
200#define TYPE_TXDMA0 0
201#define TYPE_AC0DMA 1
202#define TYPE_ATIMDMA 2
203#define TYPE_SYNCDMA 3
204#define TYPE_MAXTD 2
205
206#define TYPE_BEACONDMA 4
207
208#define TYPE_RXDMA0 0
209#define TYPE_RXDMA1 1
210#define TYPE_MAXRD 2
211
212
213
214// TD_INFO flags control bit
215#define TD_FLAGS_NETIF_SKB 0x01 // check if need release skb
216#define TD_FLAGS_PRIV_SKB 0x02 // check if called from private skb(hostap)
217#define TD_FLAGS_PS_RETRY 0x04 // check if PS STA frame re-transmit
218//#define TD_FLAGS_NETIF_SKB 0x04
219
220/*--------------------- Export Types ------------------------------*/
221
222// ref_sk_buff is used for mapping the skb structure between pre-built driver-obj & running kernel.
223// Since different kernel version (2.4x) may change skb structure, i.e. pre-built driver-obj
224// may link to older skb that leads error.
225
226typedef struct tagDEVICE_RD_INFO {
227 struct sk_buff* skb;
5449c685
FB		 228 dma_addr_t skb_dma;
229 dma_addr_t curr_desc;
230} DEVICE_RD_INFO, *PDEVICE_RD_INFO;
231
232/*
233static inline PDEVICE_RD_INFO alloc_rd_info(void) {
234 PDEVICE_RD_INFO ptr;
d2c6170b
JP		 235 ptr = kmalloc(sizeof(DEVICE_RD_INFO), GFP_ATOMIC);
236 if (ptr == NULL)
5449c685
FB		 237 return NULL;
238 else {
239 memset(ptr,0,sizeof(DEVICE_RD_INFO));
240 return ptr;
241 }
242}
243*/
244
245/*
246typedef struct tagRDES0 {
247 WORD wResCount;
248 WORD wf1Owner ;
249// WORD f15Reserved : 15;
250// WORD f1Owner : 1;
251} __attribute__ ((__packed__))
252SRDES0;
253*/
254
255#ifdef __BIG_ENDIAN
256
257typedef struct tagRDES0 {
258 volatile WORD wResCount;
259 union {
260 volatile U16 f15Reserved;
261 struct {
262 volatile U8 f8Reserved1;
263 volatile U8 f1Owner:1;
264 volatile U8 f7Reserved:7;
265 } __attribute__ ((__packed__));
266 } __attribute__ ((__packed__));
267} __attribute__ ((__packed__))
268SRDES0, *PSRDES0;
269
270#else
271
272typedef struct tagRDES0 {
273 WORD wResCount;
274 WORD f15Reserved : 15;
275 WORD f1Owner : 1;
276} __attribute__ ((__packed__))
277SRDES0;
278
279
280#endif
281
282typedef struct tagRDES1 {
283 WORD wReqCount;
284 WORD wReserved;
285} __attribute__ ((__packed__))
286SRDES1;
287
288//
289// Rx descriptor
290//
291typedef struct tagSRxDesc {
292 volatile SRDES0 m_rd0RD0;
293 volatile SRDES1 m_rd1RD1;
294 volatile U32 buff_addr;
295 volatile U32 next_desc;
296 struct tagSRxDesc *next;//4 bytes
297 volatile PDEVICE_RD_INFO pRDInfo;//4 bytes
298 volatile U32 Reserved[2];//8 bytes
299} __attribute__ ((__packed__))
a884847a
JL		 300SRxDesc, *PSRxDesc;
301typedef const SRxDesc *PCSRxDesc;
5449c685
FB		 302
303#ifdef __BIG_ENDIAN
304
305/*
306typedef struct tagTDES0 {
307 volatile BYTE byTSR0;
308 volatile BYTE byTSR1;
309 volatile WORD wOwner_Txtime;
310// volatile WORD f15Txtime : 15;
311// volatile WORD f1Owner:1;
312} __attribute__ ((__packed__))
313STDES0;
314*/
315
316typedef struct tagTDES0 {
317 volatile BYTE byTSR0;
318 volatile BYTE byTSR1;
319 union {
320 volatile U16 f15Txtime;
321 struct {
322 volatile U8 f8Reserved1;
323 volatile U8 f1Owner:1;
324 volatile U8 f7Reserved:7;
325 } __attribute__ ((__packed__));
326 } __attribute__ ((__packed__));
327} __attribute__ ((__packed__))
328STDES0, PSTDES0;
329
330#else
331
332typedef struct tagTDES0 {
333 volatile BYTE byTSR0;
334 volatile BYTE byTSR1;
335 volatile WORD f15Txtime : 15;
336 volatile WORD f1Owner:1;
337} __attribute__ ((__packed__))
338STDES0;
339
340#endif
341
342
343typedef struct tagTDES1 {
344 volatile WORD wReqCount;
345 volatile BYTE byTCR;
346 volatile BYTE byReserved;
347} __attribute__ ((__packed__))
348STDES1;
349
350
351typedef struct tagDEVICE_TD_INFO{
352 struct sk_buff* skb;
353 PBYTE buf;
354 dma_addr_t skb_dma;
355 dma_addr_t buf_dma;
356 dma_addr_t curr_desc;
357 DWORD dwReqCount;
358 DWORD dwHeaderLength;
359 BYTE byFlags;
360} DEVICE_TD_INFO, *PDEVICE_TD_INFO;
361
362/*
363static inline PDEVICE_TD_INFO alloc_td_info(void) {
364 PDEVICE_TD_INFO ptr;
d2c6170b
JP		 365 ptr = kmalloc(sizeof(DEVICE_TD_INFO),GFP_ATOMIC);
366 if (ptr == NULL)
5449c685
FB		 367 return NULL;
368 else {
369 memset(ptr,0,sizeof(DEVICE_TD_INFO));
370 return ptr;
371 }
372}
373*/
374
375//
376// transmit descriptor
377//
378typedef struct tagSTxDesc {
379 volatile STDES0 m_td0TD0;
380 volatile STDES1 m_td1TD1;
381 volatile U32 buff_addr;
382 volatile U32 next_desc;
383 struct tagSTxDesc* next; //4 bytes
384 volatile PDEVICE_TD_INFO pTDInfo;//4 bytes
385 volatile U32 Reserved[2];//8 bytes
386} __attribute__ ((__packed__))
a884847a
JL		 387STxDesc, *PSTxDesc;
388typedef const STxDesc *PCSTxDesc;
5449c685
FB		 389
390
391typedef struct tagSTxSyncDesc {
392 volatile STDES0 m_td0TD0;
393 volatile STDES1 m_td1TD1;
394 volatile DWORD buff_addr; // pointer to logical buffer
395 volatile DWORD next_desc; // pointer to next logical descriptor
396 volatile WORD m_wFIFOCtl;
397 volatile WORD m_wTimeStamp;
398 struct tagSTxSyncDesc* next; //4 bytes
399 volatile PDEVICE_TD_INFO pTDInfo;//4 bytes
400 volatile DWORD m_dwReserved2;
401} __attribute__ ((__packed__))
a884847a
JL		 402STxSyncDesc, *PSTxSyncDesc;
403typedef const STxSyncDesc *PCSTxSyncDesc;
5449c685
FB		 404
405
406//
407// RsvTime buffer header
408//
409typedef struct tagSRrvTime_gRTS {
410 WORD wRTSTxRrvTime_ba;
411 WORD wRTSTxRrvTime_aa;
412 WORD wRTSTxRrvTime_bb;
413 WORD wReserved;
414 WORD wTxRrvTime_b;
415 WORD wTxRrvTime_a;
416}__attribute__ ((__packed__))
a884847a
JL		 417SRrvTime_gRTS, *PSRrvTime_gRTS;
418typedef const SRrvTime_gRTS *PCSRrvTime_gRTS;
5449c685
FB		 419
420typedef struct tagSRrvTime_gCTS {
421 WORD wCTSTxRrvTime_ba;
422 WORD wReserved;
423 WORD wTxRrvTime_b;
424 WORD wTxRrvTime_a;
425}__attribute__ ((__packed__))
a884847a
JL		 426SRrvTime_gCTS, *PSRrvTime_gCTS;
427typedef const SRrvTime_gCTS *PCSRrvTime_gCTS;
5449c685
FB		 428
429typedef struct tagSRrvTime_ab {
430 WORD wRTSTxRrvTime;
431 WORD wTxRrvTime;
432}__attribute__ ((__packed__))
a884847a
JL		 433SRrvTime_ab, *PSRrvTime_ab;
434typedef const SRrvTime_ab *PCSRrvTime_ab;
5449c685
FB		 435
436typedef struct tagSRrvTime_atim {
437 WORD wCTSTxRrvTime_ba;
438 WORD wTxRrvTime_a;
439}__attribute__ ((__packed__))
a884847a
JL		 440SRrvTime_atim, *PSRrvTime_atim;
441typedef const SRrvTime_atim *PCSRrvTime_atim;
5449c685
FB		 442
443//
444// RTS buffer header
445//
446typedef struct tagSRTSData {
447 WORD wFrameControl;
448 WORD wDurationID;
078b078f
CC		 449 BYTE abyRA[ETH_ALEN];
450 BYTE abyTA[ETH_ALEN];
5449c685 451}__attribute__ ((__packed__))
a884847a
JL		 452SRTSData, *PSRTSData;
453typedef const SRTSData *PCSRTSData;
5449c685
FB		 454
455typedef struct tagSRTS_g {
456 BYTE bySignalField_b;
457 BYTE byServiceField_b;
458 WORD wTransmitLength_b;
459 BYTE bySignalField_a;
460 BYTE byServiceField_a;
461 WORD wTransmitLength_a;
462 WORD wDuration_ba;
463 WORD wDuration_aa;
464 WORD wDuration_bb;
465 WORD wReserved;
466 SRTSData Data;
467}__attribute__ ((__packed__))
a884847a
JL		 468SRTS_g, *PSRTS_g;
469typedef const SRTS_g *PCSRTS_g;
5449c685
FB		 470
471
472typedef struct tagSRTS_g_FB {
473 BYTE bySignalField_b;
474 BYTE byServiceField_b;
475 WORD wTransmitLength_b;
476 BYTE bySignalField_a;
477 BYTE byServiceField_a;
478 WORD wTransmitLength_a;
479 WORD wDuration_ba;
480 WORD wDuration_aa;
481 WORD wDuration_bb;
482 WORD wReserved;
483 WORD wRTSDuration_ba_f0;
484 WORD wRTSDuration_aa_f0;
485 WORD wRTSDuration_ba_f1;
486 WORD wRTSDuration_aa_f1;
487 SRTSData Data;
488}__attribute__ ((__packed__))
a884847a
JL		 489SRTS_g_FB, *PSRTS_g_FB;
490typedef const SRTS_g_FB *PCSRTS_g_FB;
5449c685
FB		 491
492
493typedef struct tagSRTS_ab {
494 BYTE bySignalField;
495 BYTE byServiceField;
496 WORD wTransmitLength;
497 WORD wDuration;
498 WORD wReserved;
499 SRTSData Data;
500}__attribute__ ((__packed__))
a884847a
JL		 501SRTS_ab, *PSRTS_ab;
502typedef const SRTS_ab *PCSRTS_ab;
5449c685
FB		 503
504
505typedef struct tagSRTS_a_FB {
506 BYTE bySignalField;
507 BYTE byServiceField;
508 WORD wTransmitLength;
509 WORD wDuration;
510 WORD wReserved;
511 WORD wRTSDuration_f0;
512 WORD wRTSDuration_f1;
513 SRTSData Data;
514}__attribute__ ((__packed__))
a884847a
JL		 515SRTS_a_FB, *PSRTS_a_FB;
516typedef const SRTS_a_FB *PCSRTS_a_FB;
5449c685
FB		 517
518
519//
520// CTS buffer header
521//
522typedef struct tagSCTSData {
523 WORD wFrameControl;
524 WORD wDurationID;
078b078f 525 BYTE abyRA[ETH_ALEN];
5449c685
FB		 526 WORD wReserved;
527}__attribute__ ((__packed__))
a884847a 528SCTSData, *PSCTSData;
5449c685
FB		 529
530typedef struct tagSCTS {
531 BYTE bySignalField_b;
532 BYTE byServiceField_b;
533 WORD wTransmitLength_b;
534 WORD wDuration_ba;
535 WORD wReserved;
536 SCTSData Data;
537}__attribute__ ((__packed__))
a884847a
JL		 538SCTS, *PSCTS;
539typedef const SCTS *PCSCTS;
5449c685
FB		 540
541typedef struct tagSCTS_FB {
542 BYTE bySignalField_b;
543 BYTE byServiceField_b;
544 WORD wTransmitLength_b;
545 WORD wDuration_ba;
546 WORD wReserved;
547 WORD wCTSDuration_ba_f0;
548 WORD wCTSDuration_ba_f1;
549 SCTSData Data;
550}__attribute__ ((__packed__))
a884847a
JL		 551SCTS_FB, *PSCTS_FB;
552typedef const SCTS_FB *PCSCTS_FB;
5449c685
FB		 553
554
555//
556// Tx FIFO header
557//
558typedef struct tagSTxBufHead {
559 DWORD adwTxKey[4];
560 WORD wFIFOCtl;
561 WORD wTimeStamp;
562 WORD wFragCtl;
563 BYTE byTxPower;
564 BYTE wReserved;
565}__attribute__ ((__packed__))
a884847a
JL		 566STxBufHead, *PSTxBufHead;
567typedef const STxBufHead *PCSTxBufHead;
5449c685
FB		 568
569typedef struct tagSTxShortBufHead {
570 WORD wFIFOCtl;
571 WORD wTimeStamp;
572}__attribute__ ((__packed__))
a884847a
JL		 573STxShortBufHead, *PSTxShortBufHead;
574typedef const STxShortBufHead *PCSTxShortBufHead;
5449c685
FB		 575
576//
577// Tx data header
578//
579typedef struct tagSTxDataHead_g {
580 BYTE bySignalField_b;
581 BYTE byServiceField_b;
582 WORD wTransmitLength_b;
583 BYTE bySignalField_a;
584 BYTE byServiceField_a;
585 WORD wTransmitLength_a;
586 WORD wDuration_b;
587 WORD wDuration_a;
588 WORD wTimeStampOff_b;
589 WORD wTimeStampOff_a;
590}__attribute__ ((__packed__))
a884847a
JL		 591STxDataHead_g, *PSTxDataHead_g;
592typedef const STxDataHead_g *PCSTxDataHead_g;
5449c685
FB		 593
594typedef struct tagSTxDataHead_g_FB {
595 BYTE bySignalField_b;
596 BYTE byServiceField_b;
597 WORD wTransmitLength_b;
598 BYTE bySignalField_a;
599 BYTE byServiceField_a;
600 WORD wTransmitLength_a;
601 WORD wDuration_b;
602 WORD wDuration_a;
603 WORD wDuration_a_f0;
604 WORD wDuration_a_f1;
605 WORD wTimeStampOff_b;
606 WORD wTimeStampOff_a;
607}__attribute__ ((__packed__))
a884847a
JL		 608STxDataHead_g_FB, *PSTxDataHead_g_FB;
609typedef const STxDataHead_g_FB *PCSTxDataHead_g_FB;
5449c685
FB		 610
611
612typedef struct tagSTxDataHead_ab {
613 BYTE bySignalField;
614 BYTE byServiceField;
615 WORD wTransmitLength;
616 WORD wDuration;
617 WORD wTimeStampOff;
618}__attribute__ ((__packed__))
a884847a
JL		 619STxDataHead_ab, *PSTxDataHead_ab;
620typedef const STxDataHead_ab *PCSTxDataHead_ab;
5449c685
FB		 621
622
623typedef struct tagSTxDataHead_a_FB {
624 BYTE bySignalField;
625 BYTE byServiceField;
626 WORD wTransmitLength;
627 WORD wDuration;
628 WORD wTimeStampOff;
629 WORD wDuration_f0;
630 WORD wDuration_f1;
631}__attribute__ ((__packed__))
a884847a
JL		 632STxDataHead_a_FB, *PSTxDataHead_a_FB;
633typedef const STxDataHead_a_FB *PCSTxDataHead_a_FB;
5449c685
FB		 634
635//
636// MICHDR data header
637//
638typedef struct tagSMICHDRHead {
639 DWORD adwHDR0[4];
640 DWORD adwHDR1[4];
641 DWORD adwHDR2[4];
642}__attribute__ ((__packed__))
a884847a
JL		 643SMICHDRHead, *PSMICHDRHead;
644typedef const SMICHDRHead *PCSMICHDRHead;
5449c685
FB		 645
646typedef struct tagSBEACONCtl {
647 DWORD BufReady : 1;
648 DWORD TSF : 15;
649 DWORD BufLen : 11;
650 DWORD Reserved : 5;
651}__attribute__ ((__packed__))
652SBEACONCtl;
653
654
655typedef struct tagSSecretKey {
656 DWORD dwLowDword;
657 BYTE byHighByte;
658}__attribute__ ((__packed__))
659SSecretKey;
660
661typedef struct tagSKeyEntry {
662 BYTE abyAddrHi[2];
663 WORD wKCTL;
664 BYTE abyAddrLo[4];
665 DWORD dwKey0[4];
666 DWORD dwKey1[4];
667 DWORD dwKey2[4];
668 DWORD dwKey3[4];
669 DWORD dwKey4[4];
670}__attribute__ ((__packed__))
671SKeyEntry;
672/*--------------------- Export Macros ------------------------------*/
673
674/*--------------------- Export Classes ----------------------------*/
675
676/*--------------------- Export Variables --------------------------*/
677
678/*--------------------- Export Functions --------------------------*/
679
680
681
682
683#endif // __DESC_H__
684
kernel source for telekom puls (alcatel/mediatek)